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[81.204.249.205]) by smtp.gmail.com with ESMTPSA id h11-20020a1709063c0b00b0097883000525sm5477783ejg.15.2023.06.12.08.02.40 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Mon, 12 Jun 2023 08:02:41 -0700 (PDT) Message-ID: Date: Mon, 12 Jun 2023 17:02:40 +0200 MIME-Version: 1.0 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:102.0) Gecko/20100101 Thunderbird/102.11.0 From: Johan Jonker Subject: [PATCH v2 1/5] mtd: nand: raw: rockchip-nand-controller: copy hwecc PA data to oob_poi buffer To: miquel.raynal@bootlin.com Cc: richard@nod.at, vigneshr@ti.com, heiko@sntech.de, linux-mtd@lists.infradead.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-rockchip@lists.infradead.org, yifeng.zhao@rock-chips.com References: <11e16c3b-6f7b-a6a9-b0ed-b7ac0cd703e3@gmail.com> Content-Language: en-US In-Reply-To: <11e16c3b-6f7b-a6a9-b0ed-b7ac0cd703e3@gmail.com> X-Spam-Status: No, score=-1.9 required=5.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,FREEMAIL_ENVFROM_END_DIGIT, FREEMAIL_FROM,RCVD_IN_DNSWL_NONE,SPF_HELO_NONE,SPF_PASS, T_SCC_BODY_TEXT_LINE autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-getmail-retrieved-from-mailbox: =?utf-8?q?INBOX?= X-GMAIL-THRID: =?utf-8?q?1768511275248365069?= X-GMAIL-MSGID: =?utf-8?q?1768511275248365069?= Rockchip boot blocks are written per 4 x 512 byte sectors per page. Each page must have a page address (PA) pointer in OOB to the next page. Pages are written in a pattern depending on the NAND chip ID. This logic used to build a page pattern table is not fully disclosed and is not easy to fit in the MTD framework. The formula in rk_nfc_write_page_hwecc() function is not correct. Make hwecc and raw behavior identical. Generate boot block page address and pattern for hwecc in user space and copy PA data to/from the last 4 bytes in the chip->oob_poi data layout. Signed-off-by: Johan Jonker --- .../mtd/nand/raw/rockchip-nand-controller.c | 34 ++++++++++++------- 1 file changed, 21 insertions(+), 13 deletions(-) -- 2.30.2 diff --git a/drivers/mtd/nand/raw/rockchip-nand-controller.c b/drivers/mtd/nand/raw/rockchip-nand-controller.c index 2312e2736..cafccc324 100644 --- a/drivers/mtd/nand/raw/rockchip-nand-controller.c +++ b/drivers/mtd/nand/raw/rockchip-nand-controller.c @@ -597,7 +597,7 @@ static int rk_nfc_write_page_hwecc(struct nand_chip *chip, const u8 *buf, int pages_per_blk = mtd->erasesize / mtd->writesize; int ret = 0, i, boot_rom_mode = 0; dma_addr_t dma_data, dma_oob; - u32 reg; + u32 tmp; u8 *oob; nand_prog_page_begin_op(chip, page, 0, NULL, 0); @@ -624,6 +624,13 @@ static int rk_nfc_write_page_hwecc(struct nand_chip *chip, const u8 *buf, * * 0xFF 0xFF 0xFF 0xFF | BBM OOB1 OOB2 OOB3 | ... * + * The code here just swaps the first 4 bytes with the last + * 4 bytes without losing any data. + * + * The chip->oob_poi data layout: + * + * BBM OOB1 OOB2 OOB3 |......| PA0 PA1 PA2 PA3 + * * Configure the ECC algorithm supported by the boot ROM. */ if ((page < (pages_per_blk * rknand->boot_blks)) && @@ -634,21 +641,17 @@ static int rk_nfc_write_page_hwecc(struct nand_chip *chip, const u8 *buf, } for (i = 0; i < ecc->steps; i++) { - if (!i) { - reg = 0xFFFFFFFF; - } else { + if (!i) + oob = chip->oob_poi + (ecc->steps - 1) * NFC_SYS_DATA_SIZE; + else oob = chip->oob_poi + (i - 1) * NFC_SYS_DATA_SIZE; - reg = oob[0] | oob[1] << 8 | oob[2] << 16 | - oob[3] << 24; - } - if (!i && boot_rom_mode) - reg = (page & (pages_per_blk - 1)) * 4; + tmp = oob[0] | oob[1] << 8 | oob[2] << 16 | oob[3] << 24; if (nfc->cfg->type == NFC_V9) - nfc->oob_buf[i] = reg; + nfc->oob_buf[i] = tmp; else - nfc->oob_buf[i * (oob_step / 4)] = reg; + nfc->oob_buf[i * (oob_step / 4)] = tmp; } dma_data = dma_map_single(nfc->dev, (void *)nfc->page_buf, @@ -811,12 +814,17 @@ static int rk_nfc_read_page_hwecc(struct nand_chip *chip, u8 *buf, int oob_on, goto timeout_err; } - for (i = 1; i < ecc->steps; i++) { - oob = chip->oob_poi + (i - 1) * NFC_SYS_DATA_SIZE; + for (i = 0; i < ecc->steps; i++) { + if (!i) + oob = chip->oob_poi + (ecc->steps - 1) * NFC_SYS_DATA_SIZE; + else + oob = chip->oob_poi + (i - 1) * NFC_SYS_DATA_SIZE; + if (nfc->cfg->type == NFC_V9) tmp = nfc->oob_buf[i]; else tmp = nfc->oob_buf[i * (oob_step / 4)]; + *oob++ = (u8)tmp; *oob++ = (u8)(tmp >> 8); *oob++ = (u8)(tmp >> 16); From patchwork Mon Jun 12 15:02:59 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Johan Jonker X-Patchwork-Id: 106678 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a59:994d:0:b0:3d9:f83d:47d9 with SMTP id k13csp2669643vqr; Mon, 12 Jun 2023 08:30:30 -0700 (PDT) X-Google-Smtp-Source: ACHHUZ7vDVWS5azVyKtokQtGLVOV3dwskfMyZTaCeFdf8vuN0M6lOANewxay+3Xy/B0vNw2uP/Hw X-Received: by 2002:a17:907:318d:b0:974:6176:2223 with SMTP id xe13-20020a170907318d00b0097461762223mr11389472ejb.13.1686583829850; Mon, 12 Jun 2023 08:30:29 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1686583829; cv=none; d=google.com; s=arc-20160816; b=DedhzYnqMkyuyltTzq/1yia/KNnto5I31Y905F4JqqYTNmajo+o7BNHpMkEOwuAsz+ dIbhs28KUN9ARDFvzWbh4A4teCpSksja6VcJ0xwgf/v3HS94s/ysAn/VmOtmZFruqaS7 rxhZEqsdCCcytdXf73KWb+aATeZH/gwirFo/B/Wem2Uyhv1fhohBmCKNhqPj0P4PpNiZ +qnLtJwCK7HOZj35Oz2LHl7pJcCh2x3O4hN+DM/eMYjiK+lx1S6v9Os1LWE4voBpD/pB hwwWnAkWQQ6u79VgLsCbRN+a2O4F2Z15raYT5/HHH+zmUJ6j2WZtSsH1XdUuoC4IMZe6 xg+Q== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:content-transfer-encoding:in-reply-to :content-language:references:cc:to:subject:from:user-agent :mime-version:date:message-id:dkim-signature; bh=5jdo+u3pfToMD+E2Ff5G6AtrFm+z8Xryt182/z7nGO8=; b=DDvOZMBwe+0Ldlv4U/y2CHXvsIXNXT2rxzBtqoqdty3SrrAhObUvYyfqXr59iufYDc iduwxxz3lNpDd85Y0/yWw6CmlgVzh3OfJ8JrwfECRGRdSjCe73L9ujm9BKsjvxMfgaWX xx0pDnZvO8TLBsgH1RqwJogS0gQiRy2q+J7pjvs1muVQFKu4ty0GoXE1j6fUPKNKVuiG //JsbuWO/vjZ716aCN+jMG5XX3wkjUSehSVjWLpFOHUPEeIoSJ4BZQqTB8y7DxzkrTyj gyh938K20S7Q7RNimQraDpEnDPbRVgm9OskjE9xc96Aw5W2koT9HKL+DNXGTUc+b/x84 nfRg== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@gmail.com header.s=20221208 header.b=JyOlQBn4; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=QUARANTINE dis=NONE) header.from=gmail.com Received: from out1.vger.email (out1.vger.email. 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[81.204.249.205]) by smtp.gmail.com with ESMTPSA id p4-20020a05640210c400b005158563be4asm5184499edu.33.2023.06.12.08.02.59 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Mon, 12 Jun 2023 08:03:00 -0700 (PDT) Message-ID: Date: Mon, 12 Jun 2023 17:02:59 +0200 MIME-Version: 1.0 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:102.0) Gecko/20100101 Thunderbird/102.11.0 From: Johan Jonker Subject: [PATCH v2 2/5] mtd: nand: raw: rockchip-nand-controller: add skipbbt option To: miquel.raynal@bootlin.com Cc: richard@nod.at, vigneshr@ti.com, heiko@sntech.de, linux-mtd@lists.infradead.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-rockchip@lists.infradead.org, yifeng.zhao@rock-chips.com References: <11e16c3b-6f7b-a6a9-b0ed-b7ac0cd703e3@gmail.com> Content-Language: en-US In-Reply-To: <11e16c3b-6f7b-a6a9-b0ed-b7ac0cd703e3@gmail.com> X-Spam-Status: No, score=-1.9 required=5.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,FREEMAIL_ENVFROM_END_DIGIT, FREEMAIL_FROM,RCVD_IN_DNSWL_NONE,SPF_HELO_NONE,SPF_PASS, T_SCC_BODY_TEXT_LINE autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-getmail-retrieved-from-mailbox: =?utf-8?q?INBOX?= X-GMAIL-THRID: =?utf-8?q?1768511325699541082?= X-GMAIL-MSGID: =?utf-8?q?1768511325699541082?= On Rockchip SoCs the first boot stages are written on NAND with help of manufacturer software that uses a different format then the MTD framework. Skip the automatic BBT scan with the NAND_SKIP_BBTSCAN option so that the original content is unchanged during the driver probe. The NAND_NO_BBM_QUIRK option allows us to erase bad blocks with the nand_erase_nand() function and the flash_erase command. With these options the user has the "freedom of choice" by neutral access mode to read and write in whatever format is needed. Signed-off-by: Johan Jonker --- Changed V2: reword --- drivers/mtd/nand/raw/rockchip-nand-controller.c | 7 +++++++ 1 file changed, 7 insertions(+) -- 2.30.2 diff --git a/drivers/mtd/nand/raw/rockchip-nand-controller.c b/drivers/mtd/nand/raw/rockchip-nand-controller.c index cafccc324..31d8c7a87 100644 --- a/drivers/mtd/nand/raw/rockchip-nand-controller.c +++ b/drivers/mtd/nand/raw/rockchip-nand-controller.c @@ -188,6 +188,10 @@ struct rk_nfc { unsigned long assigned_cs; }; +static int skipbbt; +module_param(skipbbt, int, 0644); +MODULE_PARM_DESC(skipbbt, "Skip BBT scan if data on the NAND chip is not in MTD format."); + static inline struct rk_nfc_nand_chip *rk_nfc_to_rknand(struct nand_chip *chip) { return container_of(chip, struct rk_nfc_nand_chip, chip); @@ -1156,6 +1160,9 @@ static int rk_nfc_nand_chip_init(struct device *dev, struct rk_nfc *nfc, nand_set_controller_data(chip, nfc); + if (skipbbt) + chip->options |= NAND_SKIP_BBTSCAN | NAND_NO_BBM_QUIRK; + chip->options |= NAND_USES_DMA | NAND_NO_SUBPAGE_WRITE; chip->bbt_options = NAND_BBT_USE_FLASH | NAND_BBT_NO_OOB; From patchwork Mon Jun 12 15:03:18 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Johan Jonker X-Patchwork-Id: 106670 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a59:994d:0:b0:3d9:f83d:47d9 with SMTP id k13csp2666102vqr; Mon, 12 Jun 2023 08:24:59 -0700 (PDT) X-Google-Smtp-Source: ACHHUZ4EQ/wxn75iIPdCKZdvULmILbpmULMmvhtDMcW6pWUbVGT99bVxOb8JpmLIjGt4Y9esb3MW X-Received: by 2002:a05:6a00:b42:b0:64c:c5f9:152a with SMTP id p2-20020a056a000b4200b0064cc5f9152amr12399891pfo.23.1686583499720; Mon, 12 Jun 2023 08:24:59 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1686583499; cv=none; d=google.com; s=arc-20160816; b=uZSK4EAPJPr8oUnTZK3ZK+pfvdtq2SGmsK0enl+0IRRjSLLw4kw4bbtsT8/5HZ7LcC PhUw+yZF/2hXatWB8Otv/OAqfIpzE84HbwEMRzOn8APyyTJ2nxxYqjmgk3Hvya7egYlk rPpfh9dMRQMf9EOUTNYvyEUVNNSptEQa74LfCx/IrWxXLY/2kEhYuofL7t9ftd7fclKA cn9Nu0sjhdMqqNCVE0/76vuSXGMIDPGPUdyMiGOurZYNj1PFtuM6DK018pEMXJK7RBVR kT/R/eUQnR9YBOMKEn1QMJ3p6a6GcOL6gaK3hEqaXWx+qIbTgUct/bKQuSGCdNJwpYUX mUuw== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:content-transfer-encoding:in-reply-to :content-language:references:cc:to:subject:from:user-agent :mime-version:date:message-id:dkim-signature; bh=C6UuLqkfXOKHkrI1ad2tdmANY5TMlVXBKHyBVpKDDNs=; b=lztkdZ4wIXgnu1TQqaeAn65TxmN42hAQjY5ChjY6u//6yomPOP0DVOYSMsGaMEl5OY 5Pur071lJU4Ff6HvHo926GD+S9gNb21fQ9j93fCb5/jElM3r58vpgU+AK4Fl1QJevEF3 wchYyBPGxueKBvbY6kPtv+T4T//N/ndCnOwQ6fnUpJzj7S6y/A3xKX3N5P4ObttTrj3Y XoHjdW3Lg2/CwU1DiD8H1ve5KswUR2uqB4q569xVLsJHazsvbluRzqx8FeCJPREXyO4h GVYhpGKiN5mDlL3mJOgWMcDsG5hf1ec427meUcQNWeLQ2T1bTIgWyNHRzRrjj5wkCkpm MGaw== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@gmail.com header.s=20221208 header.b=fQoS3tSG; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=QUARANTINE dis=NONE) header.from=gmail.com Received: from out1.vger.email (out1.vger.email. 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[81.204.249.205]) by smtp.gmail.com with ESMTPSA id k14-20020a1709061c0e00b0096f6e2f4d9esm5264570ejg.83.2023.06.12.08.03.18 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Mon, 12 Jun 2023 08:03:19 -0700 (PDT) Message-ID: Date: Mon, 12 Jun 2023 17:03:18 +0200 MIME-Version: 1.0 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:102.0) Gecko/20100101 Thunderbird/102.11.0 From: Johan Jonker Subject: [PATCH v2 3/5] mtd: nand: raw: rockchip-nand-controller: fix oobfree offset and description To: miquel.raynal@bootlin.com Cc: richard@nod.at, vigneshr@ti.com, heiko@sntech.de, linux-mtd@lists.infradead.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-rockchip@lists.infradead.org, yifeng.zhao@rock-chips.com References: <11e16c3b-6f7b-a6a9-b0ed-b7ac0cd703e3@gmail.com> Content-Language: en-US In-Reply-To: <11e16c3b-6f7b-a6a9-b0ed-b7ac0cd703e3@gmail.com> X-Spam-Status: No, score=-1.9 required=5.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,FREEMAIL_ENVFROM_END_DIGIT, FREEMAIL_FROM,RCVD_IN_DNSWL_NONE,SPF_HELO_NONE,SPF_PASS, T_SCC_BODY_TEXT_LINE autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-getmail-retrieved-from-mailbox: =?utf-8?q?INBOX?= X-GMAIL-THRID: =?utf-8?q?1768510979602165719?= X-GMAIL-MSGID: =?utf-8?q?1768510979602165719?= The MTD framework reserves 1 or 2 bytes for the bad block marker depending on the bus size. The rockchip-nand-controller driver currently only supports a 8 bit bus, but reserves standard 2 bytes for the BBM. The first free OOB byte is therefore OOB2 at offset 2. Page address(PA) bytes are moved to the last 4 positions before ECC. Update the description for Linux. Signed-off-by: Johan Jonker --- drivers/mtd/nand/raw/rockchip-nand-controller.c | 11 ++++------- 1 file changed, 4 insertions(+), 7 deletions(-) -- 2.30.2 diff --git a/drivers/mtd/nand/raw/rockchip-nand-controller.c b/drivers/mtd/nand/raw/rockchip-nand-controller.c index 31d8c7a87..fcda4c760 100644 --- a/drivers/mtd/nand/raw/rockchip-nand-controller.c +++ b/drivers/mtd/nand/raw/rockchip-nand-controller.c @@ -566,9 +566,10 @@ static int rk_nfc_write_page_raw(struct nand_chip *chip, const u8 *buf, * BBM OOB1 OOB2 OOB3 |......| PA0 PA1 PA2 PA3 * * The rk_nfc_ooblayout_free() function already has reserved - * these 4 bytes with: + * these 4 bytes together with 2 bytes for BBM + * by reducing it's length: * - * oob_region->offset = NFC_SYS_DATA_SIZE + 2; + * oob_region->length = rknand->metadata_size - NFC_SYS_DATA_SIZE - 2; */ if (!i) memcpy(rk_nfc_oob_ptr(chip, i), @@ -945,12 +946,8 @@ static int rk_nfc_ooblayout_free(struct mtd_info *mtd, int section, if (section) return -ERANGE; - /* - * The beginning of the OOB area stores the reserved data for the NFC, - * the size of the reserved data is NFC_SYS_DATA_SIZE bytes. - */ oob_region->length = rknand->metadata_size - NFC_SYS_DATA_SIZE - 2; - oob_region->offset = NFC_SYS_DATA_SIZE + 2; + oob_region->offset = 2; return 0; } From patchwork Mon Jun 12 15:03:35 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Johan Jonker X-Patchwork-Id: 106671 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a59:994d:0:b0:3d9:f83d:47d9 with SMTP id k13csp2666718vqr; Mon, 12 Jun 2023 08:25:52 -0700 (PDT) X-Google-Smtp-Source: ACHHUZ5VvXf1BGINz4YpPFXTVUJMuMnWLrdscse1p3VWjnmSkSnIgVff312+fwvp8EVzZKgji6p5 X-Received: by 2002:a05:6a00:b84:b0:652:7b99:df30 with SMTP id g4-20020a056a000b8400b006527b99df30mr13415809pfj.25.1686583552611; Mon, 12 Jun 2023 08:25:52 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1686583552; cv=none; d=google.com; s=arc-20160816; b=y5k0hT7MJqg0L5WYT9tDzXvFl3ggrPJKq6g/HdzUv3JtciyLuwr+Fj3GySZ/0SpQHv cOB6Nmq+LL+AJk1AkONb694bc6tqkpyCPGDZYxtNRChKbuoQ71CDFoLrr/s3FdR+w7M8 sIDFqo395hr3nZS4G8yZKLlKQCFfPatq0bGWMMiz0U8EOo11rcZQz/6B+HEhrSzQkUV0 kJpRbwG6CfnLEJqgg4IR13/0jzbr9BTevDYinriBYJe4SlbAkMH71JlvJzzgVX3qoMSx QVhzby8MHl1BcFEzaY1te24dI9XXIGEr1KbMRJEVNFSV+3R4LXc7mmcgm+sKmRnRFemh tHTg== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:content-transfer-encoding:in-reply-to :content-language:references:cc:to:subject:from:user-agent :mime-version:date:message-id:dkim-signature; bh=3hduzuBSaxb22Mp/MQNps6D7J398rtVmcYbSbMQMqAA=; b=Sfxz4yQD6GCJSGH854EaGEZLRMAPqsN/65DTxniucI/knofKuGc8ihUjtxouRomnwa wLhBDnU6Yj3LLEuvy8CfEwJHdrdFdX7g/LIEDPRDEDb9ACf4Czl9P93YPJJ0Aob7l67E /C5vIpGVPH7osqiFQOOIxVq2lu82AmCoxBlfkHPQZj9Vh7YNwS02p4SIZ72jWEMs5KD6 bg3Nj5NbDIzng7v6nVwKMm25u2ei9bTfBL+yteQY31wecDYW+cK4kRbCuRa1GmpWH8l4 f1+Y6TwNuT+e+GO1sbS0fDj23Fuwn7wZXDVk9YFGRKDJY/qdukOEM5KvCPFYkRtI6BzP yG7Q== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@gmail.com header.s=20221208 header.b=HZE9ePUe; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=QUARANTINE dis=NONE) header.from=gmail.com Received: from out1.vger.email (out1.vger.email. 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[81.204.249.205]) by smtp.gmail.com with ESMTPSA id c13-20020aa7c74d000000b0051823c1a10bsm3454421eds.54.2023.06.12.08.03.35 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Mon, 12 Jun 2023 08:03:36 -0700 (PDT) Message-ID: <86aaf385-3c0a-21d9-46fe-f84ee26efbc6@gmail.com> Date: Mon, 12 Jun 2023 17:03:35 +0200 MIME-Version: 1.0 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:102.0) Gecko/20100101 Thunderbird/102.11.0 From: Johan Jonker Subject: [PATCH v2 4/5] mtd: nand: raw: add basic sandisk manufacturer ops To: miquel.raynal@bootlin.com Cc: richard@nod.at, vigneshr@ti.com, heiko@sntech.de, linux-mtd@lists.infradead.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-rockchip@lists.infradead.org, yifeng.zhao@rock-chips.com References: <11e16c3b-6f7b-a6a9-b0ed-b7ac0cd703e3@gmail.com> Content-Language: en-US In-Reply-To: <11e16c3b-6f7b-a6a9-b0ed-b7ac0cd703e3@gmail.com> X-Spam-Status: No, score=-1.9 required=5.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,FREEMAIL_ENVFROM_END_DIGIT, FREEMAIL_FROM,RCVD_IN_DNSWL_NONE,SPF_HELO_NONE,SPF_PASS, T_SCC_BODY_TEXT_LINE autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-getmail-retrieved-from-mailbox: =?utf-8?q?INBOX?= X-GMAIL-THRID: =?utf-8?q?1768511035444356073?= X-GMAIL-MSGID: =?utf-8?q?1768511035444356073?= Add basic Sandisk manufacturer ops support to get SDTNQGAMA timing data with the nand_get_sdr_timings() function. Signed-off-by: Johan Jonker --- Limited to one chip model for now. In need for someone with better knowledge of the Sandisk product range to expand and improve. Documentation is rare to find. --- drivers/mtd/nand/raw/Makefile | 1 + drivers/mtd/nand/raw/internals.h | 1 + drivers/mtd/nand/raw/nand_ids.c | 2 +- drivers/mtd/nand/raw/nand_sandisk.c | 26 ++++++++++++++++++++++++++ 4 files changed, 29 insertions(+), 1 deletion(-) create mode 100644 drivers/mtd/nand/raw/nand_sandisk.c -- 2.30.2 diff --git a/drivers/mtd/nand/raw/Makefile b/drivers/mtd/nand/raw/Makefile index 917cdfb81..d93e861d8 100644 --- a/drivers/mtd/nand/raw/Makefile +++ b/drivers/mtd/nand/raw/Makefile @@ -67,5 +67,6 @@ nand-objs += nand_esmt.o nand-objs += nand_hynix.o nand-objs += nand_macronix.o nand-objs += nand_micron.o +nand-objs += nand_sandisk.o nand-objs += nand_samsung.o nand-objs += nand_toshiba.o diff --git a/drivers/mtd/nand/raw/internals.h b/drivers/mtd/nand/raw/internals.h index 7016e0f38..e9932da18 100644 --- a/drivers/mtd/nand/raw/internals.h +++ b/drivers/mtd/nand/raw/internals.h @@ -73,6 +73,7 @@ extern const struct nand_manufacturer_ops hynix_nand_manuf_ops; extern const struct nand_manufacturer_ops macronix_nand_manuf_ops; extern const struct nand_manufacturer_ops micron_nand_manuf_ops; extern const struct nand_manufacturer_ops samsung_nand_manuf_ops; +extern const struct nand_manufacturer_ops sandisk_nand_manuf_ops; extern const struct nand_manufacturer_ops toshiba_nand_manuf_ops; /* MLC pairing schemes */ diff --git a/drivers/mtd/nand/raw/nand_ids.c b/drivers/mtd/nand/raw/nand_ids.c index dacc5529b..1a89ed796 100644 --- a/drivers/mtd/nand/raw/nand_ids.c +++ b/drivers/mtd/nand/raw/nand_ids.c @@ -188,7 +188,7 @@ static const struct nand_manufacturer_desc nand_manufacturer_descs[] = { {NAND_MFR_NATIONAL, "National"}, {NAND_MFR_RENESAS, "Renesas"}, {NAND_MFR_SAMSUNG, "Samsung", &samsung_nand_manuf_ops}, - {NAND_MFR_SANDISK, "SanDisk"}, + {NAND_MFR_SANDISK, "SanDisk", &sandisk_nand_manuf_ops}, {NAND_MFR_STMICRO, "ST Micro"}, {NAND_MFR_TOSHIBA, "Toshiba", &toshiba_nand_manuf_ops}, {NAND_MFR_WINBOND, "Winbond"}, diff --git a/drivers/mtd/nand/raw/nand_sandisk.c b/drivers/mtd/nand/raw/nand_sandisk.c new file mode 100644 index 000000000..7c66e4187 --- /dev/null +++ b/drivers/mtd/nand/raw/nand_sandisk.c @@ -0,0 +1,26 @@ +// SPDX-License-Identifier: GPL-2.0-or-later + +#include "internals.h" + +static int +sdtnqgama_choose_interface_config(struct nand_chip *chip, + struct nand_interface_config *iface) +{ + onfi_fill_interface_config(chip, iface, NAND_SDR_IFACE, 0); + + return nand_choose_best_sdr_timings(chip, iface, NULL); +} + +static int sandisk_nand_init(struct nand_chip *chip) +{ + if (!strncmp("SDTNQGAMA", chip->parameters.model, + sizeof("SDTNQGAMA") - 1)) + chip->ops.choose_interface_config = + &sdtnqgama_choose_interface_config; + + return 0; +} + +const struct nand_manufacturer_ops sandisk_nand_manuf_ops = { + .init = sandisk_nand_init, +}; From patchwork Mon Jun 12 15:03:52 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Johan Jonker X-Patchwork-Id: 106669 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a59:994d:0:b0:3d9:f83d:47d9 with SMTP id k13csp2665129vqr; Mon, 12 Jun 2023 08:23:24 -0700 (PDT) X-Google-Smtp-Source: ACHHUZ72RHQv+0ff7lbUNhT+Vy4dNHWATBtovE/YAGRPbSW8O/dc23VXeEHKEj5LVrvugfNuZHJg X-Received: by 2002:a05:6a20:968c:b0:105:6d0e:c046 with SMTP id hp12-20020a056a20968c00b001056d0ec046mr10940306pzc.26.1686583404583; Mon, 12 Jun 2023 08:23:24 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1686583404; cv=none; d=google.com; s=arc-20160816; b=yv52T1UaEAA5d13W9ykSIpkPCERJ9pCT194kBINDc9uve38ScCMtB6AQWcrmEuB7wT jfdDMfS852CLRjDrjxiB997UeX4JOgbpKzhkQ+HazJdon3zrl5QkhW5vmMGUOetX9Sfs F+RfFtEVNWl3zDHM40LE7/mLwkVqg+qjMGCyFdxDWJb1Clge3FOup9k2l5BkUHXhBYD0 Q3073fEZpSFMiMMM3Kf0Btwr3f7FtRJeM9M2IO3IewhobCCimfW7hGfzjT4cizYNj1nF oNUmtBwLKrxwojM2Zf2i9wGjBj1Qdz5sxjqE20T2ooHSxypMmXI671gAIAFZE4ogUPOh KSXA== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:content-transfer-encoding:in-reply-to :content-language:references:cc:to:subject:from:user-agent :mime-version:date:message-id:dkim-signature; bh=b5dvgiuwu58z2RBXdkqKsBTMg+eHX490cp2iBeNipXs=; b=dR450Iz2uGJ3E7oSjnj4Qp9Yj565Qo9QKUmEodM/mgp7ce/ToLRZHeSKSTe0pUpM9h 2tATBQ/DCDIWj6gnk/7OO8IXGbBwymIm3LzJcet/tb8W+B2snqwyUWV9cgZ0MdW0hfOr 0adKztO6ZxAFyJ2lLtQ9jzWQprdSphWJpC4+ARwTGnj4AgJWaaaSjSh+sPL9fd4jTKXM 9R5ChiaMla1dsrM24FJCkAAqDlrByFjfyEuENB7qDJ+u6Xg002f/gXHwfgeEw2vV+d4/ oQRqZjT3PQgOy1DFB8BPeRp1nv3ip2iR9nkwYb4oHd2LV66OBqMPQxpZdpVyj15FVXzB inpA== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@gmail.com header.s=20221208 header.b=oyw5FcG9; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=QUARANTINE dis=NONE) header.from=gmail.com Received: from out1.vger.email (out1.vger.email. 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[81.204.249.205]) by smtp.gmail.com with ESMTPSA id o20-20020a170906601400b00977d3fb2a7dsm5298309ejj.76.2023.06.12.08.03.52 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Mon, 12 Jun 2023 08:03:53 -0700 (PDT) Message-ID: <8b5303a0-fb1b-ee05-c2e6-bbd2d9c06cb9@gmail.com> Date: Mon, 12 Jun 2023 17:03:52 +0200 MIME-Version: 1.0 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:102.0) Gecko/20100101 Thunderbird/102.11.0 From: Johan Jonker Subject: [PATCH v2 5/5] mtd: nand: add support for the Sandisk SDTNQGAMA chip To: miquel.raynal@bootlin.com Cc: richard@nod.at, vigneshr@ti.com, heiko@sntech.de, linux-mtd@lists.infradead.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-rockchip@lists.infradead.org, yifeng.zhao@rock-chips.com References: <11e16c3b-6f7b-a6a9-b0ed-b7ac0cd703e3@gmail.com> Content-Language: en-US In-Reply-To: <11e16c3b-6f7b-a6a9-b0ed-b7ac0cd703e3@gmail.com> X-Spam-Status: No, score=-1.9 required=5.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,FREEMAIL_ENVFROM_END_DIGIT, FREEMAIL_FROM,RCVD_IN_DNSWL_NONE,SPF_HELO_NONE,SPF_PASS, T_SCC_BODY_TEXT_LINE autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-getmail-retrieved-from-mailbox: =?utf-8?q?INBOX?= X-GMAIL-THRID: =?utf-8?q?1768510879816677747?= X-GMAIL-MSGID: =?utf-8?q?1768510879816677747?= Sandisk SDTNQGAMA is a 8GB size, 3.3V 8 bit chip with 16KB page size, 1KB write size and 40 bit ecc support Co-developed-by: Paweł Jarosz Signed-off-by: Paweł Jarosz Signed-off-by: Johan Jonker --- drivers/mtd/nand/raw/nand_ids.c | 3 +++ 1 file changed, 3 insertions(+) -- 2.30.2 diff --git a/drivers/mtd/nand/raw/nand_ids.c b/drivers/mtd/nand/raw/nand_ids.c index 1a89ed796..650351c62 100644 --- a/drivers/mtd/nand/raw/nand_ids.c +++ b/drivers/mtd/nand/raw/nand_ids.c @@ -44,6 +44,9 @@ struct nand_flash_dev nand_flash_ids[] = { {"TC58NVG6D2 64G 3.3V 8-bit", { .id = {0x98, 0xde, 0x94, 0x82, 0x76, 0x56, 0x04, 0x20} }, SZ_8K, SZ_8K, SZ_2M, 0, 8, 640, NAND_ECC_INFO(40, SZ_1K) }, + {"SDTNQGAMA 64G 3.3V 8-bit", + { .id = {0x45, 0xde, 0x94, 0x93, 0x76, 0x57} }, + SZ_16K, SZ_8K, SZ_4M, 0, 6, 1280, NAND_ECC_INFO(40, SZ_1K) }, {"SDTNRGAMA 64G 3.3V 8-bit", { .id = {0x45, 0xde, 0x94, 0x93, 0x76, 0x50} }, SZ_16K, SZ_8K, SZ_4M, 0, 6, 1280, NAND_ECC_INFO(40, SZ_1K) },