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[83.9.29.190]) by smtp.gmail.com with ESMTPSA id b18-20020ac25632000000b004f628eb7884sm641349lff.232.2023.06.09.13.19.15 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 09 Jun 2023 13:19:16 -0700 (PDT) From: Konrad Dybcio Date: Fri, 09 Jun 2023 22:19:06 +0200 Subject: [PATCH v2 01/22] soc: qcom: smd-rpm: Add QCOM_SMD_RPM_STATE_NUM MIME-Version: 1.0 Message-Id: <20230526-topic-smd_icc-v2-1-e5934b07d813@linaro.org> References: <20230526-topic-smd_icc-v2-0-e5934b07d813@linaro.org> In-Reply-To: <20230526-topic-smd_icc-v2-0-e5934b07d813@linaro.org> To: Andy Gross , Bjorn Andersson , Michael Turquette , Stephen Boyd , Georgi Djakov , Leo Yan , Evan Green Cc: Marijn Suijten , linux-arm-msm@vger.kernel.org, linux-kernel@vger.kernel.org, linux-clk@vger.kernel.org, linux-pm@vger.kernel.org, Konrad Dybcio X-Mailer: b4 0.12.2 X-Developer-Signature: v=1; a=ed25519-sha256; t=1686341953; l=664; i=konrad.dybcio@linaro.org; s=20230215; h=from:subject:message-id; bh=XHE1WQYZzaLo+c3xD4ALM/GRb1VwY7GuxNqpdL0mBnk=; b=6RgsfDZ2UAsQB1GY/otsgs26Hc6coYtp4QVzrinbpw/gqd+d3IaH7aJ+z1h5QDVrTQC029lTU s6o+aHaRz+rBf6F8PbEP+PDGhbi82dgfHUMyjp98eDrrWChbNTFtqUy X-Developer-Key: i=konrad.dybcio@linaro.org; a=ed25519; pk=iclgkYvtl2w05SSXO5EjjSYlhFKsJ+5OSZBjOkQuEms= X-Spam-Status: No, score=-2.1 required=5.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,RCVD_IN_DNSWL_NONE, SPF_HELO_NONE,SPF_PASS,T_SCC_BODY_TEXT_LINE,URIBL_BLOCKED autolearn=unavailable autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-getmail-retrieved-from-mailbox: =?utf-8?q?INBOX?= X-GMAIL-THRID: =?utf-8?q?1768258235759488375?= X-GMAIL-MSGID: =?utf-8?q?1768258235759488375?= Add a preprocessor define to indicate the number of RPM contexts/states. Signed-off-by: Konrad Dybcio --- include/linux/soc/qcom/smd-rpm.h | 1 + 1 file changed, 1 insertion(+) diff --git a/include/linux/soc/qcom/smd-rpm.h b/include/linux/soc/qcom/smd-rpm.h index 2990f425fdef..e468f94fa323 100644 --- a/include/linux/soc/qcom/smd-rpm.h +++ b/include/linux/soc/qcom/smd-rpm.h @@ -6,6 +6,7 @@ struct qcom_smd_rpm; #define QCOM_SMD_RPM_ACTIVE_STATE 0 #define QCOM_SMD_RPM_SLEEP_STATE 1 +#define QCOM_SMD_RPM_STATE_NUM 2 /* * Constants used for addressing resources in the RPM. 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Signed-off-by: Konrad Dybcio --- include/linux/soc/qcom/smd-rpm.h | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/include/linux/soc/qcom/smd-rpm.h b/include/linux/soc/qcom/smd-rpm.h index e468f94fa323..99499e4b080e 100644 --- a/include/linux/soc/qcom/smd-rpm.h +++ b/include/linux/soc/qcom/smd-rpm.h @@ -4,8 +4,8 @@ struct qcom_smd_rpm; -#define QCOM_SMD_RPM_ACTIVE_STATE 0 -#define QCOM_SMD_RPM_SLEEP_STATE 1 +#define QCOM_SMD_RPM_ACTIVE_STATE 0 +#define QCOM_SMD_RPM_SLEEP_STATE 1 #define QCOM_SMD_RPM_STATE_NUM 2 /* From patchwork Fri Jun 9 20:19:08 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Konrad Dybcio X-Patchwork-Id: 105797 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a59:994d:0:b0:3d9:f83d:47d9 with SMTP id k13csp1166090vqr; Fri, 9 Jun 2023 13:29:09 -0700 (PDT) X-Google-Smtp-Source: ACHHUZ6znAv8Oig2IhazRe5H5BA650xQUbdkZVgVZJBIzuxuo1/uvZDR7ocodJ3BVrdqobxaqP9r X-Received: by 2002:a05:6a20:12d1:b0:119:94f4:c614 with SMTP id v17-20020a056a2012d100b0011994f4c614mr2036243pzg.55.1686342549350; Fri, 09 Jun 2023 13:29:09 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1686342549; cv=none; d=google.com; s=arc-20160816; b=YmOmHdY4QuAcMJ4j/YTvSCj3sVK/ofP3VTG4oMCsxr+W9642qL3dhcepsO+R/ROQ0S WNmzW8m9BfCnZq0fdqp6jmWsVoyHnqo1wEaH0U4vHc7xGl6JEyL/n0YhmHLF9fnR4yKn PykAYxXWIwV055cP6AhJqaNzenXEidlfz8D1AllDmG77Ovoj+8QEZyTJA4AqltQE8Ngi xHR+QxXoeLGKpr+MtZgwoUE9O/jMvnUVCFBb3p2Z5zVVFICaQhyKUdzkS4rHuqKcbBJ1 PtghQVXn69c060/HbvqN3UDaZfvQPoF3FmFf/TD6cQcgQzrMMrBhJ7sRCXI9UsnVtxGU wwqw== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:cc:to:in-reply-to:references:message-id :content-transfer-encoding:mime-version:subject:date:from :dkim-signature; bh=o4TG88G8lz+fAZ9zU8d6rxSrHlYur3wUM1VMDavTyKo=; b=jpITN83eu2LmJ9d20p3nytuDH5OPhItA22LYHGR3Kgsj5wc4F0K+kUoyJdG9FWElSd oCilc5/O+i/K6lTN0Pdi7Oobi0nY9eqoNJDbPmd7xm6JIdpXm+taos7zY3gk6Hfre0uR 5sX4H0qrOklsKFIki4P+MS413tFQK6EZsIsQzcLzxWS2+s2e3SqotIeuRlxGdhb6mbvw wf0mtywXIKuTsDzSV4buXSTRQyoMhcxOAnBAnDhEQpCr3Z/S9ZLouhazCcuJVHTQZYk2 RNTULnH0kXSIYpULv6sUkUmtWOlqo44+blQkbn89Ss8nI54kF6vvlY1YcmCB5B6rqn08 FDtQ== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=qJwESa6T; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: from out1.vger.email (out1.vger.email. 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[83.9.29.190]) by smtp.gmail.com with ESMTPSA id b18-20020ac25632000000b004f628eb7884sm641349lff.232.2023.06.09.13.19.17 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 09 Jun 2023 13:19:18 -0700 (PDT) From: Konrad Dybcio Date: Fri, 09 Jun 2023 22:19:08 +0200 Subject: [PATCH v2 03/22] clk: qcom: smd-rpm: Move some RPM resources to the common header MIME-Version: 1.0 Message-Id: <20230526-topic-smd_icc-v2-3-e5934b07d813@linaro.org> References: <20230526-topic-smd_icc-v2-0-e5934b07d813@linaro.org> In-Reply-To: <20230526-topic-smd_icc-v2-0-e5934b07d813@linaro.org> To: Andy Gross , Bjorn Andersson , Michael Turquette , Stephen Boyd , Georgi Djakov , Leo Yan , Evan Green Cc: Marijn Suijten , linux-arm-msm@vger.kernel.org, linux-kernel@vger.kernel.org, linux-clk@vger.kernel.org, linux-pm@vger.kernel.org, Konrad Dybcio , Dmitry Baryshkov X-Mailer: b4 0.12.2 X-Developer-Signature: v=1; a=ed25519-sha256; t=1686341953; l=2437; i=konrad.dybcio@linaro.org; s=20230215; h=from:subject:message-id; bh=UU7GtjAFC9F3/14Sgtv72aSDwAe2u4JL+0KQToDCmwI=; b=DwmrC5bgCMsGkboo7dYMtoVQPexE6x7n5ZSH9/AjiZbntp4SZLkKIG9KH6RkKo14G2ByfEFLW 0ffy9SvAQ6dA7aIAD6TVs94ybJzOrnUGeoj0WZ06c55qBoErRW8IEV4 X-Developer-Key: i=konrad.dybcio@linaro.org; a=ed25519; pk=iclgkYvtl2w05SSXO5EjjSYlhFKsJ+5OSZBjOkQuEms= X-Spam-Status: No, score=-2.1 required=5.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,RCVD_IN_DNSWL_NONE, SPF_HELO_NONE,SPF_PASS,T_SCC_BODY_TEXT_LINE,URIBL_BLOCKED autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-getmail-retrieved-from-mailbox: =?utf-8?q?INBOX?= X-GMAIL-THRID: =?utf-8?q?1768258324879054295?= X-GMAIL-MSGID: =?utf-8?q?1768258324879054295?= In preparation for handling the bus clocks in the icc driver, carve out some defines and a struct definition to the common rpm header. Reviewed-by: Dmitry Baryshkov Signed-off-by: Konrad Dybcio --- drivers/clk/qcom/clk-smd-rpm.c | 13 ------------- include/linux/soc/qcom/smd-rpm.h | 15 +++++++++++++++ 2 files changed, 15 insertions(+), 13 deletions(-) diff --git a/drivers/clk/qcom/clk-smd-rpm.c b/drivers/clk/qcom/clk-smd-rpm.c index e4de74b68797..937cb1515968 100644 --- a/drivers/clk/qcom/clk-smd-rpm.c +++ b/drivers/clk/qcom/clk-smd-rpm.c @@ -18,13 +18,6 @@ #include -#define QCOM_RPM_KEY_SOFTWARE_ENABLE 0x6e657773 -#define QCOM_RPM_KEY_PIN_CTRL_CLK_BUFFER_ENABLE_KEY 0x62636370 -#define QCOM_RPM_SMD_KEY_RATE 0x007a484b -#define QCOM_RPM_SMD_KEY_ENABLE 0x62616e45 -#define QCOM_RPM_SMD_KEY_STATE 0x54415453 -#define QCOM_RPM_SCALING_ENABLE_ID 0x2 - #define __DEFINE_CLK_SMD_RPM_PREFIX(_prefix, _name, _active, \ type, r_id, key) \ static struct clk_smd_rpm clk_smd_rpm_##_prefix##_active; \ @@ -171,12 +164,6 @@ struct clk_smd_rpm { unsigned long rate; }; -struct clk_smd_rpm_req { - __le32 key; - __le32 nbytes; - __le32 value; -}; - struct rpm_smd_clk_desc { struct clk_smd_rpm **clks; size_t num_clks; diff --git a/include/linux/soc/qcom/smd-rpm.h b/include/linux/soc/qcom/smd-rpm.h index 99499e4b080e..8190878645f9 100644 --- a/include/linux/soc/qcom/smd-rpm.h +++ b/include/linux/soc/qcom/smd-rpm.h @@ -2,6 +2,8 @@ #ifndef __QCOM_SMD_RPM_H__ #define __QCOM_SMD_RPM_H__ +#include + struct qcom_smd_rpm; #define QCOM_SMD_RPM_ACTIVE_STATE 0 @@ -45,6 +47,19 @@ struct qcom_smd_rpm; #define QCOM_SMD_RPM_PKA_CLK 0x616b70 #define QCOM_SMD_RPM_MCFG_CLK 0x6766636d +#define QCOM_RPM_KEY_SOFTWARE_ENABLE 0x6e657773 +#define QCOM_RPM_KEY_PIN_CTRL_CLK_BUFFER_ENABLE_KEY 0x62636370 +#define QCOM_RPM_SMD_KEY_RATE 0x007a484b +#define QCOM_RPM_SMD_KEY_ENABLE 0x62616e45 +#define QCOM_RPM_SMD_KEY_STATE 0x54415453 +#define QCOM_RPM_SCALING_ENABLE_ID 0x2 + +struct clk_smd_rpm_req { + __le32 key; + __le32 nbytes; + __le32 value; +}; + int qcom_rpm_smd_write(struct qcom_smd_rpm *rpm, int state, u32 resource_type, u32 resource_id, From patchwork Fri Jun 9 20:19:09 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Konrad Dybcio X-Patchwork-Id: 105809 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a59:994d:0:b0:3d9:f83d:47d9 with SMTP id k13csp1174197vqr; Fri, 9 Jun 2023 13:47:06 -0700 (PDT) X-Google-Smtp-Source: ACHHUZ4152ZfQZo8PtHooJXh+XqjWyzPFUMzzUAZNDyvR/zbplD9AU3Ke/i8mydUz7ztfiFjD3XP X-Received: by 2002:a17:90a:b00f:b0:250:132a:5d93 with SMTP id x15-20020a17090ab00f00b00250132a5d93mr1952924pjq.49.1686343625590; Fri, 09 Jun 2023 13:47:05 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1686343625; cv=none; d=google.com; s=arc-20160816; b=O0nq2O1evr2anJYf7/Sq64b0NYTrMJbG8R+rFFK1S5eFYtxU2SWnp82yfB9ZAC4mCT ZgRoPYH0EJzgYA8GfJAwlfoIFCMzDHiZBU3tnkzW66lpTCKu4Qjx1VCJ1OhANv2Bhxsz HWrwrKVmNkxhOdFaTobTOx7vLDej2diF6RTOqYtIKk7jq4yw32CDnl9jFYI62Anqn6M6 B6kcVKt69BPTTt9p/H+lZEpDnZ4LfFgnFLjbcxz8DNsdWkClkUEnQ3GA25pBYPhKfTL8 MJPjb0uwp0G/psyJmWtnoD5btkvG4hmpQX7pLSAa+S7U7aAJq5fUYveQh3D9hWyopxP3 KpWA== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:cc:to:in-reply-to:references:message-id :content-transfer-encoding:mime-version:subject:date:from :dkim-signature; bh=WM2lIBCQpaCLxOM0eZa+yyh2dei168j4wOh+tPpmJK0=; b=02Ls2/sCDi6jYfOpcETvhHuXbznVjsl/a4RwpB/FwPKd6eiszGg39XkbtQm4NvqjE4 DBxrif4SQpUKBVE+lNbiszvsIA89HDB9bcrykGCB8lYBS1d4EPe5ulD9vmwnxqyrXtGd gUcfccT695lDjHXQF/CRqBWksI/UstP9bJX8MdZplzBoF2kDFyfAz6atrhSOpV1u/XS/ eIvWLh0u6TgW0aMMBwJOdauPNV13r0DCbzRbQ7dmf89rW9QEZ1cwR9C24mYX1ZWpS3+J ipl+iQdstYaXRm0AmthKnjykPzyA6NDk0lnQGFqsif25W7VnYMXA4fx4J3bIhd7LhXqN /qRQ== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=gzLNdXMG; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: from out1.vger.email (out1.vger.email. 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[83.9.29.190]) by smtp.gmail.com with ESMTPSA id b18-20020ac25632000000b004f628eb7884sm641349lff.232.2023.06.09.13.19.19 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 09 Jun 2023 13:19:20 -0700 (PDT) From: Konrad Dybcio Date: Fri, 09 Jun 2023 22:19:09 +0200 Subject: [PATCH v2 04/22] clk: qcom: smd-rpm: Export clock scaling availability MIME-Version: 1.0 Message-Id: <20230526-topic-smd_icc-v2-4-e5934b07d813@linaro.org> References: <20230526-topic-smd_icc-v2-0-e5934b07d813@linaro.org> In-Reply-To: <20230526-topic-smd_icc-v2-0-e5934b07d813@linaro.org> To: Andy Gross , Bjorn Andersson , Michael Turquette , Stephen Boyd , Georgi Djakov , Leo Yan , Evan Green Cc: Marijn Suijten , linux-arm-msm@vger.kernel.org, linux-kernel@vger.kernel.org, linux-clk@vger.kernel.org, linux-pm@vger.kernel.org, Konrad Dybcio X-Mailer: b4 0.12.2 X-Developer-Signature: v=1; a=ed25519-sha256; t=1686341953; l=1931; i=konrad.dybcio@linaro.org; s=20230215; h=from:subject:message-id; bh=sfIIZ4nJOxKMuz78S/kJHIPdUookF7KrBzGOCFONLgY=; b=UGsFPui0AzaF8mwTfLqT11gqTSGaF6XKmO5msD2SsfjTYhDoq5xBBDwwF696aoGiYMWfJAghc 0wMWoO20fcxAuSzyDyj4jpMiPdgh9nnfNMzxwC62Wa44XYgWEUOo4Hl X-Developer-Key: i=konrad.dybcio@linaro.org; a=ed25519; pk=iclgkYvtl2w05SSXO5EjjSYlhFKsJ+5OSZBjOkQuEms= X-Spam-Status: No, score=-2.1 required=5.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,RCVD_IN_DNSWL_NONE, SPF_HELO_NONE,SPF_PASS,T_SCC_BODY_TEXT_LINE,URIBL_BLOCKED autolearn=unavailable autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-getmail-retrieved-from-mailbox: =?utf-8?q?INBOX?= X-GMAIL-THRID: =?utf-8?q?1768259453450544470?= X-GMAIL-MSGID: =?utf-8?q?1768259453450544470?= Before we issue a call to RPM through clk_smd_rpm_enable_scaling() the clock rate requests will not be commited in hardware. This poses a race threat since we're accessing the bus clocks directly from within the interconnect framework. Add a marker to indicate that we're good to go with sending new requests and export it so that it can be referenced from icc. Signed-off-by: Konrad Dybcio Signed-off-by: Stephan Gerhold --- drivers/clk/qcom/clk-smd-rpm.c | 9 +++++++++ include/linux/soc/qcom/smd-rpm.h | 2 ++ 2 files changed, 11 insertions(+) diff --git a/drivers/clk/qcom/clk-smd-rpm.c b/drivers/clk/qcom/clk-smd-rpm.c index 937cb1515968..482fe30ee6f0 100644 --- a/drivers/clk/qcom/clk-smd-rpm.c +++ b/drivers/clk/qcom/clk-smd-rpm.c @@ -151,6 +151,7 @@ #define to_clk_smd_rpm(_hw) container_of(_hw, struct clk_smd_rpm, hw) static struct qcom_smd_rpm *rpmcc_smd_rpm; +static bool smd_rpm_clk_scaling; struct clk_smd_rpm { const int rpm_res_type; @@ -385,6 +386,12 @@ static unsigned long clk_smd_rpm_recalc_rate(struct clk_hw *hw, return r->rate; } +bool qcom_smd_rpm_scaling_available(void) +{ + return smd_rpm_clk_scaling; +} +EXPORT_SYMBOL_GPL(qcom_smd_rpm_scaling_available); + static int clk_smd_rpm_enable_scaling(void) { int ret; @@ -410,6 +417,8 @@ static int clk_smd_rpm_enable_scaling(void) return ret; } + smd_rpm_clk_scaling = true; + pr_debug("%s: RPM clock scaling is enabled\n", __func__); return 0; } diff --git a/include/linux/soc/qcom/smd-rpm.h b/include/linux/soc/qcom/smd-rpm.h index 8190878645f9..420f6c79d535 100644 --- a/include/linux/soc/qcom/smd-rpm.h +++ b/include/linux/soc/qcom/smd-rpm.h @@ -65,4 +65,6 @@ int qcom_rpm_smd_write(struct qcom_smd_rpm *rpm, u32 resource_type, u32 resource_id, void *buf, size_t count); +bool qcom_smd_rpm_scaling_available(void); + #endif From patchwork Fri Jun 9 20:19:10 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Konrad Dybcio X-Patchwork-Id: 105796 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a59:994d:0:b0:3d9:f83d:47d9 with SMTP id k13csp1165546vqr; Fri, 9 Jun 2023 13:27:51 -0700 (PDT) X-Google-Smtp-Source: ACHHUZ7krlVMprcK3SS+AMPFj10sVib2JiifEFDxVeHJ3bNjSS4cKvL9fqEGqFrpJaFfokNwrnDl X-Received: by 2002:a05:6a00:2d91:b0:63b:6149:7ad6 with SMTP id fb17-20020a056a002d9100b0063b61497ad6mr2241847pfb.34.1686342471419; Fri, 09 Jun 2023 13:27:51 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1686342471; cv=none; d=google.com; s=arc-20160816; b=kJZ+PulKGEOTInB+0SIzqTpc+CRlh8jqiQfCavcbNc74nrIvFac3y0IsbGFfSKaTR9 +S7xpfcl2EYGzhT0M5K5nwKtoi1Nr9MGOfBLPcdk+vOgo2Q/YebgehTGENfYnkcjOxJH qm4F6XV/QbA0IOg/bqmmh20+AGi9lgr43DFfLGZyfLJcPWsqXRLBc9OEtZmumzwZgggy TV9eiePJu4+e3Ia6nCyKvexHoXGc2QZszNgFazHIzRVrGaFYAyUVYHRDNzKZVXqu/kMC PSJm/IWZmP541Xx4yv2Fpw7xIYlSdWh2FzpdOAnC/3AgqTwmWCf5IlNqri9htr9PWIeS U94w== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:cc:to:in-reply-to:references:message-id :content-transfer-encoding:mime-version:subject:date:from :dkim-signature; bh=UEM3N0iLIlvYLepw85JsPFibfyRzMkZ98OPjRwmkvbs=; b=fKUD1IhP25+abp1pGRpExmQyCupDMpzXwm2tpdHAepgOsl3f2k+et+6xnI2OKrsrTx 9UksSAoX/+KDGC3+kMN4iD4WyUdnmzzS1lTE6XWgxuFw6z+h+iGeoFtthfIXNel9Jerf xhQF9IUMxrRXNMrBK2XMvqyIdTieK1NixEmbGRv+QWC7wbCfif/YQoZecCdi4cy5MyTN aXCOSlECy8ueKZwvEDfhphHaqB6hq3WmLzqiCUqdKFCLHsOVtMRn0bQKyyzroJys/BSo xT5WYdo+TvM/cDzYlhHiH0tuF5bCfGB+VMe2e+YDD90pmXlUIgk/x9ZLwlNXmdthEdYD VNLw== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=n1invhpM; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: from out1.vger.email (out1.vger.email. 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[83.9.29.190]) by smtp.gmail.com with ESMTPSA id b18-20020ac25632000000b004f628eb7884sm641349lff.232.2023.06.09.13.19.20 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 09 Jun 2023 13:19:21 -0700 (PDT) From: Konrad Dybcio Date: Fri, 09 Jun 2023 22:19:10 +0200 Subject: [PATCH v2 05/22] interconnect: qcom: icc-rpm: Introduce keep_alive MIME-Version: 1.0 Message-Id: <20230526-topic-smd_icc-v2-5-e5934b07d813@linaro.org> References: <20230526-topic-smd_icc-v2-0-e5934b07d813@linaro.org> In-Reply-To: <20230526-topic-smd_icc-v2-0-e5934b07d813@linaro.org> To: Andy Gross , Bjorn Andersson , Michael Turquette , Stephen Boyd , Georgi Djakov , Leo Yan , Evan Green Cc: Marijn Suijten , linux-arm-msm@vger.kernel.org, linux-kernel@vger.kernel.org, linux-clk@vger.kernel.org, linux-pm@vger.kernel.org, Konrad Dybcio , Dmitry Baryshkov X-Mailer: b4 0.12.2 X-Developer-Signature: v=1; a=ed25519-sha256; t=1686341953; l=3661; i=konrad.dybcio@linaro.org; s=20230215; h=from:subject:message-id; bh=g6kESh9vFn5cUExPwamnhleED6tFd+S7dtFe11cmEVE=; b=N0GZFd1D6lY98LSYi6TjN77PBSwUCLkJMaQklefTtlImuAIykZ8MVuwn2levHNt36jVkfRPX+ KTMOHPcIZCCD27uzyhX1OwB4BEm+ERzRFSS+A8pteqBB3lGg//fxlRt X-Developer-Key: i=konrad.dybcio@linaro.org; a=ed25519; pk=iclgkYvtl2w05SSXO5EjjSYlhFKsJ+5OSZBjOkQuEms= X-Spam-Status: No, score=-2.1 required=5.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,RCVD_IN_DNSWL_NONE, SPF_HELO_NONE,SPF_PASS,T_SCC_BODY_TEXT_LINE,URIBL_BLOCKED autolearn=unavailable autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-getmail-retrieved-from-mailbox: =?utf-8?q?INBOX?= X-GMAIL-THRID: =?utf-8?q?1768258243230109953?= X-GMAIL-MSGID: =?utf-8?q?1768258243230109953?= The downstream kernel employs the concept of "keeping the bus alive" by voting for the minimum (XO/19.2MHz) rate at all times on certain (well, most) buses. This is a very important thing to have, as if we either have a lackluster/wrong DT that doesn't specify a (high enough) vote on a certain bus, we may lose access to the entire bus altogether. This is very apparent when we only start introducing interconnect support on a given platform and haven't yet introduced voting on all peripherals. The same can happen if we only have a single driver casting a vote on a certain bus and that driver exits/crashes/suspends. The keepalive vote is limited to the ACTIVE bucket, as keeping a permanent vote on the SLEEP one could prevent the platform from properly entering low power mode states. Introduce the very same concept, with a slight twist: the vendor kernel checks whether the rate is zero before setting the minimum vote, but that's rather silly, as in doing so we're at the mercy of CCF. Instead, explicitly clamp the rates to always be >= 19.2 MHz for providers with keep_alive=true. Reviewed-by: Dmitry Baryshkov Signed-off-by: Konrad Dybcio --- drivers/interconnect/qcom/icc-rpm.c | 10 ++++++++++ drivers/interconnect/qcom/icc-rpm.h | 3 +++ 2 files changed, 13 insertions(+) diff --git a/drivers/interconnect/qcom/icc-rpm.c b/drivers/interconnect/qcom/icc-rpm.c index 6acc7686ed38..863e8ba1daa2 100644 --- a/drivers/interconnect/qcom/icc-rpm.c +++ b/drivers/interconnect/qcom/icc-rpm.c @@ -50,6 +50,8 @@ #define NOC_QOS_MODE_FIXED_VAL 0x0 #define NOC_QOS_MODE_BYPASS_VAL 0x2 +#define ICC_BUS_CLK_MIN_RATE 19200000ULL + static int qcom_icc_set_qnoc_qos(struct icc_node *src) { struct icc_provider *provider = src->provider; @@ -380,6 +382,13 @@ static int qcom_icc_set(struct icc_node *src, struct icc_node *dst) do_div(rate, src_qn->buswidth); rate = min_t(u64, rate, LONG_MAX); + /* + * Downstream checks whether the requested rate is zero, but it makes little sense + * to vote for a value that's below the lower threshold, so let's not do so. + */ + if (bucket == QCOM_ICC_BUCKET_WAKE && qp->keep_alive) + rate = max(ICC_BUS_CLK_MIN_RATE, rate); + if (qp->bus_clk_rate[i] == rate) continue; @@ -453,6 +462,7 @@ int qnoc_probe(struct platform_device *pdev) for (i = 0; i < qp->num_bus_clks; i++) qp->bus_clks[i].id = bus_clocks[i]; + qp->keep_alive = desc->keep_alive; qp->type = desc->type; qp->qos_offset = desc->qos_offset; diff --git a/drivers/interconnect/qcom/icc-rpm.h b/drivers/interconnect/qcom/icc-rpm.h index ee705edf19dd..d2c04c400cad 100644 --- a/drivers/interconnect/qcom/icc-rpm.h +++ b/drivers/interconnect/qcom/icc-rpm.h @@ -33,6 +33,7 @@ enum qcom_icc_type { * @bus_clk_rate: bus clock rate in Hz * @bus_clks: the clk_bulk_data table of bus clocks * @intf_clks: a clk_bulk_data array of interface clocks + * @keep_alive: whether to always keep a minimum vote on the bus clocks * @is_on: whether the bus is powered on */ struct qcom_icc_provider { @@ -45,6 +46,7 @@ struct qcom_icc_provider { u64 bus_clk_rate[NUM_BUS_CLKS]; struct clk_bulk_data bus_clks[NUM_BUS_CLKS]; struct clk_bulk_data *intf_clks; + bool keep_alive; bool is_on; }; @@ -102,6 +104,7 @@ struct qcom_icc_desc { const char * const *bus_clocks; const char * const *intf_clocks; size_t num_intf_clocks; + bool keep_alive; bool no_clk_scaling; enum qcom_icc_type type; const struct regmap_config *regmap_cfg; From patchwork Fri Jun 9 20:19:11 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Konrad Dybcio X-Patchwork-Id: 105813 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a59:994d:0:b0:3d9:f83d:47d9 with SMTP id k13csp1176096vqr; Fri, 9 Jun 2023 13:51:47 -0700 (PDT) X-Google-Smtp-Source: ACHHUZ43ih/hWNIBA4oeT7tXh4eUhmAjME4K3pNXKsKsEni+2FD9ZlrFSG6uwd2G+tv46URgpITK X-Received: by 2002:a92:c04f:0:b0:33b:dcbf:e711 with SMTP id o15-20020a92c04f000000b0033bdcbfe711mr2499952ilf.8.1686343907572; Fri, 09 Jun 2023 13:51:47 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1686343907; cv=none; d=google.com; s=arc-20160816; b=sfAh49vYCvRDz6kc4Ahcw7h45Sre0BA4388lI0aMbDjz72buIAQ2oU5DImejXMvUyw Mu+HVvfzL/cWh+Hj/sxUxaIQ+qEt+K7rqe7qDIRYHIwP3yrAtXW1KD9jKtTns6hRVd7V uv8nN+m90miiU2wcf7e8gLkTFUBTz2N16GauKRW566oHPSxhaBndUDlOCHNATHlD0cUx furYq80DmVsgF8lmPVd/c9Bl9sybN0cCRRkmnw9al5dVTzPOlXit7KK1c+9m5rBM9r53 pSVS9Mwk7oG9G7lIiLgy3857A/eA7dV1ewSqu4o6l020FEnm9g1ayxHSRupW/+zSdDrV 0/UA== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:cc:to:in-reply-to:references:message-id :content-transfer-encoding:mime-version:subject:date:from :dkim-signature; bh=FsjjWN/3ExrWWr4Y2ppq6JQGmoO1NTS4jkjNM8tw+cY=; b=NlDt7zQ0fPbikSeioR9vyqjaSqKtXMpIG5LbCVJGAvRDjuyqDFpCIuWIps3/XuS8Ig EeLNI+b0pWPJmsxEVqGOkCyJU3eOje+bXO5ziChh7HONQt5LMWwxtSrFBGooTlCYOnGu Kv7j19TDqnDmmo7rE/lKc0B6Lw4TafYWBByebOUisahv/PUHarnxaRl1PtZAvQyRBCdg 31EEVGZoGnoVUQ9dYr5NSNRovkvSyd4zCb2Paz5OllNEZ+mEBTHETdJbjE3zqQM/lWGN 3fYOZzAtl4t8NgZ2KkWI2KVb1at9U3pTMM6nbkD5hn08y7sfVyzFVtYQ6hhjnC5/LJdq iITw== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=Znr1n54W; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: from out1.vger.email (out1.vger.email. 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[83.9.29.190]) by smtp.gmail.com with ESMTPSA id b18-20020ac25632000000b004f628eb7884sm641349lff.232.2023.06.09.13.19.21 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 09 Jun 2023 13:19:22 -0700 (PDT) From: Konrad Dybcio Date: Fri, 09 Jun 2023 22:19:11 +0200 Subject: [PATCH v2 06/22] interconnect: qcom: icc-rpm: Allow negative QoS offset MIME-Version: 1.0 Message-Id: <20230526-topic-smd_icc-v2-6-e5934b07d813@linaro.org> References: <20230526-topic-smd_icc-v2-0-e5934b07d813@linaro.org> In-Reply-To: <20230526-topic-smd_icc-v2-0-e5934b07d813@linaro.org> To: Andy Gross , Bjorn Andersson , Michael Turquette , Stephen Boyd , Georgi Djakov , Leo Yan , Evan Green Cc: Marijn Suijten , linux-arm-msm@vger.kernel.org, linux-kernel@vger.kernel.org, linux-clk@vger.kernel.org, linux-pm@vger.kernel.org, Konrad Dybcio X-Mailer: b4 0.12.2 X-Developer-Signature: v=1; a=ed25519-sha256; t=1686341953; l=1945; i=konrad.dybcio@linaro.org; s=20230215; h=from:subject:message-id; bh=rgTDM+URKWJ36SFNnllBnyQwiFYuxKTtmuTacUJ+85U=; b=FpmhfeRG1aZHlIzvOClTkP2gbB2RANAcmI1h8mAYuMlhbe7Bt3tok8yu6mu1PrWXHl6YmwNdS JrH5kM9VHImAsQt2ZwnH4WuksfsviX+z/C70P9DPFSNckquLgr3QAlq X-Developer-Key: i=konrad.dybcio@linaro.org; a=ed25519; pk=iclgkYvtl2w05SSXO5EjjSYlhFKsJ+5OSZBjOkQuEms= X-Spam-Status: No, score=-2.1 required=5.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,RCVD_IN_DNSWL_NONE, SPF_HELO_NONE,SPF_PASS,T_SCC_BODY_TEXT_LINE,URIBL_BLOCKED autolearn=unavailable autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-getmail-retrieved-from-mailbox: =?utf-8?q?INBOX?= X-GMAIL-THRID: =?utf-8?q?1768259749217631788?= X-GMAIL-MSGID: =?utf-8?q?1768259749217631788?= In some very very very very unfortunate cases, the correct offset of the QoS registers will be.. negative. One such case is MSM8998, where The DDR BWMON occupies what-would-be-the-BIMC-base which we usually take into account with the register calculation, making the actual BIMC node start at what-would-be-the-BIMC-base+0x300. In order to keep the calculation code sane, the simplest - however ugly it may be - solution is to allow the offset to be negative. Signed-off-by: Konrad Dybcio --- drivers/interconnect/qcom/icc-rpm.h | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) diff --git a/drivers/interconnect/qcom/icc-rpm.h b/drivers/interconnect/qcom/icc-rpm.h index d2c04c400cad..ba840a436cc0 100644 --- a/drivers/interconnect/qcom/icc-rpm.h +++ b/drivers/interconnect/qcom/icc-rpm.h @@ -29,10 +29,10 @@ enum qcom_icc_type { * @num_intf_clks: the total number of intf_clks clk_bulk_data entries * @type: the ICC provider type * @regmap: regmap for QoS registers read/write access - * @qos_offset: offset to QoS registers * @bus_clk_rate: bus clock rate in Hz * @bus_clks: the clk_bulk_data table of bus clocks * @intf_clks: a clk_bulk_data array of interface clocks + * @qos_offset: offset to QoS registers * @keep_alive: whether to always keep a minimum vote on the bus clocks * @is_on: whether the bus is powered on */ @@ -42,7 +42,7 @@ struct qcom_icc_provider { int num_intf_clks; enum qcom_icc_type type; struct regmap *regmap; - unsigned int qos_offset; + int qos_offset; u64 bus_clk_rate[NUM_BUS_CLKS]; struct clk_bulk_data bus_clks[NUM_BUS_CLKS]; struct clk_bulk_data *intf_clks; @@ -108,7 +108,7 @@ struct qcom_icc_desc { bool no_clk_scaling; enum qcom_icc_type type; const struct regmap_config *regmap_cfg; - unsigned int qos_offset; + int qos_offset; }; /* Valid for all bus types */ From patchwork Fri Jun 9 20:19:12 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Konrad Dybcio X-Patchwork-Id: 105806 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a59:994d:0:b0:3d9:f83d:47d9 with SMTP id k13csp1172804vqr; Fri, 9 Jun 2023 13:43:48 -0700 (PDT) X-Google-Smtp-Source: ACHHUZ5aQsEwXOjApMVLxOVWUnvErUBA16PfsCuDKpNiPkCSX1rY/heB3k1yiWNe2k1ZfPg/FAwR X-Received: by 2002:a17:902:b192:b0:1b1:9218:6bf9 with SMTP id s18-20020a170902b19200b001b192186bf9mr1894503plr.43.1686343428008; Fri, 09 Jun 2023 13:43:48 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1686343427; cv=none; d=google.com; s=arc-20160816; b=w0Q0vIEhwHRlAz34ifuEJPR5NX5XXTQ9wGTghGwcdqxIh/Ge4FTt6qBN1xFsn1Uk+q 08RAsAUy/QUjhVjan6/hv6ed3nM7ZF+JEdOzmdFRwKpWA55UeUzxELUK69wUN4Xfjosl LVqqtoMiEhCxj9kRg4J0v1z1PqFaWk0aHPLvIUfqrRNkHtEh3RJ29WaOwnSrPxlucIhX jxPz/2HeyOwV63VrAmIY1Eei3hLGOvElZWMyixqlJeZLrK7CISAb7LcC0hTT89DJgysj +ZmFWnsZwlhYK02qOArsV0J0v/3SKVpPJoNwW5Q8ITw6JDizYBLAx2PG02P05dfwHQaR smnw== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:cc:to:in-reply-to:references:message-id :content-transfer-encoding:mime-version:subject:date:from :dkim-signature; bh=6yqoaw1SJxAVA4zfoNJA8WPzYaF2aeMvPE6QC7WXXuk=; b=sI47AOg64uIWtgeTv8MPOeVvR04d2HFnBnWT557JiS/AOVoXknixY+0udEkgwWOule etW3EQp9nPuWXAG04w/LJ1JR4FopEPDD4CsV+/irGVQQRPG95ZbTXqs+BYVDEYTENDak xgCEp1Be23AiZPuybMcjOmc7TWL/MoBkSdTeVSsLmwhrNS08LLny9T/PwOFjDNwS7FTL zYB3/YO0nGziwfgmFErxDZNPr5IqlFuEj0CkhizRMT5RDyROX16qzt6SHM5V0FpA9bUC gL27bnsG7uuQzGVSFjocgDMSdOzyOEyGc9jmVj3wTg77m+idzJFqz90pfLkxETYq00EZ U1zQ== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=Kue55f1H; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: from out1.vger.email (out1.vger.email. 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[83.9.29.190]) by smtp.gmail.com with ESMTPSA id b18-20020ac25632000000b004f628eb7884sm641349lff.232.2023.06.09.13.19.23 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 09 Jun 2023 13:19:23 -0700 (PDT) From: Konrad Dybcio Date: Fri, 09 Jun 2023 22:19:12 +0200 Subject: [PATCH v2 07/22] interconnect: qcom: Fold smd-rpm.h into icc-rpm.h MIME-Version: 1.0 Message-Id: <20230526-topic-smd_icc-v2-7-e5934b07d813@linaro.org> References: <20230526-topic-smd_icc-v2-0-e5934b07d813@linaro.org> In-Reply-To: <20230526-topic-smd_icc-v2-0-e5934b07d813@linaro.org> To: Andy Gross , Bjorn Andersson , Michael Turquette , Stephen Boyd , Georgi Djakov , Leo Yan , Evan Green Cc: Marijn Suijten , linux-arm-msm@vger.kernel.org, linux-kernel@vger.kernel.org, linux-clk@vger.kernel.org, linux-pm@vger.kernel.org, Konrad Dybcio , Dmitry Baryshkov X-Mailer: b4 0.12.2 X-Developer-Signature: v=1; a=ed25519-sha256; t=1686341953; l=5451; i=konrad.dybcio@linaro.org; s=20230215; h=from:subject:message-id; bh=byYAlps9wH1OSJiblDOBqmeTnt9HlHHvwOPwDsuq8eU=; b=TNaoCQCvOGFaZOGxrOiTnZ9Mzo/7T2dJeHgUSmI0k6uRHFoQnWYtbc7RQyorpoJIyZbW61nyg MzTI5qdXtzWC6o5TXzTMl2jR3VZH1nISG1wEB6n2Mgmz1N6ANiS0wqO X-Developer-Key: i=konrad.dybcio@linaro.org; a=ed25519; pk=iclgkYvtl2w05SSXO5EjjSYlhFKsJ+5OSZBjOkQuEms= X-Spam-Status: No, score=-2.1 required=5.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,RCVD_IN_DNSWL_NONE, SPF_HELO_NONE,SPF_PASS,T_SCC_BODY_TEXT_LINE,URIBL_BLOCKED autolearn=unavailable autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-getmail-retrieved-from-mailbox: =?utf-8?q?INBOX?= X-GMAIL-THRID: =?utf-8?q?1768259246202777183?= X-GMAIL-MSGID: =?utf-8?q?1768259246202777183?= smd-rpm.h is not very useful as-is and both files are always included anyway.. Combine them. Reviewed-by: Dmitry Baryshkov Signed-off-by: Konrad Dybcio --- drivers/interconnect/qcom/icc-rpm.c | 1 - drivers/interconnect/qcom/icc-rpm.h | 5 +++++ drivers/interconnect/qcom/msm8916.c | 1 - drivers/interconnect/qcom/msm8939.c | 1 - drivers/interconnect/qcom/msm8974.c | 2 +- drivers/interconnect/qcom/msm8996.c | 1 - drivers/interconnect/qcom/qcm2290.c | 1 - drivers/interconnect/qcom/qcs404.c | 1 - drivers/interconnect/qcom/sdm660.c | 1 - drivers/interconnect/qcom/smd-rpm.c | 2 +- drivers/interconnect/qcom/smd-rpm.h | 15 --------------- 11 files changed, 7 insertions(+), 24 deletions(-) diff --git a/drivers/interconnect/qcom/icc-rpm.c b/drivers/interconnect/qcom/icc-rpm.c index 863e8ba1daa2..b8ecf9538ab9 100644 --- a/drivers/interconnect/qcom/icc-rpm.c +++ b/drivers/interconnect/qcom/icc-rpm.c @@ -14,7 +14,6 @@ #include #include -#include "smd-rpm.h" #include "icc-common.h" #include "icc-rpm.h" diff --git a/drivers/interconnect/qcom/icc-rpm.h b/drivers/interconnect/qcom/icc-rpm.h index ba840a436cc0..9b4ea4e39b9f 100644 --- a/drivers/interconnect/qcom/icc-rpm.h +++ b/drivers/interconnect/qcom/icc-rpm.h @@ -6,6 +6,8 @@ #ifndef __DRIVERS_INTERCONNECT_QCOM_ICC_RPM_H #define __DRIVERS_INTERCONNECT_QCOM_ICC_RPM_H +#include + #include #define RPM_BUS_MASTER_REQ 0x73616d62 @@ -121,4 +123,7 @@ enum qos_mode { int qnoc_probe(struct platform_device *pdev); int qnoc_remove(struct platform_device *pdev); +bool qcom_icc_rpm_smd_available(void); +int qcom_icc_rpm_smd_send(int ctx, int rsc_type, int id, u32 val); + #endif diff --git a/drivers/interconnect/qcom/msm8916.c b/drivers/interconnect/qcom/msm8916.c index 5c4ba2f37c8e..196b05879896 100644 --- a/drivers/interconnect/qcom/msm8916.c +++ b/drivers/interconnect/qcom/msm8916.c @@ -15,7 +15,6 @@ #include -#include "smd-rpm.h" #include "icc-rpm.h" enum { diff --git a/drivers/interconnect/qcom/msm8939.c b/drivers/interconnect/qcom/msm8939.c index caf0aefad668..639566dce45a 100644 --- a/drivers/interconnect/qcom/msm8939.c +++ b/drivers/interconnect/qcom/msm8939.c @@ -16,7 +16,6 @@ #include -#include "smd-rpm.h" #include "icc-rpm.h" enum { diff --git a/drivers/interconnect/qcom/msm8974.c b/drivers/interconnect/qcom/msm8974.c index 1828deaca443..968162213d40 100644 --- a/drivers/interconnect/qcom/msm8974.c +++ b/drivers/interconnect/qcom/msm8974.c @@ -38,7 +38,7 @@ #include #include -#include "smd-rpm.h" +#include "icc-rpm.h" enum { MSM8974_BIMC_MAS_AMPSS_M0 = 1, diff --git a/drivers/interconnect/qcom/msm8996.c b/drivers/interconnect/qcom/msm8996.c index 20340fb62fe6..1f7e88a37acd 100644 --- a/drivers/interconnect/qcom/msm8996.c +++ b/drivers/interconnect/qcom/msm8996.c @@ -18,7 +18,6 @@ #include #include "icc-rpm.h" -#include "smd-rpm.h" #include "msm8996.h" static const char * const mm_intf_clocks[] = { diff --git a/drivers/interconnect/qcom/qcm2290.c b/drivers/interconnect/qcom/qcm2290.c index a29cdb4fac03..cb636e67a5a4 100644 --- a/drivers/interconnect/qcom/qcm2290.c +++ b/drivers/interconnect/qcom/qcm2290.c @@ -19,7 +19,6 @@ #include #include "icc-rpm.h" -#include "smd-rpm.h" enum { QCM2290_MASTER_APPSS_PROC = 1, diff --git a/drivers/interconnect/qcom/qcs404.c b/drivers/interconnect/qcom/qcs404.c index fae155344332..938283ddd0e3 100644 --- a/drivers/interconnect/qcom/qcs404.c +++ b/drivers/interconnect/qcom/qcs404.c @@ -13,7 +13,6 @@ #include -#include "smd-rpm.h" #include "icc-rpm.h" enum { diff --git a/drivers/interconnect/qcom/sdm660.c b/drivers/interconnect/qcom/sdm660.c index 7ffaf70d62d3..003fc7d110a7 100644 --- a/drivers/interconnect/qcom/sdm660.c +++ b/drivers/interconnect/qcom/sdm660.c @@ -17,7 +17,6 @@ #include #include "icc-rpm.h" -#include "smd-rpm.h" enum { SDM660_MASTER_IPA = 1, diff --git a/drivers/interconnect/qcom/smd-rpm.c b/drivers/interconnect/qcom/smd-rpm.c index dc8ff8d133a9..b0183262ba66 100644 --- a/drivers/interconnect/qcom/smd-rpm.c +++ b/drivers/interconnect/qcom/smd-rpm.c @@ -13,7 +13,7 @@ #include #include -#include "smd-rpm.h" +#include "icc-rpm.h" #define RPM_KEY_BW 0x00007762 diff --git a/drivers/interconnect/qcom/smd-rpm.h b/drivers/interconnect/qcom/smd-rpm.h deleted file mode 100644 index ca9d0327b8ac..000000000000 --- a/drivers/interconnect/qcom/smd-rpm.h +++ /dev/null @@ -1,15 +0,0 @@ -/* SPDX-License-Identifier: GPL-2.0 */ -/* - * Copyright (c) 2019, Linaro Ltd. - * Author: Georgi Djakov - */ - -#ifndef __DRIVERS_INTERCONNECT_QCOM_SMD_RPM_H -#define __DRIVERS_INTERCONNECT_QCOM_SMD_RPM_H - -#include - -bool qcom_icc_rpm_smd_available(void); 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[83.9.29.190]) by smtp.gmail.com with ESMTPSA id b18-20020ac25632000000b004f628eb7884sm641349lff.232.2023.06.09.13.19.24 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 09 Jun 2023 13:19:25 -0700 (PDT) From: Konrad Dybcio Date: Fri, 09 Jun 2023 22:19:13 +0200 Subject: [PATCH v2 08/22] interconnect: qcom: smd-rpm: Add rpmcc handling skeleton code MIME-Version: 1.0 Message-Id: <20230526-topic-smd_icc-v2-8-e5934b07d813@linaro.org> References: <20230526-topic-smd_icc-v2-0-e5934b07d813@linaro.org> In-Reply-To: <20230526-topic-smd_icc-v2-0-e5934b07d813@linaro.org> To: Andy Gross , Bjorn Andersson , Michael Turquette , Stephen Boyd , Georgi Djakov , Leo Yan , Evan Green Cc: Marijn Suijten , linux-arm-msm@vger.kernel.org, linux-kernel@vger.kernel.org, linux-clk@vger.kernel.org, linux-pm@vger.kernel.org, Konrad Dybcio X-Mailer: b4 0.12.2 X-Developer-Signature: v=1; a=ed25519-sha256; t=1686341953; l=3840; i=konrad.dybcio@linaro.org; s=20230215; h=from:subject:message-id; bh=Be0qL+ODrjCDl44ro/wrhtm3D8xnErJxyrWWn+SRhEI=; b=7lsJVMnla/ctq1ICQUEQZnHZ5G+do1MXvq8+atVp+X9Wj7lkLh6SSBUpc/FVjWwAeOPlKXWkW oe4s086HNvSAU9FRarNzMqepczduiogllgwdRJB3hoKtaWyTL6kVf7u X-Developer-Key: i=konrad.dybcio@linaro.org; a=ed25519; pk=iclgkYvtl2w05SSXO5EjjSYlhFKsJ+5OSZBjOkQuEms= X-Spam-Status: No, score=-2.1 required=5.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,RCVD_IN_DNSWL_NONE, SPF_HELO_NONE,SPF_PASS,T_SCC_BODY_TEXT_LINE,URIBL_BLOCKED autolearn=unavailable autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-getmail-retrieved-from-mailbox: =?utf-8?q?INBOX?= X-GMAIL-THRID: =?utf-8?q?1768259710751764072?= X-GMAIL-MSGID: =?utf-8?q?1768259710751764072?= Introduce qcom_icc_rpm_set_bus_rate() in preparation for handling RPM clock resources within the interconnect framework. This lets us greatly simplify all of the code handling, as setting the rate comes down to: u32 rate_khz = max(clk.sleep_rate, clk.active_rate, clk_a.active_rate) write_to_rpm(clock.description, rate_khz); Signed-off-by: Konrad Dybcio --- drivers/interconnect/qcom/icc-rpm.h | 15 +++++++++++++++ drivers/interconnect/qcom/smd-rpm.c | 37 +++++++++++++++++++++++++++++++++++++ 2 files changed, 52 insertions(+) diff --git a/drivers/interconnect/qcom/icc-rpm.h b/drivers/interconnect/qcom/icc-rpm.h index 9b4ea4e39b9f..aec192321411 100644 --- a/drivers/interconnect/qcom/icc-rpm.h +++ b/drivers/interconnect/qcom/icc-rpm.h @@ -22,6 +22,18 @@ enum qcom_icc_type { QCOM_ICC_QNOC, }; +/** + * struct rpm_clk_resource - RPM bus clock resource + * @resource_type: RPM resource type of the clock resource + * @clock_id: index of the clock resource of a specific resource type + * @branch: whether the resource represents a branch clock +*/ +struct rpm_clk_resource { + u32 resource_type; + u32 clock_id; + bool branch; +}; + #define NUM_BUS_CLKS 2 /** @@ -47,6 +59,7 @@ struct qcom_icc_provider { int qos_offset; u64 bus_clk_rate[NUM_BUS_CLKS]; struct clk_bulk_data bus_clks[NUM_BUS_CLKS]; + const struct rpm_clk_resource *bus_clk_desc; struct clk_bulk_data *intf_clks; bool keep_alive; bool is_on; @@ -104,6 +117,7 @@ struct qcom_icc_desc { struct qcom_icc_node * const *nodes; size_t num_nodes; const char * const *bus_clocks; + const struct rpm_clk_resource *bus_clk_desc; const char * const *intf_clocks; size_t num_intf_clocks; bool keep_alive; @@ -125,5 +139,6 @@ int qnoc_remove(struct platform_device *pdev); bool qcom_icc_rpm_smd_available(void); int qcom_icc_rpm_smd_send(int ctx, int rsc_type, int id, u32 val); +int qcom_icc_rpm_set_bus_rate(const struct rpm_clk_resource *clk, u32 active_rate, u32 sleep_rate); #endif diff --git a/drivers/interconnect/qcom/smd-rpm.c b/drivers/interconnect/qcom/smd-rpm.c index b0183262ba66..6c51e346b326 100644 --- a/drivers/interconnect/qcom/smd-rpm.c +++ b/drivers/interconnect/qcom/smd-rpm.c @@ -16,6 +16,7 @@ #include "icc-rpm.h" #define RPM_KEY_BW 0x00007762 +#define QCOM_RPM_SMD_KEY_RATE 0x007a484b static struct qcom_smd_rpm *icc_smd_rpm; @@ -44,6 +45,38 @@ int qcom_icc_rpm_smd_send(int ctx, int rsc_type, int id, u32 val) } EXPORT_SYMBOL_GPL(qcom_icc_rpm_smd_send); +int qcom_icc_rpm_set_bus_rate(const struct rpm_clk_resource *clk, u32 active_rate, u32 sleep_rate) +{ + struct clk_smd_rpm_req req = { + .key = cpu_to_le32(QCOM_RPM_SMD_KEY_RATE), + .nbytes = cpu_to_le32(sizeof(u32)), + }; + int ret; + + /* Branch clocks are only on/off */ + if (clk->branch) { + active_rate = !!active_rate; + sleep_rate = !!sleep_rate; + } + + req.value = cpu_to_le32(active_rate); + ret = qcom_rpm_smd_write(icc_smd_rpm, + QCOM_SMD_RPM_ACTIVE_STATE, + clk->resource_type, + clk->clock_id, + &req, sizeof(req)); + if (ret) + return ret; + + req.value = cpu_to_le32(sleep_rate); + return qcom_rpm_smd_write(icc_smd_rpm, + QCOM_SMD_RPM_SLEEP_STATE, + clk->resource_type, + clk->clock_id, + &req, sizeof(req)); +} +EXPORT_SYMBOL_GPL(qcom_icc_rpm_set_bus_rate); + static int qcom_icc_rpm_smd_remove(struct platform_device *pdev) { icc_smd_rpm = NULL; @@ -60,6 +93,10 @@ static int qcom_icc_rpm_smd_probe(struct platform_device *pdev) return -ENODEV; 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Fix it. Reviewed-by: Dmitry Baryshkov Signed-off-by: Konrad Dybcio --- drivers/interconnect/qcom/icc-rpm.h | 2 ++ 1 file changed, 2 insertions(+) diff --git a/drivers/interconnect/qcom/icc-rpm.h b/drivers/interconnect/qcom/icc-rpm.h index aec192321411..057a1a8b3cb9 100644 --- a/drivers/interconnect/qcom/icc-rpm.h +++ b/drivers/interconnect/qcom/icc-rpm.h @@ -6,6 +6,8 @@ #ifndef __DRIVERS_INTERCONNECT_QCOM_ICC_RPM_H #define __DRIVERS_INTERCONNECT_QCOM_ICC_RPM_H +#include +#include #include #include From patchwork Fri Jun 9 20:19:15 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Konrad Dybcio X-Patchwork-Id: 105800 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a59:994d:0:b0:3d9:f83d:47d9 with SMTP id k13csp1167950vqr; Fri, 9 Jun 2023 13:32:50 -0700 (PDT) X-Google-Smtp-Source: ACHHUZ4wBLW2JmWgXAzgL5tNhkP/jjOHqU2oGQl5vIRvhmSqkMDuPZZZt4XTej90UIPpr1t/CcEt X-Received: by 2002:a05:6a00:17a2:b0:64f:7a9c:cb15 with SMTP id s34-20020a056a0017a200b0064f7a9ccb15mr2799953pfg.11.1686342769948; Fri, 09 Jun 2023 13:32:49 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1686342769; cv=none; d=google.com; s=arc-20160816; b=NTES0nlxJoE/LKRPhPO765HBzu6DHTATeCRwEEpvcHnKZTyfqYzPJ2v9JCJEfnpPFC w407Ekf1ouckwq4pTaewPz2FmWySeZHrlufo3CIgiFMCtr6yj0vbv6kvsFHXVi8TeCZl tg4/JiI3aLMIecCwSM1SKGCMGR57TtvZrfWHRINZASQ4Hevp2Wg40Kh2lqSJf6/GN34U KuAmLR5JxF2XlOKOxjATQpz50eXhWmEO9f+7SolmnU37VhZ57bepRcuKQlLuudJSXTFz yis4ImOfXe94dri4bPZAl0JbtahkGLXqgiargDHd0/d9lqT5a8RWwWrEbNwOfb02YPHb +2ZA== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:cc:to:in-reply-to:references:message-id :content-transfer-encoding:mime-version:subject:date:from :dkim-signature; bh=h+fKLnlHalDuAg33z9Jtbv/mJQQ+EEa4+LdoMppCsko=; b=d+Ow+Pk4bUlGQrK/MnhjPcW7Ds1olsYcqBpU377lIJYzMaTp0piCLPs+M81oqoS4AZ WsgyPIATzO36cqwvUjYetui5Ja6YgupqAogLKNxTr2j8aV8HTV1Q8psdfj0aQT9U4t13 w+2IFKtV0LI5Sd93rfcB6c0XZPlMdCnmISLtbD5wTMuzt6pgxaKQvW9l/GKW0ijGh3vJ YyV7bzq78YHGQtKnuoYu5Vkn7DpuZTX/eYSdu+6JaAkO/U4gSQOkatLXwJFRN8kkL8d5 tfHay9wjHaWR8DRv9sw1ZVO7Be/9FG4cuKObqp/+wM/rj597Hafy1XNIdsAb5LfpPxyz CkGg== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=FZox072q; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: from out1.vger.email (out1.vger.email. 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[83.9.29.190]) by smtp.gmail.com with ESMTPSA id b18-20020ac25632000000b004f628eb7884sm641349lff.232.2023.06.09.13.19.26 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 09 Jun 2023 13:19:27 -0700 (PDT) From: Konrad Dybcio Date: Fri, 09 Jun 2023 22:19:15 +0200 Subject: [PATCH v2 10/22] interconnect: qcom: Define RPM bus clocks MIME-Version: 1.0 Message-Id: <20230526-topic-smd_icc-v2-10-e5934b07d813@linaro.org> References: <20230526-topic-smd_icc-v2-0-e5934b07d813@linaro.org> In-Reply-To: <20230526-topic-smd_icc-v2-0-e5934b07d813@linaro.org> To: Andy Gross , Bjorn Andersson , Michael Turquette , Stephen Boyd , Georgi Djakov , Leo Yan , Evan Green Cc: Marijn Suijten , linux-arm-msm@vger.kernel.org, linux-kernel@vger.kernel.org, linux-clk@vger.kernel.org, linux-pm@vger.kernel.org, Konrad Dybcio , Dmitry Baryshkov X-Mailer: b4 0.12.2 X-Developer-Signature: v=1; a=ed25519-sha256; t=1686341953; l=3759; i=konrad.dybcio@linaro.org; s=20230215; h=from:subject:message-id; bh=x0HK0TeLMEP7kpXmLD7jervQe77EX+FiCHoc2go6cXk=; b=eIMSoSow1QKNvTDcfCtM27veub/s1S90w0vRNDyG2OsSNUnMncdygzEMKGfOL3FbhA/e6gUYg 9YgZZCGB7ovC7Hr9kLoo05AjRhFRPuCCDlJApxei75dxRUOvjDKYQjX X-Developer-Key: i=konrad.dybcio@linaro.org; a=ed25519; pk=iclgkYvtl2w05SSXO5EjjSYlhFKsJ+5OSZBjOkQuEms= X-Spam-Status: No, score=-2.1 required=5.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,RCVD_IN_DNSWL_NONE, SPF_HELO_NONE,SPF_PASS,T_SCC_BODY_TEXT_LINE,URIBL_BLOCKED autolearn=unavailable autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-getmail-retrieved-from-mailbox: =?utf-8?q?INBOX?= X-GMAIL-THRID: =?utf-8?q?1768258556119919438?= X-GMAIL-MSGID: =?utf-8?q?1768258556119919438?= Add the definitions for RPM bus clocks that will be used by many different platforms. Reviewed-by: Dmitry Baryshkov Signed-off-by: Konrad Dybcio --- drivers/interconnect/qcom/Makefile | 2 +- drivers/interconnect/qcom/icc-rpm-clocks.c | 66 ++++++++++++++++++++++++++++++ drivers/interconnect/qcom/icc-rpm.h | 13 ++++++ 3 files changed, 80 insertions(+), 1 deletion(-) diff --git a/drivers/interconnect/qcom/Makefile b/drivers/interconnect/qcom/Makefile index ab988926433c..80d9d2da95d1 100644 --- a/drivers/interconnect/qcom/Makefile +++ b/drivers/interconnect/qcom/Makefile @@ -29,7 +29,7 @@ qnoc-sm8250-objs := sm8250.o qnoc-sm8350-objs := sm8350.o qnoc-sm8450-objs := sm8450.o qnoc-sm8550-objs := sm8550.o -icc-smd-rpm-objs := smd-rpm.o icc-rpm.o +icc-smd-rpm-objs := smd-rpm.o icc-rpm.o icc-rpm-clocks.o obj-$(CONFIG_INTERCONNECT_QCOM_BCM_VOTER) += icc-bcm-voter.o obj-$(CONFIG_INTERCONNECT_QCOM_MSM8916) += qnoc-msm8916.o diff --git a/drivers/interconnect/qcom/icc-rpm-clocks.c b/drivers/interconnect/qcom/icc-rpm-clocks.c new file mode 100644 index 000000000000..a195bf32aff4 --- /dev/null +++ b/drivers/interconnect/qcom/icc-rpm-clocks.c @@ -0,0 +1,66 @@ +/* SPDX-License-Identifier: GPL-2.0 */ +/* + * Copyright (C) 2023 Linaro Ltd + */ + +#include + +#include "icc-rpm.h" + +const struct rpm_clk_resource aggre1_clk = { + .resource_type = QCOM_SMD_RPM_AGGR_CLK, + .clock_id = 1, +}; + +const struct rpm_clk_resource aggre2_clk = { + .resource_type = QCOM_SMD_RPM_AGGR_CLK, + .clock_id = 2, +}; + +const struct rpm_clk_resource bimc_clk = { + .resource_type = QCOM_SMD_RPM_MEM_CLK, + .clock_id = 0, +}; + +const struct rpm_clk_resource bus_0_clk = { + .resource_type = QCOM_SMD_RPM_BUS_CLK, + .clock_id = 0, +}; + +const struct rpm_clk_resource bus_1_clk = { + .resource_type = QCOM_SMD_RPM_BUS_CLK, + .clock_id = 1, +}; + +const struct rpm_clk_resource bus_2_clk = { + .resource_type = QCOM_SMD_RPM_BUS_CLK, + .clock_id = 2, +}; + +const struct rpm_clk_resource mmaxi_0_clk = { + .resource_type = QCOM_SMD_RPM_MMAXI_CLK, + .clock_id = 0, +}; + +const struct rpm_clk_resource mmaxi_1_clk = { + .resource_type = QCOM_SMD_RPM_MMAXI_CLK, + .clock_id = 1, +}; + +const struct rpm_clk_resource qup_clk = { + .resource_type = QCOM_SMD_RPM_QUP_CLK, + .clock_id = 0, +}; + +/* Branch clocks */ +const struct rpm_clk_resource aggre1_branch_clk = { + .resource_type = QCOM_SMD_RPM_AGGR_CLK, + .clock_id = 1, + .branch = true, +}; + +const struct rpm_clk_resource aggre2_branch_clk = { + .resource_type = QCOM_SMD_RPM_AGGR_CLK, + .clock_id = 2, + .branch = true, +}; diff --git a/drivers/interconnect/qcom/icc-rpm.h b/drivers/interconnect/qcom/icc-rpm.h index 057a1a8b3cb9..99e34f684c85 100644 --- a/drivers/interconnect/qcom/icc-rpm.h +++ b/drivers/interconnect/qcom/icc-rpm.h @@ -136,6 +136,19 @@ enum qos_mode { NOC_QOS_MODE_BYPASS, }; +extern const struct rpm_clk_resource aggre1_clk; +extern const struct rpm_clk_resource aggre2_clk; +extern const struct rpm_clk_resource bimc_clk; +extern const struct rpm_clk_resource bus_0_clk; +extern const struct rpm_clk_resource bus_1_clk; +extern const struct rpm_clk_resource bus_2_clk; +extern const struct rpm_clk_resource mmaxi_0_clk; +extern const struct rpm_clk_resource mmaxi_1_clk; +extern const struct rpm_clk_resource qup_clk; + +extern const struct rpm_clk_resource aggre1_branch_clk; +extern const struct rpm_clk_resource aggre2_branch_clk; + int qnoc_probe(struct platform_device *pdev); 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[83.9.29.190]) by smtp.gmail.com with ESMTPSA id b18-20020ac25632000000b004f628eb7884sm641349lff.232.2023.06.09.13.19.28 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 09 Jun 2023 13:19:28 -0700 (PDT) From: Konrad Dybcio Date: Fri, 09 Jun 2023 22:19:16 +0200 Subject: [PATCH v2 11/22] interconnect: qcom: sdm660: Hook up RPM bus clk definitions MIME-Version: 1.0 Message-Id: <20230526-topic-smd_icc-v2-11-e5934b07d813@linaro.org> References: <20230526-topic-smd_icc-v2-0-e5934b07d813@linaro.org> In-Reply-To: <20230526-topic-smd_icc-v2-0-e5934b07d813@linaro.org> To: Andy Gross , Bjorn Andersson , Michael Turquette , Stephen Boyd , Georgi Djakov , Leo Yan , Evan Green Cc: Marijn Suijten , linux-arm-msm@vger.kernel.org, linux-kernel@vger.kernel.org, linux-clk@vger.kernel.org, linux-pm@vger.kernel.org, Konrad Dybcio , Dmitry Baryshkov X-Mailer: b4 0.12.2 X-Developer-Signature: v=1; a=ed25519-sha256; t=1686341953; l=1986; i=konrad.dybcio@linaro.org; s=20230215; h=from:subject:message-id; bh=Krc2Kcr5fnOQoU3m0Y+nr01slcqtM3Q1E0UfX4Ye6Q4=; b=sOxKuMZDi2Sv0ZJT+rBA5GRTGFjZDU/L2gedaTsYn1y0hrQsXEdNhtuG7lfrBWqHsgVCQ2cX8 2+dKfhyzUXqDotzTIycNzhOC8Y1Krk8I1xRlDwjJZJ15UdXvFUy/yRz X-Developer-Key: i=konrad.dybcio@linaro.org; a=ed25519; pk=iclgkYvtl2w05SSXO5EjjSYlhFKsJ+5OSZBjOkQuEms= X-Spam-Status: No, score=-2.1 required=5.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,RCVD_IN_DNSWL_NONE, SPF_HELO_NONE,SPF_PASS,T_SCC_BODY_TEXT_LINE,URIBL_BLOCKED autolearn=unavailable autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-getmail-retrieved-from-mailbox: =?utf-8?q?INBOX?= X-GMAIL-THRID: =?utf-8?q?1768259484633798112?= X-GMAIL-MSGID: =?utf-8?q?1768259484633798112?= Assign the necessary definitions to migrate to the new bus clock handling mechanism. Reviewed-by: Dmitry Baryshkov Signed-off-by: Konrad Dybcio --- drivers/interconnect/qcom/sdm660.c | 5 +++++ 1 file changed, 5 insertions(+) diff --git a/drivers/interconnect/qcom/sdm660.c b/drivers/interconnect/qcom/sdm660.c index 003fc7d110a7..5743ed680e8e 100644 --- a/drivers/interconnect/qcom/sdm660.c +++ b/drivers/interconnect/qcom/sdm660.c @@ -1511,6 +1511,7 @@ static const struct qcom_icc_desc sdm660_a2noc = { .type = QCOM_ICC_NOC, .nodes = sdm660_a2noc_nodes, .num_nodes = ARRAY_SIZE(sdm660_a2noc_nodes), + .bus_clk_desc = &aggre2_clk, .intf_clocks = a2noc_intf_clocks, .num_intf_clocks = ARRAY_SIZE(a2noc_intf_clocks), .regmap_cfg = &sdm660_a2noc_regmap_config, @@ -1539,6 +1540,7 @@ static const struct qcom_icc_desc sdm660_bimc = { .type = QCOM_ICC_BIMC, .nodes = sdm660_bimc_nodes, .num_nodes = ARRAY_SIZE(sdm660_bimc_nodes), + .bus_clk_desc = &bimc_clk, .regmap_cfg = &sdm660_bimc_regmap_config, }; @@ -1593,6 +1595,7 @@ static const struct qcom_icc_desc sdm660_cnoc = { .type = QCOM_ICC_NOC, .nodes = sdm660_cnoc_nodes, .num_nodes = ARRAY_SIZE(sdm660_cnoc_nodes), + .bus_clk_desc = &bus_2_clk, .regmap_cfg = &sdm660_cnoc_regmap_config, }; @@ -1655,6 +1658,7 @@ static const struct qcom_icc_desc sdm660_mnoc = { .type = QCOM_ICC_NOC, .nodes = sdm660_mnoc_nodes, .num_nodes = ARRAY_SIZE(sdm660_mnoc_nodes), + .bus_clk_desc = &mmaxi_0_clk, .intf_clocks = mm_intf_clocks, .num_intf_clocks = ARRAY_SIZE(mm_intf_clocks), .regmap_cfg = &sdm660_mnoc_regmap_config, @@ -1692,6 +1696,7 @@ static const struct qcom_icc_desc sdm660_snoc = { .type = QCOM_ICC_NOC, .nodes = sdm660_snoc_nodes, .num_nodes = ARRAY_SIZE(sdm660_snoc_nodes), + .bus_clk_desc = &bus_1_clk, .regmap_cfg = &sdm660_snoc_regmap_config, }; From patchwork Fri Jun 9 20:19:17 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Konrad Dybcio X-Patchwork-Id: 105814 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a59:994d:0:b0:3d9:f83d:47d9 with SMTP id k13csp1176192vqr; Fri, 9 Jun 2023 13:52:02 -0700 (PDT) X-Google-Smtp-Source: ACHHUZ7kjeEHQ1+n6NGvIvJ5PtSTReeDdrn+26IXznmy6D1bxOHAVBRV4jHr/RBjb8L/Mdggsh5O X-Received: by 2002:a17:903:1250:b0:1b0:3a74:7fc4 with SMTP id u16-20020a170903125000b001b03a747fc4mr2198072plh.24.1686343922282; Fri, 09 Jun 2023 13:52:02 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1686343922; cv=none; d=google.com; s=arc-20160816; b=xarbj03HLHHJkPdX3gkuHcHZRdF8oN2v34Gtq2PAnCR91v31F5Xtpr89W0slPZiwSb za8XnqffBC9UHcmdArkVzojhD/EFZtA+u58Mz6rmNqpPWxPmnIbSWDmbss2UhUWBaU1Z 9Qqk44MzFyA2cjFRTghSzKlBvZyT+Jgyk7hhpB9y4f2AB6uOSsS7tdjPY3hxBgueLSAS pelkbRe/tr4LPMoMycu1Z/4ZiEN5Tid7DhCYt6FTwfVgMi90ap/CiJ/G14g5wzqWXVb9 v8r1WpD1jR+h3wI5EuSfjRTqk6OX1m7yW6snPUv8F7piHkR6jgGAZOS+lDDCnUV4zDr0 Qflw== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:cc:to:in-reply-to:references:message-id :content-transfer-encoding:mime-version:subject:date:from :dkim-signature; bh=sfWaXpFcH3gkTKoNeoEghs9YVVozZ9w4ELuAa+IL8Vs=; b=L+8AjxNkKXhvGPcskj85SrNKqxHUipmopQ5WuM7LrGEI1762o0j+a4UrDD7Sh05xuy D3i8I11aLcgN6NJC7/7M2DjNVDN7Rt0WEtDRSSFQJn7ZB5NMtM1YVgXGC+Js8+Sab3dX FI5ZS3DVw2Poy9/VlIAxbWWoZ4vbzKDAD9UGKJNshxlM1KL59nOlNHiq4Z/V/Hdk0TS7 CbbamjCMw1yWOQt4JE/9MPG5XkzKFJ1m2sZmUTTW9wYu7R+LGWvdyj2dHJtErHUjsR2S +OLBx8tUuMydII6y0Se37Tv6/nknV+PI+LHL2H+SOR9lxhevTWdVoCByL3vpzb8OGj8J Bh5w== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=zFkpS0BV; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: from out1.vger.email (out1.vger.email. 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Signed-off-by: Konrad Dybcio --- drivers/interconnect/qcom/msm8996.c | 7 +++++++ 1 file changed, 7 insertions(+) diff --git a/drivers/interconnect/qcom/msm8996.c b/drivers/interconnect/qcom/msm8996.c index 1f7e88a37acd..a596f4035d2e 100644 --- a/drivers/interconnect/qcom/msm8996.c +++ b/drivers/interconnect/qcom/msm8996.c @@ -1840,6 +1840,7 @@ static const struct qcom_icc_desc msm8996_a1noc = { .type = QCOM_ICC_NOC, .nodes = a1noc_nodes, .num_nodes = ARRAY_SIZE(a1noc_nodes), + .bus_clk_desc = &aggre1_branch_clk, .regmap_cfg = &msm8996_a1noc_regmap_config }; @@ -1861,6 +1862,7 @@ static const struct qcom_icc_desc msm8996_a2noc = { .type = QCOM_ICC_NOC, .nodes = a2noc_nodes, .num_nodes = ARRAY_SIZE(a2noc_nodes), + .bus_clk_desc = &aggre2_branch_clk, .intf_clocks = a2noc_intf_clocks, .num_intf_clocks = ARRAY_SIZE(a2noc_intf_clocks), .regmap_cfg = &msm8996_a2noc_regmap_config @@ -1889,6 +1891,7 @@ static const struct qcom_icc_desc msm8996_bimc = { .type = QCOM_ICC_BIMC, .nodes = bimc_nodes, .num_nodes = ARRAY_SIZE(bimc_nodes), + .bus_clk_desc = &bimc_clk, .regmap_cfg = &msm8996_bimc_regmap_config }; @@ -1947,6 +1950,7 @@ static const struct qcom_icc_desc msm8996_cnoc = { .type = QCOM_ICC_NOC, .nodes = cnoc_nodes, .num_nodes = ARRAY_SIZE(cnoc_nodes), + .bus_clk_desc = &bus_2_clk, .regmap_cfg = &msm8996_cnoc_regmap_config }; @@ -2000,6 +2004,7 @@ static const struct qcom_icc_desc msm8996_mnoc = { .type = QCOM_ICC_NOC, .nodes = mnoc_nodes, .num_nodes = ARRAY_SIZE(mnoc_nodes), + .bus_clk_desc = &mmaxi_0_clk, .intf_clocks = mm_intf_clocks, .num_intf_clocks = ARRAY_SIZE(mm_intf_clocks), .regmap_cfg = &msm8996_mnoc_regmap_config @@ -2038,6 +2043,7 @@ static const struct qcom_icc_desc msm8996_pnoc = { .type = QCOM_ICC_NOC, .nodes = pnoc_nodes, .num_nodes = ARRAY_SIZE(pnoc_nodes), + .bus_clk_desc = &bus_0_clk, .regmap_cfg = &msm8996_pnoc_regmap_config }; @@ -2082,6 +2088,7 @@ static const struct qcom_icc_desc msm8996_snoc = { .type = QCOM_ICC_NOC, .nodes = snoc_nodes, .num_nodes = ARRAY_SIZE(snoc_nodes), + .bus_clk_desc = &bus_1_clk, .regmap_cfg = &msm8996_snoc_regmap_config }; From patchwork Fri Jun 9 20:19:18 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Konrad Dybcio X-Patchwork-Id: 105801 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a59:994d:0:b0:3d9:f83d:47d9 with SMTP id k13csp1168130vqr; Fri, 9 Jun 2023 13:33:12 -0700 (PDT) X-Google-Smtp-Source: ACHHUZ7v66j0kE6fJ7023UH9KYhZPy/aV/ha5Jh8lJ/kGFAVkZMU5Q7hXrVlkruEQa4OgX55VUSS X-Received: by 2002:a05:6a20:7343:b0:107:35ed:28b5 with SMTP id v3-20020a056a20734300b0010735ed28b5mr2807257pzc.2.1686342792335; Fri, 09 Jun 2023 13:33:12 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1686342792; cv=none; d=google.com; s=arc-20160816; b=CUGEmcAqtDLoyFUKjub1mRROlSidVeoEfWB+2F7+JU3QO2X5Sbsbi+fGHZDgkNK6J2 jmJe138wqgsMbsmBlubqqn3aeZORxlubrU9Eu+GAxuSu1hSVKgQLVFJkBc9hmFaN3faK IR10pdPyW944/sAaPf8M4CMfKT6Ubjwt/3GfMyf3aFyqmHyKwF6T7WNas44H4XTelf3z 8j8hkS0a4IjGM5Xc/AEaCR2hQaixrQlNXu4SsCnC1lePfhsrMEc0u91f1aaZWbboyagr febsmVikxQmOqYwKuddtX2G+p8WBP12YN8CL3pxo2SJll9d04QZk2FQQdrLOQIbc5jza rSqw== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:cc:to:in-reply-to:references:message-id :content-transfer-encoding:mime-version:subject:date:from :dkim-signature; bh=oxwAlvsxTG2NJKirdi7L920nJWliszLcfh8qb5HaEiU=; b=i3z/bPlvCy5D7oHRGgpMS8hx6kcAPY2Rh0+9D4REHVm5ZJKLfxvxdrcWdmQg5paOA0 fuUfAvM8yyxQycrFzXd7adEgZI1TqCyPgGpJRnzyFwzAQiIQyI98yhDhJZP/wEJrXoCh eKVpOkK35U37cQVSYKh1Ry8lrdU1SCKd3zim+Ng3CcAiu02n2DiCIl+39uXZaD4l9BmP 8tziqSyCyoudveANEHkOw1lkQtMsT1AlVDBPhO2rbJ1OnL+nLnARyRB5rTZ34/1yc1Ko 3IfH1vLC7wLh6qlID0CIpZdaVUXGTMs1BAWO1eD3vGyXkMPD5YaYRdoBNYRVEIk72H30 WChg== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=Pu1eMhlv; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: from out1.vger.email (out1.vger.email. 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[83.9.29.190]) by smtp.gmail.com with ESMTPSA id b18-20020ac25632000000b004f628eb7884sm641349lff.232.2023.06.09.13.19.30 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 09 Jun 2023 13:19:31 -0700 (PDT) From: Konrad Dybcio Date: Fri, 09 Jun 2023 22:19:18 +0200 Subject: [PATCH v2 13/22] interconnect: qcom: qcs404: Hook up RPM bus clk definitions MIME-Version: 1.0 Message-Id: <20230526-topic-smd_icc-v2-13-e5934b07d813@linaro.org> References: <20230526-topic-smd_icc-v2-0-e5934b07d813@linaro.org> In-Reply-To: <20230526-topic-smd_icc-v2-0-e5934b07d813@linaro.org> To: Andy Gross , Bjorn Andersson , Michael Turquette , Stephen Boyd , Georgi Djakov , Leo Yan , Evan Green Cc: Marijn Suijten , linux-arm-msm@vger.kernel.org, linux-kernel@vger.kernel.org, linux-clk@vger.kernel.org, linux-pm@vger.kernel.org, Konrad Dybcio , Dmitry Baryshkov X-Mailer: b4 0.12.2 X-Developer-Signature: v=1; a=ed25519-sha256; t=1686341953; l=1291; i=konrad.dybcio@linaro.org; s=20230215; h=from:subject:message-id; bh=NibH4RmX92w9jFbYbYmeVzyLtbX9fV3dfXE9S9JnGAI=; b=TCpechMBmNATG7KGeUW31PLFuqm3NZxW7uiHDhtr0yC1lY68iIT1yDQ3b2mP4m5p+HjRj8PFP 4THtWoa3TEfBvWcVHk9/g8MjWvcFHHyCbJQFsbMvcjEKwPK6x9asXqQ X-Developer-Key: i=konrad.dybcio@linaro.org; a=ed25519; pk=iclgkYvtl2w05SSXO5EjjSYlhFKsJ+5OSZBjOkQuEms= X-Spam-Status: No, score=-2.1 required=5.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,RCVD_IN_DNSWL_NONE, SPF_HELO_NONE,SPF_PASS,T_SCC_BODY_TEXT_LINE,URIBL_BLOCKED autolearn=unavailable autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-getmail-retrieved-from-mailbox: =?utf-8?q?INBOX?= X-GMAIL-THRID: =?utf-8?q?1768258580062331749?= X-GMAIL-MSGID: =?utf-8?q?1768258580062331749?= Assign the necessary definitions to migrate to the new bus clock handling mechanism. Reviewed-by: Dmitry Baryshkov Signed-off-by: Konrad Dybcio --- drivers/interconnect/qcom/qcs404.c | 3 +++ 1 file changed, 3 insertions(+) diff --git a/drivers/interconnect/qcom/qcs404.c b/drivers/interconnect/qcom/qcs404.c index 938283ddd0e3..9deb4d81104e 100644 --- a/drivers/interconnect/qcom/qcs404.c +++ b/drivers/interconnect/qcom/qcs404.c @@ -984,6 +984,7 @@ static struct qcom_icc_node * const qcs404_bimc_nodes[] = { }; static const struct qcom_icc_desc qcs404_bimc = { + .bus_clk_desc = &bimc_clk, .nodes = qcs404_bimc_nodes, .num_nodes = ARRAY_SIZE(qcs404_bimc_nodes), }; @@ -1038,6 +1039,7 @@ static struct qcom_icc_node * const qcs404_pcnoc_nodes[] = { }; static const struct qcom_icc_desc qcs404_pcnoc = { + .bus_clk_desc = &bus_0_clk, .nodes = qcs404_pcnoc_nodes, .num_nodes = ARRAY_SIZE(qcs404_pcnoc_nodes), }; @@ -1066,6 +1068,7 @@ static struct qcom_icc_node * const qcs404_snoc_nodes[] = { }; static const struct qcom_icc_desc qcs404_snoc = { + .bus_clk_desc = &bus_1_clk, .nodes = qcs404_snoc_nodes, .num_nodes = ARRAY_SIZE(qcs404_snoc_nodes), }; From patchwork Fri Jun 9 20:19:19 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Konrad Dybcio X-Patchwork-Id: 105804 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a59:994d:0:b0:3d9:f83d:47d9 with SMTP id k13csp1172515vqr; Fri, 9 Jun 2023 13:43:11 -0700 (PDT) X-Google-Smtp-Source: ACHHUZ5TDMSlyXgzE9MsN/Qst+ndbGs2aIXSCrxoZHdXTO6nYmap/ZVc+ZPvbNe9uFf+ceZJSwrt X-Received: by 2002:a05:6358:e81a:b0:129:6079:14fe with SMTP id gi26-20020a056358e81a00b00129607914femr2277171rwb.14.1686343391563; Fri, 09 Jun 2023 13:43:11 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1686343391; cv=none; d=google.com; s=arc-20160816; b=lYKahd3jQ0GMdhq5FSO4T6fY87O39ST99MaQcWZ2vyv0p27Q8xBDxhf+yX4HUr2ijW OJGDWwVGI6EEpp9cf45A87AMT3BgoxbzR5WpXLYCEIcCNTCshkWz6gwjnda1e0fhmzKT JgTiVXMRxTqhEEnWtlOe3W+DHyIT/3ZNCWgRSD3lcjDBbVGTwfghhyw5ACMADCPRZZBo TAlaY7PgzuGCka8rcZiG/2mzNwNMseAi0LRqTusB9iyMM2nL+aT5ghMa1ScLumTU5J0l V+JFAkaZxb2rObKQuiaswRav5ulGrL1KTJpuxbtVdCf+cjrLUyuNIVbOeGcPAYg/bd7P FQ5w== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:cc:to:in-reply-to:references:message-id :content-transfer-encoding:mime-version:subject:date:from :dkim-signature; bh=Y5onO20dzjk2EC2OX/d1LUxW5LUluhqz+S0Vy1JWrck=; b=TT0jIXouRKs3Uh92CdGMnL6lbBlkn5I9xNUY7am+NTLEoZudocxuzUbMwroM2o0cH+ nOynhnykJVLKfmIFGNtKXg1hxILhNFzZvrErPTjXcbVkFKPpxM8sp6t/c1A1PinPljoW tfVCkQAbyxL5O4PyEjxVA+njaLRCtJQ4htEPu5X7wz9OczmGU+meOCXSYKAM3BQIjKa4 Qog6m5CcX+12z+DYmNjzpzJvWiAdlCzEpP1ZuqOZVA84wDtpEIhKfhfV0+t6BB3/4q35 8NvsXjMrueUeYErvWE++z1TslHfz1SnOxtcXoHczMAv0ZKaXSy9ffzAw+9O5DqGZVaTH rVUg== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=H76Q71eH; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: from out1.vger.email (out1.vger.email. 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Reviewed-by: Dmitry Baryshkov Signed-off-by: Konrad Dybcio Reviewed-by: Stephan Gerhold --- drivers/interconnect/qcom/msm8939.c | 4 ++++ 1 file changed, 4 insertions(+) diff --git a/drivers/interconnect/qcom/msm8939.c b/drivers/interconnect/qcom/msm8939.c index 639566dce45a..94b11b590a8e 100644 --- a/drivers/interconnect/qcom/msm8939.c +++ b/drivers/interconnect/qcom/msm8939.c @@ -1284,6 +1284,7 @@ static const struct qcom_icc_desc msm8939_snoc = { .type = QCOM_ICC_NOC, .nodes = msm8939_snoc_nodes, .num_nodes = ARRAY_SIZE(msm8939_snoc_nodes), + .bus_clk_desc = &bus_1_clk, .regmap_cfg = &msm8939_snoc_regmap_config, .qos_offset = 0x7000, }; @@ -1304,6 +1305,7 @@ static const struct qcom_icc_desc msm8939_snoc_mm = { .type = QCOM_ICC_NOC, .nodes = msm8939_snoc_mm_nodes, .num_nodes = ARRAY_SIZE(msm8939_snoc_mm_nodes), + .bus_clk_desc = &bus_2_clk, .regmap_cfg = &msm8939_snoc_regmap_config, .qos_offset = 0x7000, }; @@ -1332,6 +1334,7 @@ static const struct qcom_icc_desc msm8939_bimc = { .type = QCOM_ICC_BIMC, .nodes = msm8939_bimc_nodes, .num_nodes = ARRAY_SIZE(msm8939_bimc_nodes), + .bus_clk_desc = &bimc_clk, .regmap_cfg = &msm8939_bimc_regmap_config, .qos_offset = 0x8000, }; @@ -1403,6 +1406,7 @@ static const struct qcom_icc_desc msm8939_pcnoc = { .type = QCOM_ICC_NOC, .nodes = msm8939_pcnoc_nodes, .num_nodes = ARRAY_SIZE(msm8939_pcnoc_nodes), + .bus_clk_desc = &bus_0_clk, .regmap_cfg = &msm8939_pcnoc_regmap_config, .qos_offset = 0x7000, }; From patchwork Fri Jun 9 20:19:20 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Konrad Dybcio X-Patchwork-Id: 105803 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a59:994d:0:b0:3d9:f83d:47d9 with SMTP id k13csp1170635vqr; Fri, 9 Jun 2023 13:38:33 -0700 (PDT) X-Google-Smtp-Source: ACHHUZ5hhThWuzH2qao89lhnWhDvQFrmVgdNuesa2aWpp2CYxJnQvPQ+K6/shrJbQ3hA7O8GCrBx X-Received: by 2002:a17:902:bd87:b0:1b0:26e:7648 with SMTP id q7-20020a170902bd8700b001b0026e7648mr1962397pls.11.1686343112857; Fri, 09 Jun 2023 13:38:32 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1686343112; cv=none; d=google.com; s=arc-20160816; b=M5eyiE6+7R24GeUxkolUZ9gyOUGzySXvnyAZbR4LcbqViEauXhTr4Ui2cAmMclThVU maOTgXWK1CL9jZHu7UchPuPzsJQ/W8dPF0eYOvpyCNFeRp48GiDMeKcQ50cxvq93jkEi 28NRIYT5Po/llq7Swzb476Nl+eVRyhMhw7ne5B6YcdbawJ9rbSQ/84PNkqRzuAxQTzks mOuVmmDFljQ/RkzIY5tI8umSPtgB2+eyeJLfFyzybwBgRsM0/ck+UBKHKjnKedRalE/9 nUhbGL71tYuTx1owUuURGAx8MhZfXucdN1lev7hk1I9ipRqnksWd3Dskjmu7HOUHdLRM zMLg== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:cc:to:in-reply-to:references:message-id :content-transfer-encoding:mime-version:subject:date:from :dkim-signature; bh=yL7LimSkUpmanSTy0wtlUZtM4pffD5CjvvFdcF8Ze7o=; b=l+SR4/pSfSZGu4i4udIa3IoCPbTlbjJqJse8q6gZ8pEsUGUiQbP431NYUHnY/m5h0V p6CdYHBxUHxC+577wJCHekyvaUa9J2MlEOYSAQ3Bl1nNSrrsZ5ZK/h+sjLRDEAiyntXk WBmFiOrv6jGdO25WGKK+tayOJJhiQYezpRpjYnsV1QAk+oum1a1CRUe2iEqRXF1zqvRh H2z2d57EzSAR81inGd6L9ptd+LUAaFT8LpWq7I8Gjeuh7soLji1pEnAPWByZ+EIPPW+A eOeapxWVjM5i10r6iDW2ud/JtQidxwEO0XcXkbo6NW502f48N1ohlMJ21c4Nie7zBPNf tdgw== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=iipCaKbJ; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: from out1.vger.email (out1.vger.email. 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Reviewed-by: Dmitry Baryshkov Signed-off-by: Konrad Dybcio Reviewed-by: Stephan Gerhold --- drivers/interconnect/qcom/msm8916.c | 3 +++ 1 file changed, 3 insertions(+) diff --git a/drivers/interconnect/qcom/msm8916.c b/drivers/interconnect/qcom/msm8916.c index 196b05879896..be2a190a8b52 100644 --- a/drivers/interconnect/qcom/msm8916.c +++ b/drivers/interconnect/qcom/msm8916.c @@ -1231,6 +1231,7 @@ static const struct qcom_icc_desc msm8916_snoc = { .type = QCOM_ICC_NOC, .nodes = msm8916_snoc_nodes, .num_nodes = ARRAY_SIZE(msm8916_snoc_nodes), + .bus_clk_desc = &bus_1_clk, .regmap_cfg = &msm8916_snoc_regmap_config, .qos_offset = 0x7000, }; @@ -1259,6 +1260,7 @@ static const struct qcom_icc_desc msm8916_bimc = { .type = QCOM_ICC_BIMC, .nodes = msm8916_bimc_nodes, .num_nodes = ARRAY_SIZE(msm8916_bimc_nodes), + .bus_clk_desc = &bimc_clk, .regmap_cfg = &msm8916_bimc_regmap_config, .qos_offset = 0x8000, }; @@ -1328,6 +1330,7 @@ static const struct qcom_icc_desc msm8916_pcnoc = { .type = QCOM_ICC_NOC, .nodes = msm8916_pcnoc_nodes, .num_nodes = ARRAY_SIZE(msm8916_pcnoc_nodes), + .bus_clk_desc = &bus_0_clk, .regmap_cfg = &msm8916_pcnoc_regmap_config, .qos_offset = 0x7000, }; From patchwork Fri Jun 9 20:19:21 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Konrad Dybcio X-Patchwork-Id: 105802 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a59:994d:0:b0:3d9:f83d:47d9 with SMTP id k13csp1169558vqr; Fri, 9 Jun 2023 13:36:07 -0700 (PDT) X-Google-Smtp-Source: ACHHUZ4OdPtGeygHD0neClYE12NqQsxd6TcYNgU205bz80kiAoMwzok8DFwhf2qmnv0IMzhd6Tep X-Received: by 2002:a17:902:f111:b0:1b1:b253:5428 with SMTP id e17-20020a170902f11100b001b1b2535428mr1645796plb.58.1686342966704; Fri, 09 Jun 2023 13:36:06 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1686342966; cv=none; d=google.com; s=arc-20160816; b=HjoUlnu5qaYXOLG6gGJy+V5ylProtwQL0J4igf09jLBUEGaprmeJsHJHnaBPJpTUsD K9VA+av6sf6RolkC8EmRBhb9Oppm194VD71ubfnQX8BNDIR33ClHfhtmJvDgg81v2vJU bWnXyJ2n746Lcpp3GFAEVKd8RkSWmh/hMlPB4G8dz3OQmy6EIsryewY0S+PCnMPrzogx UcX4xtbbsQ3Z/q100yru5O6jdtQI6SX4p+SgzWeHCQLP+6pdaeeY/nGIJkSoYYJFPmiO T3ei1LzjSctNxZnGqi8dzajMONJgDS2NzhI5HiZPxYlEKP4SdEaQmi0A1E8JhEolgYxR zbbA== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:cc:to:in-reply-to:references:message-id :content-transfer-encoding:mime-version:subject:date:from :dkim-signature; bh=o0XnmH13ivRPPHGJLER9uxu6PJxvQI4F3jOrAVZw55g=; b=pZjXIJPv0hNHXTUrRyXYUDQ3Pkwp7h9OSVrcMSGQ9RmqKeoeUVQjIrP61YbSzRnZLl 3nVz2KkXuzyKcCzdjvs6VKY2sWzUTSYRobVrimRGG8oiV7sJbHDvoUmu+b7DoskCzXHX 4SdRJKwCAu0/VunlUETX8CLJcpXdzljX9Gf/nJG6188iyznd2pjeun+73dysZugiCatJ dnBLMBB2obzpJo7Jgp6V/KCG8TcU9oZL9+74M8eNQIJX2vd+Jd3G7+yRDfGkw1k0yFdx JzGj+YmJGnxrAiRdRmb76082pD42uElixHCiGrtJpAs6QybEAKr2kZizJoLSpOfqNhzM YfNg== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=rpiwSdjf; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: from out1.vger.email (out1.vger.email. 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[83.9.29.190]) by smtp.gmail.com with ESMTPSA id b18-20020ac25632000000b004f628eb7884sm641349lff.232.2023.06.09.13.19.34 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 09 Jun 2023 13:19:35 -0700 (PDT) From: Konrad Dybcio Date: Fri, 09 Jun 2023 22:19:21 +0200 Subject: [PATCH v2 16/22] interconnect: qcom: qcm2290: Hook up RPM bus clk definitions MIME-Version: 1.0 Message-Id: <20230526-topic-smd_icc-v2-16-e5934b07d813@linaro.org> References: <20230526-topic-smd_icc-v2-0-e5934b07d813@linaro.org> In-Reply-To: <20230526-topic-smd_icc-v2-0-e5934b07d813@linaro.org> To: Andy Gross , Bjorn Andersson , Michael Turquette , Stephen Boyd , Georgi Djakov , Leo Yan , Evan Green Cc: Marijn Suijten , linux-arm-msm@vger.kernel.org, linux-kernel@vger.kernel.org, linux-clk@vger.kernel.org, linux-pm@vger.kernel.org, Konrad Dybcio , Dmitry Baryshkov X-Mailer: b4 0.12.2 X-Developer-Signature: v=1; a=ed25519-sha256; t=1686341953; l=2388; i=konrad.dybcio@linaro.org; s=20230215; h=from:subject:message-id; bh=tSBMAPt7cmsb0YEEInMBYypPFAnegUdevAoSi5GlaYA=; b=eij1jtJTLGM5s11Ad7Uh848QYLshxEG0qmBuSFdZUmvK1tri9NY7+/4nrvNJzksPHxbzOQpQ+ mjrGiBo/IIDBQEmpS2S777zDWxzZMhglGgXNSSwm9N4eswXh82tCq4d X-Developer-Key: i=konrad.dybcio@linaro.org; a=ed25519; pk=iclgkYvtl2w05SSXO5EjjSYlhFKsJ+5OSZBjOkQuEms= X-Spam-Status: No, score=-2.1 required=5.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,RCVD_IN_DNSWL_NONE, SPF_HELO_NONE,SPF_PASS,T_SCC_BODY_TEXT_LINE,URIBL_BLOCKED autolearn=unavailable autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-getmail-retrieved-from-mailbox: =?utf-8?q?INBOX?= X-GMAIL-THRID: =?utf-8?q?1768258762299289055?= X-GMAIL-MSGID: =?utf-8?q?1768258762299289055?= Assign the necessary definitions to migrate to the new bus clock handling mechanism. Reviewed-by: Dmitry Baryshkov Signed-off-by: Konrad Dybcio --- drivers/interconnect/qcom/qcm2290.c | 6 ++++++ 1 file changed, 6 insertions(+) diff --git a/drivers/interconnect/qcom/qcm2290.c b/drivers/interconnect/qcom/qcm2290.c index cb636e67a5a4..2c7a76fab83c 100644 --- a/drivers/interconnect/qcom/qcm2290.c +++ b/drivers/interconnect/qcom/qcm2290.c @@ -1196,6 +1196,7 @@ static const struct qcom_icc_desc qcm2290_bimc = { .type = QCOM_ICC_BIMC, .nodes = qcm2290_bimc_nodes, .num_nodes = ARRAY_SIZE(qcm2290_bimc_nodes), + .bus_clk_desc = &bimc_clk, .regmap_cfg = &qcm2290_bimc_regmap_config, /* M_REG_BASE() in vendor msm_bus_bimc_adhoc driver */ .qos_offset = 0x8000, @@ -1251,6 +1252,7 @@ static const struct qcom_icc_desc qcm2290_cnoc = { .type = QCOM_ICC_NOC, .nodes = qcm2290_cnoc_nodes, .num_nodes = ARRAY_SIZE(qcm2290_cnoc_nodes), + .bus_clk_desc = &bus_1_clk, .regmap_cfg = &qcm2290_cnoc_regmap_config, }; @@ -1292,6 +1294,7 @@ static const struct qcom_icc_desc qcm2290_snoc = { .type = QCOM_ICC_QNOC, .nodes = qcm2290_snoc_nodes, .num_nodes = ARRAY_SIZE(qcm2290_snoc_nodes), + .bus_clk_desc = &bus_2_clk, .regmap_cfg = &qcm2290_snoc_regmap_config, /* Vendor DT node fab-sys_noc property 'qcom,base-offset' */ .qos_offset = 0x15000, @@ -1306,6 +1309,7 @@ static const struct qcom_icc_desc qcm2290_qup_virt = { .type = QCOM_ICC_QNOC, .nodes = qcm2290_qup_virt_nodes, .num_nodes = ARRAY_SIZE(qcm2290_qup_virt_nodes), + .bus_clk_desc = &qup_clk, }; static struct qcom_icc_node * const qcm2290_mmnrt_virt_nodes[] = { @@ -1319,6 +1323,7 @@ static const struct qcom_icc_desc qcm2290_mmnrt_virt = { .type = QCOM_ICC_QNOC, .nodes = qcm2290_mmnrt_virt_nodes, .num_nodes = ARRAY_SIZE(qcm2290_mmnrt_virt_nodes), + .bus_clk_desc = &mmaxi_0_clk, .regmap_cfg = &qcm2290_snoc_regmap_config, .qos_offset = 0x15000, }; @@ -1333,6 +1338,7 @@ static const struct qcom_icc_desc qcm2290_mmrt_virt = { .type = QCOM_ICC_QNOC, .nodes = qcm2290_mmrt_virt_nodes, .num_nodes = ARRAY_SIZE(qcm2290_mmrt_virt_nodes), + .bus_clk_desc = &mmaxi_1_clk, .regmap_cfg = &qcm2290_snoc_regmap_config, .qos_offset = 0x15000, }; From patchwork Fri Jun 9 20:19:22 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Konrad Dybcio X-Patchwork-Id: 105793 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a59:994d:0:b0:3d9:f83d:47d9 with SMTP id k13csp1165471vqr; Fri, 9 Jun 2023 13:27:41 -0700 (PDT) X-Google-Smtp-Source: ACHHUZ68nwwlTZLGCBA3ufCEWTpkXcHDOTZB55pMk0gbGKn1gYNa3I/9hzQ1y05/ks9rfhG0E00K X-Received: by 2002:a17:903:1110:b0:1ae:10bc:4ae8 with SMTP id n16-20020a170903111000b001ae10bc4ae8mr1880460plh.26.1686342461483; Fri, 09 Jun 2023 13:27:41 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1686342461; cv=none; d=google.com; s=arc-20160816; b=Wu3YPStwJR8HoLZ7ob2DGIpnWHlrGNy3wMGWcItgiZ+KS9ZWH3/hUCb2u/DPcKAvxW 8L1T9A4DQL55aWyteRjhOUjTq/jYQFkbIduCQmHxUoaae3Oqj7zRrxe2fBMc6MfrMirp ip1llNO/07xDL5EHeakJwLL1QNHEP0T0kvnCZQMQWdOowhsBjQBXmcPylGVno5NrEBmL YCS1aa129bf9vcoqMjlntkAll2OrL7wDmooYjZwxJU9GN0rdCymom91kfneICGwjJZjL 1ii8BkstMwyLqzjxJ+n0wd6RTXACFp/E33TzfbH/ab/BKTWVu441/B0b7IRmEjoCXfem v7Sw== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:cc:to:in-reply-to:references:message-id :content-transfer-encoding:mime-version:subject:date:from :dkim-signature; bh=cb9xdecodEODemYoEb87K9ta+9ODW7Umb800Ol1DryA=; b=luIW1WelTCF8700lQJI0BAkNVpRzBG7Rt3Riz3JwAQbRY7ngZCnS0HFE322r+gFB4f hV/i5iXZaUDpZs3LyAGmDsvf/zaOSKczmDKTwJaLU8ZeRmaiVOxUx+SZ2h1HH0YHQkYu FY4NFQeHnFLXbvvrevbB384w/BhEC9CcULJwz+eEm1VXHLE0w8SHuSld50176iss8zGa uazOFAcTiZdE1YI/pv5uzwIqJmIgjfeVEFOI63ypsyuZKAy/7OH6Eqsa0TNyowg+K8uW sPfTuce8OBkqnKnvs6WDRKp1tx+RFKZpYMY9hqctEpU2+z084IjZcc0WhDDyDmHvmIiv WIEw== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=qZRNYb4B; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: from out1.vger.email (out1.vger.email. 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[83.9.29.190]) by smtp.gmail.com with ESMTPSA id b18-20020ac25632000000b004f628eb7884sm641349lff.232.2023.06.09.13.19.36 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 09 Jun 2023 13:19:36 -0700 (PDT) From: Konrad Dybcio Date: Fri, 09 Jun 2023 22:19:22 +0200 Subject: [PATCH v2 17/22] interconnect: qcom: icc-rpm: Control bus rpmcc from icc MIME-Version: 1.0 Message-Id: <20230526-topic-smd_icc-v2-17-e5934b07d813@linaro.org> References: <20230526-topic-smd_icc-v2-0-e5934b07d813@linaro.org> In-Reply-To: <20230526-topic-smd_icc-v2-0-e5934b07d813@linaro.org> To: Andy Gross , Bjorn Andersson , Michael Turquette , Stephen Boyd , Georgi Djakov , Leo Yan , Evan Green Cc: Marijn Suijten , linux-arm-msm@vger.kernel.org, linux-kernel@vger.kernel.org, linux-clk@vger.kernel.org, linux-pm@vger.kernel.org, Konrad Dybcio X-Mailer: b4 0.12.2 X-Developer-Signature: v=1; a=ed25519-sha256; t=1686341953; l=10137; i=konrad.dybcio@linaro.org; s=20230215; h=from:subject:message-id; bh=fOhhClfVLnFquoGaJCo3CMfLNuorMvSsi2R+II9EBuU=; b=fHRtogQIJJdopGqOJNns6sC5uWJPr8lNn6DAAokpNgextWTESGxxMmRkIyfX2mWOG95pqvQiQ VBKrChq5Wl5BG9z+nBbwilCEsDivc38bXt/0UHKwgHVXMFOttIdVce1 X-Developer-Key: i=konrad.dybcio@linaro.org; a=ed25519; pk=iclgkYvtl2w05SSXO5EjjSYlhFKsJ+5OSZBjOkQuEms= X-Spam-Status: No, score=-2.1 required=5.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,RCVD_IN_DNSWL_NONE, SPF_HELO_NONE,SPF_PASS,T_SCC_BODY_TEXT_LINE,URIBL_BLOCKED autolearn=unavailable autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-getmail-retrieved-from-mailbox: =?utf-8?q?INBOX?= X-GMAIL-THRID: =?utf-8?q?1768258233165062486?= X-GMAIL-MSGID: =?utf-8?q?1768258233165062486?= The sole purpose of bus clocks that were previously registered with rpmcc was to convey the aggregated bandwidth to RPM. There's no good reason to keep them outside the interconnect framework, as it only adds to the plentiful complexity. Add the required code to handle these clocks from within SMD RPM ICC. RPM-owned bus clocks are no longer considered a thing, but sadly we have to allow for the existence of HLOS-owned bus clocks, as some (mostly older) SoCs (ab)use these for bus scaling (e.g. MSM8998 and &mmcc AHB_CLK_SRC). This in turn is trivially solved with a single *clk, which is filled and used iff qp.bus_clk_desc is absent and we have a "bus" clock-names entry in the DT node. This change should(tm) be fully compatible with all sorts of old Device Trees as far as the interconnect functionality goes (modulo abusing bus clock handles, but that's a mistake in and of itself). Signed-off-by: Konrad Dybcio --- drivers/interconnect/qcom/icc-rpm.c | 116 +++++++++++++++++++----------------- drivers/interconnect/qcom/icc-rpm.h | 13 ++-- drivers/interconnect/qcom/msm8996.c | 1 - drivers/interconnect/qcom/sdm660.c | 1 - 4 files changed, 66 insertions(+), 65 deletions(-) diff --git a/drivers/interconnect/qcom/icc-rpm.c b/drivers/interconnect/qcom/icc-rpm.c index b8ecf9538ab9..6d40815c5401 100644 --- a/drivers/interconnect/qcom/icc-rpm.c +++ b/drivers/interconnect/qcom/icc-rpm.c @@ -49,7 +49,7 @@ #define NOC_QOS_MODE_FIXED_VAL 0x0 #define NOC_QOS_MODE_BYPASS_VAL 0x2 -#define ICC_BUS_CLK_MIN_RATE 19200000ULL +#define ICC_BUS_CLK_MIN_RATE 19200ULL /* kHz */ static int qcom_icc_set_qnoc_qos(struct icc_node *src) { @@ -338,11 +338,10 @@ static int qcom_icc_set(struct icc_node *src, struct icc_node *dst) struct qcom_icc_node *src_qn = NULL, *dst_qn = NULL; struct icc_provider *provider; u64 sum_bw; - u64 rate; + u64 active_rate, sleep_rate; u64 agg_avg[QCOM_ICC_NUM_BUCKETS], agg_peak[QCOM_ICC_NUM_BUCKETS]; u64 max_agg_avg; - int ret, i; - int bucket; + int ret; src_qn = src->data; if (dst) @@ -364,49 +363,50 @@ static int qcom_icc_set(struct icc_node *src, struct icc_node *dst) return ret; } - for (i = 0; i < qp->num_bus_clks; i++) { - /* - * Use WAKE bucket for active clock, otherwise, use SLEEP bucket - * for other clocks. If a platform doesn't set interconnect - * path tags, by default use sleep bucket for all clocks. - * - * Note, AMC bucket is not supported yet. - */ - if (!strcmp(qp->bus_clks[i].id, "bus_a")) - bucket = QCOM_ICC_BUCKET_WAKE; - else - bucket = QCOM_ICC_BUCKET_SLEEP; - - rate = icc_units_to_bps(max(agg_avg[bucket], agg_peak[bucket])); - do_div(rate, src_qn->buswidth); - rate = min_t(u64, rate, LONG_MAX); - - /* - * Downstream checks whether the requested rate is zero, but it makes little sense - * to vote for a value that's below the lower threshold, so let's not do so. - */ - if (bucket == QCOM_ICC_BUCKET_WAKE && qp->keep_alive) - rate = max(ICC_BUS_CLK_MIN_RATE, rate); - - if (qp->bus_clk_rate[i] == rate) - continue; - - ret = clk_set_rate(qp->bus_clks[i].clk, rate); - if (ret) { - pr_err("%s clk_set_rate error: %d\n", - qp->bus_clks[i].id, ret); + /* Some providers don't have a bus clock to scale */ + if (!qp->bus_clk_desc && !qp->bus_clk) + return 0; + + /* Intentionally keep the rates in kHz as that's what RPM accepts */ + active_rate = max(agg_avg[QCOM_SMD_RPM_ACTIVE_STATE], + agg_peak[QCOM_SMD_RPM_ACTIVE_STATE]); + do_div(active_rate, src_qn->buswidth); + + sleep_rate = max(agg_avg[QCOM_SMD_RPM_SLEEP_STATE], + agg_peak[QCOM_SMD_RPM_SLEEP_STATE]); + do_div(sleep_rate, src_qn->buswidth); + + /* + * Downstream checks whether the requested rate is zero, but it makes little sense + * to vote for a value that's below the lower threshold, so let's not do so. + */ + if (qp->keep_alive) + active_rate = max(ICC_BUS_CLK_MIN_RATE, active_rate); + + /* Some providers have a non-RPM-owned bus clock - convert kHz->Hz for the CCF */ + if (qp->bus_clk) + return clk_set_rate(qp->bus_clk, 1000ULL * max(active_rate, sleep_rate)); + + /* RPM only accepts <=INT_MAX rates */ + active_rate = min_t(u32, active_rate, INT_MAX); + sleep_rate = min_t(u32, sleep_rate, INT_MAX); + + if ((active_rate != qp->bus_clk_rate[QCOM_SMD_RPM_ACTIVE_STATE]) || + (sleep_rate != qp->bus_clk_rate[QCOM_SMD_RPM_SLEEP_STATE])) { + ret = qcom_icc_rpm_set_bus_rate(qp->bus_clk_desc, + active_rate, + sleep_rate); + if (ret) return ret; - } - qp->bus_clk_rate[i] = rate; } + /* Cache the rate after we've successfully commited it to RPM */ + qp->bus_clk_rate[QCOM_SMD_RPM_ACTIVE_STATE] = active_rate; + qp->bus_clk_rate[QCOM_SMD_RPM_SLEEP_STATE] = sleep_rate; + return 0; } -static const char * const bus_clocks[] = { - "bus", "bus_a", -}; - int qnoc_probe(struct platform_device *pdev) { struct device *dev = &pdev->dev; @@ -448,6 +448,18 @@ int qnoc_probe(struct platform_device *pdev) if (!qp->intf_clks) return -ENOMEM; + if (desc->bus_clk_desc) { + qp->bus_clk_desc = devm_kzalloc(dev, sizeof(*qp->bus_clk_desc), + GFP_KERNEL); + if (!qp->bus_clk_desc) + return -ENOMEM; + + qp->bus_clk_desc = desc->bus_clk_desc; + } else if (!IS_ERR(devm_clk_get(dev, "bus"))) { + /* Some older SoCs may have a single non-RPM-owned bus clock. */ + qp->bus_clk = devm_clk_get(dev, "bus"); + } + data = devm_kzalloc(dev, struct_size(data, nodes, num_nodes), GFP_KERNEL); if (!data) @@ -457,10 +469,6 @@ int qnoc_probe(struct platform_device *pdev) for (i = 0; i < cd_num; i++) qp->intf_clks[i].id = cds[i]; - qp->num_bus_clks = desc->no_clk_scaling ? 0 : NUM_BUS_CLKS; - for (i = 0; i < qp->num_bus_clks; i++) - qp->bus_clks[i].id = bus_clocks[i]; - qp->keep_alive = desc->keep_alive; qp->type = desc->type; qp->qos_offset = desc->qos_offset; @@ -490,13 +498,11 @@ int qnoc_probe(struct platform_device *pdev) } regmap_done: - ret = devm_clk_bulk_get(dev, qp->num_bus_clks, qp->bus_clks); - if (ret) - return ret; - - ret = clk_bulk_prepare_enable(qp->num_bus_clks, qp->bus_clks); - if (ret) - return ret; + if (qp->bus_clk) { + ret = clk_prepare_enable(qp->bus_clk); + if (ret) + return ret; + } ret = devm_clk_bulk_get(dev, qp->num_intf_clks, qp->intf_clks); if (ret) @@ -566,7 +572,8 @@ int qnoc_probe(struct platform_device *pdev) icc_provider_deregister(provider); err_remove_nodes: icc_nodes_remove(provider); - clk_bulk_disable_unprepare(qp->num_bus_clks, qp->bus_clks); + if (qp->bus_clk) + clk_disable_unprepare(qp->bus_clk); return ret; } @@ -578,7 +585,8 @@ int qnoc_remove(struct platform_device *pdev) icc_provider_deregister(&qp->provider); icc_nodes_remove(&qp->provider); - clk_bulk_disable_unprepare(qp->num_bus_clks, qp->bus_clks); + if (qp->bus_clk) + clk_disable_unprepare(qp->bus_clk); return 0; } diff --git a/drivers/interconnect/qcom/icc-rpm.h b/drivers/interconnect/qcom/icc-rpm.h index 99e34f684c85..11e7d503e4d0 100644 --- a/drivers/interconnect/qcom/icc-rpm.h +++ b/drivers/interconnect/qcom/icc-rpm.h @@ -36,32 +36,29 @@ struct rpm_clk_resource { bool branch; }; -#define NUM_BUS_CLKS 2 - /** * struct qcom_icc_provider - Qualcomm specific interconnect provider * @provider: generic interconnect provider - * @num_bus_clks: the total number of bus_clks clk_bulk_data entries (0 or 2) * @num_intf_clks: the total number of intf_clks clk_bulk_data entries * @type: the ICC provider type * @regmap: regmap for QoS registers read/write access * @bus_clk_rate: bus clock rate in Hz - * @bus_clks: the clk_bulk_data table of bus clocks + * @bus_clk_desc: a pointer to a rpm_clk_resource description of bus clocks * @intf_clks: a clk_bulk_data array of interface clocks + * @bus_clk: a pointer to a HLOS-owned bus clock * @qos_offset: offset to QoS registers * @keep_alive: whether to always keep a minimum vote on the bus clocks * @is_on: whether the bus is powered on */ struct qcom_icc_provider { struct icc_provider provider; - int num_bus_clks; int num_intf_clks; enum qcom_icc_type type; struct regmap *regmap; int qos_offset; - u64 bus_clk_rate[NUM_BUS_CLKS]; - struct clk_bulk_data bus_clks[NUM_BUS_CLKS]; + u32 bus_clk_rate[QCOM_SMD_RPM_STATE_NUM]; const struct rpm_clk_resource *bus_clk_desc; + struct clk *bus_clk; struct clk_bulk_data *intf_clks; bool keep_alive; bool is_on; @@ -118,12 +115,10 @@ struct qcom_icc_node { struct qcom_icc_desc { struct qcom_icc_node * const *nodes; size_t num_nodes; - const char * const *bus_clocks; const struct rpm_clk_resource *bus_clk_desc; const char * const *intf_clocks; size_t num_intf_clocks; bool keep_alive; - bool no_clk_scaling; enum qcom_icc_type type; const struct regmap_config *regmap_cfg; int qos_offset; diff --git a/drivers/interconnect/qcom/msm8996.c b/drivers/interconnect/qcom/msm8996.c index a596f4035d2e..8081b3cb1025 100644 --- a/drivers/interconnect/qcom/msm8996.c +++ b/drivers/interconnect/qcom/msm8996.c @@ -1818,7 +1818,6 @@ static const struct qcom_icc_desc msm8996_a0noc = { .num_nodes = ARRAY_SIZE(a0noc_nodes), .intf_clocks = a0noc_intf_clocks, .num_intf_clocks = ARRAY_SIZE(a0noc_intf_clocks), - .no_clk_scaling = true, .regmap_cfg = &msm8996_a0noc_regmap_config }; diff --git a/drivers/interconnect/qcom/sdm660.c b/drivers/interconnect/qcom/sdm660.c index 5743ed680e8e..211fa1fa569c 100644 --- a/drivers/interconnect/qcom/sdm660.c +++ b/drivers/interconnect/qcom/sdm660.c @@ -1618,7 +1618,6 @@ static const struct qcom_icc_desc sdm660_gnoc = { .nodes = sdm660_gnoc_nodes, .num_nodes = ARRAY_SIZE(sdm660_gnoc_nodes), .regmap_cfg = &sdm660_gnoc_regmap_config, - .no_clk_scaling = true, }; static struct qcom_icc_node * const sdm660_mnoc_nodes[] = { From patchwork Fri Jun 9 20:19:23 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Konrad Dybcio X-Patchwork-Id: 105795 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a59:994d:0:b0:3d9:f83d:47d9 with SMTP id k13csp1165519vqr; Fri, 9 Jun 2023 13:27:48 -0700 (PDT) X-Google-Smtp-Source: ACHHUZ49uVLtq4i4WVIE+95dW5+LFvLpadMfYnQHePXIQrEuaNbZQtLkWSeTlkUAo/vKo3D4vAxb X-Received: by 2002:a17:90b:4b05:b0:256:2b45:8e1a with SMTP id lx5-20020a17090b4b0500b002562b458e1amr1903064pjb.25.1686342468222; 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[83.9.29.190]) by smtp.gmail.com with ESMTPSA id b18-20020ac25632000000b004f628eb7884sm641349lff.232.2023.06.09.13.19.37 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 09 Jun 2023 13:19:38 -0700 (PDT) From: Konrad Dybcio Date: Fri, 09 Jun 2023 22:19:23 +0200 Subject: [PATCH v2 18/22] clk: qcom: smd-rpm: Separate out interconnect bus clocks MIME-Version: 1.0 Message-Id: <20230526-topic-smd_icc-v2-18-e5934b07d813@linaro.org> References: <20230526-topic-smd_icc-v2-0-e5934b07d813@linaro.org> In-Reply-To: <20230526-topic-smd_icc-v2-0-e5934b07d813@linaro.org> To: Andy Gross , Bjorn Andersson , Michael Turquette , Stephen Boyd , Georgi Djakov , Leo Yan , Evan Green Cc: Marijn Suijten , linux-arm-msm@vger.kernel.org, linux-kernel@vger.kernel.org, linux-clk@vger.kernel.org, linux-pm@vger.kernel.org, Konrad Dybcio X-Mailer: b4 0.12.2 X-Developer-Signature: v=1; a=ed25519-sha256; t=1686341953; l=26677; i=konrad.dybcio@linaro.org; s=20230215; h=from:subject:message-id; bh=PYV9NPiLaxXrK8A3mWbRdzkavjHebPcaZ0bfC9RHuZA=; b=oZan9LkY1hPZFqFkrAVnPS4KQ8Bd/d60qUNJdGo3NZIj2siY/1ZKWV23le3y/VpNCI4DZ5Cdv 3tOcLUih2zIDIZ/Ep6e/9G2kUfR2JL1B8M6DXjAx6lnlsPhGll64YTc X-Developer-Key: i=konrad.dybcio@linaro.org; a=ed25519; pk=iclgkYvtl2w05SSXO5EjjSYlhFKsJ+5OSZBjOkQuEms= X-Spam-Status: No, score=-2.1 required=5.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,RCVD_IN_DNSWL_NONE, SPF_HELO_NONE,SPF_PASS,T_SCC_BODY_TEXT_LINE,URIBL_BLOCKED autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-getmail-retrieved-from-mailbox: =?utf-8?q?INBOX?= X-GMAIL-THRID: =?utf-8?q?1768258240264837846?= X-GMAIL-MSGID: =?utf-8?q?1768258240264837846?= The interconnect bus clocks are now handled within the ICC framework. They still however need to get a kickstart *before* we call clk_smd_rpm_enable_scaling(), or RPM will assume that they should all be running at 0 kHz and the system will inevitably die. Separate them out to ensure such a kickstart can still take place. As a happy accident, the file got smaller: Total: Before=41951, After=41555, chg -0.94% Signed-off-by: Konrad Dybcio --- drivers/clk/qcom/clk-smd-rpm.c | 278 +++++++++++++++++------------------------ 1 file changed, 115 insertions(+), 163 deletions(-) diff --git a/drivers/clk/qcom/clk-smd-rpm.c b/drivers/clk/qcom/clk-smd-rpm.c index 482fe30ee6f0..f8f5977408e0 100644 --- a/drivers/clk/qcom/clk-smd-rpm.c +++ b/drivers/clk/qcom/clk-smd-rpm.c @@ -168,6 +168,14 @@ struct clk_smd_rpm { struct rpm_smd_clk_desc { struct clk_smd_rpm **clks; size_t num_clks; + + /* + * Interconnect clocks are managed by the icc framework, this driver + * only kickstarts them so that they don't get gated between + * clk_smd_rpm_enable_scaling() and interconnect driver initialization. + */ + struct clk_smd_rpm **icc_clks; + size_t num_icc_clks; bool scaling_before_handover; }; @@ -507,13 +515,69 @@ DEFINE_CLK_SMD_RPM_XO_BUFFER(div_clk1, 11, 19200000); DEFINE_CLK_SMD_RPM_XO_BUFFER(div_clk2, 12, 19200000); DEFINE_CLK_SMD_RPM_XO_BUFFER(div_clk3, 13, 19200000); +static struct clk_smd_rpm *bimc_pcnoc_icc_clks[] = { + &clk_smd_rpm_bimc_clk, + &clk_smd_rpm_bus_0_pcnoc_clk, +}; + +static struct clk_smd_rpm *bimc_pcnoc_snoc_icc_clks[] = { + &clk_smd_rpm_bimc_clk, + &clk_smd_rpm_bus_0_pcnoc_clk, + &clk_smd_rpm_bus_1_snoc_clk, +}; + +static struct clk_smd_rpm *bimc_pcnoc_snoc_smmnoc_icc_clks[] = { + &clk_smd_rpm_bimc_clk, + &clk_smd_rpm_bus_0_pcnoc_clk, + &clk_smd_rpm_bus_1_snoc_clk, + &clk_smd_rpm_bus_2_sysmmnoc_clk, +}; + +static struct clk_smd_rpm *bimc_pcnoc_snoc_cnoc_ocmem_icc_clks[] = { + &clk_smd_rpm_bimc_clk, + &clk_smd_rpm_bus_0_pcnoc_clk, + &clk_smd_rpm_bus_1_snoc_clk, + &clk_smd_rpm_bus_2_cnoc_clk, + &clk_smd_rpm_ocmemgx_clk, +}; + +static struct clk_smd_rpm *msm8996_icc_clks[] = { + &clk_smd_rpm_bimc_clk, + &clk_smd_rpm_branch_aggre1_noc_clk, + &clk_smd_rpm_branch_aggre2_noc_clk, + &clk_smd_rpm_bus_0_pcnoc_clk, + &clk_smd_rpm_bus_1_snoc_clk, + &clk_smd_rpm_bus_2_cnoc_clk, + &clk_smd_rpm_mmssnoc_axi_rpm_clk, +}; + +static struct clk_smd_rpm *msm8998_icc_clks[] = { + &clk_smd_rpm_aggre1_noc_clk, + &clk_smd_rpm_aggre2_noc_clk, + &clk_smd_rpm_bimc_clk, + &clk_smd_rpm_bus_1_snoc_clk, + &clk_smd_rpm_bus_2_cnoc_clk, + &clk_smd_rpm_mmssnoc_axi_rpm_clk, +}; + +static struct clk_smd_rpm *sdm660_icc_clks[] = { + &clk_smd_rpm_aggre2_noc_clk, + &clk_smd_rpm_bimc_clk, + &clk_smd_rpm_bus_1_snoc_clk, + &clk_smd_rpm_bus_2_cnoc_clk, + &clk_smd_rpm_mmssnoc_axi_rpm_clk, +}; + +static struct clk_smd_rpm *sm_qnoc_icc_clks[] = { + &clk_smd_rpm_bimc_clk, + &clk_smd_rpm_bus_1_cnoc_clk, + &clk_smd_rpm_mmnrt_clk, + &clk_smd_rpm_mmrt_clk, + &clk_smd_rpm_qup_clk, + &clk_smd_rpm_bus_2_snoc_clk, +}; + static struct clk_smd_rpm *msm8909_clks[] = { - [RPM_SMD_PCNOC_CLK] = &clk_smd_rpm_bus_0_pcnoc_clk, - [RPM_SMD_PCNOC_A_CLK] = &clk_smd_rpm_bus_0_pcnoc_a_clk, - [RPM_SMD_SNOC_CLK] = &clk_smd_rpm_bus_1_snoc_clk, - [RPM_SMD_SNOC_A_CLK] = &clk_smd_rpm_bus_1_snoc_a_clk, - [RPM_SMD_BIMC_CLK] = &clk_smd_rpm_bimc_clk, - [RPM_SMD_BIMC_A_CLK] = &clk_smd_rpm_bimc_a_clk, [RPM_SMD_QPIC_CLK] = &clk_smd_rpm_qpic_clk, [RPM_SMD_QPIC_CLK_A] = &clk_smd_rpm_qpic_a_clk, [RPM_SMD_QDSS_CLK] = &clk_smd_rpm_qdss_clk, @@ -539,15 +603,11 @@ static struct clk_smd_rpm *msm8909_clks[] = { static const struct rpm_smd_clk_desc rpm_clk_msm8909 = { .clks = msm8909_clks, .num_clks = ARRAY_SIZE(msm8909_clks), + .icc_clks = bimc_pcnoc_snoc_icc_clks, + .num_icc_clks = ARRAY_SIZE(bimc_pcnoc_snoc_icc_clks), }; static struct clk_smd_rpm *msm8916_clks[] = { - [RPM_SMD_PCNOC_CLK] = &clk_smd_rpm_bus_0_pcnoc_clk, - [RPM_SMD_PCNOC_A_CLK] = &clk_smd_rpm_bus_0_pcnoc_a_clk, - [RPM_SMD_SNOC_CLK] = &clk_smd_rpm_bus_1_snoc_clk, - [RPM_SMD_SNOC_A_CLK] = &clk_smd_rpm_bus_1_snoc_a_clk, - [RPM_SMD_BIMC_CLK] = &clk_smd_rpm_bimc_clk, - [RPM_SMD_BIMC_A_CLK] = &clk_smd_rpm_bimc_a_clk, [RPM_SMD_QDSS_CLK] = &clk_smd_rpm_qdss_clk, [RPM_SMD_QDSS_A_CLK] = &clk_smd_rpm_qdss_a_clk, [RPM_SMD_BB_CLK1] = &clk_smd_rpm_bb_clk1, @@ -571,21 +631,15 @@ static struct clk_smd_rpm *msm8916_clks[] = { static const struct rpm_smd_clk_desc rpm_clk_msm8916 = { .clks = msm8916_clks, .num_clks = ARRAY_SIZE(msm8916_clks), + .icc_clks = bimc_pcnoc_snoc_icc_clks, + .num_icc_clks = ARRAY_SIZE(bimc_pcnoc_snoc_icc_clks), }; static struct clk_smd_rpm *msm8917_clks[] = { [RPM_SMD_XO_CLK_SRC] = &clk_smd_rpm_branch_bi_tcxo, [RPM_SMD_XO_A_CLK_SRC] = &clk_smd_rpm_branch_bi_tcxo_a, - [RPM_SMD_PNOC_CLK] = &clk_smd_rpm_bus_0_pcnoc_clk, - [RPM_SMD_PNOC_A_CLK] = &clk_smd_rpm_bus_0_pcnoc_a_clk, - [RPM_SMD_SNOC_CLK] = &clk_smd_rpm_bus_1_snoc_clk, - [RPM_SMD_SNOC_A_CLK] = &clk_smd_rpm_bus_1_snoc_a_clk, - [RPM_SMD_BIMC_CLK] = &clk_smd_rpm_bimc_clk, - [RPM_SMD_BIMC_A_CLK] = &clk_smd_rpm_bimc_a_clk, [RPM_SMD_BIMC_GPU_CLK] = &clk_smd_rpm_bimc_gpu_clk, [RPM_SMD_BIMC_GPU_A_CLK] = &clk_smd_rpm_bimc_gpu_a_clk, - [RPM_SMD_SYSMMNOC_CLK] = &clk_smd_rpm_bus_2_sysmmnoc_clk, - [RPM_SMD_SYSMMNOC_A_CLK] = &clk_smd_rpm_bus_2_sysmmnoc_a_clk, [RPM_SMD_QDSS_CLK] = &clk_smd_rpm_qdss_clk, [RPM_SMD_QDSS_A_CLK] = &clk_smd_rpm_qdss_a_clk, [RPM_SMD_BB_CLK1] = &clk_smd_rpm_bb_clk1, @@ -605,19 +659,13 @@ static struct clk_smd_rpm *msm8917_clks[] = { static const struct rpm_smd_clk_desc rpm_clk_msm8917 = { .clks = msm8917_clks, .num_clks = ARRAY_SIZE(msm8917_clks), + .icc_clks = bimc_pcnoc_snoc_smmnoc_icc_clks, + .num_icc_clks = ARRAY_SIZE(bimc_pcnoc_snoc_smmnoc_icc_clks), }; static struct clk_smd_rpm *msm8936_clks[] = { [RPM_SMD_XO_CLK_SRC] = &clk_smd_rpm_branch_bi_tcxo, [RPM_SMD_XO_A_CLK_SRC] = &clk_smd_rpm_branch_bi_tcxo_a, - [RPM_SMD_PCNOC_CLK] = &clk_smd_rpm_bus_0_pcnoc_clk, - [RPM_SMD_PCNOC_A_CLK] = &clk_smd_rpm_bus_0_pcnoc_a_clk, - [RPM_SMD_SNOC_CLK] = &clk_smd_rpm_bus_1_snoc_clk, - [RPM_SMD_SNOC_A_CLK] = &clk_smd_rpm_bus_1_snoc_a_clk, - [RPM_SMD_BIMC_CLK] = &clk_smd_rpm_bimc_clk, - [RPM_SMD_BIMC_A_CLK] = &clk_smd_rpm_bimc_a_clk, - [RPM_SMD_SYSMMNOC_CLK] = &clk_smd_rpm_bus_2_sysmmnoc_clk, - [RPM_SMD_SYSMMNOC_A_CLK] = &clk_smd_rpm_bus_2_sysmmnoc_a_clk, [RPM_SMD_QDSS_CLK] = &clk_smd_rpm_qdss_clk, [RPM_SMD_QDSS_A_CLK] = &clk_smd_rpm_qdss_a_clk, [RPM_SMD_BB_CLK1] = &clk_smd_rpm_bb_clk1, @@ -641,25 +689,17 @@ static struct clk_smd_rpm *msm8936_clks[] = { static const struct rpm_smd_clk_desc rpm_clk_msm8936 = { .clks = msm8936_clks, .num_clks = ARRAY_SIZE(msm8936_clks), + .icc_clks = bimc_pcnoc_snoc_smmnoc_icc_clks, + .num_icc_clks = ARRAY_SIZE(bimc_pcnoc_snoc_smmnoc_icc_clks), }; static struct clk_smd_rpm *msm8974_clks[] = { [RPM_SMD_XO_CLK_SRC] = &clk_smd_rpm_branch_bi_tcxo, [RPM_SMD_XO_A_CLK_SRC] = &clk_smd_rpm_branch_bi_tcxo_a, - [RPM_SMD_PNOC_CLK] = &clk_smd_rpm_bus_0_pcnoc_clk, - [RPM_SMD_PNOC_A_CLK] = &clk_smd_rpm_bus_0_pcnoc_a_clk, - [RPM_SMD_SNOC_CLK] = &clk_smd_rpm_bus_1_snoc_clk, - [RPM_SMD_SNOC_A_CLK] = &clk_smd_rpm_bus_1_snoc_a_clk, - [RPM_SMD_CNOC_CLK] = &clk_smd_rpm_bus_2_cnoc_clk, - [RPM_SMD_CNOC_A_CLK] = &clk_smd_rpm_bus_2_cnoc_a_clk, [RPM_SMD_MMSSNOC_AHB_CLK] = &clk_smd_rpm_bus_3_mmssnoc_ahb_clk, [RPM_SMD_MMSSNOC_AHB_A_CLK] = &clk_smd_rpm_bus_3_mmssnoc_ahb_a_clk, - [RPM_SMD_BIMC_CLK] = &clk_smd_rpm_bimc_clk, [RPM_SMD_GFX3D_CLK_SRC] = &clk_smd_rpm_gfx3d_clk_src, [RPM_SMD_GFX3D_A_CLK_SRC] = &clk_smd_rpm_gfx3d_a_clk_src, - [RPM_SMD_BIMC_A_CLK] = &clk_smd_rpm_bimc_a_clk, - [RPM_SMD_OCMEMGX_CLK] = &clk_smd_rpm_ocmemgx_clk, - [RPM_SMD_OCMEMGX_A_CLK] = &clk_smd_rpm_ocmemgx_a_clk, [RPM_SMD_QDSS_CLK] = &clk_smd_rpm_qdss_clk, [RPM_SMD_QDSS_A_CLK] = &clk_smd_rpm_qdss_a_clk, [RPM_SMD_CXO_D0] = &clk_smd_rpm_cxo_d0, @@ -693,20 +733,14 @@ static struct clk_smd_rpm *msm8974_clks[] = { static const struct rpm_smd_clk_desc rpm_clk_msm8974 = { .clks = msm8974_clks, .num_clks = ARRAY_SIZE(msm8974_clks), + .icc_clks = bimc_pcnoc_snoc_cnoc_ocmem_icc_clks, + .num_icc_clks = ARRAY_SIZE(bimc_pcnoc_snoc_cnoc_ocmem_icc_clks), .scaling_before_handover = true, }; static struct clk_smd_rpm *msm8976_clks[] = { [RPM_SMD_XO_CLK_SRC] = &clk_smd_rpm_branch_bi_tcxo, [RPM_SMD_XO_A_CLK_SRC] = &clk_smd_rpm_branch_bi_tcxo_a, - [RPM_SMD_PCNOC_CLK] = &clk_smd_rpm_bus_0_pcnoc_clk, - [RPM_SMD_PCNOC_A_CLK] = &clk_smd_rpm_bus_0_pcnoc_a_clk, - [RPM_SMD_SNOC_CLK] = &clk_smd_rpm_bus_1_snoc_clk, - [RPM_SMD_SNOC_A_CLK] = &clk_smd_rpm_bus_1_snoc_a_clk, - [RPM_SMD_BIMC_CLK] = &clk_smd_rpm_bimc_clk, - [RPM_SMD_BIMC_A_CLK] = &clk_smd_rpm_bimc_a_clk, - [RPM_SMD_SYSMMNOC_CLK] = &clk_smd_rpm_bus_2_sysmmnoc_clk, - [RPM_SMD_SYSMMNOC_A_CLK] = &clk_smd_rpm_bus_2_sysmmnoc_a_clk, [RPM_SMD_QDSS_CLK] = &clk_smd_rpm_qdss_clk, [RPM_SMD_QDSS_A_CLK] = &clk_smd_rpm_qdss_a_clk, [RPM_SMD_BB_CLK1] = &clk_smd_rpm_bb_clk1, @@ -727,24 +761,15 @@ static struct clk_smd_rpm *msm8976_clks[] = { static const struct rpm_smd_clk_desc rpm_clk_msm8976 = { .clks = msm8976_clks, - .num_clks = ARRAY_SIZE(msm8976_clks), + .icc_clks = bimc_pcnoc_snoc_smmnoc_icc_clks, + .num_icc_clks = ARRAY_SIZE(bimc_pcnoc_snoc_smmnoc_icc_clks), }; static struct clk_smd_rpm *msm8992_clks[] = { [RPM_SMD_XO_CLK_SRC] = &clk_smd_rpm_branch_bi_tcxo, [RPM_SMD_XO_A_CLK_SRC] = &clk_smd_rpm_branch_bi_tcxo_a, - [RPM_SMD_PNOC_CLK] = &clk_smd_rpm_bus_0_pcnoc_clk, - [RPM_SMD_PNOC_A_CLK] = &clk_smd_rpm_bus_0_pcnoc_a_clk, - [RPM_SMD_OCMEMGX_CLK] = &clk_smd_rpm_ocmemgx_clk, - [RPM_SMD_OCMEMGX_A_CLK] = &clk_smd_rpm_ocmemgx_a_clk, - [RPM_SMD_BIMC_CLK] = &clk_smd_rpm_bimc_clk, - [RPM_SMD_BIMC_A_CLK] = &clk_smd_rpm_bimc_a_clk, - [RPM_SMD_CNOC_CLK] = &clk_smd_rpm_bus_2_cnoc_clk, - [RPM_SMD_CNOC_A_CLK] = &clk_smd_rpm_bus_2_cnoc_a_clk, [RPM_SMD_GFX3D_CLK_SRC] = &clk_smd_rpm_gfx3d_clk_src, [RPM_SMD_GFX3D_A_CLK_SRC] = &clk_smd_rpm_gfx3d_a_clk_src, - [RPM_SMD_SNOC_CLK] = &clk_smd_rpm_bus_1_snoc_clk, - [RPM_SMD_SNOC_A_CLK] = &clk_smd_rpm_bus_1_snoc_a_clk, [RPM_SMD_BB_CLK1] = &clk_smd_rpm_bb_clk1, [RPM_SMD_BB_CLK1_A] = &clk_smd_rpm_bb_clk1_a, [RPM_SMD_BB_CLK1_PIN] = &clk_smd_rpm_bb_clk1_pin, @@ -786,23 +811,15 @@ static struct clk_smd_rpm *msm8992_clks[] = { static const struct rpm_smd_clk_desc rpm_clk_msm8992 = { .clks = msm8992_clks, .num_clks = ARRAY_SIZE(msm8992_clks), + .icc_clks = bimc_pcnoc_snoc_cnoc_ocmem_icc_clks, + .num_icc_clks = ARRAY_SIZE(bimc_pcnoc_snoc_cnoc_ocmem_icc_clks), }; static struct clk_smd_rpm *msm8994_clks[] = { [RPM_SMD_XO_CLK_SRC] = &clk_smd_rpm_branch_bi_tcxo, [RPM_SMD_XO_A_CLK_SRC] = &clk_smd_rpm_branch_bi_tcxo_a, - [RPM_SMD_PNOC_CLK] = &clk_smd_rpm_bus_0_pcnoc_clk, - [RPM_SMD_PNOC_A_CLK] = &clk_smd_rpm_bus_0_pcnoc_a_clk, - [RPM_SMD_OCMEMGX_CLK] = &clk_smd_rpm_ocmemgx_clk, - [RPM_SMD_OCMEMGX_A_CLK] = &clk_smd_rpm_ocmemgx_a_clk, - [RPM_SMD_BIMC_CLK] = &clk_smd_rpm_bimc_clk, - [RPM_SMD_BIMC_A_CLK] = &clk_smd_rpm_bimc_a_clk, - [RPM_SMD_CNOC_CLK] = &clk_smd_rpm_bus_2_cnoc_clk, - [RPM_SMD_CNOC_A_CLK] = &clk_smd_rpm_bus_2_cnoc_a_clk, [RPM_SMD_GFX3D_CLK_SRC] = &clk_smd_rpm_gfx3d_clk_src, [RPM_SMD_GFX3D_A_CLK_SRC] = &clk_smd_rpm_gfx3d_a_clk_src, - [RPM_SMD_SNOC_CLK] = &clk_smd_rpm_bus_1_snoc_clk, - [RPM_SMD_SNOC_A_CLK] = &clk_smd_rpm_bus_1_snoc_a_clk, [RPM_SMD_BB_CLK1] = &clk_smd_rpm_bb_clk1, [RPM_SMD_BB_CLK1_A] = &clk_smd_rpm_bb_clk1_a, [RPM_SMD_BB_CLK1_PIN] = &clk_smd_rpm_bb_clk1_pin, @@ -846,29 +863,17 @@ static struct clk_smd_rpm *msm8994_clks[] = { static const struct rpm_smd_clk_desc rpm_clk_msm8994 = { .clks = msm8994_clks, .num_clks = ARRAY_SIZE(msm8994_clks), + .icc_clks = bimc_pcnoc_snoc_cnoc_ocmem_icc_clks, + .num_icc_clks = ARRAY_SIZE(bimc_pcnoc_snoc_cnoc_ocmem_icc_clks), }; static struct clk_smd_rpm *msm8996_clks[] = { [RPM_SMD_XO_CLK_SRC] = &clk_smd_rpm_branch_bi_tcxo, [RPM_SMD_XO_A_CLK_SRC] = &clk_smd_rpm_branch_bi_tcxo_a, - [RPM_SMD_PCNOC_CLK] = &clk_smd_rpm_bus_0_pcnoc_clk, - [RPM_SMD_PCNOC_A_CLK] = &clk_smd_rpm_bus_0_pcnoc_a_clk, - [RPM_SMD_SNOC_CLK] = &clk_smd_rpm_bus_1_snoc_clk, - [RPM_SMD_SNOC_A_CLK] = &clk_smd_rpm_bus_1_snoc_a_clk, - [RPM_SMD_CNOC_CLK] = &clk_smd_rpm_bus_2_cnoc_clk, - [RPM_SMD_CNOC_A_CLK] = &clk_smd_rpm_bus_2_cnoc_a_clk, - [RPM_SMD_BIMC_CLK] = &clk_smd_rpm_bimc_clk, - [RPM_SMD_BIMC_A_CLK] = &clk_smd_rpm_bimc_a_clk, - [RPM_SMD_MMAXI_CLK] = &clk_smd_rpm_mmssnoc_axi_rpm_clk, - [RPM_SMD_MMAXI_A_CLK] = &clk_smd_rpm_mmssnoc_axi_rpm_a_clk, [RPM_SMD_IPA_CLK] = &clk_smd_rpm_ipa_clk, [RPM_SMD_IPA_A_CLK] = &clk_smd_rpm_ipa_a_clk, [RPM_SMD_CE1_CLK] = &clk_smd_rpm_ce1_clk, [RPM_SMD_CE1_A_CLK] = &clk_smd_rpm_ce1_a_clk, - [RPM_SMD_AGGR1_NOC_CLK] = &clk_smd_rpm_branch_aggre1_noc_clk, - [RPM_SMD_AGGR1_NOC_A_CLK] = &clk_smd_rpm_branch_aggre1_noc_a_clk, - [RPM_SMD_AGGR2_NOC_CLK] = &clk_smd_rpm_branch_aggre2_noc_clk, - [RPM_SMD_AGGR2_NOC_A_CLK] = &clk_smd_rpm_branch_aggre2_noc_a_clk, [RPM_SMD_QDSS_CLK] = &clk_smd_rpm_qdss_clk, [RPM_SMD_QDSS_A_CLK] = &clk_smd_rpm_qdss_a_clk, [RPM_SMD_BB_CLK1] = &clk_smd_rpm_bb_clk1, @@ -900,6 +905,8 @@ static struct clk_smd_rpm *msm8996_clks[] = { static const struct rpm_smd_clk_desc rpm_clk_msm8996 = { .clks = msm8996_clks, .num_clks = ARRAY_SIZE(msm8996_clks), + .icc_clks = msm8996_icc_clks, + .num_icc_clks = ARRAY_SIZE(msm8996_icc_clks), }; static struct clk_smd_rpm *qcs404_clks[] = { @@ -928,19 +935,15 @@ static struct clk_smd_rpm *qcs404_clks[] = { static const struct rpm_smd_clk_desc rpm_clk_qcs404 = { .clks = qcs404_clks, .num_clks = ARRAY_SIZE(qcs404_clks), + .icc_clks = bimc_pcnoc_snoc_icc_clks, + .num_icc_clks = ARRAY_SIZE(bimc_pcnoc_snoc_icc_clks), }; static struct clk_smd_rpm *msm8998_clks[] = { [RPM_SMD_XO_CLK_SRC] = &clk_smd_rpm_branch_bi_tcxo, [RPM_SMD_XO_A_CLK_SRC] = &clk_smd_rpm_branch_bi_tcxo_a, - [RPM_SMD_BIMC_CLK] = &clk_smd_rpm_bimc_clk, - [RPM_SMD_BIMC_A_CLK] = &clk_smd_rpm_bimc_a_clk, [RPM_SMD_PCNOC_CLK] = &clk_smd_rpm_bus_0_pcnoc_clk, [RPM_SMD_PCNOC_A_CLK] = &clk_smd_rpm_bus_0_pcnoc_a_clk, - [RPM_SMD_SNOC_CLK] = &clk_smd_rpm_bus_1_snoc_clk, - [RPM_SMD_SNOC_A_CLK] = &clk_smd_rpm_bus_1_snoc_a_clk, - [RPM_SMD_CNOC_CLK] = &clk_smd_rpm_bus_2_cnoc_clk, - [RPM_SMD_CNOC_A_CLK] = &clk_smd_rpm_bus_2_cnoc_a_clk, [RPM_SMD_CE1_CLK] = &clk_smd_rpm_ce1_clk, [RPM_SMD_CE1_A_CLK] = &clk_smd_rpm_ce1_a_clk, [RPM_SMD_DIV_CLK1] = &clk_smd_rpm_div_clk1, @@ -963,12 +966,6 @@ static struct clk_smd_rpm *msm8998_clks[] = { [RPM_SMD_LN_BB_CLK2_A_PIN] = &clk_smd_rpm_ln_bb_clk2_a_pin, [RPM_SMD_LN_BB_CLK3_PIN] = &clk_smd_rpm_ln_bb_clk3_pin, [RPM_SMD_LN_BB_CLK3_A_PIN] = &clk_smd_rpm_ln_bb_clk3_a_pin, - [RPM_SMD_MMAXI_CLK] = &clk_smd_rpm_mmssnoc_axi_rpm_clk, - [RPM_SMD_MMAXI_A_CLK] = &clk_smd_rpm_mmssnoc_axi_rpm_a_clk, - [RPM_SMD_AGGR1_NOC_CLK] = &clk_smd_rpm_aggre1_noc_clk, - [RPM_SMD_AGGR1_NOC_A_CLK] = &clk_smd_rpm_aggre1_noc_a_clk, - [RPM_SMD_AGGR2_NOC_CLK] = &clk_smd_rpm_aggre2_noc_clk, - [RPM_SMD_AGGR2_NOC_A_CLK] = &clk_smd_rpm_aggre2_noc_a_clk, [RPM_SMD_QDSS_CLK] = &clk_smd_rpm_qdss_clk, [RPM_SMD_QDSS_A_CLK] = &clk_smd_rpm_qdss_a_clk, [RPM_SMD_RF_CLK1] = &clk_smd_rpm_rf_clk1, @@ -988,27 +985,19 @@ static struct clk_smd_rpm *msm8998_clks[] = { static const struct rpm_smd_clk_desc rpm_clk_msm8998 = { .clks = msm8998_clks, .num_clks = ARRAY_SIZE(msm8998_clks), + .icc_clks = msm8998_icc_clks, + .num_icc_clks = ARRAY_SIZE(msm8998_icc_clks), }; static struct clk_smd_rpm *sdm660_clks[] = { [RPM_SMD_XO_CLK_SRC] = &clk_smd_rpm_branch_bi_tcxo, [RPM_SMD_XO_A_CLK_SRC] = &clk_smd_rpm_branch_bi_tcxo_a, - [RPM_SMD_SNOC_CLK] = &clk_smd_rpm_bus_1_snoc_clk, - [RPM_SMD_SNOC_A_CLK] = &clk_smd_rpm_bus_1_snoc_a_clk, - [RPM_SMD_CNOC_CLK] = &clk_smd_rpm_bus_2_cnoc_clk, - [RPM_SMD_CNOC_A_CLK] = &clk_smd_rpm_bus_2_cnoc_a_clk, [RPM_SMD_CNOC_PERIPH_CLK] = &clk_smd_rpm_bus_0_pcnoc_clk, [RPM_SMD_CNOC_PERIPH_A_CLK] = &clk_smd_rpm_bus_0_pcnoc_a_clk, - [RPM_SMD_BIMC_CLK] = &clk_smd_rpm_bimc_clk, - [RPM_SMD_BIMC_A_CLK] = &clk_smd_rpm_bimc_a_clk, - [RPM_SMD_MMSSNOC_AXI_CLK] = &clk_smd_rpm_mmssnoc_axi_rpm_clk, - [RPM_SMD_MMSSNOC_AXI_CLK_A] = &clk_smd_rpm_mmssnoc_axi_rpm_a_clk, [RPM_SMD_IPA_CLK] = &clk_smd_rpm_ipa_clk, [RPM_SMD_IPA_A_CLK] = &clk_smd_rpm_ipa_a_clk, [RPM_SMD_CE1_CLK] = &clk_smd_rpm_ce1_clk, [RPM_SMD_CE1_A_CLK] = &clk_smd_rpm_ce1_a_clk, - [RPM_SMD_AGGR2_NOC_CLK] = &clk_smd_rpm_aggre2_noc_clk, - [RPM_SMD_AGGR2_NOC_A_CLK] = &clk_smd_rpm_aggre2_noc_a_clk, [RPM_SMD_QDSS_CLK] = &clk_smd_rpm_qdss_clk, [RPM_SMD_QDSS_A_CLK] = &clk_smd_rpm_qdss_a_clk, [RPM_SMD_RF_CLK1] = &clk_smd_rpm_rf_clk1, @@ -1034,15 +1023,13 @@ static struct clk_smd_rpm *sdm660_clks[] = { static const struct rpm_smd_clk_desc rpm_clk_sdm660 = { .clks = sdm660_clks, .num_clks = ARRAY_SIZE(sdm660_clks), + .icc_clks = sdm660_icc_clks, + .num_icc_clks = ARRAY_SIZE(sdm660_icc_clks), }; static struct clk_smd_rpm *mdm9607_clks[] = { [RPM_SMD_XO_CLK_SRC] = &clk_smd_rpm_branch_bi_tcxo, [RPM_SMD_XO_A_CLK_SRC] = &clk_smd_rpm_branch_bi_tcxo_a, - [RPM_SMD_PCNOC_CLK] = &clk_smd_rpm_bus_0_pcnoc_clk, - [RPM_SMD_PCNOC_A_CLK] = &clk_smd_rpm_bus_0_pcnoc_a_clk, - [RPM_SMD_BIMC_CLK] = &clk_smd_rpm_bimc_clk, - [RPM_SMD_BIMC_A_CLK] = &clk_smd_rpm_bimc_a_clk, [RPM_SMD_QPIC_CLK] = &clk_smd_rpm_qpic_clk, [RPM_SMD_QPIC_CLK_A] = &clk_smd_rpm_qpic_a_clk, [RPM_SMD_QDSS_CLK] = &clk_smd_rpm_qdss_clk, @@ -1056,21 +1043,15 @@ static struct clk_smd_rpm *mdm9607_clks[] = { static const struct rpm_smd_clk_desc rpm_clk_mdm9607 = { .clks = mdm9607_clks, .num_clks = ARRAY_SIZE(mdm9607_clks), + .icc_clks = bimc_pcnoc_icc_clks, + .num_icc_clks = ARRAY_SIZE(bimc_pcnoc_icc_clks), }; static struct clk_smd_rpm *msm8953_clks[] = { [RPM_SMD_XO_CLK_SRC] = &clk_smd_rpm_branch_bi_tcxo, [RPM_SMD_XO_A_CLK_SRC] = &clk_smd_rpm_branch_bi_tcxo_a, - [RPM_SMD_PCNOC_CLK] = &clk_smd_rpm_bus_0_pcnoc_clk, - [RPM_SMD_PCNOC_A_CLK] = &clk_smd_rpm_bus_0_pcnoc_a_clk, - [RPM_SMD_SNOC_CLK] = &clk_smd_rpm_bus_1_snoc_clk, - [RPM_SMD_SNOC_A_CLK] = &clk_smd_rpm_bus_1_snoc_a_clk, - [RPM_SMD_BIMC_CLK] = &clk_smd_rpm_bimc_clk, - [RPM_SMD_BIMC_A_CLK] = &clk_smd_rpm_bimc_a_clk, [RPM_SMD_IPA_CLK] = &clk_smd_rpm_ipa_clk, [RPM_SMD_IPA_A_CLK] = &clk_smd_rpm_ipa_a_clk, - [RPM_SMD_SYSMMNOC_CLK] = &clk_smd_rpm_bus_2_sysmmnoc_clk, - [RPM_SMD_SYSMMNOC_A_CLK] = &clk_smd_rpm_bus_2_sysmmnoc_a_clk, [RPM_SMD_QDSS_CLK] = &clk_smd_rpm_qdss_clk, [RPM_SMD_QDSS_A_CLK] = &clk_smd_rpm_qdss_a_clk, [RPM_SMD_BB_CLK1] = &clk_smd_rpm_bb_clk1, @@ -1092,23 +1073,19 @@ static struct clk_smd_rpm *msm8953_clks[] = { static const struct rpm_smd_clk_desc rpm_clk_msm8953 = { .clks = msm8953_clks, .num_clks = ARRAY_SIZE(msm8953_clks), + .icc_clks = bimc_pcnoc_snoc_smmnoc_icc_clks, + .num_icc_clks = ARRAY_SIZE(bimc_pcnoc_snoc_smmnoc_icc_clks), }; static struct clk_smd_rpm *sm6125_clks[] = { [RPM_SMD_XO_CLK_SRC] = &clk_smd_rpm_branch_bi_tcxo, [RPM_SMD_XO_A_CLK_SRC] = &clk_smd_rpm_branch_bi_tcxo_a, - [RPM_SMD_SNOC_CLK] = &clk_smd_rpm_bus_2_snoc_clk, - [RPM_SMD_SNOC_A_CLK] = &clk_smd_rpm_bus_2_snoc_a_clk, - [RPM_SMD_BIMC_CLK] = &clk_smd_rpm_bimc_clk, - [RPM_SMD_BIMC_A_CLK] = &clk_smd_rpm_bimc_a_clk, [RPM_SMD_QDSS_CLK] = &clk_smd_rpm_branch_qdss_clk, [RPM_SMD_QDSS_A_CLK] = &clk_smd_rpm_branch_qdss_a_clk, [RPM_SMD_RF_CLK1] = &clk_smd_rpm_rf_clk1, [RPM_SMD_RF_CLK1_A] = &clk_smd_rpm_rf_clk1_a, [RPM_SMD_RF_CLK2] = &clk_smd_rpm_rf_clk2, [RPM_SMD_RF_CLK2_A] = &clk_smd_rpm_rf_clk2_a, - [RPM_SMD_CNOC_CLK] = &clk_smd_rpm_bus_1_cnoc_clk, - [RPM_SMD_CNOC_A_CLK] = &clk_smd_rpm_bus_1_cnoc_a_clk, [RPM_SMD_IPA_CLK] = &clk_smd_rpm_ipa_clk, [RPM_SMD_IPA_A_CLK] = &clk_smd_rpm_ipa_a_clk, [RPM_SMD_CE1_CLK] = &clk_smd_rpm_ce1_clk, @@ -1119,12 +1096,6 @@ static struct clk_smd_rpm *sm6125_clks[] = { [RPM_SMD_LN_BB_CLK2_A] = &clk_smd_rpm_ln_bb_clk2_a, [RPM_SMD_LN_BB_CLK3] = &clk_smd_rpm_ln_bb_clk3, [RPM_SMD_LN_BB_CLK3_A] = &clk_smd_rpm_ln_bb_clk3_a, - [RPM_SMD_QUP_CLK] = &clk_smd_rpm_qup_clk, - [RPM_SMD_QUP_A_CLK] = &clk_smd_rpm_qup_a_clk, - [RPM_SMD_MMRT_CLK] = &clk_smd_rpm_mmrt_clk, - [RPM_SMD_MMRT_A_CLK] = &clk_smd_rpm_mmrt_a_clk, - [RPM_SMD_MMNRT_CLK] = &clk_smd_rpm_mmnrt_clk, - [RPM_SMD_MMNRT_A_CLK] = &clk_smd_rpm_mmnrt_a_clk, [RPM_SMD_SNOC_PERIPH_CLK] = &clk_smd_rpm_bus_0_snoc_periph_clk, [RPM_SMD_SNOC_PERIPH_A_CLK] = &clk_smd_rpm_bus_0_snoc_periph_a_clk, [RPM_SMD_SNOC_LPASS_CLK] = &clk_smd_rpm_bus_5_snoc_lpass_clk, @@ -1134,34 +1105,24 @@ static struct clk_smd_rpm *sm6125_clks[] = { static const struct rpm_smd_clk_desc rpm_clk_sm6125 = { .clks = sm6125_clks, .num_clks = ARRAY_SIZE(sm6125_clks), + .icc_clks = sm_qnoc_icc_clks, + .num_icc_clks = ARRAY_SIZE(sm_qnoc_icc_clks) }; /* SM6115 */ static struct clk_smd_rpm *sm6115_clks[] = { [RPM_SMD_XO_CLK_SRC] = &clk_smd_rpm_branch_bi_tcxo, [RPM_SMD_XO_A_CLK_SRC] = &clk_smd_rpm_branch_bi_tcxo_a, - [RPM_SMD_SNOC_CLK] = &clk_smd_rpm_bus_2_snoc_clk, - [RPM_SMD_SNOC_A_CLK] = &clk_smd_rpm_bus_2_snoc_a_clk, - [RPM_SMD_BIMC_CLK] = &clk_smd_rpm_bimc_clk, - [RPM_SMD_BIMC_A_CLK] = &clk_smd_rpm_bimc_a_clk, [RPM_SMD_QDSS_CLK] = &clk_smd_rpm_branch_qdss_clk, [RPM_SMD_QDSS_A_CLK] = &clk_smd_rpm_branch_qdss_a_clk, [RPM_SMD_RF_CLK1] = &clk_smd_rpm_rf_clk1, [RPM_SMD_RF_CLK1_A] = &clk_smd_rpm_rf_clk1_a, [RPM_SMD_RF_CLK2] = &clk_smd_rpm_rf_clk2, [RPM_SMD_RF_CLK2_A] = &clk_smd_rpm_rf_clk2_a, - [RPM_SMD_CNOC_CLK] = &clk_smd_rpm_bus_1_cnoc_clk, - [RPM_SMD_CNOC_A_CLK] = &clk_smd_rpm_bus_1_cnoc_a_clk, [RPM_SMD_IPA_CLK] = &clk_smd_rpm_ipa_clk, [RPM_SMD_IPA_A_CLK] = &clk_smd_rpm_ipa_a_clk, [RPM_SMD_CE1_CLK] = &clk_smd_rpm_ce1_clk, [RPM_SMD_CE1_A_CLK] = &clk_smd_rpm_ce1_a_clk, - [RPM_SMD_QUP_CLK] = &clk_smd_rpm_qup_clk, - [RPM_SMD_QUP_A_CLK] = &clk_smd_rpm_qup_a_clk, - [RPM_SMD_MMRT_CLK] = &clk_smd_rpm_mmrt_clk, - [RPM_SMD_MMRT_A_CLK] = &clk_smd_rpm_mmrt_a_clk, - [RPM_SMD_MMNRT_CLK] = &clk_smd_rpm_mmnrt_clk, - [RPM_SMD_MMNRT_A_CLK] = &clk_smd_rpm_mmnrt_a_clk, [RPM_SMD_SNOC_PERIPH_CLK] = &clk_smd_rpm_bus_0_snoc_periph_clk, [RPM_SMD_SNOC_PERIPH_A_CLK] = &clk_smd_rpm_bus_0_snoc_periph_a_clk, [RPM_SMD_SNOC_LPASS_CLK] = &clk_smd_rpm_bus_5_snoc_lpass_clk, @@ -1175,27 +1136,17 @@ static struct clk_smd_rpm *sm6115_clks[] = { static const struct rpm_smd_clk_desc rpm_clk_sm6115 = { .clks = sm6115_clks, .num_clks = ARRAY_SIZE(sm6115_clks), + .icc_clks = sm_qnoc_icc_clks, + .num_icc_clks = ARRAY_SIZE(sm_qnoc_icc_clks) }; static struct clk_smd_rpm *sm6375_clks[] = { [RPM_SMD_XO_CLK_SRC] = &clk_smd_rpm_branch_bi_tcxo, [RPM_SMD_XO_A_CLK_SRC] = &clk_smd_rpm_branch_bi_tcxo_a, - [RPM_SMD_SNOC_CLK] = &clk_smd_rpm_bus_2_snoc_clk, - [RPM_SMD_SNOC_A_CLK] = &clk_smd_rpm_bus_2_snoc_a_clk, - [RPM_SMD_BIMC_CLK] = &clk_smd_rpm_bimc_clk, - [RPM_SMD_BIMC_A_CLK] = &clk_smd_rpm_bimc_a_clk, [RPM_SMD_QDSS_CLK] = &clk_smd_rpm_branch_qdss_clk, [RPM_SMD_QDSS_A_CLK] = &clk_smd_rpm_branch_qdss_a_clk, - [RPM_SMD_CNOC_CLK] = &clk_smd_rpm_bus_1_cnoc_clk, - [RPM_SMD_CNOC_A_CLK] = &clk_smd_rpm_bus_1_cnoc_a_clk, [RPM_SMD_IPA_CLK] = &clk_smd_rpm_ipa_clk, [RPM_SMD_IPA_A_CLK] = &clk_smd_rpm_ipa_a_clk, - [RPM_SMD_QUP_CLK] = &clk_smd_rpm_qup_clk, - [RPM_SMD_QUP_A_CLK] = &clk_smd_rpm_qup_a_clk, - [RPM_SMD_MMRT_CLK] = &clk_smd_rpm_mmrt_clk, - [RPM_SMD_MMRT_A_CLK] = &clk_smd_rpm_mmrt_a_clk, - [RPM_SMD_MMNRT_CLK] = &clk_smd_rpm_mmnrt_clk, - [RPM_SMD_MMNRT_A_CLK] = &clk_smd_rpm_mmnrt_a_clk, [RPM_SMD_SNOC_PERIPH_CLK] = &clk_smd_rpm_bus_0_snoc_periph_clk, [RPM_SMD_SNOC_PERIPH_A_CLK] = &clk_smd_rpm_bus_0_snoc_periph_a_clk, [RPM_SMD_SNOC_LPASS_CLK] = &clk_smd_rpm_bus_5_snoc_lpass_clk, @@ -1212,31 +1163,21 @@ static struct clk_smd_rpm *sm6375_clks[] = { static const struct rpm_smd_clk_desc rpm_clk_sm6375 = { .clks = sm6375_clks, .num_clks = ARRAY_SIZE(sm6375_clks), + .icc_clks = sm_qnoc_icc_clks, + .num_icc_clks = ARRAY_SIZE(sm_qnoc_icc_clks) }; static struct clk_smd_rpm *qcm2290_clks[] = { [RPM_SMD_XO_CLK_SRC] = &clk_smd_rpm_branch_bi_tcxo, [RPM_SMD_XO_A_CLK_SRC] = &clk_smd_rpm_branch_bi_tcxo_a, - [RPM_SMD_SNOC_CLK] = &clk_smd_rpm_bus_2_snoc_clk, - [RPM_SMD_SNOC_A_CLK] = &clk_smd_rpm_bus_2_snoc_a_clk, - [RPM_SMD_BIMC_CLK] = &clk_smd_rpm_bimc_clk, - [RPM_SMD_BIMC_A_CLK] = &clk_smd_rpm_bimc_a_clk, [RPM_SMD_QDSS_CLK] = &clk_smd_rpm_branch_qdss_clk, [RPM_SMD_QDSS_A_CLK] = &clk_smd_rpm_branch_qdss_a_clk, [RPM_SMD_LN_BB_CLK2] = &clk_smd_rpm_ln_bb_clk2, [RPM_SMD_LN_BB_CLK2_A] = &clk_smd_rpm_ln_bb_clk2_a, [RPM_SMD_RF_CLK3] = &clk_smd_rpm_38m4_rf_clk3, [RPM_SMD_RF_CLK3_A] = &clk_smd_rpm_38m4_rf_clk3_a, - [RPM_SMD_CNOC_CLK] = &clk_smd_rpm_bus_1_cnoc_clk, - [RPM_SMD_CNOC_A_CLK] = &clk_smd_rpm_bus_1_cnoc_a_clk, [RPM_SMD_IPA_CLK] = &clk_smd_rpm_ipa_clk, [RPM_SMD_IPA_A_CLK] = &clk_smd_rpm_ipa_a_clk, - [RPM_SMD_QUP_CLK] = &clk_smd_rpm_qup_clk, - [RPM_SMD_QUP_A_CLK] = &clk_smd_rpm_qup_a_clk, - [RPM_SMD_MMRT_CLK] = &clk_smd_rpm_mmrt_clk, - [RPM_SMD_MMRT_A_CLK] = &clk_smd_rpm_mmrt_a_clk, - [RPM_SMD_MMNRT_CLK] = &clk_smd_rpm_mmnrt_clk, - [RPM_SMD_MMNRT_A_CLK] = &clk_smd_rpm_mmnrt_a_clk, [RPM_SMD_SNOC_PERIPH_CLK] = &clk_smd_rpm_bus_0_snoc_periph_clk, [RPM_SMD_SNOC_PERIPH_A_CLK] = &clk_smd_rpm_bus_0_snoc_periph_a_clk, [RPM_SMD_SNOC_LPASS_CLK] = &clk_smd_rpm_bus_5_snoc_lpass_clk, @@ -1258,6 +1199,8 @@ static struct clk_smd_rpm *qcm2290_clks[] = { static const struct rpm_smd_clk_desc rpm_clk_qcm2290 = { .clks = qcm2290_clks, .num_clks = ARRAY_SIZE(qcm2290_clks), + .icc_clks = sm_qnoc_icc_clks, + .num_icc_clks = ARRAY_SIZE(sm_qnoc_icc_clks) }; static const struct of_device_id rpm_smd_clk_match_table[] = { @@ -1333,6 +1276,15 @@ static int rpm_smd_clk_probe(struct platform_device *pdev) goto err; } + for (i = 0; i < desc->num_icc_clks; i++) { + if (!desc->icc_clks[i]) + continue; + + ret = clk_smd_rpm_handoff(desc->icc_clks[i]); + if (ret) + goto err; + } + if (!desc->scaling_before_handover) { ret = clk_smd_rpm_enable_scaling(); if (ret) From patchwork Fri Jun 9 20:19:24 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Konrad Dybcio X-Patchwork-Id: 105807 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a59:994d:0:b0:3d9:f83d:47d9 with SMTP id k13csp1173205vqr; Fri, 9 Jun 2023 13:44:53 -0700 (PDT) X-Google-Smtp-Source: ACHHUZ6eIUZgK1y0jziyuq0OvVjGcqAmXlxgbJBK1EqQ5kUGCJrEy9vI02soGnkEeu1RELLbDgEz X-Received: by 2002:a05:6a00:1a56:b0:64c:e899:dcd1 with SMTP id h22-20020a056a001a5600b0064ce899dcd1mr2801840pfv.5.1686343493205; Fri, 09 Jun 2023 13:44:53 -0700 (PDT) ARC-Seal: i=1; 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[83.9.29.190]) by smtp.gmail.com with ESMTPSA id b18-20020ac25632000000b004f628eb7884sm641349lff.232.2023.06.09.13.19.38 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 09 Jun 2023 13:19:40 -0700 (PDT) From: Konrad Dybcio Date: Fri, 09 Jun 2023 22:19:24 +0200 Subject: [PATCH v2 19/22] interconnect: qcom: icc-rpm: Fix bucket number MIME-Version: 1.0 Message-Id: <20230526-topic-smd_icc-v2-19-e5934b07d813@linaro.org> References: <20230526-topic-smd_icc-v2-0-e5934b07d813@linaro.org> In-Reply-To: <20230526-topic-smd_icc-v2-0-e5934b07d813@linaro.org> To: Andy Gross , Bjorn Andersson , Michael Turquette , Stephen Boyd , Georgi Djakov , Leo Yan , Evan Green Cc: Marijn Suijten , linux-arm-msm@vger.kernel.org, linux-kernel@vger.kernel.org, linux-clk@vger.kernel.org, linux-pm@vger.kernel.org, Konrad Dybcio , Dmitry Baryshkov X-Mailer: b4 0.12.2 X-Developer-Signature: v=1; a=ed25519-sha256; t=1686341953; l=2765; i=konrad.dybcio@linaro.org; s=20230215; h=from:subject:message-id; bh=68iL3R2729auKAyf2+h3a84NzNeWWMBj11PjnFNq6B4=; b=Za+Lukgzr/6HNrFC3q9wOKV2sPdI2aYKVDy3vv5Cv5pDz+TH/Tw72Fl9KwIADc+IM4l8HnmWH Q9f5zDjOIxyC0h+zQicDTwpZTIfhNSK2WpUPORV770o0OXewdkGt1t2 X-Developer-Key: i=konrad.dybcio@linaro.org; a=ed25519; pk=iclgkYvtl2w05SSXO5EjjSYlhFKsJ+5OSZBjOkQuEms= X-Spam-Status: No, score=-2.1 required=5.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,RCVD_IN_DNSWL_NONE, SPF_HELO_NONE,SPF_PASS,T_SCC_BODY_TEXT_LINE,URIBL_BLOCKED autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-getmail-retrieved-from-mailbox: =?utf-8?q?INBOX?= X-GMAIL-THRID: =?utf-8?q?1768259315178118139?= X-GMAIL-MSGID: =?utf-8?q?1768259315178118139?= SMD RPM only provides two buckets, one each for the active-only and active-sleep RPM contexts. Use the correct constant to allocate and operate on them. Fixes: dcbce7b0a79c ("interconnect: qcom: icc-rpm: Support multiple buckets") Reviewed-by: Dmitry Baryshkov Signed-off-by: Konrad Dybcio --- drivers/interconnect/qcom/icc-rpm.c | 14 +++++++------- 1 file changed, 7 insertions(+), 7 deletions(-) diff --git a/drivers/interconnect/qcom/icc-rpm.c b/drivers/interconnect/qcom/icc-rpm.c index 6d40815c5401..3ac47b818afe 100644 --- a/drivers/interconnect/qcom/icc-rpm.c +++ b/drivers/interconnect/qcom/icc-rpm.c @@ -249,7 +249,7 @@ static void qcom_icc_pre_bw_aggregate(struct icc_node *node) size_t i; qn = node->data; - for (i = 0; i < QCOM_ICC_NUM_BUCKETS; i++) { + for (i = 0; i < QCOM_SMD_RPM_STATE_NUM; i++) { qn->sum_avg[i] = 0; qn->max_peak[i] = 0; } @@ -275,7 +275,7 @@ static int qcom_icc_bw_aggregate(struct icc_node *node, u32 tag, u32 avg_bw, if (!tag) tag = QCOM_ICC_TAG_ALWAYS; - for (i = 0; i < QCOM_ICC_NUM_BUCKETS; i++) { + for (i = 0; i < QCOM_SMD_RPM_STATE_NUM; i++) { if (tag & BIT(i)) { qn->sum_avg[i] += avg_bw; qn->max_peak[i] = max_t(u32, qn->max_peak[i], peak_bw); @@ -300,11 +300,11 @@ static void qcom_icc_bus_aggregate(struct icc_provider *provider, { struct icc_node *node; struct qcom_icc_node *qn; - u64 sum_avg[QCOM_ICC_NUM_BUCKETS]; + u64 sum_avg[QCOM_SMD_RPM_STATE_NUM]; int i; /* Initialise aggregate values */ - for (i = 0; i < QCOM_ICC_NUM_BUCKETS; i++) { + for (i = 0; i < QCOM_SMD_RPM_STATE_NUM; i++) { agg_avg[i] = 0; agg_peak[i] = 0; } @@ -317,7 +317,7 @@ static void qcom_icc_bus_aggregate(struct icc_provider *provider, */ list_for_each_entry(node, &provider->nodes, node_list) { qn = node->data; - for (i = 0; i < QCOM_ICC_NUM_BUCKETS; i++) { + for (i = 0; i < QCOM_SMD_RPM_STATE_NUM; i++) { if (qn->channels) sum_avg[i] = div_u64(qn->sum_avg[i], qn->channels); else @@ -328,7 +328,7 @@ static void qcom_icc_bus_aggregate(struct icc_provider *provider, } /* Find maximum values across all buckets */ - for (i = 0; i < QCOM_ICC_NUM_BUCKETS; i++) + for (i = 0; i < QCOM_SMD_RPM_STATE_NUM; i++) *max_agg_avg = max_t(u64, *max_agg_avg, agg_avg[i]); } @@ -339,7 +339,7 @@ static int qcom_icc_set(struct icc_node *src, struct icc_node *dst) struct icc_provider *provider; u64 sum_bw; u64 active_rate, sleep_rate; - u64 agg_avg[QCOM_ICC_NUM_BUCKETS], agg_peak[QCOM_ICC_NUM_BUCKETS]; + u64 agg_avg[QCOM_SMD_RPM_STATE_NUM], agg_peak[QCOM_SMD_RPM_STATE_NUM]; u64 max_agg_avg; int ret; From patchwork Fri Jun 9 20:19:25 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Konrad Dybcio X-Patchwork-Id: 105805 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a59:994d:0:b0:3d9:f83d:47d9 with SMTP id k13csp1172518vqr; Fri, 9 Jun 2023 13:43:12 -0700 (PDT) X-Google-Smtp-Source: ACHHUZ5OzR6ND/SZaYAJrN2RMY9PxBRrJL4VBieSe+jrg/HS8ubwjpQwUpOXMerw2xjAIwiRfTns X-Received: by 2002:a17:90a:1c:b0:253:572f:79b2 with SMTP id 28-20020a17090a001c00b00253572f79b2mr1743666pja.36.1686343391858; Fri, 09 Jun 2023 13:43:11 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1686343391; cv=none; d=google.com; s=arc-20160816; b=emzRbXdBWB7Fo2GeBO3jjx3RtpE94RFAe8Ogf/4PwtWrsN9mdAS7HzBowMcQYEnGyH SQoznmIlUc146YEE6mPaRfpf3mQzQ5azNj/B5UA4CcZMayS/nkpWQJRdQn5yDj/2xv/3 h68kDarl6A30LmvKbB3bwncEDWjjZ3DsTtYYb3eT4IUXj6PcXx1OE5S27l+AIpZxv1j7 TQbgxaDZkTgW4GIdrzEDkI8SX//Jre4vYcxhbVngZVUssO8M4GFWmW1mqPpQkfHfFHhC 6aLG/1QAha3177Wa+9HMLcgEERZcT7He0Hz0HvJzC77CpcbYOSn0+ASsFAzzWCJEEHUs Lkbw== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:cc:to:in-reply-to:references:message-id :content-transfer-encoding:mime-version:subject:date:from :dkim-signature; bh=vmYWhMRGgLXZoI1ABShhg+YyRzFiX4C+vqZEWikGuSU=; b=vKC6MrSo9Nc+q/Aiw9IH3FxkLI9vwGzptNO0vyL+q2j2VLm8AJDM1VAKwr+2HxTeRv WkKRU78XnqfkNa/xP2v1i7lDRPsaPnL5JREd9RzVpNcdmOqZDjPa12eilURV/gXuIPhU UDONhTBPdTZ1N4qxSiwd6YNN1mXm9naQRwlMs2OghuHtEgIFMmQC3Fdb06dYAfZu3V/y CiBVa4uMlhJ8vrrU/KaZT4gUz80xYMWPCxzknP/6scx4mbLHJsT7PkXtnkUwRSf4vU51 r/gMT+Ak1RBGdlo20T5eIw6bakzUB4q5odrkzbkj7sCd+MB5KtwBcVGv/9ISVg2JC3XG gFsQ== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=aoS2FRuL; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: from out1.vger.email (out1.vger.email. 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[83.9.29.190]) by smtp.gmail.com with ESMTPSA id b18-20020ac25632000000b004f628eb7884sm641349lff.232.2023.06.09.13.19.40 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 09 Jun 2023 13:19:41 -0700 (PDT) From: Konrad Dybcio Date: Fri, 09 Jun 2023 22:19:25 +0200 Subject: [PATCH v2 20/22] interconnect: qcom: icc-rpm: Set bandwidth on both contexts MIME-Version: 1.0 Message-Id: <20230526-topic-smd_icc-v2-20-e5934b07d813@linaro.org> References: <20230526-topic-smd_icc-v2-0-e5934b07d813@linaro.org> In-Reply-To: <20230526-topic-smd_icc-v2-0-e5934b07d813@linaro.org> To: Andy Gross , Bjorn Andersson , Michael Turquette , Stephen Boyd , Georgi Djakov , Leo Yan , Evan Green Cc: Marijn Suijten , linux-arm-msm@vger.kernel.org, linux-kernel@vger.kernel.org, linux-clk@vger.kernel.org, linux-pm@vger.kernel.org, Konrad Dybcio X-Mailer: b4 0.12.2 X-Developer-Signature: v=1; a=ed25519-sha256; t=1686341953; l=3312; i=konrad.dybcio@linaro.org; s=20230215; h=from:subject:message-id; bh=BnpOasAWNUlC0HYMHtz/YUrMasNWc4yTZHYlYhnZUIY=; b=Ex8CjHQLM6jrNxlbfeAWTJw/U3/ilAj8+qe6Y+cMW/CxYt369wOElnpni0xdTWv/oMkX0EALb JKfIX7LhWdlB0IEqdXM0yoRqLlpEvdtmVgK+PZLsykbSb6mxNHl0Nnc X-Developer-Key: i=konrad.dybcio@linaro.org; a=ed25519; pk=iclgkYvtl2w05SSXO5EjjSYlhFKsJ+5OSZBjOkQuEms= X-Spam-Status: No, score=-2.1 required=5.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,RCVD_IN_DNSWL_NONE, SPF_HELO_NONE,SPF_PASS,T_SCC_BODY_TEXT_LINE,URIBL_BLOCKED autolearn=unavailable autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-getmail-retrieved-from-mailbox: =?utf-8?q?INBOX?= X-GMAIL-THRID: =?utf-8?q?1768259208876203175?= X-GMAIL-MSGID: =?utf-8?q?1768259208876203175?= Up until now, for some reason we've only been setting bandwidth values on the active-only context. That pretty much meant that RPM could lift all votes when entering sleep mode. Or never sleep at all. That in turn could potentially break things like USB wakeup, as the connection between APSS and SNoC/PNoC would simply be dead. Set the values appropriately. Fixes: 30c8fa3ec61a ("interconnect: qcom: Add MSM8916 interconnect provider driver") Signed-off-by: Konrad Dybcio --- drivers/interconnect/qcom/icc-rpm.c | 54 +++++++++++++++++++------------------ 1 file changed, 28 insertions(+), 26 deletions(-) diff --git a/drivers/interconnect/qcom/icc-rpm.c b/drivers/interconnect/qcom/icc-rpm.c index 3ac47b818afe..ac719013077e 100644 --- a/drivers/interconnect/qcom/icc-rpm.c +++ b/drivers/interconnect/qcom/icc-rpm.c @@ -205,34 +205,39 @@ static int qcom_icc_qos_set(struct icc_node *node) } } -static int qcom_icc_rpm_set(struct qcom_icc_node *qn, u64 sum_bw) +static int qcom_icc_rpm_set(struct qcom_icc_node *qn, u64 *bw) { - int ret = 0; + int ret, rpm_ctx = 0; + u64 bw_bps; if (qn->qos.ap_owned) return 0; - if (qn->mas_rpm_id != -1) { - ret = qcom_icc_rpm_smd_send(QCOM_SMD_RPM_ACTIVE_STATE, - RPM_BUS_MASTER_REQ, - qn->mas_rpm_id, - sum_bw); - if (ret) { - pr_err("qcom_icc_rpm_smd_send mas %d error %d\n", - qn->mas_rpm_id, ret); - return ret; + for (rpm_ctx = 0; rpm_ctx < QCOM_SMD_RPM_STATE_NUM; rpm_ctx++) { + bw_bps = icc_units_to_bps(bw[rpm_ctx]); + + if (qn->mas_rpm_id != -1) { + ret = qcom_icc_rpm_smd_send(rpm_ctx, + RPM_BUS_MASTER_REQ, + qn->mas_rpm_id, + bw_bps); + if (ret) { + pr_err("qcom_icc_rpm_smd_send mas %d error %d\n", + qn->mas_rpm_id, ret); + return ret; + } } - } - if (qn->slv_rpm_id != -1) { - ret = qcom_icc_rpm_smd_send(QCOM_SMD_RPM_ACTIVE_STATE, - RPM_BUS_SLAVE_REQ, - qn->slv_rpm_id, - sum_bw); - if (ret) { - pr_err("qcom_icc_rpm_smd_send slv %d error %d\n", - qn->slv_rpm_id, ret); - return ret; + if (qn->slv_rpm_id != -1) { + ret = qcom_icc_rpm_smd_send(rpm_ctx, + RPM_BUS_SLAVE_REQ, + qn->slv_rpm_id, + bw_bps); + if (ret) { + pr_err("qcom_icc_rpm_smd_send slv %d error %d\n", + qn->slv_rpm_id, ret); + return ret; + } } } @@ -337,7 +342,6 @@ static int qcom_icc_set(struct icc_node *src, struct icc_node *dst) struct qcom_icc_provider *qp; struct qcom_icc_node *src_qn = NULL, *dst_qn = NULL; struct icc_provider *provider; - u64 sum_bw; u64 active_rate, sleep_rate; u64 agg_avg[QCOM_SMD_RPM_STATE_NUM], agg_peak[QCOM_SMD_RPM_STATE_NUM]; u64 max_agg_avg; @@ -351,14 +355,12 @@ static int qcom_icc_set(struct icc_node *src, struct icc_node *dst) qcom_icc_bus_aggregate(provider, agg_avg, agg_peak, &max_agg_avg); - sum_bw = icc_units_to_bps(max_agg_avg); - - ret = qcom_icc_rpm_set(src_qn, sum_bw); + ret = qcom_icc_rpm_set(src_qn, agg_avg); if (ret) return ret; if (dst_qn) { - ret = qcom_icc_rpm_set(dst_qn, sum_bw); + ret = qcom_icc_rpm_set(dst_qn, agg_avg); if (ret) return ret; } From patchwork Fri Jun 9 20:19:26 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Konrad Dybcio X-Patchwork-Id: 105799 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a59:994d:0:b0:3d9:f83d:47d9 with SMTP id k13csp1166577vqr; Fri, 9 Jun 2023 13:30:17 -0700 (PDT) X-Google-Smtp-Source: ACHHUZ5i/C1clqedVwN0NQdrV7A1GEtAUTwknCheBgJgohsZdDThw/TX+pBA6QoBx5vVHDgI9i7U X-Received: by 2002:a05:6e02:544:b0:33b:f86:d2ac with SMTP id i4-20020a056e02054400b0033b0f86d2acmr2473598ils.1.1686342617585; Fri, 09 Jun 2023 13:30:17 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1686342617; cv=none; d=google.com; s=arc-20160816; b=L1+2aPHUk+i5iYG08SUW9q8lYHu1ayN6jm5DJzQptZ1mFN7sKQGscW3tw+D9qhIM3i nh56Es1U53o7WRxY01PCNTEkpwgXkfzeveYBnY3ffrfzpqUPf/xG6yXu7oHKBpbaTvz8 QMKHFYFWdw8St8+cVF7znBy8oBPQYlZif2lLdO4FryBMNJtbLw7fzEByyHkFf2j9NDql cNQ57kFGsrGRWDADFJJosqdJy90MdntwAq/eANF8IbYuKaOeju0szg3TfSWNWg74tZr6 ARspU8aGAqdIB6qkhzPf+Ey/Pki/2FO9SpcWRbguhBt1SK9omx9CBsqchnil4n7HBsFt tpug== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:cc:to:in-reply-to:references:message-id :content-transfer-encoding:mime-version:subject:date:from :dkim-signature; bh=+CYnae38h+2Ha8DEsswsgC3tiiF77w45gY0ME9hPmK0=; b=kcq/sZIOJXBhf5VoY60tW+ZlZKqTEh53UcCJByKPFx6cfzJD0cBGV3AdGoiVEDnxrU 13tGgQoeDjgXVPIoa/5+2B8W3QlLPVLdYkc2GdnvIHvKcL5G4tc57YLlS88/9scxPWlJ +xsNDnHi9lpaeiAPzRbZj5ArfP57UaY4/HxhStTLr/P9SrirqTPGBA+a6HeT7u+99kvw A/xVf2DLRG5oghIniHl7zqanOB5Syk55SDqenIJoHmcAX6IEGOLskygGl19z3VdkV4ol yVJ9z7u6nwgM6F0WkN3ijMViK5eIvXN3eG81cbHjcHGTfE+3Y4avgZCXmWdZtUSCq7J1 mqAg== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=UL8iugcj; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: from out1.vger.email (out1.vger.email. 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[83.9.29.190]) by smtp.gmail.com with ESMTPSA id b18-20020ac25632000000b004f628eb7884sm641349lff.232.2023.06.09.13.19.41 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 09 Jun 2023 13:19:42 -0700 (PDT) From: Konrad Dybcio Date: Fri, 09 Jun 2023 22:19:26 +0200 Subject: [PATCH v2 21/22] interconnect: qcom: icc-rpm: Set correct bandwidth through RPM bw req MIME-Version: 1.0 Message-Id: <20230526-topic-smd_icc-v2-21-e5934b07d813@linaro.org> References: <20230526-topic-smd_icc-v2-0-e5934b07d813@linaro.org> In-Reply-To: <20230526-topic-smd_icc-v2-0-e5934b07d813@linaro.org> To: Andy Gross , Bjorn Andersson , Michael Turquette , Stephen Boyd , Georgi Djakov , Leo Yan , Evan Green Cc: Marijn Suijten , linux-arm-msm@vger.kernel.org, linux-kernel@vger.kernel.org, linux-clk@vger.kernel.org, linux-pm@vger.kernel.org, Konrad Dybcio , Stephan Gerhold X-Mailer: b4 0.12.2 X-Developer-Signature: v=1; a=ed25519-sha256; t=1686341954; l=1189; i=konrad.dybcio@linaro.org; s=20230215; h=from:subject:message-id; bh=rnjv1FkG2LZNQA5JLVwzFmZbhzL0mGsmc7rQYDLSsUc=; b=zhTwx3ylCzTTKzeHxgS5M8QzOryBV1e3M4jWd/NtdOoMhFRhPiBs/kBDomlORHIjXnYRAJFFm izzIkf1c7YQDMGQmqCim4qaVSh+CQR1xb1JWlT3M4nsw90QbrU4lMrb X-Developer-Key: i=konrad.dybcio@linaro.org; a=ed25519; pk=iclgkYvtl2w05SSXO5EjjSYlhFKsJ+5OSZBjOkQuEms= X-Spam-Status: No, score=-2.1 required=5.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,RCVD_IN_DNSWL_NONE, SPF_HELO_NONE,SPF_PASS,T_SCC_BODY_TEXT_LINE,URIBL_BLOCKED autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-getmail-retrieved-from-mailbox: =?utf-8?q?INBOX?= X-GMAIL-THRID: =?utf-8?q?1768258396230453940?= X-GMAIL-MSGID: =?utf-8?q?1768258396230453940?= Currently, we're setting the aggregated-on-provider bandwidth on each node, individually. That is of course incorrect and results in far too high votes. Use the correct values to ensure we're not wasting power. Fixes: 30c8fa3ec61a ("interconnect: qcom: Add MSM8916 interconnect provider driver") Reported-by: Stephan Gerhold Signed-off-by: Konrad Dybcio Reviewed-by: Stephan Gerhold --- drivers/interconnect/qcom/icc-rpm.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/drivers/interconnect/qcom/icc-rpm.c b/drivers/interconnect/qcom/icc-rpm.c index ac719013077e..1508233632f6 100644 --- a/drivers/interconnect/qcom/icc-rpm.c +++ b/drivers/interconnect/qcom/icc-rpm.c @@ -355,12 +355,12 @@ static int qcom_icc_set(struct icc_node *src, struct icc_node *dst) qcom_icc_bus_aggregate(provider, agg_avg, agg_peak, &max_agg_avg); - ret = qcom_icc_rpm_set(src_qn, agg_avg); + ret = qcom_icc_rpm_set(src_qn, src_qn->sum_avg); if (ret) return ret; if (dst_qn) { - ret = qcom_icc_rpm_set(dst_qn, agg_avg); + ret = qcom_icc_rpm_set(dst_qn, dst_qn->sum_avg); if (ret) return ret; } From patchwork Fri Jun 9 20:19:27 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Konrad Dybcio X-Patchwork-Id: 105816 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a59:994d:0:b0:3d9:f83d:47d9 with SMTP id k13csp1187984vqr; Fri, 9 Jun 2023 14:16:11 -0700 (PDT) X-Google-Smtp-Source: ACHHUZ5nRBYP1gWYggCnNXgHdV/ljejALzUfIhJjwmXaE1JLD0ChxYHvRo/KCClqpxZXP7Liw7bt X-Received: by 2002:a05:6a00:24d0:b0:653:de9a:d933 with SMTP id d16-20020a056a0024d000b00653de9ad933mr2734817pfv.17.1686345370785; Fri, 09 Jun 2023 14:16:10 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1686345370; cv=none; d=google.com; s=arc-20160816; b=zbUImsBD+FQC59FOJmqpRNrdLfQms1SzvlkRejdlveqJShcKWyOKWeZ647tbkjQIkS P+zPUj/2G7gqcBzJ9J+ai6BYGSiIQAGEUB2vTKhNTpLcNdYEo+A2xLChhHDhtmF43s+/ 6/Mt4K666QPoEnGPBm02ek8FsGGVDzp0Aqhw+Y4Nul5xk8MU9e3OdzoPpwJu0Xsi/9MR 09VScMPXbHmbFs5yAEVxMZWobJkQzResr9HMS2DQezwwYWAFr74tnBdXe0CPGB3Be20b dx5zxvhFFDKcpU9JdCFQddHDrGC8/lF5GMdzStoppWqDug8QEWtXtWbXOr0ZRkpmNwsc RW4A== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:cc:to:in-reply-to:references:message-id :content-transfer-encoding:mime-version:subject:date:from :dkim-signature; bh=gseMZqiQentYyRaHcHEHjEO4uvoAd0TikjxuZU3oPHc=; b=wx8pE+KrFIZb1tkeMxuiFNptez6FKwPyAOG6Ih4LlnEQeQRP37Xo9t7A+EV0Zq/qZp G1meGfeoJcmfW+goKAYjw524xrjFdqLaU93/6YSUoBft2v6w5/fjNbHgkVpOFpc2uFKh 0+Vv6tglVwjsTvsexVq8j96W2cUT/rD2D7Obypev6HXl0IFjbWpQXcP42WS1qdQrYDUC UPE6ZiCTcLIfSl9NUnjUqhAiFVr9Ty9tBM9lkdOKaSvYGaOX3NTDyCMvsWqxhdEu3Ocq Zhbu14E/IpbQdTN6j6i35DnxC6nHcPgbCaphixjTR0V8aHLZ1NF8SnLR+2CLR7dY9+ak SuRg== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=lOsTID+U; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: from out1.vger.email (out1.vger.email. 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[83.9.29.190]) by smtp.gmail.com with ESMTPSA id b18-20020ac25632000000b004f628eb7884sm641349lff.232.2023.06.09.13.19.43 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 09 Jun 2023 13:19:43 -0700 (PDT) From: Konrad Dybcio Date: Fri, 09 Jun 2023 22:19:27 +0200 Subject: [PATCH v2 22/22] interconnect: qcom: icc-rpm: Fix bandwidth calculations MIME-Version: 1.0 Message-Id: <20230526-topic-smd_icc-v2-22-e5934b07d813@linaro.org> References: <20230526-topic-smd_icc-v2-0-e5934b07d813@linaro.org> In-Reply-To: <20230526-topic-smd_icc-v2-0-e5934b07d813@linaro.org> To: Andy Gross , Bjorn Andersson , Michael Turquette , Stephen Boyd , Georgi Djakov , Leo Yan , Evan Green Cc: Marijn Suijten , linux-arm-msm@vger.kernel.org, linux-kernel@vger.kernel.org, linux-clk@vger.kernel.org, linux-pm@vger.kernel.org, Konrad Dybcio , Stephan Gerhold X-Mailer: b4 0.12.2 X-Developer-Signature: v=1; a=ed25519-sha256; t=1686341954; l=4975; i=konrad.dybcio@linaro.org; s=20230215; h=from:subject:message-id; bh=T/6tws0nrW+rpOcnKnwLBuObiHFQRWQ5v+dHRcZBGwI=; b=vc+ZslG3iL81K4cl4YIvChfumOGREIWbFrTNU35OBSyYpVixdi0d53TBbCYxVphUGLTezSqTH cqNBeV7/oqvDiWxvPjVlEMUcVl+6ozJg4C3uc4ngJXEFgPfOm2QfhWt X-Developer-Key: i=konrad.dybcio@linaro.org; a=ed25519; pk=iclgkYvtl2w05SSXO5EjjSYlhFKsJ+5OSZBjOkQuEms= X-Spam-Status: No, score=-2.1 required=5.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,RCVD_IN_DNSWL_NONE, SPF_HELO_NONE,SPF_PASS,T_SCC_BODY_TEXT_LINE,URIBL_BLOCKED autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-getmail-retrieved-from-mailbox: =?utf-8?q?INBOX?= X-GMAIL-THRID: =?utf-8?q?1768261283637842863?= X-GMAIL-MSGID: =?utf-8?q?1768261283637842863?= Up until now, we've been aggregating the bandwidth values and only dividing them by the bus width of the source node. This was completely wrong, as different nodes on a given path may (and usually do) have varying bus widths. That in turn, resulted in the calculated clock rates being completely bogus - usually they ended up being much higher, as NoC_A<->NoC_B links are very wide. Since we're not using the aggregate bandwidth value for anything other than clock rate calculations, remodel qcom_icc_bus_aggregate() to calculate the per-context clock rate for a given provider, taking into account the bus width of every individual node. Fixes: 30c8fa3ec61a ("interconnect: qcom: Add MSM8916 interconnect provider driver") Reported-by: Stephan Gerhold Signed-off-by: Konrad Dybcio Reviewed-by: Stephan Gerhold --- drivers/interconnect/qcom/icc-rpm.c | 59 ++++++++++++------------------------- 1 file changed, 19 insertions(+), 40 deletions(-) diff --git a/drivers/interconnect/qcom/icc-rpm.c b/drivers/interconnect/qcom/icc-rpm.c index 1508233632f6..d177a76abe2a 100644 --- a/drivers/interconnect/qcom/icc-rpm.c +++ b/drivers/interconnect/qcom/icc-rpm.c @@ -293,58 +293,44 @@ static int qcom_icc_bw_aggregate(struct icc_node *node, u32 tag, u32 avg_bw, } /** - * qcom_icc_bus_aggregate - aggregate bandwidth by traversing all nodes + * qcom_icc_bus_aggregate - calculate bus clock rates by traversing all nodes * @provider: generic interconnect provider - * @agg_avg: an array for aggregated average bandwidth of buckets - * @agg_peak: an array for aggregated peak bandwidth of buckets - * @max_agg_avg: pointer to max value of aggregated average bandwidth + * @agg_clk_rate: array containing the aggregated clock rates in kHz */ -static void qcom_icc_bus_aggregate(struct icc_provider *provider, - u64 *agg_avg, u64 *agg_peak, - u64 *max_agg_avg) +static void qcom_icc_bus_aggregate(struct icc_provider *provider, u64 *agg_clk_rate) { - struct icc_node *node; + u64 agg_avg_rate, agg_rate; struct qcom_icc_node *qn; - u64 sum_avg[QCOM_SMD_RPM_STATE_NUM]; + struct icc_node *node; int i; - /* Initialise aggregate values */ - for (i = 0; i < QCOM_SMD_RPM_STATE_NUM; i++) { - agg_avg[i] = 0; - agg_peak[i] = 0; - } - - *max_agg_avg = 0; - /* - * Iterate nodes on the interconnect and aggregate bandwidth - * requests for every bucket. + * Iterate nodes on the provider, aggregate bandwidth requests for + * every bucket and convert them into bus clock rates. */ list_for_each_entry(node, &provider->nodes, node_list) { qn = node->data; for (i = 0; i < QCOM_SMD_RPM_STATE_NUM; i++) { if (qn->channels) - sum_avg[i] = div_u64(qn->sum_avg[i], qn->channels); + agg_avg_rate = div_u64(qn->sum_avg[i], qn->channels); else - sum_avg[i] = qn->sum_avg[i]; - agg_avg[i] += sum_avg[i]; - agg_peak[i] = max_t(u64, agg_peak[i], qn->max_peak[i]); + agg_avg_rate = qn->sum_avg[i]; + + agg_rate = max_t(u64, agg_avg_rate, qn->max_peak[i]); + do_div(agg_rate, qn->buswidth); + + agg_clk_rate[i] = max_t(u64, agg_clk_rate[i], agg_rate); } } - - /* Find maximum values across all buckets */ - for (i = 0; i < QCOM_SMD_RPM_STATE_NUM; i++) - *max_agg_avg = max_t(u64, *max_agg_avg, agg_avg[i]); } static int qcom_icc_set(struct icc_node *src, struct icc_node *dst) { - struct qcom_icc_provider *qp; struct qcom_icc_node *src_qn = NULL, *dst_qn = NULL; + u64 agg_clk_rate[QCOM_SMD_RPM_STATE_NUM] = { 0 }; struct icc_provider *provider; + struct qcom_icc_provider *qp; u64 active_rate, sleep_rate; - u64 agg_avg[QCOM_SMD_RPM_STATE_NUM], agg_peak[QCOM_SMD_RPM_STATE_NUM]; - u64 max_agg_avg; int ret; src_qn = src->data; @@ -353,7 +339,9 @@ static int qcom_icc_set(struct icc_node *src, struct icc_node *dst) provider = src->provider; qp = to_qcom_provider(provider); - qcom_icc_bus_aggregate(provider, agg_avg, agg_peak, &max_agg_avg); + qcom_icc_bus_aggregate(provider, agg_clk_rate); + active_rate = agg_clk_rate[QCOM_SMD_RPM_ACTIVE_STATE]; + sleep_rate = agg_clk_rate[QCOM_SMD_RPM_SLEEP_STATE]; ret = qcom_icc_rpm_set(src_qn, src_qn->sum_avg); if (ret) @@ -369,15 +357,6 @@ static int qcom_icc_set(struct icc_node *src, struct icc_node *dst) if (!qp->bus_clk_desc && !qp->bus_clk) return 0; - /* Intentionally keep the rates in kHz as that's what RPM accepts */ - active_rate = max(agg_avg[QCOM_SMD_RPM_ACTIVE_STATE], - agg_peak[QCOM_SMD_RPM_ACTIVE_STATE]); - do_div(active_rate, src_qn->buswidth); - - sleep_rate = max(agg_avg[QCOM_SMD_RPM_SLEEP_STATE], - agg_peak[QCOM_SMD_RPM_SLEEP_STATE]); - do_div(sleep_rate, src_qn->buswidth); - /* * Downstream checks whether the requested rate is zero, but it makes little sense * to vote for a value that's below the lower threshold, so let's not do so.