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(fttx-pool-80.245.77.6.bambit.de [80.245.77.6]) by mxbox1.masterlogin.de (Postfix) with ESMTPSA id A6B1D406D6; Thu, 27 Oct 2022 06:01:52 +0000 (UTC) From: Frank Wunderlich To: linux-mediatek@lists.infradead.org Cc: Frank Wunderlich , Rob Herring , Krzysztof Kozlowski , Matthias Brugger , devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, Sam Shih , Jieyy Yang Subject: [PATCH v1 1/2] arm64: dts: mt7986: add pcie related device nodes Date: Thu, 27 Oct 2022 08:01:41 +0200 Message-Id: <20221027060142.6354-2-linux@fw-web.de> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20221027060142.6354-1-linux@fw-web.de> References: <20221027060142.6354-1-linux@fw-web.de> MIME-Version: 1.0 X-Mail-ID: 4e27c71e-cb8d-40a9-8962-daf18afb8793 X-Spam-Status: No, score=-1.9 required=5.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,RCVD_IN_DNSWL_NONE,SPF_HELO_NONE,SPF_PASS autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-getmail-retrieved-from-mailbox: =?utf-8?q?INBOX?= X-GMAIL-THRID: =?utf-8?q?1747819548132587923?= X-GMAIL-MSGID: =?utf-8?q?1747819548132587923?= From: Sam Shih This patch adds PCIe support for MT7986. Signed-off-by: Jieyy Yang Signed-off-by: Sam Shih Signed-off-by: Frank Wunderlich --- changes compared to sams original version: - add clock-names to pcie node - update clocks to new binding --- arch/arm64/boot/dts/mediatek/mt7986a-rfb.dts | 16 ++++++ arch/arm64/boot/dts/mediatek/mt7986a.dtsi | 52 ++++++++++++++++++++ 2 files changed, 68 insertions(+) diff --git a/arch/arm64/boot/dts/mediatek/mt7986a-rfb.dts b/arch/arm64/boot/dts/mediatek/mt7986a-rfb.dts index c5cc7bd19dbf..1f29e6da856e 100644 --- a/arch/arm64/boot/dts/mediatek/mt7986a-rfb.dts +++ b/arch/arm64/boot/dts/mediatek/mt7986a-rfb.dts @@ -100,6 +100,15 @@ &mmc0 { non-removable; no-sd; no-sdio; +}; + +&pcie { + pinctrl-names = "default"; + pinctrl-0 = <&pcie_pins>; + status = "okay"; +}; + +&pcie_phy { status = "okay"; }; @@ -162,6 +171,13 @@ conf-rst { }; }; + pcie_pins: pcie-pins { + mux { + function = "pcie"; + groups = "pcie_clk", "pcie_wake", "pcie_pereset"; + }; + }; + spi_flash_pins: spi-flash-pins { mux { function = "spi"; diff --git a/arch/arm64/boot/dts/mediatek/mt7986a.dtsi b/arch/arm64/boot/dts/mediatek/mt7986a.dtsi index a1a788db113a..eb9023857a05 100644 --- a/arch/arm64/boot/dts/mediatek/mt7986a.dtsi +++ b/arch/arm64/boot/dts/mediatek/mt7986a.dtsi @@ -8,6 +8,7 @@ #include #include #include +#include / { interrupt-parent = <&gic>; @@ -313,6 +314,57 @@ mmc0: mmc@11230000 { status = "disabled"; }; + pcie: pcie@11280000 { + compatible = "mediatek,mt7986-pcie", + "mediatek,mt8192-pcie"; + device_type = "pci"; + #address-cells = <3>; + #size-cells = <2>; + reg = <0x00 0x11280000 0x00 0x4000>; + reg-names = "pcie-mac"; + interrupts = ; + bus-range = <0x00 0xff>; + ranges = <0x82000000 0x00 0x20000000 0x00 + 0x20000000 0x00 0x10000000>; + clocks = <&infracfg CLK_INFRA_IPCIE_PIPE_CK>, + <&infracfg CLK_INFRA_IPCIE_CK>, + <&infracfg CLK_INFRA_IPCIER_CK>, + <&infracfg CLK_INFRA_IPCIEB_CK>; + clock-names = "pl_250m", "tl_26m", "peri_26m", "top_133m"; + status = "disabled"; + + phys = <&pcie_port PHY_TYPE_PCIE>; + phy-names = "pcie-phy"; + + #interrupt-cells = <1>; + interrupt-map-mask = <0 0 0 0x7>; + interrupt-map = <0 0 0 1 &pcie_intc 0>, + <0 0 0 2 &pcie_intc 1>, + <0 0 0 3 &pcie_intc 2>, + <0 0 0 4 &pcie_intc 3>; + pcie_intc: interrupt-controller { + #address-cells = <0>; + #interrupt-cells = <1>; + interrupt-controller; + }; + }; + + pcie_phy: t-phy@11c00000 { + compatible = "mediatek,mt7986-tphy", + "mediatek,generic-tphy-v2"; + #address-cells = <2>; + #size-cells = <2>; + ranges; + status = "disabled"; + + pcie_port: pcie-phy@11c00000 { + reg = <0 0x11c00000 0 0x20000>; + clocks = <&clk40m>; + clock-names = "ref"; + #phy-cells = <1>; + }; + }; + usb_phy: t-phy@11e10000 { compatible = "mediatek,mt7986-tphy", "mediatek,generic-tphy-v2"; From patchwork Thu Oct 27 06:01:42 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Frank Wunderlich X-Patchwork-Id: 11581 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a5d:6687:0:0:0:0:0 with SMTP id l7csp52267wru; Wed, 26 Oct 2022 23:04:14 -0700 (PDT) X-Google-Smtp-Source: AMsMyM6XKzyV4KHoaWRvdREnXWkO+7KfAz/cOpjPBi3so+g7wMaylhszyDKnUysWvpg9YNQpkPPu X-Received: by 2002:a17:907:3f90:b0:78d:afad:2a78 with SMTP id hr16-20020a1709073f9000b0078dafad2a78mr41547076ejc.68.1666850654203; Wed, 26 Oct 2022 23:04:14 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1666850654; cv=none; d=google.com; s=arc-20160816; b=mNs4CTqe/WKoHxFMgg59WlglY+wEPUFWEBE67ITk1ir0ke+Cn/CEdi4AtWtDgYh4P/ nNxAtpejTTAbpDmIaz7qnIKJ2VKZ6cQVPKaejrE2lWENylJNvnwxtFxQwq2z7yc3V15j hJ5frnU37+3Z4FGZP+pNqQNo+xieGlKDbvJFSBie1WlpND5lKHIPF5Kh107ROye6Tp0D 9r1obOLL8e2VDkQKKPuaMsIQqepcY5ZUVz3mpKSodCJs7i7aFN5f+Qr2UCNhvbBsxLNV Aj78enGVHSTb6oCeiJLFhVmmBUF55SrOwnJsI+fSkH+R+FOzJgc9BrFX6HxxPeeub5mc azTA== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from :dkim-signature; bh=w2ZE/qIsyIboT5rUi20tqGS1dAa2vfhMvGcGE1QuP94=; b=M6gSwpwV1kucRFWKdc6VzfidDna8BVn8P4DiTwE7loqZrArQAhRq9F67SbQqhgqyH2 Sdhv4efXMUNwUY84c8f9GCPBQ85cIRjbsZlHiD7/E+Ui0dQBpOzXvKQzwrTNW6POymlJ YVvCmOM+IyvfS/TpzwcuBLYSv6kkebeRf2szWiKXCAJKYLMX7DAyT6n7SzPzT/Zt6812 t7zy+9+5snoOGkAApQZ+Advq6GsOr3ZPuPQinzZtMV0F5YueYPq4UfLc8iNSDI7ObKu/ pHfUkxpMEYcf1V8LSrVYUISt5kxj14prQobk5QTKCx7fPrUr97EhrH6ujSKugZ2oGvYi K3mA== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@mailerdienst.de header.s=20200217 header.b="xu/80XHq"; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: from out1.vger.email (out1.vger.email. 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(fttx-pool-80.245.77.6.bambit.de [80.245.77.6]) by mxbox1.masterlogin.de (Postfix) with ESMTPSA id 75228405D6; Thu, 27 Oct 2022 06:01:53 +0000 (UTC) From: Frank Wunderlich To: linux-mediatek@lists.infradead.org Cc: Frank Wunderlich , Rob Herring , Krzysztof Kozlowski , Matthias Brugger , devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org Subject: [PATCH v1 2/2] arm64: dts: mt7986: add PCIe nodes to BananaPi-R3 Date: Thu, 27 Oct 2022 08:01:42 +0200 Message-Id: <20221027060142.6354-3-linux@fw-web.de> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20221027060142.6354-1-linux@fw-web.de> References: <20221027060142.6354-1-linux@fw-web.de> MIME-Version: 1.0 X-Mail-ID: f1260125-602d-462f-afe8-10e90a54aa61 X-Spam-Status: No, score=-1.9 required=5.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,RCVD_IN_DNSWL_NONE,SPF_HELO_NONE,SPF_PASS autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-getmail-retrieved-from-mailbox: =?utf-8?q?INBOX?= X-GMAIL-THRID: =?utf-8?q?1747819591242250323?= X-GMAIL-MSGID: =?utf-8?q?1747819591242250323?= From: Frank Wunderlich Add PCIe nodes to Banana Pi R3 SBC which is used on M.2 slot. Signed-off-by: Frank Wunderlich --- .../dts/mediatek/mt7986a-bananapi-bpi-r3.dtsi | 17 +++++++++++++++++ 1 file changed, 17 insertions(+) diff --git a/arch/arm64/boot/dts/mediatek/mt7986a-bananapi-bpi-r3.dtsi b/arch/arm64/boot/dts/mediatek/mt7986a-bananapi-bpi-r3.dtsi index fc100c3a6415..8eb7079cf6d7 100644 --- a/arch/arm64/boot/dts/mediatek/mt7986a-bananapi-bpi-r3.dtsi +++ b/arch/arm64/boot/dts/mediatek/mt7986a-bananapi-bpi-r3.dtsi @@ -181,6 +181,16 @@ &i2c0 { status = "okay"; }; +&pcie { + pinctrl-names = "default"; + pinctrl-0 = <&pcie_pins>; + status = "okay"; +}; + +&pcie_phy { + status = "okay"; +}; + &pio { i2c_pins: i2c-pins { mux { @@ -247,6 +257,13 @@ conf-rst { }; }; + pcie_pins: pcie-pins { + mux { + function = "pcie"; + groups = "pcie_clk", "pcie_pereset"; + }; + }; + spi_flash_pins: spi-flash-pins { mux { function = "spi";