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Wed, 07 Jun 2023 10:56:48 +0000 Received: from nasanex01a.na.qualcomm.com (nasanex01a.na.qualcomm.com [10.52.223.231]) by NASANPPMTA02.qualcomm.com (8.17.1.5/8.17.1.5) with ESMTPS id 357AulKC025487 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Wed, 7 Jun 2023 10:56:47 GMT Received: from varda-linux.qualcomm.com (10.80.80.8) by nasanex01a.na.qualcomm.com (10.52.223.231) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.986.42; Wed, 7 Jun 2023 03:56:38 -0700 From: Varadarajan Narayanan To: , , , , , , , , , , , , , , , , , , , , , , , , , , , , , CC: Varadarajan Narayanan Subject: [PATCH 2/9] dt-bindings: phy: qcom,m31: Document qcom,m31 USB phy Date: Wed, 7 Jun 2023 16:26:06 +0530 Message-ID: <14f60578e2935c0844537eab162af3afa52ffe39.1686126439.git.quic_varada@quicinc.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: References: MIME-Version: 1.0 X-Originating-IP: [10.80.80.8] X-ClientProxiedBy: nasanex01b.na.qualcomm.com (10.46.141.250) To nasanex01a.na.qualcomm.com (10.52.223.231) X-QCInternal: smtphost X-Proofpoint-Virus-Version: vendor=nai engine=6200 definitions=5800 signatures=585085 X-Proofpoint-GUID: LbTCSfTXNxpfeTxjqiBTijUyAv80Q3I7 X-Proofpoint-ORIG-GUID: LbTCSfTXNxpfeTxjqiBTijUyAv80Q3I7 X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.254,Aquarius:18.0.957,Hydra:6.0.573,FMLib:17.11.176.26 definitions=2023-06-07_06,2023-06-07_01,2023-05-22_02 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 lowpriorityscore=0 malwarescore=0 mlxlogscore=999 bulkscore=0 mlxscore=0 adultscore=0 impostorscore=0 suspectscore=0 priorityscore=1501 clxscore=1015 phishscore=0 spamscore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.12.0-2305260000 definitions=main-2306070089 X-Spam-Status: No, score=-2.1 required=5.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,SPF_HELO_NONE,SPF_PASS, T_SCC_BODY_TEXT_LINE,URIBL_BLOCKED autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-getmail-retrieved-from-mailbox: =?utf-8?q?INBOX?= X-GMAIL-THRID: =?utf-8?q?1768042242075324781?= X-GMAIL-MSGID: =?utf-8?q?1768042242075324781?= Document the M31 USB2 phy present in IPQ5332 Signed-off-by: Sricharan Ramabadhran Signed-off-by: Varadarajan Narayanan --- .../devicetree/bindings/phy/qcom,m31.yaml | 69 ++++++++++++++++++++++ 1 file changed, 69 insertions(+) create mode 100644 Documentation/devicetree/bindings/phy/qcom,m31.yaml diff --git a/Documentation/devicetree/bindings/phy/qcom,m31.yaml b/Documentation/devicetree/bindings/phy/qcom,m31.yaml new file mode 100644 index 0000000..8ad4ba4 --- /dev/null +++ b/Documentation/devicetree/bindings/phy/qcom,m31.yaml @@ -0,0 +1,69 @@ +# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) + +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/phy/qcom,m31.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Qualcomm M31 USB PHY + +maintainers: + - Sricharan Ramabadhran + - Varadarajan Narayanan + +description: + This file contains documentation for the USB M31 PHY found in Qualcomm + IPQ5018, IPQ5332 SoCs. + +properties: + compatible: + oneOf: + - items: + - enum: + - qcom,m31-usb-hsphy + - qcom,ipq5332-m31-usb-hsphy + + reg: + description: + Offset and length of the M31 PHY register set + maxItems: 2 + + reg-names: + items: + - const: m31usb_phy_base + - const: qscratch_base + + phy_type: + oneOf: + - items: + - enum: + - utmi + - ulpi + + resets: + maxItems: 1 + description: + List of phandles and reset pairs, one for each entry in reset-names. + + reset-names: + items: + - const: + usb2_phy_reset + +additionalProperties: false + +examples: + - | + #include + hs_m31phy_0: hs_m31phy@5b00 { + compatible = "qcom,m31-usb-hsphy"; + reg = <0x5b000 0x3000>, + <0x08af8800 0x400>; + reg-names = "m31usb_phy_base", + "qscratch_base"; + phy_type = "utmi"; + resets = <&gcc GCC_QUSB2_0_PHY_BCR>; + reset-names = "usb2_phy_reset"; + + status = "ok"; + }; From patchwork Wed Jun 7 10:56:07 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Varadarajan Narayanan X-Patchwork-Id: 104429 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a59:994d:0:b0:3d9:f83d:47d9 with SMTP id k13csp174347vqr; Wed, 7 Jun 2023 04:11:12 -0700 (PDT) X-Google-Smtp-Source: ACHHUZ5gMH3bsf1oUL3L3fhXSaEkPWfvwcrJ1BCl2QTE6bCHBXLzswOxrx5Mv8YhQaH+I0d+pZMS X-Received: by 2002:a17:902:7fc8:b0:1b2:439f:aa6f with SMTP id t8-20020a1709027fc800b001b2439faa6fmr1893363plb.44.1686136271974; Wed, 07 Jun 2023 04:11:11 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1686136271; cv=none; d=google.com; s=arc-20160816; b=oDhZY7ingJMNbZtj/WAM1xVv7zTpLk27mpdXbsX5m+R//gRioRF+eVEPA9Ln0mk5AZ SienwQQ1QE3T9A10Ftc49Ah/hKai/lqfFEFsSbvqIq9sOmNGMWjMoyoqwOdUr0DWTUZK Lkcfgh78F1i9nXA1Q+rCttYop1B0YE4IVLSVMAwP1bkxqRi6MS14Wawt51t8F61uyzkI U1z/L+h1RAjsMCari4bja3jA0F0G5DXVSy6gnjUifBRBHDpyRJ6w60XbG5Pnc2qWhWzq nzbdusSh0sWisz6oyAWbAzgCKJzSR8RdUL7CafIBS+1jUW8Wb6cNp/wsYfm1BoJ8Doap nKnw== ARC-Message-Signature: i=1; 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Wed, 07 Jun 2023 10:56:57 +0000 Received: from nasanex01a.na.qualcomm.com (nasanex01a.na.qualcomm.com [10.52.223.231]) by NASANPPMTA02.qualcomm.com (8.17.1.5/8.17.1.5) with ESMTPS id 357AuuXV025653 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Wed, 7 Jun 2023 10:56:56 GMT Received: from varda-linux.qualcomm.com (10.80.80.8) by nasanex01a.na.qualcomm.com (10.52.223.231) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.986.42; Wed, 7 Jun 2023 03:56:47 -0700 From: Varadarajan Narayanan To: , , , , , , , , , , , , , , , , , , , , , , , , , , , , , CC: Varadarajan Narayanan Subject: [PATCH 3/9] phy: qcom-m31: Introduce qcom,m31 USB phy driver Date: Wed, 7 Jun 2023 16:26:07 +0530 Message-ID: <6bb345c6a57ee27516764f36ba7d34fd1a719b87.1686126439.git.quic_varada@quicinc.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: References: MIME-Version: 1.0 X-Originating-IP: [10.80.80.8] X-ClientProxiedBy: nasanex01b.na.qualcomm.com (10.46.141.250) To nasanex01a.na.qualcomm.com (10.52.223.231) X-QCInternal: smtphost X-Proofpoint-Virus-Version: vendor=nai engine=6200 definitions=5800 signatures=585085 X-Proofpoint-GUID: WgbwX2trXJn2W8oQouqhsfCiXEOE3s8o X-Proofpoint-ORIG-GUID: WgbwX2trXJn2W8oQouqhsfCiXEOE3s8o X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.254,Aquarius:18.0.957,Hydra:6.0.573,FMLib:17.11.176.26 definitions=2023-06-07_06,2023-06-07_01,2023-05-22_02 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 impostorscore=0 mlxscore=0 adultscore=0 lowpriorityscore=0 bulkscore=0 clxscore=1015 mlxlogscore=999 phishscore=0 suspectscore=0 priorityscore=1501 spamscore=0 malwarescore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.12.0-2305260000 definitions=main-2306070089 X-Spam-Status: No, score=-2.8 required=5.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,RCVD_IN_DNSWL_LOW,SPF_HELO_NONE, SPF_PASS,T_SCC_BODY_TEXT_LINE,URIBL_BLOCKED autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-getmail-retrieved-from-mailbox: =?utf-8?q?INBOX?= X-GMAIL-THRID: =?utf-8?q?1768042027567210781?= X-GMAIL-MSGID: =?utf-8?q?1768042027567210781?= Add the M31 USB2 phy driver Signed-off-by: Varadarajan Narayanan --- drivers/phy/qualcomm/phy-qcom-m31.c | 360 ++++++++++++++++++++++++++++++++++++ 1 file changed, 360 insertions(+) create mode 100644 drivers/phy/qualcomm/phy-qcom-m31.c diff --git a/drivers/phy/qualcomm/phy-qcom-m31.c b/drivers/phy/qualcomm/phy-qcom-m31.c new file mode 100644 index 0000000..d29a91e --- /dev/null +++ b/drivers/phy/qualcomm/phy-qcom-m31.c @@ -0,0 +1,360 @@ +// SPDX-License-Identifier: GPL-2.0+ +/* + * Copyright (c) 2014-2016, 2020, The Linux Foundation. All rights reserved. + */ + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +enum clk_reset_action { + CLK_RESET_DEASSERT = 0, + CLK_RESET_ASSERT = 1 +}; + +#define USB2PHY_PORT_POWERDOWN 0xA4 +#define POWER_UP BIT(0) +#define POWER_DOWN 0 + +#define USB2PHY_PORT_UTMI_CTRL1 0x40 + +#define USB2PHY_PORT_UTMI_CTRL2 0x44 +#define UTMI_ULPI_SEL BIT(7) +#define UTMI_TEST_MUX_SEL BIT(6) + +#define HS_PHY_CTRL_REG 0x10 +#define UTMI_OTG_VBUS_VALID BIT(20) +#define SW_SESSVLD_SEL BIT(28) + +#define USB_PHY_CFG0 0x94 +#define USB_PHY_UTMI_CTRL5 0x50 +#define USB_PHY_FSEL_SEL 0xB8 +#define USB_PHY_HS_PHY_CTRL_COMMON0 0x54 +#define USB_PHY_REFCLK_CTRL 0xA0 +#define USB_PHY_HS_PHY_CTRL2 0x64 +#define USB_PHY_UTMI_CTRL0 0x3c +#define USB2PHY_USB_PHY_M31_XCFGI_1 0xBC +#define USB2PHY_USB_PHY_M31_XCFGI_4 0xC8 +#define USB2PHY_USB_PHY_M31_XCFGI_5 0xCC +#define USB2PHY_USB_PHY_M31_XCFGI_11 0xE4 + +#define USB2_0_TX_ENABLE BIT(2) +#define HSTX_SLEW_RATE_565PS 3 +#define PLL_CHARGING_PUMP_CURRENT_35UA (3 << 3) +#define ODT_VALUE_38_02_OHM (3 << 6) +#define ODT_VALUE_45_02_OHM BIT(2) +#define HSTX_PRE_EMPHASIS_LEVEL_0_55MA (1) + +#define UTMI_PHY_OVERRIDE_EN BIT(1) +#define POR_EN BIT(1) +#define FREQ_SEL BIT(0) +#define COMMONONN BIT(7) +#define FSEL BIT(4) +#define RETENABLEN BIT(3) +#define USB2_SUSPEND_N_SEL BIT(3) +#define USB2_SUSPEND_N BIT(2) +#define USB2_UTMI_CLK_EN BIT(1) +#define CLKCORE BIT(1) +#define ATERESET ~BIT(0) +#define FREQ_24MHZ (5 << 4) +#define XCFG_COARSE_TUNE_NUM (2 << 0) +#define XCFG_FINE_TUNE_NUM (1 << 3) + +static void m31usb_write_readback(void *base, u32 offset, + const u32 mask, u32 val); + +struct m31usb_phy { + struct usb_phy phy; + void __iomem *base; + void __iomem *qscratch_base; + + struct reset_control *phy_reset; + + bool cable_connected; + bool suspended; + bool ulpi_mode; +}; + +static void m31usb_reset(struct m31usb_phy *qphy, u32 action) +{ + if (action == CLK_RESET_ASSERT) + reset_control_assert(qphy->phy_reset); + else + reset_control_deassert(qphy->phy_reset); + wmb(); /* ensure data is written to hw register */ +} + +static void m31usb_phy_enable_clock(struct m31usb_phy *qphy) +{ + /* Enable override ctrl */ + writel(UTMI_PHY_OVERRIDE_EN, qphy->base + USB_PHY_CFG0); + /* Enable POR*/ + writel(POR_EN, qphy->base + USB_PHY_UTMI_CTRL5); + udelay(15); + /* Configure frequency select value*/ + writel(FREQ_SEL, qphy->base + USB_PHY_FSEL_SEL); + /* Configure refclk frequency */ + writel(COMMONONN | FSEL | RETENABLEN, + qphy->base + USB_PHY_HS_PHY_CTRL_COMMON0); + /* select refclk source */ + writel(CLKCORE, qphy->base + USB_PHY_REFCLK_CTRL); + /* select ATERESET*/ + writel(POR_EN & ATERESET, qphy->base + USB_PHY_UTMI_CTRL5); + writel(USB2_SUSPEND_N_SEL | USB2_SUSPEND_N | USB2_UTMI_CLK_EN, + qphy->base + USB_PHY_HS_PHY_CTRL2); + writel(0x0, qphy->base + USB_PHY_UTMI_CTRL5); + writel(USB2_SUSPEND_N | USB2_UTMI_CLK_EN, + qphy->base + USB_PHY_HS_PHY_CTRL2); + /* Disable override ctrl */ + writel(0x0, qphy->base + USB_PHY_CFG0); +} + +static void ipq5332_m31usb_phy_enable_clock(struct m31usb_phy *qphy) +{ + /* Enable override ctrl */ + writel(UTMI_PHY_OVERRIDE_EN, qphy->base + USB_PHY_CFG0); + /* Enable POR*/ + writel(POR_EN, qphy->base + USB_PHY_UTMI_CTRL5); + udelay(15); + /* Configure frequency select value*/ + writel(FREQ_SEL, qphy->base + USB_PHY_FSEL_SEL); + /* Configure refclk frequency */ + writel(COMMONONN | FREQ_24MHZ | RETENABLEN, + qphy->base + USB_PHY_HS_PHY_CTRL_COMMON0); + /* select ATERESET*/ + writel(POR_EN & ATERESET, qphy->base + USB_PHY_UTMI_CTRL5); + writel(USB2_SUSPEND_N_SEL | USB2_SUSPEND_N | USB2_UTMI_CLK_EN, + qphy->base + USB_PHY_HS_PHY_CTRL2); + writel(XCFG_COARSE_TUNE_NUM | XCFG_FINE_TUNE_NUM, + qphy->base + USB2PHY_USB_PHY_M31_XCFGI_11); + /* Adjust HSTX slew rate to 565 ps*/ + /* Adjust PLL lock Time counter for release clock to 35uA */ + /* Adjust Manual control ODT value to 38.02 Ohm */ + writel(HSTX_SLEW_RATE_565PS | PLL_CHARGING_PUMP_CURRENT_35UA | + ODT_VALUE_38_02_OHM, qphy->base + USB2PHY_USB_PHY_M31_XCFGI_4); + /* + * Enable to always turn on USB 2.0 TX driver + * when system is in USB 2.0 HS mode + */ + writel(USB2_0_TX_ENABLE, qphy->base + USB2PHY_USB_PHY_M31_XCFGI_1); + /* Adjust Manual control ODT value to 45.02 Ohm */ + /* Adjust HSTX Pre-emphasis level to 0.55mA */ + writel(ODT_VALUE_45_02_OHM | HSTX_PRE_EMPHASIS_LEVEL_0_55MA, + qphy->base + USB2PHY_USB_PHY_M31_XCFGI_5); + udelay(4); + writel(0x0, qphy->base + USB_PHY_UTMI_CTRL5); + writel(USB2_SUSPEND_N | USB2_UTMI_CLK_EN, + qphy->base + USB_PHY_HS_PHY_CTRL2); +} + +static int m31usb_phy_init(struct usb_phy *phy) +{ + struct m31usb_phy *qphy = container_of(phy, struct m31usb_phy, phy); + + /* Perform phy reset */ + m31usb_reset(qphy, CLK_RESET_ASSERT); + usleep_range(1, 5); + m31usb_reset(qphy, CLK_RESET_DEASSERT); + + /* configure for ULPI mode if requested */ + if (qphy->ulpi_mode) + writel_relaxed(0x0, qphy->base + USB2PHY_PORT_UTMI_CTRL2); + + /* Enable the PHY */ + writel_relaxed(POWER_UP, qphy->base + USB2PHY_PORT_POWERDOWN); + + /* Make sure above write completed */ + wmb(); + + /* Turn on phy ref clock*/ + if (of_device_is_compatible(phy->dev->of_node, + "qcom,ipq5332-m31-usb-hsphy")) + ipq5332_m31usb_phy_enable_clock(qphy); + else + m31usb_phy_enable_clock(qphy); + + /* Set OTG VBUS Valid from HSPHY to controller */ + m31usb_write_readback(qphy->qscratch_base, HS_PHY_CTRL_REG, + UTMI_OTG_VBUS_VALID, UTMI_OTG_VBUS_VALID); + /* Indicate value is driven by UTMI_OTG_VBUS_VALID bit */ + m31usb_write_readback(qphy->qscratch_base, HS_PHY_CTRL_REG, + SW_SESSVLD_SEL, SW_SESSVLD_SEL); + + return 0; +} + +static void m31usb_phy_shutdown(struct usb_phy *phy) +{ + struct m31usb_phy *qphy = container_of(phy, struct m31usb_phy, phy); + + /* Disable the PHY */ + writel_relaxed(POWER_DOWN, qphy->base + USB2PHY_PORT_POWERDOWN); + /* Make sure above write completed */ + wmb(); +} + +static void m31usb_write_readback(void *base, u32 offset, + const u32 mask, u32 val) +{ + u32 write_val, tmp = readl_relaxed(base + offset); + + tmp &= ~mask; /* retain other bits */ + write_val = tmp | val; + + writel_relaxed(write_val, base + offset); + /* Make sure above write completed */ + wmb(); + + /* Read back to see if val was written */ + tmp = readl_relaxed(base + offset); + tmp &= mask; /* clear other bits */ + + if (tmp != val) + pr_err("%s: write: %x to QSCRATCH: %x FAILED\n", + __func__, val, offset); +} + +static int m31usb_phy_notify_connect(struct usb_phy *phy, + enum usb_device_speed speed) +{ + struct m31usb_phy *qphy = container_of(phy, struct m31usb_phy, phy); + + qphy->cable_connected = true; + + dev_dbg(phy->dev, " cable_connected=%d\n", qphy->cable_connected); + + /* Set OTG VBUS Valid from HSPHY to controller */ + m31usb_write_readback(qphy->qscratch_base, HS_PHY_CTRL_REG, + UTMI_OTG_VBUS_VALID, + UTMI_OTG_VBUS_VALID); + + /* Indicate value is driven by UTMI_OTG_VBUS_VALID bit */ + m31usb_write_readback(qphy->qscratch_base, HS_PHY_CTRL_REG, + SW_SESSVLD_SEL, SW_SESSVLD_SEL); + + dev_dbg(phy->dev, "M31USB2 phy connect notification\n"); + return 0; +} + +static int m31usb_phy_notify_disconnect(struct usb_phy *phy, + enum usb_device_speed speed) +{ + struct m31usb_phy *qphy = container_of(phy, struct m31usb_phy, phy); + + qphy->cable_connected = false; + + dev_dbg(phy->dev, " cable_connected=%d\n", qphy->cable_connected); + + /* Set OTG VBUS Valid from HSPHY to controller */ + m31usb_write_readback(qphy->qscratch_base, HS_PHY_CTRL_REG, + UTMI_OTG_VBUS_VALID, 0); + + /* Indicate value is driven by UTMI_OTG_VBUS_VALID bit */ + m31usb_write_readback(qphy->qscratch_base, HS_PHY_CTRL_REG, + SW_SESSVLD_SEL, 0); + + dev_dbg(phy->dev, "M31USB2 phy disconnect notification\n"); + return 0; +} + +static int m31usb_phy_probe(struct platform_device *pdev) +{ + struct m31usb_phy *qphy; + struct device *dev = &pdev->dev; + struct resource *res; + int ret; + const char *phy_type; + + qphy = devm_kzalloc(dev, sizeof(*qphy), GFP_KERNEL); + if (!qphy) + return -ENOMEM; + + qphy->phy.dev = dev; + + res = platform_get_resource_byname(pdev, IORESOURCE_MEM, + "m31usb_phy_base"); + qphy->base = devm_ioremap_resource(dev, res); + if (IS_ERR(qphy->base)) + return PTR_ERR(qphy->base); + + res = platform_get_resource_byname(pdev, IORESOURCE_MEM, + "qscratch_base"); + if (res) { + qphy->qscratch_base = devm_ioremap(dev, res->start, + resource_size(res)); + if (IS_ERR(qphy->qscratch_base)) { + dev_dbg(dev, "couldn't ioremap qscratch_base\n"); + qphy->qscratch_base = NULL; + } + } + + qphy->phy_reset = devm_reset_control_get(dev, "usb2_phy_reset"); + if (IS_ERR(qphy->phy_reset)) + return PTR_ERR(qphy->phy_reset); + + qphy->ulpi_mode = false; + ret = of_property_read_string(dev->of_node, "phy_type", &phy_type); + + if (!ret) { + if (!strcasecmp(phy_type, "ulpi")) + qphy->ulpi_mode = true; + } else { + dev_err(dev, "error reading phy_type property\n"); + return ret; + } + + platform_set_drvdata(pdev, qphy); + + qphy->phy.label = "qcom-m31usb-phy"; + qphy->phy.init = m31usb_phy_init; + qphy->phy.shutdown = m31usb_phy_shutdown; + qphy->phy.type = USB_PHY_TYPE_USB2; + + if (qphy->qscratch_base) { + qphy->phy.notify_connect = m31usb_phy_notify_connect; + qphy->phy.notify_disconnect = m31usb_phy_notify_disconnect; + } + + ret = usb_add_phy_dev(&qphy->phy); + + return ret; +} + +static int m31usb_phy_remove(struct platform_device *pdev) +{ + struct m31usb_phy *qphy = platform_get_drvdata(pdev); + + usb_remove_phy(&qphy->phy); + + return 0; +} + +static const struct of_device_id m31usb_phy_id_table[] = { + { .compatible = "qcom,m31-usb-hsphy",}, + { .compatible = "qcom,ipq5332-m31-usb-hsphy",}, + { }, +}; +MODULE_DEVICE_TABLE(of, m31usb_phy_id_table); + +static struct platform_driver m31usb_phy_driver = { + .probe = m31usb_phy_probe, + .remove = m31usb_phy_remove, + .driver = { + .name = "qcom-m31usb-phy", + .of_match_table = of_match_ptr(m31usb_phy_id_table), + }, +}; + +module_platform_driver(m31usb_phy_driver); + +MODULE_DESCRIPTION("USB2 Qualcomm M31 HSPHY driver"); +MODULE_LICENSE("GPL"); From patchwork Wed Jun 7 10:56:08 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Varadarajan Narayanan X-Patchwork-Id: 104437 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a59:994d:0:b0:3d9:f83d:47d9 with SMTP id k13csp176705vqr; Wed, 7 Jun 2023 04:15:27 -0700 (PDT) X-Google-Smtp-Source: ACHHUZ4BaJ/Ux223vKIGkSbUA8lxdNP0MvTfdntopEFuv+ErBicrZC2tNO/giujBbRS45t7LLk55 X-Received: by 2002:a05:6a00:c87:b0:661:a374:767a with SMTP id a7-20020a056a000c8700b00661a374767amr2850268pfv.1.1686136527195; Wed, 07 Jun 2023 04:15:27 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1686136527; cv=none; d=google.com; s=arc-20160816; b=YVisFkYQueGMpvwLcz2H0tvQI594tl4G3ZEGMAdEz7gyEuV0L1D4vsE32WQgzQ5lQz hO1TK5LfimeCR7sEy6Fil+FmR/rTCeAkkKLvz/c6Sx65zQZGCi+MogZN/6GDWyh9q60P nvx+XdCQf8iODYAZrQwJdhuP1quFI3Suzm2e1+f9c0LJmb7BRKsNFTA3sJ+E2DXyMlmx vUP8ed2e9+GlbIBDkTtiK9wyDhrDYx1SgfZQucHZ9KkoZXrrurkLKkZj3phf+uGyGO9W JTZGxXw/0r75l/afbNRMaS82UWOI5FHdOJXMXW1b/fVvQ1lqkepfZhtX5STl5JyD13JV 6ICQ== ARC-Message-Signature: i=1; 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Wed, 07 Jun 2023 10:57:05 +0000 Received: from nasanex01a.na.qualcomm.com (nasanex01a.na.qualcomm.com [10.52.223.231]) by NASANPPMTA01.qualcomm.com (8.17.1.5/8.17.1.5) with ESMTPS id 357Av5Ak023479 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Wed, 7 Jun 2023 10:57:05 GMT Received: from varda-linux.qualcomm.com (10.80.80.8) by nasanex01a.na.qualcomm.com (10.52.223.231) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.986.42; Wed, 7 Jun 2023 03:56:56 -0700 From: Varadarajan Narayanan To: , , , , , , , , , , , , , , , , , , , , , , , , , , , , , CC: Varadarajan Narayanan Subject: [PATCH 4/9] clk: qcom: ipq5332: Fix USB related clock defines Date: Wed, 7 Jun 2023 16:26:08 +0530 Message-ID: <3840e5b5795ef55ecbf25d0faa8c328f09c6d976.1686126439.git.quic_varada@quicinc.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: References: MIME-Version: 1.0 X-Originating-IP: [10.80.80.8] X-ClientProxiedBy: nasanex01b.na.qualcomm.com (10.46.141.250) To nasanex01a.na.qualcomm.com (10.52.223.231) X-QCInternal: smtphost X-Proofpoint-Virus-Version: vendor=nai engine=6200 definitions=5800 signatures=585085 X-Proofpoint-GUID: Z2TsTwjIBn2S3qlWPRVHa0LxQyJiosUC X-Proofpoint-ORIG-GUID: Z2TsTwjIBn2S3qlWPRVHa0LxQyJiosUC X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.254,Aquarius:18.0.957,Hydra:6.0.573,FMLib:17.11.176.26 definitions=2023-06-07_06,2023-06-07_01,2023-05-22_02 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 impostorscore=0 mlxscore=0 adultscore=0 lowpriorityscore=0 bulkscore=0 clxscore=1015 mlxlogscore=999 phishscore=0 suspectscore=0 priorityscore=1501 spamscore=0 malwarescore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.12.0-2305260000 definitions=main-2306070089 X-Spam-Status: No, score=-2.8 required=5.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,RCVD_IN_DNSWL_LOW,SPF_HELO_NONE, SPF_PASS,T_SCC_BODY_TEXT_LINE,URIBL_BLOCKED autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-getmail-retrieved-from-mailbox: =?utf-8?q?INBOX?= X-GMAIL-THRID: =?utf-8?q?1768042295184608613?= X-GMAIL-MSGID: =?utf-8?q?1768042295184608613?= Fix the USB related clock defines and add details referenced by them Signed-off-by: Varadarajan Narayanan --- drivers/clk/qcom/gcc-ipq5332.c | 34 +++++++++++++++++++++++----------- 1 file changed, 23 insertions(+), 11 deletions(-) diff --git a/drivers/clk/qcom/gcc-ipq5332.c b/drivers/clk/qcom/gcc-ipq5332.c index a75ab88..2b58558 100644 --- a/drivers/clk/qcom/gcc-ipq5332.c +++ b/drivers/clk/qcom/gcc-ipq5332.c @@ -351,6 +351,16 @@ static const struct freq_tbl ftbl_gcc_adss_pwm_clk_src[] = { { } }; +static const struct clk_parent_data gcc_usb3phy_0_cc_pipe_clk_xo[] = { + { .fw_name = "usb3phy_0_cc_pipe_clk" }, + { .fw_name = "xo" }, +}; + +static const struct parent_map gcc_usb3phy_0_cc_pipe_clk_xo_map[] = { + { P_USB3PHY_0_PIPE, 0 }, + { P_XO, 2 }, +}; + static struct clk_rcg2 gcc_adss_pwm_clk_src = { .cmd_rcgr = 0x1c004, .mnd_width = 0, @@ -1101,16 +1111,18 @@ static struct clk_rcg2 gcc_usb0_mock_utmi_clk_src = { }, }; -static struct clk_regmap_phy_mux gcc_usb0_pipe_clk_src = { +static struct clk_regmap_mux usb0_pipe_clk_src = { .reg = 0x2c074, + .shift = 8, + .width = 2, + .parent_map = gcc_usb3phy_0_cc_pipe_clk_xo_map, .clkr = { - .hw.init = &(struct clk_init_data) { - .name = "gcc_usb0_pipe_clk_src", - .parent_data = &(const struct clk_parent_data) { - .index = DT_USB_PCIE_WRAPPER_PIPE_CLK, - }, - .num_parents = 1, - .ops = &clk_regmap_phy_mux_ops, + .hw.init = &(const struct clk_init_data){ + .name = "usb0phy_0_cc_pipe_clk_src", + .parent_data = gcc_usb3phy_0_cc_pipe_clk_xo, + .num_parents = 2, + .ops = &clk_regmap_mux_closest_ops, + .flags = CLK_SET_RATE_PARENT, }, }, }; @@ -3041,8 +3053,8 @@ static struct clk_branch gcc_usb0_pipe_clk = { .enable_mask = BIT(0), .hw.init = &(const struct clk_init_data) { .name = "gcc_usb0_pipe_clk", - .parent_hws = (const struct clk_hw*[]) { - &gcc_usb0_pipe_clk_src.clkr.hw, + .parent_names = (const char *[]){ + "usb0_pipe_clk_src" }, .num_parents = 1, .flags = CLK_SET_RATE_PARENT, @@ -3580,7 +3592,7 @@ static struct clk_regmap *gcc_ipq5332_clocks[] = { [GCC_PCIE3X2_PIPE_CLK_SRC] = &gcc_pcie3x2_pipe_clk_src.clkr, [GCC_PCIE3X1_0_PIPE_CLK_SRC] = &gcc_pcie3x1_0_pipe_clk_src.clkr, [GCC_PCIE3X1_1_PIPE_CLK_SRC] = &gcc_pcie3x1_1_pipe_clk_src.clkr, - [GCC_USB0_PIPE_CLK_SRC] = &gcc_usb0_pipe_clk_src.clkr, + [GCC_USB0_PIPE_CLK_SRC] = &usb0_pipe_clk_src.clkr, }; static const struct qcom_reset_map gcc_ipq5332_resets[] = { From patchwork Wed Jun 7 10:56:09 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Varadarajan Narayanan X-Patchwork-Id: 104428 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a59:994d:0:b0:3d9:f83d:47d9 with SMTP id k13csp174343vqr; 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Wed, 07 Jun 2023 10:57:14 +0000 Received: from nasanex01a.na.qualcomm.com (nasanex01a.na.qualcomm.com [10.52.223.231]) by NASANPPMTA04.qualcomm.com (8.17.1.5/8.17.1.5) with ESMTPS id 357AvDJa009912 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Wed, 7 Jun 2023 10:57:13 GMT Received: from varda-linux.qualcomm.com (10.80.80.8) by nasanex01a.na.qualcomm.com (10.52.223.231) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.986.42; Wed, 7 Jun 2023 03:57:04 -0700 From: Varadarajan Narayanan To: , , , , , , , , , , , , , , , , , , , , , , , , , , , , , CC: Varadarajan Narayanan Subject: [PATCH 5/9] phy: qcom-m31: Introduce qcom,m31 USB phy Date: Wed, 7 Jun 2023 16:26:09 +0530 Message-ID: <636308462efb579734de829fb6e9cbda81b982f7.1686126439.git.quic_varada@quicinc.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: References: MIME-Version: 1.0 X-Originating-IP: [10.80.80.8] X-ClientProxiedBy: nasanex01b.na.qualcomm.com (10.46.141.250) To nasanex01a.na.qualcomm.com (10.52.223.231) X-QCInternal: smtphost X-Proofpoint-Virus-Version: vendor=nai engine=6200 definitions=5800 signatures=585085 X-Proofpoint-ORIG-GUID: FO1Q6SR5J6gtqdRBcK0ggGdpm43f-fbj X-Proofpoint-GUID: FO1Q6SR5J6gtqdRBcK0ggGdpm43f-fbj X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.254,Aquarius:18.0.957,Hydra:6.0.573,FMLib:17.11.176.26 definitions=2023-06-07_06,2023-06-07_01,2023-05-22_02 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 mlxscore=0 bulkscore=0 phishscore=0 clxscore=1015 impostorscore=0 malwarescore=0 suspectscore=0 mlxlogscore=695 spamscore=0 adultscore=0 priorityscore=1501 lowpriorityscore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.12.0-2305260000 definitions=main-2306070089 X-Spam-Status: No, score=-2.1 required=5.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,SPF_HELO_NONE,SPF_PASS, T_SCC_BODY_TEXT_LINE,URIBL_BLOCKED autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-getmail-retrieved-from-mailbox: =?utf-8?q?INBOX?= X-GMAIL-THRID: =?utf-8?q?1768042026993727234?= X-GMAIL-MSGID: =?utf-8?q?1768042026993727234?= Introduce CONFIG_PHY_QCOM_M31_USB for including the M31 phy driver Signed-off-by: Varadarajan Narayanan --- drivers/phy/qualcomm/Kconfig | 11 +++++++++++ 1 file changed, 11 insertions(+) diff --git a/drivers/phy/qualcomm/Kconfig b/drivers/phy/qualcomm/Kconfig index 67a45d9..8a363dd 100644 --- a/drivers/phy/qualcomm/Kconfig +++ b/drivers/phy/qualcomm/Kconfig @@ -188,3 +188,14 @@ config PHY_QCOM_IPQ806X_USB This option enables support for the Synopsis PHYs present inside the Qualcomm USB3.0 DWC3 controller on ipq806x SoC. This driver supports both HS and SS PHY controllers. + +config PHY_QCOM_M31_USB + tristate "Qualcomm M31 HS PHY driver support" + depends on (USB || USB_GADGET) && ARCH_QCOM + select USB_PHY + help + Enable this to support M31 HS PHY transceivers on Qualcomm chips + with DWC3 USB core. It handles PHY initialization, clock + management required after resetting the hardware and power + management. This driver is required even for peripheral only or + host only mode configurations. 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Wed, 07 Jun 2023 10:57:23 +0000 Received: from nasanex01a.na.qualcomm.com (nasanex01a.na.qualcomm.com [10.52.223.231]) by NASANPPMTA04.qualcomm.com (8.17.1.5/8.17.1.5) with ESMTPS id 357AvMSa010124 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Wed, 7 Jun 2023 10:57:22 GMT Received: from varda-linux.qualcomm.com (10.80.80.8) by nasanex01a.na.qualcomm.com (10.52.223.231) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.986.42; Wed, 7 Jun 2023 03:57:13 -0700 From: Varadarajan Narayanan To: , , , , , , , , , , , , , , , , , , , , , , , , , , , , , CC: Varadarajan Narayanan Subject: [PATCH 6/9] phy: qcom: Add qcom,m31 USB phy driver Date: Wed, 7 Jun 2023 16:26:10 +0530 Message-ID: <353c5affd1d638bdc7e4ed187616a938e8d763a4.1686126439.git.quic_varada@quicinc.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: References: MIME-Version: 1.0 X-Originating-IP: [10.80.80.8] X-ClientProxiedBy: nasanex01b.na.qualcomm.com (10.46.141.250) To nasanex01a.na.qualcomm.com (10.52.223.231) X-QCInternal: smtphost X-Proofpoint-Virus-Version: vendor=nai engine=6200 definitions=5800 signatures=585085 X-Proofpoint-GUID: sv5o8tnQfjGr9Ab465gX__8xLrmD_Hxi X-Proofpoint-ORIG-GUID: sv5o8tnQfjGr9Ab465gX__8xLrmD_Hxi X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.254,Aquarius:18.0.957,Hydra:6.0.573,FMLib:17.11.176.26 definitions=2023-06-07_06,2023-06-07_01,2023-05-22_02 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 lowpriorityscore=0 impostorscore=0 bulkscore=0 phishscore=0 spamscore=0 adultscore=0 priorityscore=1501 mlxlogscore=730 suspectscore=0 malwarescore=0 clxscore=1015 mlxscore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.12.0-2305260000 definitions=main-2306070089 X-Spam-Status: No, score=-2.8 required=5.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,RCVD_IN_DNSWL_LOW,SPF_HELO_NONE, SPF_PASS,T_SCC_BODY_TEXT_LINE,URIBL_BLOCKED autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-getmail-retrieved-from-mailbox: =?utf-8?q?INBOX?= X-GMAIL-THRID: =?utf-8?q?1768043334500933939?= X-GMAIL-MSGID: =?utf-8?q?1768043334500933939?= Include M31 phy driver if CONFIG_PHY_QCOM_M31_USB is enabled Signed-off-by: Varadarajan Narayanan --- drivers/phy/qualcomm/Makefile | 1 + 1 file changed, 1 insertion(+) diff --git a/drivers/phy/qualcomm/Makefile b/drivers/phy/qualcomm/Makefile index de3dc9c..79a6e75 100644 --- a/drivers/phy/qualcomm/Makefile +++ b/drivers/phy/qualcomm/Makefile @@ -21,3 +21,4 @@ obj-$(CONFIG_PHY_QCOM_USB_HS_28NM) += phy-qcom-usb-hs-28nm.o obj-$(CONFIG_PHY_QCOM_USB_SS) += phy-qcom-usb-ss.o obj-$(CONFIG_PHY_QCOM_USB_SNPS_FEMTO_V2)+= phy-qcom-snps-femto-v2.o obj-$(CONFIG_PHY_QCOM_IPQ806X_USB) += phy-qcom-ipq806x-usb.o +obj-$(CONFIG_PHY_QCOM_M31_USB) += phy-qcom-m31.o From patchwork Wed Jun 7 10:56:11 2023 Content-Type: text/plain; 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Wed, 07 Jun 2023 10:57:32 +0000 Received: from nasanex01a.na.qualcomm.com (nasanex01a.na.qualcomm.com [10.52.223.231]) by NASANPPMTA05.qualcomm.com (8.17.1.5/8.17.1.5) with ESMTPS id 357AvVcs007553 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Wed, 7 Jun 2023 10:57:31 GMT Received: from varda-linux.qualcomm.com (10.80.80.8) by nasanex01a.na.qualcomm.com (10.52.223.231) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.986.42; Wed, 7 Jun 2023 03:57:22 -0700 From: Varadarajan Narayanan To: , , , , , , , , , , , , , , , , , , , , , , , , , , , , , CC: Varadarajan Narayanan Subject: [PATCH 7/9] arm64: dts: qcom: ipq5332: Add USB related nodes Date: Wed, 7 Jun 2023 16:26:11 +0530 Message-ID: <1b48e737aa14f5b5539cbf04d473182121d5b1ad.1686126439.git.quic_varada@quicinc.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: References: MIME-Version: 1.0 X-Originating-IP: [10.80.80.8] X-ClientProxiedBy: nasanex01b.na.qualcomm.com (10.46.141.250) To nasanex01a.na.qualcomm.com (10.52.223.231) X-QCInternal: smtphost X-Proofpoint-Virus-Version: vendor=nai engine=6200 definitions=5800 signatures=585085 X-Proofpoint-ORIG-GUID: wGiNh1LmL-Dy0sEa44e8UYzQmKaTnO7f X-Proofpoint-GUID: wGiNh1LmL-Dy0sEa44e8UYzQmKaTnO7f X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.254,Aquarius:18.0.957,Hydra:6.0.573,FMLib:17.11.176.26 definitions=2023-06-07_06,2023-06-07_01,2023-05-22_02 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 spamscore=0 priorityscore=1501 malwarescore=0 lowpriorityscore=0 clxscore=1015 mlxscore=0 bulkscore=0 adultscore=0 phishscore=0 mlxlogscore=831 impostorscore=0 suspectscore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.12.0-2305260000 definitions=main-2306070089 X-Spam-Status: No, score=-2.8 required=5.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,RCVD_IN_DNSWL_LOW,SPF_HELO_NONE, SPF_PASS,T_SCC_BODY_TEXT_LINE,URIBL_BLOCKED autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-getmail-retrieved-from-mailbox: =?utf-8?q?INBOX?= X-GMAIL-THRID: =?utf-8?q?1768041874780637795?= X-GMAIL-MSGID: =?utf-8?q?1768041874780637795?= Add USB phy and controller nodes Signed-off-by: Varadarajan Narayanan --- arch/arm64/boot/dts/qcom/ipq5332.dtsi | 55 +++++++++++++++++++++++++++++++++++ 1 file changed, 55 insertions(+) diff --git a/arch/arm64/boot/dts/qcom/ipq5332.dtsi b/arch/arm64/boot/dts/qcom/ipq5332.dtsi index c2d6cc65..3183357 100644 --- a/arch/arm64/boot/dts/qcom/ipq5332.dtsi +++ b/arch/arm64/boot/dts/qcom/ipq5332.dtsi @@ -383,6 +383,61 @@ status = "disabled"; }; }; + + usb_0_m31phy: hs_m31phy@7b000 { + compatible = "qcom,ipq5332-m31-usb-hsphy"; + reg = <0x0007b000 0x12C>, + <0x08af8800 0x400>; + reg-names = "m31usb_phy_base", + "qscratch_base"; + phy_type= "utmi"; + + resets = <&gcc GCC_QUSB2_0_PHY_BCR>; + reset-names = "usb2_phy_reset"; + + status = "okay"; + }; + + usb2: usb2@8a00000 { + compatible = "qcom,ipq5332-dwc3", "qcom,dwc3"; + #address-cells = <1>; + #size-cells = <1>; + ranges; + + reg = <0x08af8800 0x100>; + + clocks = <&gcc GCC_USB0_MASTER_CLK>, + <&gcc GCC_SNOC_USB_CLK>, + <&gcc GCC_USB0_SLEEP_CLK>, + <&gcc GCC_USB0_MOCK_UTMI_CLK>; + + clock-names = "core", + "iface", + "sleep", + "mock_utmi"; + + interrupts-extended = <&intc GIC_SPI 134 IRQ_TYPE_LEVEL_HIGH>; + interrupt-names = "pwr_event"; + + resets = <&gcc GCC_USB_BCR>; + + qcom,select-utmi-as-pipe-clk; + + usb2_0_dwc: usb@8a00000 { + compatible = "snps,dwc3"; + reg = <0x08a00000 0xe000>; + clocks = <&gcc GCC_USB0_MOCK_UTMI_CLK>; + clock-names = "ref"; + interrupts = ; + usb-phy = <&usb_0_m31phy>; + tx-fifo-resize; + snps,is-utmi-l1-suspend; + snps,hird-threshold = /bits/ 8 <0x0>; + snps,dis_u2_susphy_quirk; + snps,dis_u3_susphy_quirk; + snps,ref-clock-period-ns = <21>; + }; + }; }; timer { From patchwork Wed Jun 7 10:56:12 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Varadarajan Narayanan X-Patchwork-Id: 104450 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a05:6358:3046:b0:115:7a1d:dabb with SMTP id p6csp287182rwl; Wed, 7 Jun 2023 04:45:33 -0700 (PDT) X-Google-Smtp-Source: ACHHUZ53sljkKMlPUno+hXJltFuj7/3G4FN5D4w9/sV7SILDgDr5Qj2p+shRlEdw0tXQwfFKlTAz X-Received: by 2002:a05:6359:a16:b0:129:c1dd:d5a3 with SMTP id el22-20020a0563590a1600b00129c1ddd5a3mr1311357rwb.7.1686138332895; Wed, 07 Jun 2023 04:45:32 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1686138332; cv=none; d=google.com; s=arc-20160816; b=0ORsoukGysqtnMXYm+gsIPckLQnGNLEb6wfeCr7xsU3cfPf0Cahb2w5wGnWlmVgsEV +mCSEY9Cx9BISaexgwFLBOiGq+HuK0M+9UuKvqdAbJnV4MUILDaRYpVZ8K72w592Qzkh 7MvuAmXR69iuwon9TJneQqOuj4M2Vyh9f+JspJFm4dL8Oc6BEaVpn/a7DCVCwJBN2JKm OfVxUfc3awFbrHT2uwHUjldaTUMe9zf/3P5/abCGJXGIjMeoBVs+nAMPwUgPrNovo7Ar 9taByZGESKTBjji6z2aGtYQsD2MQEB9aAnCVN99EnJkXt0tbQX8LG7y2SrOe4+rM3Z5A 3U9A== ARC-Message-Signature: i=1; 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Wed, 07 Jun 2023 10:57:41 +0000 Received: from nasanex01a.na.qualcomm.com (nasanex01a.na.qualcomm.com [10.52.223.231]) by NASANPPMTA03.qualcomm.com (8.17.1.5/8.17.1.5) with ESMTPS id 357Avegw011528 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Wed, 7 Jun 2023 10:57:40 GMT Received: from varda-linux.qualcomm.com (10.80.80.8) by nasanex01a.na.qualcomm.com (10.52.223.231) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.986.42; Wed, 7 Jun 2023 03:57:31 -0700 From: Varadarajan Narayanan To: , , , , , , , , , , , , , , , , , , , , , , , , , , , , , CC: Varadarajan Narayanan Subject: [PATCH 8/9] arm64: dts: qcom: ipq5332: Enable USB Date: Wed, 7 Jun 2023 16:26:12 +0530 Message-ID: X-Mailer: git-send-email 2.7.4 In-Reply-To: References: MIME-Version: 1.0 X-Originating-IP: [10.80.80.8] X-ClientProxiedBy: nasanex01b.na.qualcomm.com (10.46.141.250) To nasanex01a.na.qualcomm.com (10.52.223.231) X-QCInternal: smtphost X-Proofpoint-Virus-Version: vendor=nai engine=6200 definitions=5800 signatures=585085 X-Proofpoint-ORIG-GUID: MVdYuypnK765zXpV7ZklpNn9no0ajK_D X-Proofpoint-GUID: MVdYuypnK765zXpV7ZklpNn9no0ajK_D X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.254,Aquarius:18.0.957,Hydra:6.0.573,FMLib:17.11.176.26 definitions=2023-06-07_06,2023-06-07_01,2023-05-22_02 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 priorityscore=1501 mlxscore=0 bulkscore=0 adultscore=0 lowpriorityscore=0 spamscore=0 malwarescore=0 clxscore=1015 mlxlogscore=551 impostorscore=0 suspectscore=0 phishscore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.12.0-2305260000 definitions=main-2306070089 X-Spam-Status: No, score=-2.8 required=5.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,RCVD_IN_DNSWL_LOW,SPF_HELO_NONE, SPF_PASS,T_SCC_BODY_TEXT_LINE,URIBL_BLOCKED autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-getmail-retrieved-from-mailbox: =?utf-8?q?INBOX?= X-GMAIL-THRID: =?utf-8?q?1768044188640837251?= X-GMAIL-MSGID: =?utf-8?q?1768044188640837251?= Enable USB2 in host mode Signed-off-by: Varadarajan Narayanan --- arch/arm64/boot/dts/qcom/ipq5332-rdp468.dts | 8 ++++++++ 1 file changed, 8 insertions(+) diff --git a/arch/arm64/boot/dts/qcom/ipq5332-rdp468.dts b/arch/arm64/boot/dts/qcom/ipq5332-rdp468.dts index 3b6a5cb..303e796 100644 --- a/arch/arm64/boot/dts/qcom/ipq5332-rdp468.dts +++ b/arch/arm64/boot/dts/qcom/ipq5332-rdp468.dts @@ -101,3 +101,11 @@ bias-pull-up; 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Wed, 07 Jun 2023 10:57:50 +0000 Received: from nasanex01a.na.qualcomm.com (nasanex01a.na.qualcomm.com [10.52.223.231]) by NASANPPMTA05.qualcomm.com (8.17.1.5/8.17.1.5) with ESMTPS id 357AvnXp008162 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Wed, 7 Jun 2023 10:57:49 GMT Received: from varda-linux.qualcomm.com (10.80.80.8) by nasanex01a.na.qualcomm.com (10.52.223.231) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.986.42; Wed, 7 Jun 2023 03:57:40 -0700 From: Varadarajan Narayanan To: , , , , , , , , , , , , , , , , , , , , , , , , , , , , , CC: Varadarajan Narayanan Subject: [PATCH 9/9] arm64: defconfig: Enable QCOM M31 USB phy driver Date: Wed, 7 Jun 2023 16:26:13 +0530 Message-ID: <55f51785b36b9725fe5283a58230aee4e89b4d6f.1686126439.git.quic_varada@quicinc.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: References: MIME-Version: 1.0 X-Originating-IP: [10.80.80.8] X-ClientProxiedBy: nasanex01b.na.qualcomm.com (10.46.141.250) To nasanex01a.na.qualcomm.com (10.52.223.231) X-QCInternal: smtphost X-Proofpoint-Virus-Version: vendor=nai engine=6200 definitions=5800 signatures=585085 X-Proofpoint-GUID: eQVskgy5X7OuKVbtsfpGaf2gwxyTA-t5 X-Proofpoint-ORIG-GUID: eQVskgy5X7OuKVbtsfpGaf2gwxyTA-t5 X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.254,Aquarius:18.0.957,Hydra:6.0.573,FMLib:17.11.176.26 definitions=2023-06-07_06,2023-06-07_01,2023-05-22_02 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 lowpriorityscore=0 impostorscore=0 bulkscore=0 phishscore=0 spamscore=0 adultscore=0 priorityscore=1501 mlxlogscore=489 suspectscore=0 malwarescore=0 clxscore=1015 mlxscore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.12.0-2305260000 definitions=main-2306070089 X-Spam-Status: No, score=-2.8 required=5.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,RCVD_IN_DNSWL_LOW,SPF_HELO_NONE, SPF_PASS,T_SCC_BODY_TEXT_LINE,URIBL_BLOCKED autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-getmail-retrieved-from-mailbox: =?utf-8?q?INBOX?= X-GMAIL-THRID: =?utf-8?q?1768042465043828237?= X-GMAIL-MSGID: =?utf-8?q?1768042465043828237?= Enable QCOM M31 USB phy driver present in IPQ5332 Signed-off-by: Varadarajan Narayanan --- arch/arm64/configs/defconfig | 1 + 1 file changed, 1 insertion(+) diff --git a/arch/arm64/configs/defconfig b/arch/arm64/configs/defconfig index afb63e3..f1e8669 100644 --- a/arch/arm64/configs/defconfig +++ b/arch/arm64/configs/defconfig @@ -1362,6 +1362,7 @@ CONFIG_PHY_QCOM_USB_HS=m CONFIG_PHY_QCOM_USB_SNPS_FEMTO_V2=m CONFIG_PHY_QCOM_USB_HS_28NM=m CONFIG_PHY_QCOM_USB_SS=m +CONFIG_PHY_QCOM_M31_USB=m CONFIG_PHY_R8A779F0_ETHERNET_SERDES=y CONFIG_PHY_RCAR_GEN3_PCIE=y CONFIG_PHY_RCAR_GEN3_USB2=y