From patchwork Wed Jun 7 06:24:37 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: =?utf-8?b?U3RhbmxleSBDaGFuZ1vmmIzogrLlvrdd?= X-Patchwork-Id: 104265 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a59:994d:0:b0:3d9:f83d:47d9 with SMTP id k13csp46089vqr; Tue, 6 Jun 2023 23:28:10 -0700 (PDT) X-Google-Smtp-Source: ACHHUZ6de/sSI33INDK8GJH8Hszth5aMQAo9ldljNUD2A6ufX27Cs6e/BkAn6q2S+Mj3HJq7OPAd X-Received: by 2002:a92:cd03:0:b0:33b:edab:e701 with SMTP id z3-20020a92cd03000000b0033bedabe701mr6832157iln.4.1686119289825; Tue, 06 Jun 2023 23:28:09 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1686119289; cv=none; d=google.com; s=arc-20160816; b=DycRyFOgVEkxacL7HGy3oDiPV7RS0N8nF7SRmEkoW/UrjKdAt96uYl0mIujguMbgb4 c1P5JVt2DwuxY922hedNZNXERLeDEjs2+Pr1p6FRnrny61xqnSqoawMsnajQt0X81diK Hk31SRXvJebHLZhxZl9MiGHEpTeUt0SP4XdUMU0wUmhpCmilxKIAFd+7WvTbht0MFnOR WXJ9aPEsrexXG7rqQMlWJu6JQo3UfOpsy3C2BSKFda4Hv6dT2UZvRFjCFgDHW91ebH5Z /mcDjtwNaSZjDJ+epGyeNGitlMs/vhrdZ0vG5dD6oH6GXIzvR2QxceXIHylATusT5Rbf 2RXg== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:content-transfer-encoding:mime-version :message-id:date:subject:cc:to:from:authenticated-by; bh=NX43r89Id5D14lAzUiB89YzH3CinROnpX809riC5nBw=; b=B/A3D46gUr/vUPsKhSGyNa2xwq8eV8YyIFG1QyrzsZlkyCJu9zIZizNDDDcgaXDqg9 14bKDlEJf+NOhBvqoSqccPvA5eTnxzlXfy1kmgen6u+jELaWJKIbrPff6FjTwv62rrQI 3LsuundqgbeMJIuYTjaOYxbncU8fY5LP+7p83D/YVUQOEoNM+3/6qnZaJuYIfgEe8y22 WpCzg6mjMDt186nie0kATYXgkkB6AhUUnXTtrVh9vPn/NjiwFp5rDR5i3/E5tPh7zGvu xbhoqzZqJk1005Oh8O1eY4rzDDPYhDoIcPanmhdsl3J8NBujX0CEPzLQaleS5iL9UyaN GVEw== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: from out1.vger.email (out1.vger.email. [2620:137:e000::1:20]) by mx.google.com with ESMTP id l65-20020a639144000000b00543ed947530si2553497pge.487.2023.06.06.23.27.57; Tue, 06 Jun 2023 23:28:09 -0700 (PDT) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) client-ip=2620:137:e000::1:20; Authentication-Results: mx.google.com; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S234165AbjFGG0e (ORCPT + 99 others); Wed, 7 Jun 2023 02:26:34 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:50548 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S232580AbjFGG03 (ORCPT ); Wed, 7 Jun 2023 02:26:29 -0400 Received: from rtits2.realtek.com.tw (rtits2.realtek.com [211.75.126.72]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 41E891723; Tue, 6 Jun 2023 23:26:25 -0700 (PDT) Authenticated-By: X-SpamFilter-By: ArmorX SpamTrap 5.77 with qID 3576OkheE023930, This message is accepted by code: ctloc85258 Received: from mail.realtek.com (rtexh36505.realtek.com.tw[172.21.6.25]) by rtits2.realtek.com.tw (8.15.2/2.81/5.90) with ESMTPS id 3576OkheE023930 (version=TLSv1.2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128 verify=OK); Wed, 7 Jun 2023 14:24:46 +0800 Received: from RTEXMBS05.realtek.com.tw (172.21.6.98) by RTEXH36505.realtek.com.tw (172.21.6.25) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.2375.32; Wed, 7 Jun 2023 14:25:02 +0800 Received: from RTEXH36505.realtek.com.tw (172.21.6.25) by RTEXMBS05.realtek.com.tw (172.21.6.98) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.2375.34; Wed, 7 Jun 2023 14:25:00 +0800 Received: from localhost.localdomain (172.21.252.101) by RTEXH36505.realtek.com.tw (172.21.6.25) with Microsoft SMTP Server id 15.1.2375.32 via Frontend Transport; Wed, 7 Jun 2023 14:25:00 +0800 From: Stanley Chang To: Greg Kroah-Hartman CC: Stanley Chang , Vinod Koul , Kishon Vijay Abraham I , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Alan Stern , "Matthias Kaehlcke" , Mathias Nyman , Ray Chi , Flavio Suligoi , "Michael Grzeschik" , , , , Subject: [PATCH v3 1/5] usb: phy: add usb phy notify port status API Date: Wed, 7 Jun 2023 14:24:37 +0800 Message-ID: <20230607062500.24669-1-stanley_chang@realtek.com> X-Mailer: git-send-email 2.40.1 MIME-Version: 1.0 X-KSE-ServerInfo: RTEXMBS05.realtek.com.tw, 9 X-KSE-AntiSpam-Interceptor-Info: fallback X-KSE-Antivirus-Interceptor-Info: fallback X-KSE-AntiSpam-Interceptor-Info: fallback X-KSE-ServerInfo: RTEXH36505.realtek.com.tw, 9 X-KSE-AntiSpam-Interceptor-Info: fallback X-KSE-Antivirus-Interceptor-Info: fallback X-KSE-AntiSpam-Interceptor-Info: fallback X-Spam-Status: No, score=-1.9 required=5.0 tests=BAYES_00,SPF_HELO_NONE, SPF_PASS,T_SCC_BODY_TEXT_LINE autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-getmail-retrieved-from-mailbox: =?utf-8?q?INBOX?= X-GMAIL-THRID: =?utf-8?q?1768024220418042526?= X-GMAIL-MSGID: =?utf-8?q?1768024220418042526?= In Realtek SoC, the parameter of usb phy is designed to can dynamic tuning base on port status. Therefore, add a notify callback of phy driver when usb port status change. The Realtek phy driver is designed to dynamically adjust disconnection level and calibrate phy parameters. When the device connected bit changes and when the disconnected bit changes, do port status change notification: Check if portstatus is USB_PORT_STAT_CONNECTION and portchange is USB_PORT_STAT_C_CONNECTION. 1. The device is connected, the driver lowers the disconnection level and calibrates the phy parameters. 2. The device disconnects, the driver increases the disconnect level and calibrates the phy parameters. When controller to notify connect that device is already ready. If we adjust the disconnection level in notify_connect, the disconnect may have been triggered at this stage. So we need to change that as early as possible. Therefore, we add an api to notify phy the port status changes. Signed-off-by: Stanley Chang --- v2 to v3 change: Add more comments about the reason for adding this api v1 to v2 change: No change --- drivers/usb/core/hub.c | 13 +++++++++++++ include/linux/usb/phy.h | 14 ++++++++++++++ 2 files changed, 27 insertions(+) diff --git a/drivers/usb/core/hub.c b/drivers/usb/core/hub.c index 97a0f8faea6e..b4fbbeae1927 100644 --- a/drivers/usb/core/hub.c +++ b/drivers/usb/core/hub.c @@ -614,6 +614,19 @@ static int hub_ext_port_status(struct usb_hub *hub, int port1, int type, ret = 0; } mutex_unlock(&hub->status_mutex); + + if (!ret) { + struct usb_device *hdev = hub->hdev; + + if (hdev && !hdev->parent) { + struct usb_hcd *hcd = bus_to_hcd(hdev->bus); + + if (hcd->usb_phy) + usb_phy_notify_port_status(hcd->usb_phy, + port1 - 1, *status, *change); + } + } + return ret; } diff --git a/include/linux/usb/phy.h b/include/linux/usb/phy.h index e4de6bc1f69b..53bf3540098f 100644 --- a/include/linux/usb/phy.h +++ b/include/linux/usb/phy.h @@ -144,6 +144,10 @@ struct usb_phy { */ int (*set_wakeup)(struct usb_phy *x, bool enabled); + /* notify phy port status change */ + int (*notify_port_status)(struct usb_phy *x, + int port, u16 portstatus, u16 portchange); + /* notify phy connect status change */ int (*notify_connect)(struct usb_phy *x, enum usb_device_speed speed); @@ -316,6 +320,16 @@ usb_phy_set_wakeup(struct usb_phy *x, bool enabled) return 0; } +static inline int +usb_phy_notify_port_status(struct usb_phy *x, int port, u16 portstatus, + u16 portchange) +{ + if (x && x->notify_port_status) + return x->notify_port_status(x, port, portstatus, portchange); + else + return 0; +} + static inline int usb_phy_notify_connect(struct usb_phy *x, enum usb_device_speed speed) { From patchwork Wed Jun 7 06:24:38 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: =?utf-8?b?U3RhbmxleSBDaGFuZ1vmmIzogrLlvrdd?= X-Patchwork-Id: 104269 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a59:994d:0:b0:3d9:f83d:47d9 with SMTP id k13csp48128vqr; Tue, 6 Jun 2023 23:33:06 -0700 (PDT) X-Google-Smtp-Source: ACHHUZ5GpIUDTov07qW3uOZBKZ4COVshj5Cy3cECz+z+qovD+uTNCgu8A11vtxK1zLMD4sWVkRZX X-Received: by 2002:a05:6a00:10cf:b0:64f:4019:ec5b with SMTP id d15-20020a056a0010cf00b0064f4019ec5bmr2284219pfu.7.1686119586563; Tue, 06 Jun 2023 23:33:06 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1686119586; cv=none; d=google.com; s=arc-20160816; b=ZNoxJ9JoKM5DgCeNV4OB2Nm5fGCJpgsqbIMMYpx7PTaVM6L5T+hQorbIZbOZq/997o MXl9CaoAZ3UmL/z2dNQMJZ8soojzw/OWGEqYo7VFEV+P0SNbShAAHq/KJinjFutup8hz UaNojdEPsgLDJbRNmemGHjZPxF/2dq6132Rc+iZe64EDOG8y/m+qiZ3l2oh8rJcLdXL4 cHfkgKDlYGOZt13F3IkrqeH/wM4ezS7JbK8S9TI5xRXarmMFrWd+Q0UP7IjI4uVGEGRr uVlMAuJ/kNNsyKeacscF6QjlOF+T5A973Os4UUE8xSZrlm6ewdiPy+T0S+9VduOTAS5R 7C+w== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from :authenticated-by; bh=q7ZNahDhZjYvYZHtKemMH/h339GY1vvjXQe7FwnvExs=; b=l9ieIyAOMkCaKNcQR24yHFu0Z+U0ebY6IlfLnFhq4XvaYUaC3eTJkd280VluIjaadV QN1Yu+72ZJHzJia5SHe/B2wnkvzXHPQ0abI5VHf+JRUxSHKlbX5hCU2d3uCK0PAzYhFg r/K5U1pmnxaQCELxFTvIOxnXbL0QSLmw9kdrb8zmzYMh18kgc0DYQ4YYpVMauP4iBnvJ 2VHYE+Yjr/gSLc31M1tTs4xEvTWTby5zc/Rgh/4LcSlcyU0uudmMT3uAu065Ka3xryI2 ZFL7iUMrr+LQOWx25GmsNvJux+YVPOlxDkQOR6vYSgj1fwlFZiSMCFux2EmDj5X8hhkF iZdQ== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: from out1.vger.email (out1.vger.email. [2620:137:e000::1:20]) by mx.google.com with ESMTP id w125-20020a626283000000b00662186eb4eesi384743pfb.273.2023.06.06.23.32.53; Tue, 06 Jun 2023 23:33:06 -0700 (PDT) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) client-ip=2620:137:e000::1:20; Authentication-Results: mx.google.com; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S235167AbjFGG0m (ORCPT + 99 others); Wed, 7 Jun 2023 02:26:42 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:50560 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S234924AbjFGG0b (ORCPT ); Wed, 7 Jun 2023 02:26:31 -0400 Received: from rtits2.realtek.com.tw (rtits2.realtek.com [211.75.126.72]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 42908172B; Tue, 6 Jun 2023 23:26:25 -0700 (PDT) Authenticated-By: X-SpamFilter-By: ArmorX SpamTrap 5.77 with qID 3576OwrW6024091, This message is accepted by code: ctloc85258 Received: from mail.realtek.com (rtexh36506.realtek.com.tw[172.21.6.27]) by rtits2.realtek.com.tw (8.15.2/2.81/5.90) with ESMTPS id 3576OwrW6024091 (version=TLSv1.2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128 verify=OK); Wed, 7 Jun 2023 14:24:58 +0800 Received: from RTEXMBS01.realtek.com.tw (172.21.6.94) by RTEXH36506.realtek.com.tw (172.21.6.27) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.2507.17; Wed, 7 Jun 2023 14:25:14 +0800 Received: from RTEXH36505.realtek.com.tw (172.21.6.25) by RTEXMBS01.realtek.com.tw (172.21.6.94) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.2375.7; Wed, 7 Jun 2023 14:25:12 +0800 Received: from localhost.localdomain (172.21.252.101) by RTEXH36505.realtek.com.tw (172.21.6.25) with Microsoft SMTP Server id 15.1.2375.32 via Frontend Transport; Wed, 7 Jun 2023 14:25:12 +0800 From: Stanley Chang To: Greg Kroah-Hartman CC: Stanley Chang , Vinod Koul , Kishon Vijay Abraham I , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Alan Stern , "Michael Grzeschik" , Mathias Nyman , Bagas Sanjaya , Matthias Kaehlcke , Ray Chi , "Flavio Suligoi" , , , , Subject: [PATCH v3 2/5] phy: realtek: usb: Add driver for the Realtek SoC USB 2.0 PHY Date: Wed, 7 Jun 2023 14:24:38 +0800 Message-ID: <20230607062500.24669-2-stanley_chang@realtek.com> X-Mailer: git-send-email 2.40.1 In-Reply-To: <20230607062500.24669-1-stanley_chang@realtek.com> References: <20230607062500.24669-1-stanley_chang@realtek.com> MIME-Version: 1.0 X-KSE-ServerInfo: RTEXMBS01.realtek.com.tw, 9 X-KSE-AntiSpam-Interceptor-Info: fallback X-KSE-Antivirus-Interceptor-Info: fallback X-KSE-AntiSpam-Interceptor-Info: fallback X-Spam-Status: No, score=-1.9 required=5.0 tests=BAYES_00,SPF_HELO_NONE, SPF_PASS,T_SCC_BODY_TEXT_LINE autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-getmail-retrieved-from-mailbox: =?utf-8?q?INBOX?= X-GMAIL-THRID: =?utf-8?q?1768024531549786325?= X-GMAIL-MSGID: =?utf-8?q?1768024531549786325?= Realtek DHC (digital home center) RTD SoCs support DWC3 XHCI USB controller. Added the driver to drive the USB 2.0 PHY transceivers. Signed-off-by: Stanley Chang --- v2 to v3 change: 1. Broken down into two patches, one for each of USB 2 & 3 PHY. 2. Removed parameter v1 support for simplification. 3. Use remove_new for driver remove callback. v1 to v2 change: 1. Move the drivers to drivers/phy/ for generic phy driver 2. Use the generic phy driver api to initialize phy 3. Use readl/writel to instead phy_read/phy_write directly. 4. Use read_poll_timeout() in function utmi_wait_register. 5. Revised some coding styles. 6. fix the compiler warning for kernel test robot. --- drivers/phy/Kconfig | 1 + drivers/phy/Makefile | 1 + drivers/phy/realtek/Kconfig | 13 + drivers/phy/realtek/Makefile | 2 + drivers/phy/realtek/phy-rtk-usb2.c | 1914 ++++++++++++++++++++++++++++ 5 files changed, 1931 insertions(+) create mode 100644 drivers/phy/realtek/Kconfig create mode 100644 drivers/phy/realtek/Makefile create mode 100644 drivers/phy/realtek/phy-rtk-usb2.c diff --git a/drivers/phy/Kconfig b/drivers/phy/Kconfig index f46e3148d286..6d04a0029c6c 100644 --- a/drivers/phy/Kconfig +++ b/drivers/phy/Kconfig @@ -86,6 +86,7 @@ source "drivers/phy/motorola/Kconfig" source "drivers/phy/mscc/Kconfig" source "drivers/phy/qualcomm/Kconfig" source "drivers/phy/ralink/Kconfig" +source "drivers/phy/realtek/Kconfig" source "drivers/phy/renesas/Kconfig" source "drivers/phy/rockchip/Kconfig" source "drivers/phy/samsung/Kconfig" diff --git a/drivers/phy/Makefile b/drivers/phy/Makefile index 54f312c10a40..ba7c100b14fc 100644 --- a/drivers/phy/Makefile +++ b/drivers/phy/Makefile @@ -26,6 +26,7 @@ obj-y += allwinner/ \ mscc/ \ qualcomm/ \ ralink/ \ + realtek/ \ renesas/ \ rockchip/ \ samsung/ \ diff --git a/drivers/phy/realtek/Kconfig b/drivers/phy/realtek/Kconfig new file mode 100644 index 000000000000..76e31f6abdee --- /dev/null +++ b/drivers/phy/realtek/Kconfig @@ -0,0 +1,13 @@ +# SPDX-License-Identifier: GPL-2.0 +# +# Phy drivers for Realtek platforms +# +config PHY_RTK_RTD_USB2PHY + tristate "Realtek RTD USB2 PHY Transceiver Driver" + select GENERIC_PHY + select USB_PHY + help + Enable this to support Realtek SoC USB2 phy transceiver. + The DHC (digital home center) RTD series SoCs used the Synopsys + DWC3 USB IP. This driver will do the PHY initialization + of the parameters. diff --git a/drivers/phy/realtek/Makefile b/drivers/phy/realtek/Makefile new file mode 100644 index 000000000000..cf5d440841a2 --- /dev/null +++ b/drivers/phy/realtek/Makefile @@ -0,0 +1,2 @@ +# SPDX-License-Identifier: GPL-2.0 +obj-$(CONFIG_PHY_RTK_RTD_USB2PHY) += phy-rtk-usb2.o diff --git a/drivers/phy/realtek/phy-rtk-usb2.c b/drivers/phy/realtek/phy-rtk-usb2.c new file mode 100644 index 000000000000..0538424b9cab --- /dev/null +++ b/drivers/phy/realtek/phy-rtk-usb2.c @@ -0,0 +1,1914 @@ +// SPDX-License-Identifier: GPL-2.0 +/* + * phy-rtk-usb2.c RTK usb2.0 PHY driver + * + * Copyright (C) 2023 Realtek Semiconductor Corporation + * + */ + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +/* GUSB2PHYACCn register */ +#define PHY_NEW_REG_REQ BIT(25) +#define PHY_VSTS_BUSY BIT(23) +#define PHY_VCTRL_SHIFT 8 +#define PHY_REG_DATA_MASK 0xff + +#define GET_LOW_NIBBLE(addr) (addr & 0x0f) +#define GET_HIGH_NIBBLE(addr) ((addr & 0xf0)>>4) + +#define EFUS_USB_DC_CAL_RATE 2 +#define EFUS_USB_DC_CAL_MAX 7 + +#define EFUS_USB_DC_DIS_RATE 1 +#define EFUS_USB_DC_DIS_MAX 7 + +#define MAX_PHY_DATA_SIZE 20 +#define OFFEST_PHY_READ 0x20 + +#define MAX_USB_PHY_NUM_PORTS 4 +#define MAX_USB_PHY_PAGE0_DATA_SIZE 16 +#define MAX_USB_PHY_PAGE1_DATA_SIZE 8 +#define MAX_USB_PHY_PAGE2_DATA_SIZE 8 + +#define SET_PAGE_OFFSET 0xf4 +#define SET_PAGE_0 0x9b +#define SET_PAGE_1 0xbb +#define SET_PAGE_2 0xdb + +#define PAGE_START 0xe0 +#define PAGE0_0xE4 0xe4 +#define PAGE0_0xE7 0xe7 +#define PAGE1_0xE0 0xe0 +#define PAGE1_0xE2 0xe2 + +/* mapping 0xE0 to 0 ... 0xE7 to 7, 0xF0 to 8 ,,, 0xF7 to 15 */ +#define PAGE_ADDR_MAP_ARRAY_INDEX(addr) \ + (((addr - PAGE_START)&0x7) + \ + (((addr - PAGE_START)&0x10)>>1)) +#define ARRAY_INDEX_MAP_PAGE_ADDR(index) \ + (((index + PAGE_START)&0x7) + \ + (((index&0x8)<<1) + PAGE_START)) + +struct reg_addr { + void __iomem *reg_wrap_vstatus; + void __iomem *reg_gusb2phyacc0; + int vstatus_index; +}; + +struct phy_parameter { + u8 addr; + u8 data; +}; + +struct phy_data { + int page0_size; + struct phy_parameter *page0; + int page1_size; + struct phy_parameter *page1; + int page2_size; + struct phy_parameter *page2; + + bool check_efuse; + int check_efuse_version; +#define CHECK_EFUSE_V1 1 +#define CHECK_EFUSE_V2 2 + int8_t efuse_usb_dc_cal; + int efuse_usb_dc_cal_rate; + int usb_dc_cal_mask; + int8_t efuse_usb_dc_dis; + int efuse_usb_dc_dis_rate; + int usb_dc_dis_mask; + bool usb_dc_dis_at_page0; + bool do_toggle; + bool do_toggle_driving; + int disconnect_driving_updated; + bool use_default_parameter; + bool is_double_sensitivity_mode; + bool ldo_force_enable; + bool ldo_enable; + s32 ldo_driving_compensate; + s32 driving_compensate; +}; + +struct rtk_usb_phy { + struct usb_phy phy; + struct device *dev; + struct regmap *usb_ctrl_regs; + + int phyN; + void *reg_addr; + void *phy_data; + + struct dentry *debug_dir; +}; + +#define PHY_IO_TIMEOUT_USEC (50000) +#define PHY_IO_DELAY_US (100) + +static inline int utmi_wait_register(void __iomem *reg, u32 mask, u32 result) +{ + int ret; + unsigned int val; + + ret = read_poll_timeout(readl, val, ((val & mask) == result), + PHY_IO_DELAY_US, PHY_IO_TIMEOUT_USEC, false, reg); + if (ret) { + pr_err("%s can't program USB phy\n", __func__); + return -ETIMEDOUT; + } + + return 0; +} + +static char rtk_usb_phy_read(struct reg_addr *regAddr, char addr) +{ + void __iomem *reg_gusb2phyacc0 = regAddr->reg_gusb2phyacc0; + unsigned int regVal; + int ret = 0; + + addr -= OFFEST_PHY_READ; + + /* polling until VBusy == 0 */ + ret = utmi_wait_register(reg_gusb2phyacc0, PHY_VSTS_BUSY, 0); + if (ret) + return (char)ret; + + /* VCtrl = low nibble of addr, and set PHY_NEW_REG_REQ */ + regVal = PHY_NEW_REG_REQ | (GET_LOW_NIBBLE(addr) << PHY_VCTRL_SHIFT); + writel(regVal, reg_gusb2phyacc0); + ret = utmi_wait_register(reg_gusb2phyacc0, PHY_VSTS_BUSY, 0); + if (ret) + return (char)ret; + + /* VCtrl = high nibble of addr, and set PHY_NEW_REG_REQ */ + regVal = PHY_NEW_REG_REQ | (GET_HIGH_NIBBLE(addr) << PHY_VCTRL_SHIFT); + writel(regVal, reg_gusb2phyacc0); + ret = utmi_wait_register(reg_gusb2phyacc0, PHY_VSTS_BUSY, 0); + if (ret) + return (char)ret; + + regVal = readl(reg_gusb2phyacc0); + + return (char) (regVal & PHY_REG_DATA_MASK); +} + +static int rtk_usb_phy_write(struct reg_addr *regAddr, char addr, char data) +{ + unsigned int regVal; + void __iomem *reg_wrap_vstatus = regAddr->reg_wrap_vstatus; + void __iomem *reg_gusb2phyacc0 = regAddr->reg_gusb2phyacc0; + int shift_bits = regAddr->vstatus_index * 8; + int ret = 0; + + /* write data to VStatusOut2 (data output to phy) */ + writel((u32)data<usb_ctrl_regs) { + dev_info(rtk_phy->dev, "%s No usb_ctrl_regs can't set USB_CTRL\n", + __func__); + return use_ldo; + } + + if (regmap_read(rtk_phy->usb_ctrl_regs, USB_CTRL, &val)) { + dev_err(rtk_phy->dev, "%s Get USB_CTRL fail\n", __func__); + return use_ldo; + } + + if ((val & ISO_USB_U2PHY_REG_LDO_PW) == ISO_USB_U2PHY_REG_LDO_PW) { + dev_info(rtk_phy->dev, "%s phy use ldo power! (USB_CTRL val=0x%x)\n", + __func__, val); + use_ldo = 1; + goto out; + } + + if (phy_data->ldo_force_enable) { + regmap_update_bits(rtk_phy->usb_ctrl_regs, USB_CTRL, + (unsigned int)ISO_USB_U2PHY_REG_LDO_PW, + (unsigned int)ISO_USB_U2PHY_REG_LDO_PW); + use_ldo = 1; + + dev_info(rtk_phy->dev, "%s phy %s then turn on ldo! USB_CTRL val=0x%x\n", + __func__, + phy_data->ldo_force_enable ? + "ldo_force_enable":"no power", + val); + } + +out: + return use_ldo; +} + +static u8 __updated_page0_0xe4_parameter(struct phy_data *phy_data, u8 data) +{ + u8 val; + s32 __val; + s32 driving_compensate = 0; + s32 usb_dc_cal_mask = phy_data->usb_dc_cal_mask; + + if (phy_data->check_efuse_version == CHECK_EFUSE_V1) { + if (phy_data->ldo_enable) + driving_compensate = phy_data->ldo_driving_compensate; + + __val = (s32)(data & usb_dc_cal_mask) + driving_compensate + + phy_data->efuse_usb_dc_cal; + } else { /* for CHECK_EFUSE_V2 or no efuse */ + driving_compensate = phy_data->driving_compensate; + + if (phy_data->efuse_usb_dc_cal) + __val = (s32)((phy_data->efuse_usb_dc_cal & usb_dc_cal_mask) + + driving_compensate); + else + __val = (s32)(data & usb_dc_cal_mask); + } + + if (__val > usb_dc_cal_mask) + __val = usb_dc_cal_mask; + else if (__val < 0) + __val = 0; + + val = (data & (~usb_dc_cal_mask)) | (__val & usb_dc_cal_mask); + + return val; +} + +static u8 __updated_dc_disconnect_level_page0_0xe4(struct phy_data *phy_data, + u8 data) +{ + u8 val; + s32 __val; + s32 usb_dc_dis_mask = phy_data->usb_dc_dis_mask; + int offset = 4; + + __val = (s32)((data >> offset) & usb_dc_dis_mask) + + phy_data->efuse_usb_dc_dis; + + if (__val > usb_dc_dis_mask) + __val = usb_dc_dis_mask; + else if (__val < 0) + __val = 0; + + val = (data & (~(usb_dc_dis_mask << offset))) | + (__val & usb_dc_dis_mask) << offset; + + return val; +} + +/* updated disconnect level at page0 0xe4 */ +static void update_dc_disconnect_level_at_page0(struct rtk_usb_phy *rtk_phy, + struct reg_addr *regAddr, + struct phy_data *phy_data, bool isUpdate) +{ + struct phy_parameter *phy_parameter_page; + int i; + + /* Set page 0 */ + phy_parameter_page = phy_data->page0; + rtk_usb_phy_set_page(regAddr, 0); + + i = PAGE_ADDR_MAP_ARRAY_INDEX(PAGE0_0xE4); + if (i < phy_data->page0_size) { + struct phy_parameter *phy_parameter = phy_parameter_page + i; + u8 addr = phy_parameter->addr; + u8 data = phy_parameter->data; + u8 __data; + int offset = 4; + s32 usb_dc_dis_mask = phy_data->usb_dc_dis_mask; + + __data = rtk_usb_phy_read(regAddr, addr); + + /* keep default dc dis and real dc cal */ + data = (data & ((usb_dc_dis_mask << offset))) | + (__data & (~(usb_dc_dis_mask << offset))); + + if (isUpdate) + data = __updated_dc_disconnect_level_page0_0xe4(phy_data, data); + + if (rtk_usb_phy_write(regAddr, addr, data)) { + dev_err(rtk_phy->dev, + "[%s:%d] Error page1 addr=0x%x value=0x%x\n", + __func__, __LINE__, + addr, data); + return; + } + + dev_info(rtk_phy->dev, + "%s to set Page0 0xE4=%x for dc disconnect level (%s)\n", + __func__, + rtk_usb_phy_read(regAddr, addr), + isUpdate?"Update":"restore"); + } else { + dev_err(rtk_phy->dev, + "ERROR: %s %d index=%d addr Not PAGE0_0xE4\n", + __func__, __LINE__, i); + } +} + +static u8 __updated_dc_disconnect_level_page1_0xe2(struct phy_data *phy_data, + u8 data) +{ + u8 val; + s32 __val; + s32 usb_dc_dis_mask = phy_data->usb_dc_dis_mask; + + if (phy_data->check_efuse_version == CHECK_EFUSE_V1) { + __val = (s32)(data & usb_dc_dis_mask) + + phy_data->efuse_usb_dc_dis; + } else { /* for CHECK_EFUSE_V2 or no efuse */ + if (phy_data->efuse_usb_dc_dis) + __val = (s32)(phy_data->efuse_usb_dc_dis & usb_dc_dis_mask); + else + __val = (s32)(data & usb_dc_dis_mask); + } + + if (__val > usb_dc_dis_mask) + __val = usb_dc_dis_mask; + else if (__val < 0) + __val = 0; + + val = (data & (~usb_dc_dis_mask)) | (__val & usb_dc_dis_mask); + + return val; +} + +/* updated disconnect level at page1 0xe2 */ +static void update_dc_disconnect_level_at_page1(struct rtk_usb_phy *rtk_phy, + struct reg_addr *regAddr, + struct phy_data *phy_data, bool isUpdate) +{ + struct phy_parameter *phy_parameter_page; + int i; + + /* Set page 1 */ + phy_parameter_page = phy_data->page1; + rtk_usb_phy_set_page(regAddr, 1); + + i = PAGE_ADDR_MAP_ARRAY_INDEX(PAGE1_0xE2); + if (i < phy_data->page1_size) { + struct phy_parameter *phy_parameter = phy_parameter_page + i; + u8 addr = phy_parameter->addr; + u8 data = phy_parameter->data; + u8 __data; + s32 usb_dc_dis_mask = phy_data->usb_dc_dis_mask; + + __data = rtk_usb_phy_read(regAddr, addr); + + data = (data & usb_dc_dis_mask) | (__data & ~(usb_dc_dis_mask)); + + if (isUpdate) + data = __updated_dc_disconnect_level_page1_0xe2(phy_data, data); + + if (rtk_usb_phy_write(regAddr, addr, data)) { + dev_err(rtk_phy->dev, + "[%s:%d] Error page1 addr=0x%x value=0x%x\n", + __func__, __LINE__, + addr, data); + return; + } + + dev_info(rtk_phy->dev, + "%s to set Page1 0xE2=%x for dc disconnect level (%s)\n", + __func__, + rtk_usb_phy_read(regAddr, addr), + isUpdate?"Update":"restore"); + } else { + dev_err(rtk_phy->dev, + "ERROR: %s %d index=%d addr Not PAGE1_0xE2\n", + __func__, __LINE__, i); + } +} + +static void update_dc_disconnect_level(struct rtk_usb_phy *rtk_phy, + struct reg_addr *regAddr, + struct phy_data *phy_data, bool isUpdate) +{ + if (phy_data->usb_dc_dis_at_page0) + update_dc_disconnect_level_at_page0( + rtk_phy, regAddr, phy_data, isUpdate); + else + update_dc_disconnect_level_at_page1( + rtk_phy, regAddr, phy_data, isUpdate); +} + +static void do_rtk_usb_phy_toggle(struct rtk_usb_phy *rtk_phy, + int index, bool isConnect) +{ + struct reg_addr *regAddr; + struct phy_data *phy_data; + struct phy_parameter *phy_parameter_page; + int i; + + regAddr = &((struct reg_addr *)rtk_phy->reg_addr)[index]; + phy_data = &((struct phy_data *)rtk_phy->phy_data)[index]; + + if (!phy_data->do_toggle) + goto out; + + if (phy_data->is_double_sensitivity_mode) + goto do_toggle_driving; + + /* Set page 0 */ + phy_parameter_page = phy_data->page0; + rtk_usb_phy_set_page(regAddr, 0); + + i = PAGE_ADDR_MAP_ARRAY_INDEX(PAGE0_0xE7); + if (i < phy_data->page0_size) { + struct phy_parameter *phy_parameter = phy_parameter_page + i; + u8 addr = phy_parameter->addr; + u8 data = phy_parameter->data; + + if (isConnect) { + rtk_usb_phy_write(regAddr, addr, data & + (~(BIT(4) | BIT(5) | BIT(6)))); + } else { + rtk_usb_phy_write(regAddr, addr, data | + (BIT(4) | BIT(5) | BIT(6))); + } + dev_info(rtk_phy->dev, + "%s %sconnect to set Page0 0xE7=%x\n", + __func__, + isConnect?"":"dis", + rtk_usb_phy_read(regAddr, addr)); + } else { + dev_err(rtk_phy->dev, + "ERROR: %s %d index=%d addr Not PAGE0_0xE7\n", + __func__, __LINE__, i); + } + +do_toggle_driving: + + if (!phy_data->do_toggle_driving) + goto do_toggle; + + /* Page 0 addr 0xE4 driving capability */ + + /* Set page 0 */ + phy_parameter_page = phy_data->page0; + rtk_usb_phy_set_page(regAddr, 0); + + i = PAGE_ADDR_MAP_ARRAY_INDEX(PAGE0_0xE4); + if (i < phy_data->page0_size) { + struct phy_parameter *phy_parameter = phy_parameter_page + i; + u8 addr = phy_parameter->addr; + u8 data = phy_parameter->data; + + data = __updated_page0_0xe4_parameter(phy_data, data); + + if (isConnect) { + rtk_usb_phy_write(regAddr, addr, data); + } else { + u8 val; + s32 __val; + s32 driving_updated = + phy_data->disconnect_driving_updated; + s32 usb_dc_cal_mask = phy_data->usb_dc_cal_mask; + + __val = (s32)(data & usb_dc_cal_mask) + driving_updated; + + if (__val > usb_dc_cal_mask) + __val = usb_dc_cal_mask; + else if (__val < 0) + __val = 0; + + val = (data & (~usb_dc_cal_mask)) | (__val & usb_dc_cal_mask); + + rtk_usb_phy_write(regAddr, addr, val); + } + dev_info(rtk_phy->dev, + "%s %sconnect to set Page0 0xE4=%x for driving\n", + __func__, + isConnect?"":"dis", + rtk_usb_phy_read(regAddr, addr)); + } else { + dev_err(rtk_phy->dev, + "ERROR: %s %d index=%d addr Not PAGE0_0xE4\n", + __func__, __LINE__, i); + } + +do_toggle: + /* restore dc disconnect level before toggle */ + update_dc_disconnect_level(rtk_phy, regAddr, phy_data, false); + + /* Set page 1 */ + phy_parameter_page = phy_data->page1; + rtk_usb_phy_set_page(regAddr, 1); + + i = PAGE_ADDR_MAP_ARRAY_INDEX(PAGE1_0xE0); + if (i < phy_data->page1_size) { + struct phy_parameter *phy_parameter = phy_parameter_page + i; + u8 addr = phy_parameter->addr; + u8 data = phy_parameter->data; + + dev_info(rtk_phy->dev, + "%s ########## to toggle PAGE1_0xE0 BIT(2)\n", + __func__); + rtk_usb_phy_write(regAddr, addr, data & (~BIT(2))); + mdelay(1); + rtk_usb_phy_write(regAddr, addr, data | (BIT(2))); + } else { + dev_err(rtk_phy->dev, + "ERROR: %s %d index=%d addr Not PAGE1_0xE0\n", + __func__, __LINE__, i); + } + + /* update dc disconnect level after toggle */ + update_dc_disconnect_level(rtk_phy, regAddr, phy_data, true); + +out: + return; +} + +/* Get default phy parameter for update */ +static int __get_default_phy_parameter_for_updated( + struct rtk_usb_phy *rtk_phy, int index) +{ + int i; + struct reg_addr *regAddr; + struct phy_data *phy_data; + struct phy_parameter *phy_parameter_page; + + regAddr = &((struct reg_addr *)rtk_phy->reg_addr)[index]; + phy_data = &((struct phy_data *)rtk_phy->phy_data)[index]; + + phy_parameter_page = phy_data->page0; + rtk_usb_phy_set_page(regAddr, 0); + + /* Get PAGE0_0xE4 default value */ + i = PAGE_ADDR_MAP_ARRAY_INDEX(PAGE0_0xE4); + if (i < phy_data->page0_size) { + struct phy_parameter *phy_parameter = phy_parameter_page + i; + u8 addr = phy_parameter->addr; + u8 data = phy_parameter->data; + + if (!addr) { + addr = ARRAY_INDEX_MAP_PAGE_ADDR(i); + data = rtk_usb_phy_read(regAddr, addr); + + phy_parameter->addr = addr; + phy_parameter->data = data; + dev_dbg(rtk_phy->dev, + "Get default addr %x value %x\n", + phy_parameter->addr, + phy_parameter->data); + } + } + + /* Get PAGE0_0xE7 default value */ + i = PAGE_ADDR_MAP_ARRAY_INDEX(PAGE0_0xE7); + if (i < phy_data->page0_size) { + struct phy_parameter *phy_parameter = phy_parameter_page + i; + u8 addr = phy_parameter->addr; + u8 data = phy_parameter->data; + + if (!addr) { + addr = ARRAY_INDEX_MAP_PAGE_ADDR(i); + data = rtk_usb_phy_read(regAddr, addr); + + phy_parameter->addr = addr; + phy_parameter->data = data; + dev_dbg(rtk_phy->dev, + "Get default addr %x value %x\n", + phy_parameter->addr, + phy_parameter->data); + } + } + + phy_parameter_page = phy_data->page1; + rtk_usb_phy_set_page(regAddr, 1); + + /* Get PAGE1_0xE0 default value */ + i = PAGE_ADDR_MAP_ARRAY_INDEX(PAGE1_0xE0); + if (i < phy_data->page1_size) { + struct phy_parameter *phy_parameter = phy_parameter_page + i; + u8 addr = phy_parameter->addr; + u8 data = phy_parameter->data; + + if (!addr) { + addr = ARRAY_INDEX_MAP_PAGE_ADDR(i); + data = rtk_usb_phy_read(regAddr, addr); + + phy_parameter->addr = addr; + phy_parameter->data = data; + dev_dbg(rtk_phy->dev, + "Get default page1 addr %x value %x\n", + phy_parameter->addr, + phy_parameter->data); + } + } + + /* Get PAGE1_0xE2 default value */ + i = PAGE_ADDR_MAP_ARRAY_INDEX(PAGE1_0xE2); + if (i < phy_data->page1_size) { + struct phy_parameter *phy_parameter = phy_parameter_page + i; + u8 addr = phy_parameter->addr; + u8 data = phy_parameter->data; + + if (!addr) { + addr = ARRAY_INDEX_MAP_PAGE_ADDR(i); + data = rtk_usb_phy_read(regAddr, addr); + + phy_parameter->addr = addr; + phy_parameter->data = data; + dev_dbg(rtk_phy->dev, + "Get default page1 addr %x value %x\n", + phy_parameter->addr, + phy_parameter->data); + } + } + + return 0; +} + +static int do_rtk_usb_phy_init(struct rtk_usb_phy *rtk_phy, int index) +{ + struct reg_addr *regAddr; + struct phy_data *phy_data; + struct phy_parameter *phy_parameter_page; + int i; + + dev_dbg(rtk_phy->dev, "%s: init phy#%d\n", __func__, index); + + regAddr = &((struct reg_addr *)rtk_phy->reg_addr)[index]; + phy_data = &((struct phy_data *)rtk_phy->phy_data)[index]; + + if (control_phy_power(rtk_phy, phy_data, regAddr)) { + phy_data->ldo_enable = true; + dev_info(rtk_phy->dev, "%s USB phy use ldo power compensate phy parameter (%d)\n", + __func__, phy_data->ldo_driving_compensate); + } + + __get_default_phy_parameter_for_updated(rtk_phy, index); + + if (phy_data->use_default_parameter) { + dev_info(rtk_phy->dev, "%s phy#%d use default parameter\n", + __func__, index); + goto do_toggle; + } + + /* Set page 0 */ + phy_parameter_page = phy_data->page0; + rtk_usb_phy_set_page(regAddr, 0); + + for (i = 0; i < phy_data->page0_size; i++) { + struct phy_parameter *phy_parameter = phy_parameter_page + i; + u8 addr = phy_parameter->addr; + u8 data = phy_parameter->data; + + if (!addr) + continue; + + if (addr == PAGE0_0xE4) + data = __updated_page0_0xe4_parameter(phy_data, data); + + if (rtk_usb_phy_write(regAddr, addr, data)) { + dev_err(rtk_phy->dev, + "[%s:%d] Error page0 addr=0x%x value=0x%x\n", + __func__, __LINE__, addr, data); + return -EINVAL; + } + dev_dbg(rtk_phy->dev, "[%s:%d] Good page0 addr=0x%x value=0x%x\n", + __func__, __LINE__, addr, + rtk_usb_phy_read(regAddr, addr)); + } + + /* Set page 1 */ + phy_parameter_page = phy_data->page1; + rtk_usb_phy_set_page(regAddr, 1); + + for (i = 0; i < phy_data->page1_size; i++) { + struct phy_parameter *phy_parameter = phy_parameter_page + i; + u8 addr = phy_parameter->addr; + u8 data = phy_parameter->data; + + if (!addr) + continue; + + if (rtk_usb_phy_write(regAddr, addr, data)) { + dev_err(rtk_phy->dev, + "[%s:%d] Error page1 addr=0x%x value=0x%x\n", + __func__, __LINE__, + addr, data); + return -EINVAL; + } + dev_dbg(rtk_phy->dev, "[%s:%d] Good page1 addr=0x%x value=0x%x\n", + __func__, __LINE__, addr, + rtk_usb_phy_read(regAddr, addr)); + } + + if (phy_data->page2_size == 0) + goto do_toggle; + + /* Set page 2 */ + phy_parameter_page = phy_data->page2; + rtk_usb_phy_set_page(regAddr, 2); + + for (i = 0; i < phy_data->page2_size; i++) { + struct phy_parameter *phy_parameter = phy_parameter_page + i; + u8 addr = phy_parameter->addr; + u8 data = phy_parameter->data; + + if (!addr) + continue; + + if (rtk_usb_phy_write(regAddr, addr, data)) { + dev_err(rtk_phy->dev, + "[%s:%d] Error page2 addr=0x%x value=0x%x\n", + __func__, __LINE__, addr, data); + return -1; + } + dev_dbg(rtk_phy->dev, "[%s:%d] Good page2 addr=0x%x value=0x%x\n", + __func__, __LINE__, addr, + rtk_usb_phy_read(regAddr, addr)); + } + +do_toggle: + do_rtk_usb_phy_toggle(rtk_phy, index, false); + + return 0; +} + +static int rtk_usb_phy_init(struct phy *phy) +{ + struct rtk_usb_phy *rtk_phy = phy_get_drvdata(phy); + unsigned long phy_init_time = jiffies; + int i, ret = 0; + + if (!rtk_phy) + return -EINVAL; + + dev_dbg(rtk_phy->dev, "Init RTK USB 2.0 PHY\n"); + for (i = 0; i < rtk_phy->phyN; i++) + ret = do_rtk_usb_phy_init(rtk_phy, i); + + dev_info(rtk_phy->dev, "Initialized RTK USB 2.0 PHY (take %dms)\n", + jiffies_to_msecs(jiffies - phy_init_time)); + return ret; +} + +static int rtk_usb_phy_exit(struct phy *phy) +{ + struct rtk_usb_phy *rtk_phy = phy_get_drvdata(phy); + + if (!rtk_phy) + return -EINVAL; + + dev_info(rtk_phy->dev, "Exit RTK USB 2.0 PHY\n"); + + return 0; +} + +static const struct phy_ops ops = { + .init = rtk_usb_phy_init, + .exit = rtk_usb_phy_exit, + .owner = THIS_MODULE, +}; + +static void rtk_usb_phy_toggle(struct usb_phy *usb2_phy, bool isConnect, int port) +{ + int index = port; + struct rtk_usb_phy *rtk_phy = NULL; + + if (usb2_phy != NULL && usb2_phy->dev != NULL) + rtk_phy = dev_get_drvdata(usb2_phy->dev); + + if (rtk_phy == NULL) { + pr_err("%s %d ERROR! NO this device\n", __func__, __LINE__); + return; + } + if (index > rtk_phy->phyN) { + pr_err("%s %d ERROR! port=%d > phyN=%d\n", + __func__, __LINE__, index, rtk_phy->phyN); + return; + } + + do_rtk_usb_phy_toggle(rtk_phy, index, isConnect); +} + +static int rtk_usb_phy_notify_port_status(struct usb_phy *x, int port, + u16 portstatus, u16 portchange) +{ + bool isConnect = false; + + pr_debug("%s port=%d portstatus=0x%x portchange=0x%x\n", + __func__, port, (int)portstatus, (int)portchange); + if (portstatus & USB_PORT_STAT_CONNECTION) + isConnect = true; + + if (portchange & USB_PORT_STAT_C_CONNECTION) + rtk_usb_phy_toggle(x, isConnect, port); + + return 0; +} + +#ifdef CONFIG_DEBUG_FS +static struct dentry *create_phy_debug_root(void) +{ + struct dentry *phy_debug_root; + + phy_debug_root = debugfs_lookup("phy", usb_debug_root); + if (!phy_debug_root) { + phy_debug_root = debugfs_create_dir("phy", usb_debug_root); + if (!phy_debug_root) + pr_err("%s Error phy_debug_root is NULL\n", __func__); + else + pr_debug("%s Create phy_debug_root folder\n", __func__); + } + + return phy_debug_root; +} + +static int rtk_usb2_parameter_show(struct seq_file *s, void *unused) +{ + struct rtk_usb_phy *rtk_phy = s->private; + int i, index; + + for (index = 0; index < rtk_phy->phyN; index++) { + struct reg_addr *regAddr = + &((struct reg_addr *)rtk_phy->reg_addr)[index]; + struct phy_data *phy_data = + &((struct phy_data *)rtk_phy->phy_data)[index]; + struct phy_parameter *phy_parameter_page; + + seq_printf(s, "PHY %d:\n", index); + + seq_puts(s, "Page 0:\n"); + /* Set page 0 */ + phy_parameter_page = phy_data->page0; + rtk_usb_phy_set_page(regAddr, 0); + + for (i = 0; i < phy_data->page0_size; i++) { + struct phy_parameter *phy_parameter = phy_parameter_page + i; + u8 addr = ARRAY_INDEX_MAP_PAGE_ADDR(i); + u8 data = phy_parameter->data; + u8 value = rtk_usb_phy_read(regAddr, addr); + + if (phy_parameter->addr) + seq_printf(s, "Page 0: addr=0x%x data=0x%02x ==> read value=0x%02x\n", + addr, data, value); + else + seq_printf(s, "Page 0: addr=0x%x data=none ==> read value=0x%02x\n", + addr, value); + } + + seq_puts(s, "Page 1:\n"); + /* Set page 1 */ + phy_parameter_page = phy_data->page1; + rtk_usb_phy_set_page(regAddr, 1); + + for (i = 0; i < phy_data->page1_size; i++) { + struct phy_parameter *phy_parameter = phy_parameter_page + i; + u8 addr = ARRAY_INDEX_MAP_PAGE_ADDR(i); + u8 data = phy_parameter->data; + u8 value = rtk_usb_phy_read(regAddr, addr); + + if (phy_parameter->addr) + seq_printf(s, "Page 1: addr=0x%x data=0x%02x ==> read value=0x%02x\n", + addr, data, value); + else + seq_printf(s, "Page 1: addr=0x%x data=none ==> read value=0x%02x\n", + addr, value); + } + + if (phy_data->page2_size == 0) + goto out; + + seq_puts(s, "Page 2:\n"); + /* Set page 2 */ + phy_parameter_page = phy_data->page2; + rtk_usb_phy_set_page(regAddr, 2); + + for (i = 0; i < phy_data->page2_size; i++) { + struct phy_parameter *phy_parameter = phy_parameter_page + i; + u8 addr = ARRAY_INDEX_MAP_PAGE_ADDR(i); + u8 data = phy_parameter->data; + u8 value = rtk_usb_phy_read(regAddr, addr); + + if (phy_parameter->addr) + seq_printf(s, "Page 2: addr=0x%x data=0x%02x ==> read value=0x%02x\n", + addr, data, value); + else + seq_printf(s, "Page 2: addr=0x%x data=none ==> read value=0x%02x\n", + addr, value); + } + +out: + seq_puts(s, "Property:\n"); + seq_printf(s, "check_efuse: %s\n", + phy_data->check_efuse?"Enable":"Disable"); + seq_printf(s, "check_efuse_version: %d\n", + phy_data->check_efuse_version); + seq_printf(s, "efuse_usb_dc_cal: %d\n", + (int)phy_data->efuse_usb_dc_cal); + seq_printf(s, "efuse_usb_dc_cal_rate: %d\n", + phy_data->efuse_usb_dc_cal_rate); + seq_printf(s, "usb_dc_cal_mask: 0x%x\n", + phy_data->usb_dc_cal_mask); + seq_printf(s, "efuse_usb_dc_dis: %d\n", + (int)phy_data->efuse_usb_dc_dis); + seq_printf(s, "efuse_usb_dc_dis_rate: %d\n", + phy_data->efuse_usb_dc_dis_rate); + seq_printf(s, "usb_dc_dis_mask: 0x%x\n", + phy_data->usb_dc_dis_mask); + seq_printf(s, "usb_dc_dis_at_page0: %s\n", + phy_data->usb_dc_dis_at_page0?"true":"false"); + seq_printf(s, "do_toggle: %s\n", + phy_data->do_toggle?"Enable":"Disable"); + seq_printf(s, "do_toggle_driving: %s\n", + phy_data->do_toggle_driving?"Enable":"Disable"); + seq_printf(s, "disconnect_driving_updated: 0x%x\n", + phy_data->disconnect_driving_updated); + seq_printf(s, "use_default_parameter: %s\n", + phy_data->use_default_parameter?"Enable":"Disable"); + seq_printf(s, "is_double_sensitivity_mode: %s\n", + phy_data->is_double_sensitivity_mode?"Enable":"Disable"); + seq_printf(s, "ldo_force_enable: %s\n", + phy_data->ldo_force_enable?"Enable":"Disable"); + seq_printf(s, "ldo_enable: %s\n", + phy_data->ldo_enable?"Enable":"Disable"); + seq_printf(s, "ldo_driving_compensate: %d\n", + phy_data->ldo_driving_compensate); + seq_printf(s, "driving_compensate: %d\n", + phy_data->driving_compensate); + } + + return 0; +} + +static int rtk_usb2_parameter_open(struct inode *inode, struct file *file) +{ + return single_open(file, rtk_usb2_parameter_show, inode->i_private); +} + +static const struct file_operations rtk_usb2_parameter_fops = { + .open = rtk_usb2_parameter_open, + .read = seq_read, + .llseek = seq_lseek, + .release = single_release, +}; + +static int __get_parameter_at_page(struct seq_file *s, + struct rtk_usb_phy *rtk_phy, + struct phy_parameter *phy_parameter_page, + const char *phy_page, const char *phy_addr) +{ + struct phy_parameter *phy_parameter; + uint32_t addr; + int i, ret; + + ret = kstrtouint(phy_addr, 16, &addr); + if (ret < 0) { + pr_err("%s::kstrtouint() failed\n", __func__); + return -EINVAL; + } + i = PAGE_ADDR_MAP_ARRAY_INDEX(addr); + phy_parameter = (phy_parameter_page + i); + + if (phy_parameter->addr) + seq_printf(s, "Now Parameter %s addr 0x%02x = 0x%02x\n", + phy_page, phy_parameter->addr, phy_parameter->data); + else + seq_printf(s, "Now Parameter %s addr 0x%02x is default\n", + phy_page, addr); + + dev_dbg(rtk_phy->dev, "%s addr=0x%02x data=0x%02x\n", + __func__, phy_parameter->addr, phy_parameter->data); + + return 0; +} + +static int __set_parameter_at_page( + struct rtk_usb_phy *rtk_phy, + struct reg_addr *regAddr, struct phy_data *phy_data, + struct phy_parameter *phy_parameter_page, + const char *phy_page, const char *phy_addr, const char *phy_value) +{ + struct phy_parameter *phy_parameter; + uint32_t addr, value; + int i, ret; + + ret = kstrtouint(phy_addr, 16, &addr); + if (ret < 0) + return -EINVAL; + + ret = kstrtouint(phy_value, 16, &value); + if (ret < 0) + return -EINVAL; + + i = PAGE_ADDR_MAP_ARRAY_INDEX(addr); + phy_parameter = (phy_parameter_page + i); + + if (phy_parameter->addr) { + phy_parameter->data = value; + } else { + phy_parameter->addr = addr; + phy_parameter->data = value; + } + + dev_dbg(rtk_phy->dev, "%s addr=0x%02x data=0x%02x\n", + __func__, phy_parameter->addr, phy_parameter->data); + + if (strcmp("page0", phy_page) == 0 && (addr == PAGE0_0xE4)) + value = __updated_page0_0xe4_parameter(phy_data, value); + + if (rtk_usb_phy_write(regAddr, addr, value)) + dev_err(rtk_phy->dev, + "[%s:%d] Error: addr=0x%02x value=0x%02x\n", + __func__, __LINE__, addr, value); + + return 0; +} + +static int rtk_usb2_set_parameter_show(struct seq_file *s, void *unused) +{ + struct rtk_usb_phy *rtk_phy = s->private; + const struct file *file = s->file; + const char *file_name = file_dentry(file)->d_iname; + struct dentry *p_dentry = file_dentry(file)->d_parent; + const char *dir_name = p_dentry->d_iname; + struct dentry *pp_dentry = p_dentry->d_parent; + const char *phy_dir_name = pp_dentry->d_iname; + int ret = 0; + int index; + struct phy_data *phy_data = NULL; + + for (index = 0; index < rtk_phy->phyN; index++) { + size_t sz = 30; + char name[30] = {0}; + + snprintf(name, sz, "phy%d", index); + if (strncmp(name, phy_dir_name, strlen(name)) == 0) { + phy_data = &((struct phy_data *)rtk_phy->phy_data)[index]; + break; + } + } + if (!phy_data) { + dev_err(rtk_phy->dev, + "%s: No phy_data for %s/%s/%s\n", + __func__, phy_dir_name, dir_name, file_name); + return -EINVAL; + } + + if (strcmp("page0", dir_name) == 0) + ret = __get_parameter_at_page(s, rtk_phy, phy_data->page0, + dir_name, file_name); + else if (strcmp("page1", dir_name) == 0) + ret = __get_parameter_at_page(s, rtk_phy, phy_data->page1, + dir_name, file_name); + else if (strcmp("page2", dir_name) == 0) + ret = __get_parameter_at_page(s, rtk_phy, phy_data->page2, + dir_name, file_name); + + if (ret < 0) + return ret; + + seq_puts(s, "Set phy parameter by following command\n"); + seq_printf(s, "echo \"value\" > %s/%s/%s\n", + phy_dir_name, dir_name, file_name); + + return 0; +} + +static int rtk_usb2_set_parameter_open(struct inode *inode, struct file *file) +{ + return single_open(file, rtk_usb2_set_parameter_show, inode->i_private); +} + +static ssize_t rtk_usb2_set_parameter_write(struct file *file, + const char __user *ubuf, size_t count, loff_t *ppos) +{ + const char *file_name = file_dentry(file)->d_iname; + struct dentry *p_dentry = file_dentry(file)->d_parent; + const char *dir_name = p_dentry->d_iname; + struct dentry *pp_dentry = p_dentry->d_parent; + const char *phy_dir_name = pp_dentry->d_iname; + struct seq_file *s = file->private_data; + struct rtk_usb_phy *rtk_phy = s->private; + struct reg_addr *regAddr = NULL; + struct phy_data *phy_data = NULL; + int ret = 0; + char buffer[40] = {0}; + int index; + + if (copy_from_user(&buffer, ubuf, + min_t(size_t, sizeof(buffer) - 1, count))) + return -EFAULT; + + for (index = 0; index < rtk_phy->phyN; index++) { + size_t sz = 30; + char name[30] = {0}; + + snprintf(name, sz, "phy%d", index); + if (strncmp(name, phy_dir_name, strlen(name)) == 0) { + regAddr = &((struct reg_addr *)rtk_phy->reg_addr)[index]; + phy_data = &((struct phy_data *)rtk_phy->phy_data)[index]; + break; + } + } + if (!regAddr) { + dev_err(rtk_phy->dev, + "%s: No regAddr for %s/%s/%s\n", + __func__, phy_dir_name, dir_name, file_name); + return -EINVAL; + } + if (!phy_data) { + dev_err(rtk_phy->dev, + "%s: No phy_data for %s/%s/%s\n", + __func__, phy_dir_name, dir_name, file_name); + return -EINVAL; + } + + if (strcmp("page0", dir_name) == 0) { + rtk_usb_phy_set_page(regAddr, 0); + ret = __set_parameter_at_page(rtk_phy, regAddr, phy_data, + phy_data->page0, dir_name, file_name, buffer); + } else if (strcmp("page1", dir_name) == 0) { + rtk_usb_phy_set_page(regAddr, 1); + ret = __set_parameter_at_page(rtk_phy, regAddr, phy_data, + phy_data->page1, dir_name, file_name, buffer); + } else if (strcmp("page2", dir_name) == 0) { + rtk_usb_phy_set_page(regAddr, 2); + ret = __set_parameter_at_page(rtk_phy, regAddr, phy_data, + phy_data->page2, dir_name, file_name, buffer); + } + if (ret < 0) + return ret; + + return count; +} + +static const struct file_operations rtk_usb2_set_parameter_fops = { + .open = rtk_usb2_set_parameter_open, + .write = rtk_usb2_set_parameter_write, + .read = seq_read, + .llseek = seq_lseek, + .release = single_release, +}; + +static int rtk_usb2_toggle_show(struct seq_file *s, void *unused) +{ + struct rtk_usb_phy *rtk_phy = s->private; + struct phy_data *phy_data; + int i; + + for (i = 0; i < rtk_phy->phyN; i++) { + phy_data = &((struct phy_data *)rtk_phy->phy_data)[i]; + seq_printf(s, "Now phy#%d do_toggle is %s.\n", + i, phy_data->do_toggle?"Enable":"Disable"); + } + seq_puts(s, "ehco 1 to enable toggle phy parameter.\n"); + + return 0; +} + +static int rtk_usb2_toggle_open(struct inode *inode, struct file *file) +{ + return single_open(file, rtk_usb2_toggle_show, inode->i_private); +} + +static ssize_t rtk_usb2_toggle_write(struct file *file, + const char __user *ubuf, size_t count, loff_t *ppos) +{ + struct seq_file *s = file->private_data; + struct rtk_usb_phy *rtk_phy = s->private; + char buf[32]; + struct phy_data *phy_data; + bool enable = false; + int i; + + if (copy_from_user(&buf, ubuf, min_t(size_t, sizeof(buf) - 1, count))) + return -EFAULT; + + if (!strncmp(buf, "1", 1)) + enable = true; + + for (i = 0; i < rtk_phy->phyN; i++) { + phy_data = &((struct phy_data *)rtk_phy->phy_data)[i]; + phy_data->do_toggle = enable; + dev_info(rtk_phy->dev, "Set phy#%d do_toggle is %s.\n", + i, phy_data->do_toggle?"Enable":"Disable"); + } + + return count; +} + +static const struct file_operations rtk_usb2_toggle_fops = { + .open = rtk_usb2_toggle_open, + .write = rtk_usb2_toggle_write, + .read = seq_read, + .llseek = seq_lseek, + .release = single_release, +}; + +static int create_debug_set_parameter_files(struct rtk_usb_phy *rtk_phy, + struct dentry *phy_dir, const char *page, size_t addr_size) +{ + struct dentry *page_dir; + int i; + + page_dir = debugfs_create_dir(page, phy_dir); + if (!page_dir) { + dev_err(rtk_phy->dev, + "%s Error create folder %s fail\n", + __func__, page); + return -EINVAL; + } + + for (i = 0; i < addr_size; i++) { + size_t sz = 30; + char name[30] = {0}; + + snprintf(name, sz, "%x", ARRAY_INDEX_MAP_PAGE_ADDR(i)); + + if (!debugfs_create_file(name, 0644, + page_dir, rtk_phy, + &rtk_usb2_set_parameter_fops)) + dev_err(rtk_phy->dev, + "%s Error create file %s/%s fail", + page, name, __func__); + } + + return 0; +} + +static inline void create_debug_files(struct rtk_usb_phy *rtk_phy) +{ + struct dentry *phy_debug_root = NULL; + struct dentry *set_parameter_dir = NULL; + + phy_debug_root = create_phy_debug_root(); + + if (!phy_debug_root) { + dev_err(rtk_phy->dev, "%s Error phy_debug_root is NULL", + __func__); + return; + } + + rtk_phy->debug_dir = debugfs_create_dir(dev_name(rtk_phy->dev), + phy_debug_root); + if (!rtk_phy->debug_dir) { + dev_err(rtk_phy->dev, "%s Error debug_dir is NULL", __func__); + return; + } + + if (!debugfs_create_file("parameter", 0444, rtk_phy->debug_dir, rtk_phy, + &rtk_usb2_parameter_fops)) + goto file_error; + + set_parameter_dir = debugfs_create_dir("set_parameter", + rtk_phy->debug_dir); + if (set_parameter_dir) { + int index, ret; + + for (index = 0; index < rtk_phy->phyN; index++) { + struct dentry *phy_dir; + struct phy_data *phy_data; + size_t sz = 30; + char name[30] = {0}; + + snprintf(name, sz, "phy%d", index); + + phy_data = &((struct phy_data *)rtk_phy->phy_data)[index]; + + phy_dir = debugfs_create_dir(name, set_parameter_dir); + if (!phy_dir) { + dev_err(rtk_phy->dev, + "%s Error create folder %s fail\n", + name, __func__); + goto file_error; + } + + ret = create_debug_set_parameter_files(rtk_phy, phy_dir, + "page0", phy_data->page0_size); + if (ret < 0) { + dev_err(rtk_phy->dev, + "%s Error create files for page0 fail\n", + __func__); + goto file_error; + } + + ret = create_debug_set_parameter_files(rtk_phy, phy_dir, + "page1", phy_data->page1_size); + if (ret < 0) { + dev_err(rtk_phy->dev, + "%s Error create files for page1 fail\n", + __func__); + goto file_error; + } + + ret = create_debug_set_parameter_files(rtk_phy, phy_dir, + "page2", phy_data->page2_size); + if (ret < 0) { + dev_err(rtk_phy->dev, + "%s Error create files for page2 fail\n", + __func__); + goto file_error; + } + } + } + + if (!debugfs_create_file("toggle", 0644, + rtk_phy->debug_dir, rtk_phy, &rtk_usb2_toggle_fops)) + goto file_error; + + return; + +file_error: + debugfs_remove_recursive(rtk_phy->debug_dir); +} + +static inline void remove_debug_files(struct rtk_usb_phy *rtk_phy) +{ + debugfs_remove_recursive(rtk_phy->debug_dir); +} +#else +static inline void create_debug_files(struct rtk_usb_phy *rtk_phy) { } +static inline void remove_debug_files(struct rtk_usb_phy *rtk_phy) { } +#endif /* CONFIG_DEBUG_FS */ + +static int __get_phy_parameter_by_efuse(struct rtk_usb_phy *rtk_phy, + struct phy_data *phy_data, int index) +{ + u8 value = 0; + struct nvmem_cell *cell; + struct soc_device_attribute rtk_soc_groot[] = { + { .family = "Realtek Groot",}, + { /* empty */ } + }; + struct soc_device_attribute rtk_soc_hank[] = { + { .family = "Realtek Hank",}, + { /* empty */ } + }; + struct soc_device_attribute rtk_soc_efuse_v1[] = { + { .family = "Realtek Phoenix",}, + { .family = "Realtek Kylin",}, + { .family = "Realtek Hercules",}, + { .family = "Realtek Thor",}, + { .family = "Realtek Hank",}, + { .family = "Realtek Groot",}, + { .family = "Realtek Stark",}, + { .family = "Realtek Parker",}, + { /* empty */ } + }; + struct soc_device_attribute rtk_soc_dis_level_at_page0[] = { + { .family = "Realtek Phoenix",}, + { .family = "Realtek Kylin",}, + { .family = "Realtek Hercules",}, + { .family = "Realtek Thor",}, + { .family = "Realtek Hank",}, + { .family = "Realtek Groot",}, + { /* empty */ } + }; + + if (soc_device_match(rtk_soc_efuse_v1)) { + dev_dbg(rtk_phy->dev, "Use efuse v1 to updated phy parameter\n"); + phy_data->check_efuse_version = CHECK_EFUSE_V1; + } else { + dev_dbg(rtk_phy->dev, "Use efuse v2 to updated phy parameter\n"); + phy_data->check_efuse_version = CHECK_EFUSE_V2; + } + + if (soc_device_match(rtk_soc_dis_level_at_page0)) { + dev_dbg(rtk_phy->dev, "Use usb_dc_dis_at_page0\\n"); + phy_data->usb_dc_dis_at_page0 = true; + + phy_data->usb_dc_cal_mask = 0xf; + phy_data->usb_dc_dis_mask = 0xf; + + phy_data->disconnect_driving_updated = 0xf; + } else { + dev_dbg(rtk_phy->dev, "No use usb_dc_dis_at_page0\n"); + phy_data->usb_dc_dis_at_page0 = false; + + phy_data->usb_dc_cal_mask = 0x1f; + phy_data->usb_dc_dis_mask = 0xf; + + phy_data->disconnect_driving_updated = 0x8; + } + + phy_data->efuse_usb_dc_cal_rate = EFUS_USB_DC_CAL_RATE; + phy_data->efuse_usb_dc_dis_rate = EFUS_USB_DC_DIS_RATE; + + if (soc_device_match(rtk_soc_hank)) + phy_data->efuse_usb_dc_cal_rate = 1; + + if (!phy_data->check_efuse) + goto out; + + /* Read efuse for usb dc cal */ + cell = nvmem_cell_get(rtk_phy->dev, "usb-dc-cal"); + if (IS_ERR(cell)) { + dev_warn(rtk_phy->dev, "%s failed to get usb-dc-cal: %ld\n", + __func__, PTR_ERR(cell)); + } else { + unsigned char *buf; + size_t buf_size; + + buf = nvmem_cell_read(cell, &buf_size); + + value = buf[0] & phy_data->usb_dc_cal_mask; + + dev_dbg(rtk_phy->dev, + "buf=0x%x buf_size=%d value=0x%x\n", + buf[0], (int)buf_size, value); + + kfree(buf); + nvmem_cell_put(cell); + } + + if (phy_data->check_efuse_version == CHECK_EFUSE_V1) { + int rate = phy_data->efuse_usb_dc_cal_rate; + + if (value <= EFUS_USB_DC_CAL_MAX) + phy_data->efuse_usb_dc_cal = (int8_t)(value * rate); + else + phy_data->efuse_usb_dc_cal = -(int8_t)( + (EFUS_USB_DC_CAL_MAX & value) * rate); + + if (soc_device_match(rtk_soc_groot)) { + dev_info(rtk_phy->dev, "For groot IC we need a workaround to adjust efuse_usb_dc_cal\n"); + + /* We don't multiple dc_cal_rate=2 for positive dc cal compensate */ + if (value <= EFUS_USB_DC_CAL_MAX) + phy_data->efuse_usb_dc_cal = (int8_t)(value); + + /* We set max dc cal compensate is 0x8 if otp is 0x7 */ + if (value == 0x7) + phy_data->efuse_usb_dc_cal = (int8_t)(value + 1); + } + } else { /* for CHECK_EFUSE_V2 */ + phy_data->efuse_usb_dc_cal = value & phy_data->usb_dc_cal_mask; + } + + dev_dbg(rtk_phy->dev, "Get Efuse usb_dc_cal=%d for index=%d value=%x\n", + phy_data->efuse_usb_dc_cal, index, value); + + /* Read efuse for usb dc disconnect level */ + value = 0; + cell = nvmem_cell_get(rtk_phy->dev, "usb-dc-dis"); + if (IS_ERR(cell)) { + dev_warn(rtk_phy->dev, "%s failed to get usb-dc-dis: %ld\n", + __func__, PTR_ERR(cell)); + } else { + unsigned char *buf; + size_t buf_size; + + buf = nvmem_cell_read(cell, &buf_size); + + value = buf[0] & phy_data->usb_dc_dis_mask; + + dev_dbg(rtk_phy->dev, + "buf=0x%x buf_size=%d value=0x%x\n", + buf[0], (int)buf_size, value); + + kfree(buf); + nvmem_cell_put(cell); + } + + if (phy_data->check_efuse_version == CHECK_EFUSE_V1) { + int rate = phy_data->efuse_usb_dc_dis_rate; + + if (value <= EFUS_USB_DC_DIS_MAX) + phy_data->efuse_usb_dc_dis = (int8_t)(value * rate); + else + phy_data->efuse_usb_dc_dis = -(int8_t)( + (EFUS_USB_DC_DIS_MAX & value) * rate); + } else { /* for CHECK_EFUSE_V2 */ + phy_data->efuse_usb_dc_dis = value & phy_data->usb_dc_dis_mask; + } + + dev_dbg(rtk_phy->dev, "Get Efuse usb_dc_dis=%d for index=%d value=%x\n", + phy_data->efuse_usb_dc_dis, index, value); + +out: + return 0; +} + +static int __get_phy_parameter(struct device *dev, struct phy_data *phy_data, + struct device_node *sub_node) +{ + u32 page_size = 0; + u32 num_cells = 2; /*< addr value > */ + u32 data_size; + int i, ret = 0; + + /* Page 0 */ + page_size = MAX_USB_PHY_PAGE0_DATA_SIZE; + phy_data->page0_size = page_size; + phy_data->page0 = devm_kzalloc(dev, + sizeof(struct phy_parameter) * page_size, GFP_KERNEL); + if (!phy_data->page0) { + ret = -ENOMEM; + goto out; + } + + if (!of_get_property(sub_node, "realtek,page0-param", &data_size)) { + dev_dbg(dev, "%s No page0 parameter (data_size=%d)\n", + __func__, data_size); + data_size = 0; + } + + if (!data_size) + goto parse_page1; + + data_size = data_size / (sizeof(u32) * num_cells); + + for (i = 0; i < data_size; i++) { + struct phy_parameter *phy_parameter; + u32 addr, data; + int index, offset; + + offset = i * num_cells; + + ret = of_property_read_u32_index(sub_node, "realtek,page0-param", + offset, &addr); + if (ret) { + dev_err(dev, "ERROR: To get page0 i=%d addr=0x%x\n", + i, addr); + break; + } + + ret = of_property_read_u32_index(sub_node, "realtek,page0-param", + offset + 1, &data); + if (ret) { + dev_err(dev, "ERROR: To get page0 i=%d addr=0x%x\n", + i, data); + break; + } + + index = PAGE_ADDR_MAP_ARRAY_INDEX(addr); + phy_parameter = (phy_data->page0 + index); + phy_parameter->addr = (char)addr; + phy_parameter->data = (char)data; + + dev_dbg(dev, "page0 index=%d addr=0x%x data=0x%x\n", + index, phy_parameter->addr, phy_parameter->data); + } + +parse_page1: + /* Page 1 */ + page_size = MAX_USB_PHY_PAGE1_DATA_SIZE; + phy_data->page1_size = page_size; + phy_data->page1 = devm_kzalloc(dev, + sizeof(struct phy_parameter) * page_size, GFP_KERNEL); + if (!phy_data->page1) { + ret = -ENOMEM; + goto out; + } + + if (!of_get_property(sub_node, "realtek,page1-param", &data_size)) { + dev_dbg(dev, "%s No page1 parameter (data_size=%d)\n", + __func__, data_size); + data_size = 0; + } + + if (!data_size) + goto parse_page2; + + data_size = data_size / (sizeof(u32) * num_cells); + + for (i = 0; i < data_size; i++) { + struct phy_parameter *phy_parameter; + u32 addr, data; + int index, offset; + + offset = i * num_cells; + + ret = of_property_read_u32_index(sub_node, "realtek,page1-param", + offset, &addr); + if (ret) { + dev_err(dev, "ERROR: To get page1 i=%d addr=0x%x\n", + i, addr); + break; + } + + ret = of_property_read_u32_index(sub_node, "realtek,page1-param", + offset + 1, &data); + if (ret) { + dev_err(dev, "ERROR: To get page1 i=%d addr=0x%x\n", + i, data); + break; + } + + index = PAGE_ADDR_MAP_ARRAY_INDEX(addr); + phy_parameter = phy_data->page1 + index; + phy_parameter->addr = (char)addr; + phy_parameter->data = (char)data; + + dev_dbg(dev, "page1 index=%d addr=0x%x data=0x%x\n", + index, phy_parameter->addr, phy_parameter->data); + } + +parse_page2: + /* Page 2 */ + if (of_property_read_bool(sub_node, "realtek,support-page2-param")) + page_size = MAX_USB_PHY_PAGE2_DATA_SIZE; + else + page_size = 0; + + if (!page_size) + goto out; + + phy_data->page2_size = page_size; + phy_data->page2 = devm_kzalloc(dev, + sizeof(struct phy_parameter) * page_size, GFP_KERNEL); + if (!phy_data->page2) { + ret = -ENOMEM; + goto out; + } + + if (!of_get_property(sub_node, "realtek,page2-param", &data_size)) { + dev_dbg(dev, "%s No page2 parameter (data_size=%d)\n", + __func__, data_size); + data_size = 0; + } + data_size = data_size / (sizeof(u32) * num_cells); + + for (i = 0; i < data_size; i++) { + struct phy_parameter *phy_parameter; + u32 addr, data; + int index, offset; + + offset = i * num_cells; + + ret = of_property_read_u32_index(sub_node, "realtek,page2-param", + offset, &addr); + if (ret) { + dev_err(dev, "ERROR: To get page2 i=%d addr=0x%x\n", + i, addr); + break; + } + + ret = of_property_read_u32_index(sub_node, "realtek,page2-param", + offset + 1, &data); + if (ret) { + dev_err(dev, "ERROR: To get page2 i=%d addr=0x%x\n", + i, data); + break; + } + + index = PAGE_ADDR_MAP_ARRAY_INDEX(addr); + phy_parameter = phy_data->page2 + index; + phy_parameter->addr = (char)addr; + phy_parameter->data = (char)data; + + dev_dbg(dev, "page2 index=%d addr=0x%x data=0x%x\n", + index, phy_parameter->addr, phy_parameter->data); + } + +out: + return ret; +} + +static int get_phy_parameter(struct rtk_usb_phy *rtk_phy, + struct device_node *sub_node) +{ + struct device *dev = rtk_phy->dev; + struct reg_addr *addr; + struct phy_data *phy_data; + int ret = 0; + int index; + + if (of_property_read_u32(sub_node, "reg", &index)) { + dev_err(dev, "sub_node without reg\n"); + return -EINVAL; + } + + dev_dbg(dev, "sub_node index=%d\n", index); + + addr = &((struct reg_addr *)rtk_phy->reg_addr)[index]; + phy_data = &((struct phy_data *)rtk_phy->phy_data)[index]; + + addr->reg_wrap_vstatus = of_iomap(dev->of_node, 0); + addr->reg_gusb2phyacc0 = of_iomap(dev->of_node, 1) + index; + addr->vstatus_index = index; + dev_dbg(dev, "%s %d #%d reg_wrap_vstatus=%p\n", __func__, __LINE__, + index, addr->reg_wrap_vstatus); + dev_dbg(dev, "%s %d #%d reg_gusb2phyacc0=%p\n", __func__, __LINE__, + index, addr->reg_gusb2phyacc0); + + if (!sub_node) + goto err; + + ret = __get_phy_parameter(dev, phy_data, sub_node); + if (ret) + goto err; + + if (of_property_read_bool(sub_node, "realtek,do-toggle")) + phy_data->do_toggle = true; + else + phy_data->do_toggle = false; + + if (of_property_read_bool(sub_node, "realtek,do-toggle-driving")) + phy_data->do_toggle_driving = true; + else + phy_data->do_toggle_driving = false; + + if (of_property_read_bool(sub_node, "realtek,check-efuse")) + phy_data->check_efuse = true; + else + phy_data->check_efuse = false; + + if (of_property_read_bool(sub_node, "realtek,use-default-parameter")) + phy_data->use_default_parameter = true; + else + phy_data->use_default_parameter = false; + + if (of_property_read_bool(sub_node, + "realtek,is-double-sensitivity-mode")) + phy_data->is_double_sensitivity_mode = true; + else + phy_data->is_double_sensitivity_mode = false; + + if (of_property_read_bool(sub_node, + "realtek,ldo-force-enable")) + phy_data->ldo_force_enable = true; + else + phy_data->ldo_force_enable = false; + + if (of_property_read_s32(sub_node, + "realtek,ldo-driving-compensate", &phy_data->ldo_driving_compensate)) + phy_data->ldo_driving_compensate = 0; + + if (of_property_read_s32(sub_node, + "realtek,driving-compensate", &phy_data->driving_compensate)) + phy_data->driving_compensate = 0; + + __get_phy_parameter_by_efuse(rtk_phy, phy_data, index); + +err: + return ret; +} + +static int rtk_usb2phy_probe(struct platform_device *pdev) +{ + struct rtk_usb_phy *rtk_phy; + struct device *dev = &pdev->dev; + struct device_node *node; + struct device_node *sub_node; + struct phy *generic_phy; + struct phy_provider *phy_provider; + int phyN, ret = 0; + + rtk_phy = devm_kzalloc(dev, sizeof(*rtk_phy), GFP_KERNEL); + if (!rtk_phy) + return -ENOMEM; + + rtk_phy->dev = &pdev->dev; + rtk_phy->phy.dev = rtk_phy->dev; + rtk_phy->phy.label = "rtk-usb2phy"; + rtk_phy->phy.notify_port_status = rtk_usb_phy_notify_port_status; + + if (!dev->of_node) { + dev_err(dev, "%s %d No device node\n", __func__, __LINE__); + goto err; + } + + node = dev->of_node; + + rtk_phy->usb_ctrl_regs = syscon_regmap_lookup_by_phandle(node, "realtek,usb-ctrl"); + if (IS_ERR(rtk_phy->usb_ctrl_regs)) { + dev_info(dev, "%s: DTS no support usb_ctrl regs syscon\n", __func__); + rtk_phy->usb_ctrl_regs = NULL; + } + + phyN = of_get_child_count(node); + rtk_phy->phyN = phyN; + dev_dbg(dev, "%s phyN=%d\n", __func__, rtk_phy->phyN); + + rtk_phy->reg_addr = devm_kzalloc(dev, + sizeof(struct reg_addr) * phyN, GFP_KERNEL); + if (!rtk_phy->reg_addr) + return -ENOMEM; + + rtk_phy->phy_data = devm_kzalloc(dev, + sizeof(struct phy_data) * phyN, GFP_KERNEL); + if (!rtk_phy->phy_data) + return -ENOMEM; + + for (sub_node = of_get_next_child(node, NULL); sub_node != NULL; + sub_node = of_get_next_child(node, sub_node)) { + ret = get_phy_parameter(rtk_phy, sub_node); + if (ret) { + dev_err(dev, "%s: get_phy_parameter fail ret=%d\n", + __func__, ret); + goto err; + } + } + + platform_set_drvdata(pdev, rtk_phy); + + generic_phy = devm_phy_create(rtk_phy->dev, NULL, &ops); + if (IS_ERR(generic_phy)) + return PTR_ERR(generic_phy); + + phy_set_drvdata(generic_phy, rtk_phy); + + phy_provider = devm_of_phy_provider_register(rtk_phy->dev, + of_phy_simple_xlate); + if (IS_ERR(phy_provider)) + return PTR_ERR(phy_provider); + + ret = usb_add_phy_dev(&rtk_phy->phy); + if (ret) + goto err; + + create_debug_files(rtk_phy); + +err: + dev_dbg(dev, "Probe RTK USB 2.0 PHY (ret=%d)\n", ret); + + return ret; +} + +static void rtk_usb2phy_remove(struct platform_device *pdev) +{ + struct rtk_usb_phy *rtk_phy = platform_get_drvdata(pdev); + + remove_debug_files(rtk_phy); + + usb_remove_phy(&rtk_phy->phy); +} + +static const struct of_device_id usbphy_rtk_dt_match[] = { + { .compatible = "realtek,usb2phy", }, + {}, +}; +MODULE_DEVICE_TABLE(of, usbphy_rtk_dt_match); + +static struct platform_driver rtk_usb2phy_driver = { + .probe = rtk_usb2phy_probe, + .remove_new = rtk_usb2phy_remove, + .driver = { + .name = "rtk-usb2phy", + .owner = THIS_MODULE, + .of_match_table = usbphy_rtk_dt_match, + }, +}; + +module_platform_driver(rtk_usb2phy_driver); + +MODULE_LICENSE("GPL"); +MODULE_ALIAS("platform: rtk-usb2phy"); +MODULE_AUTHOR("Stanley Chang "); +MODULE_DESCRIPTION("Realtek usb 2.0 phy driver"); From patchwork Wed Jun 7 06:24:39 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: =?utf-8?b?U3RhbmxleSBDaGFuZ1vmmIzogrLlvrdd?= X-Patchwork-Id: 104268 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a59:994d:0:b0:3d9:f83d:47d9 with SMTP id k13csp47983vqr; Tue, 6 Jun 2023 23:32:46 -0700 (PDT) X-Google-Smtp-Source: ACHHUZ5i/KjAcEcVQ66nkmdwFhLVtQstr6hhe91bSydozAb3PsXVoeOSkio54nY/Dkjgt5cN3GGI X-Received: by 2002:a05:6a20:5493:b0:10b:c341:935 with SMTP id i19-20020a056a20549300b0010bc3410935mr2403481pzk.11.1686119566314; Tue, 06 Jun 2023 23:32:46 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1686119566; cv=none; d=google.com; s=arc-20160816; b=kADh8OGhXXWUdE9H+1CGvtisMpGvVLbC4MpC5Aty51wYlVJ7fl2p5q0VpTWqsURI4Y BE8+kIciES16k4xCCTDCu8cooAm+p5o+VW8WZ+q4YJ3vYEr8JsZC2DybVw0RtNPSPiDd wFUTkEJLyurB3VuGFpOjESBXAA7hqmg0lv9pDqIRmApSoaJM7i08Or6xEQkySZkW1n+q JxeP4m5JsDAoXu5MIqX6mhtZhEJS5fh0pWsuxdU7qSpP0428Rf9q12SvHv9T/mgXCUz4 buY15Ss9vePHKOu9V4mfb/JPjyL0xg3ntoapM5ow4MhNk72BUzrd2J8XLvdfS4OZqu8I iwjA== ARC-Message-Signature: i=1; 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[2620:137:e000::1:20]) by mx.google.com with ESMTP id k8-20020aa79988000000b0064c9be61fa8si8220100pfh.6.2023.06.06.23.32.29; Tue, 06 Jun 2023 23:32:46 -0700 (PDT) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) client-ip=2620:137:e000::1:20; Authentication-Results: mx.google.com; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S235104AbjFGG0j (ORCPT + 99 others); Wed, 7 Jun 2023 02:26:39 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:50556 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S235011AbjFGG0b (ORCPT ); Wed, 7 Jun 2023 02:26:31 -0400 Received: from rtits2.realtek.com.tw (rtits2.realtek.com [211.75.126.72]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 428761726; Tue, 6 Jun 2023 23:26:25 -0700 (PDT) Authenticated-By: X-SpamFilter-By: ArmorX SpamTrap 5.77 with qID 3576P8KQ0024452, This message is accepted by code: ctloc85258 Received: from mail.realtek.com (rtexh36506.realtek.com.tw[172.21.6.27]) by rtits2.realtek.com.tw (8.15.2/2.81/5.90) with ESMTPS id 3576P8KQ0024452 (version=TLSv1.2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128 verify=OK); Wed, 7 Jun 2023 14:25:08 +0800 Received: from RTEXMBS01.realtek.com.tw (172.21.6.94) by RTEXH36506.realtek.com.tw (172.21.6.27) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.2507.17; Wed, 7 Jun 2023 14:25:23 +0800 Received: from RTEXH36505.realtek.com.tw (172.21.6.25) by RTEXMBS01.realtek.com.tw (172.21.6.94) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.2375.7; Wed, 7 Jun 2023 14:25:23 +0800 Received: from localhost.localdomain (172.21.252.101) by RTEXH36505.realtek.com.tw (172.21.6.25) with Microsoft SMTP Server id 15.1.2375.32 via Frontend Transport; Wed, 7 Jun 2023 14:25:23 +0800 From: Stanley Chang To: Greg Kroah-Hartman CC: Stanley Chang , Vinod Koul , Kishon Vijay Abraham I , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Alan Stern , Ray Chi , Michael Grzeschik , "Flavio Suligoi" , Matthias Kaehlcke , "Mathias Nyman" , , , , Subject: [PATCH v3 3/5] phy: realtek: usb: Add driver for the Realtek SoC USB 3.0 PHY Date: Wed, 7 Jun 2023 14:24:39 +0800 Message-ID: <20230607062500.24669-3-stanley_chang@realtek.com> X-Mailer: git-send-email 2.40.1 In-Reply-To: <20230607062500.24669-1-stanley_chang@realtek.com> References: <20230607062500.24669-1-stanley_chang@realtek.com> MIME-Version: 1.0 X-KSE-ServerInfo: RTEXMBS01.realtek.com.tw, 9 X-KSE-AntiSpam-Interceptor-Info: fallback X-KSE-Antivirus-Interceptor-Info: fallback X-KSE-AntiSpam-Interceptor-Info: fallback X-Spam-Status: No, score=-1.9 required=5.0 tests=BAYES_00,SPF_HELO_NONE, SPF_PASS,T_SCC_BODY_TEXT_LINE,URIBL_BLOCKED autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-getmail-retrieved-from-mailbox: =?utf-8?q?INBOX?= X-GMAIL-THRID: =?utf-8?q?1768024510169369798?= X-GMAIL-MSGID: =?utf-8?q?1768024510169369798?= Realtek DHC (digital home center) RTD SoCs support DWC3 XHCI USB controller. Added the driver to drive the USB 3.0 PHY transceivers. Signed-off-by: Stanley Chang --- v2 to v3 change: 1. Broken down into two patches, one for each of USB 2 & 3 PHY. 2. Removed parameter v1 support for simplification. 3. Used remove_new for driver remove callback. v1 to v2 change: 1. Move the drivers to drivers/phy/ for generic phy driver 2. Use the generic phy driver api to initialize phy 3. Use readl/writel to instead phy_read/phy_write directly. 4. Use read_poll_timeout() in function utmi_wait_register. 5. Revised some coding styles. 6. fix the compiler warning for kernel test robot. --- drivers/phy/realtek/Kconfig | 10 + drivers/phy/realtek/Makefile | 1 + drivers/phy/realtek/phy-rtk-usb3.c | 1070 ++++++++++++++++++++++++++++ 3 files changed, 1081 insertions(+) create mode 100644 drivers/phy/realtek/phy-rtk-usb3.c diff --git a/drivers/phy/realtek/Kconfig b/drivers/phy/realtek/Kconfig index 76e31f6abdee..28ee3d9be568 100644 --- a/drivers/phy/realtek/Kconfig +++ b/drivers/phy/realtek/Kconfig @@ -11,3 +11,13 @@ config PHY_RTK_RTD_USB2PHY The DHC (digital home center) RTD series SoCs used the Synopsys DWC3 USB IP. This driver will do the PHY initialization of the parameters. + +config PHY_RTK_RTD_USB3PHY + tristate "Realtek RTD USB3 PHY Transceiver Driver" + select GENERIC_PHY + select USB_PHY + help + Enable this to support Realtek SoC USB3 phy transceiver. + The DHC (digital home center) RTD series SoCs used the Synopsys + DWC3 USB IP. This driver will do the PHY initialization + of the parameters. diff --git a/drivers/phy/realtek/Makefile b/drivers/phy/realtek/Makefile index cf5d440841a2..ed7b47ff8a26 100644 --- a/drivers/phy/realtek/Makefile +++ b/drivers/phy/realtek/Makefile @@ -1,2 +1,3 @@ # SPDX-License-Identifier: GPL-2.0 obj-$(CONFIG_PHY_RTK_RTD_USB2PHY) += phy-rtk-usb2.o +obj-$(CONFIG_PHY_RTK_RTD_USB3PHY) += phy-rtk-usb3.o diff --git a/drivers/phy/realtek/phy-rtk-usb3.c b/drivers/phy/realtek/phy-rtk-usb3.c new file mode 100644 index 000000000000..aae0525ce78d --- /dev/null +++ b/drivers/phy/realtek/phy-rtk-usb3.c @@ -0,0 +1,1070 @@ +// SPDX-License-Identifier: GPL-2.0 +/* + * phy-rtk-usb3.c RTK usb3.0 phy driver + * + * copyright (c) 2023 realtek semiconductor corporation + * + */ + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +#define USB_MDIO_CTRL_PHY_BUSY BIT(7) +#define USB_MDIO_CTRL_PHY_WRITE BIT(0) +#define USB_MDIO_CTRL_PHY_ADDR_SHIFT 8 +#define USB_MDIO_CTRL_PHY_DATA_SHIFT 16 + +#define MAX_USB_PHY_DATA_SIZE 0x30 +#define PHY_ADDR_0x09 0x09 +#define PHY_ADDR_0x0B 0x0B +#define PHY_ADDR_0x0D 0x0D +#define PHY_ADDR_0x10 0x10 +#define PHY_ADDR_0x1F 0x1F +#define PHY_ADDR_0x20 0x20 +#define PHY_ADDR_0x30 0x30 + +#define REG_0x0B_RX_OFFSET_RANGE_MASK 0xC +#define REG_0x0D_RX_DEBUG_TEST_EN BIT(6) +#define REG_0x10_DEBUG_MODE_SETTING 0x3C0 +#define REG_0x10_DEBUG_MODE_SETTING_MASK 0x3F8 +#define REG_0x1F_RX_OFFSET_CODE_MASK 0x1E + +#define USB_U3_TX_LFPS_SWING_TRIM_SHIFT 4 +#define USB_U3_TX_LFPS_SWING_TRIM_MASK 0xF + +#define PHY_ADDR_MAP_ARRAY_INDEX(addr) (addr) +#define ARRAY_INDEX_MAP_PHY_ADDR(index) (index) + +struct reg_addr { + void __iomem *reg_mdio_ctl; +}; + +struct phy_parameter { + u8 addr; + u16 data; +}; + +struct phy_data { + int size; + struct phy_parameter *parameter; + + bool check_efuse; + u8 efuse_usb_u3_tx_lfps_swing_trim; + bool do_toggle; + bool do_toggle_once; + bool use_default_parameter; + bool check_rx_front_end_offset; +}; + +struct rtk_usb_phy { + struct usb_phy phy; + struct device *dev; + + int phyN; + void *reg_addr; + void *phy_data; + + struct dentry *debug_dir; +}; + +#define PHY_IO_TIMEOUT_USEC (50000) +#define PHY_IO_DELAY_US (100) + +static inline int utmi_wait_register(void __iomem *reg, u32 mask, u32 result) +{ + int ret; + unsigned int val; + + ret = read_poll_timeout(readl, val, ((val & mask) == result), + PHY_IO_DELAY_US, PHY_IO_TIMEOUT_USEC, false, reg); + if (ret) { + pr_err("%s can't program USB phy\n", __func__); + return -ETIMEDOUT; + } + + return 0; +} + +static int rtk_usb_phy3_wait_vbusy(struct reg_addr *regAddr) +{ + return utmi_wait_register(regAddr->reg_mdio_ctl, USB_MDIO_CTRL_PHY_BUSY, 0); +} + +static u16 rtk_usb_phy_read(struct reg_addr *regAddr, char addr) +{ + unsigned int regVal; + u32 value; + + regVal = (addr << USB_MDIO_CTRL_PHY_ADDR_SHIFT); + + writel(regVal, regAddr->reg_mdio_ctl); + + rtk_usb_phy3_wait_vbusy(regAddr); + + value = readl(regAddr->reg_mdio_ctl); + value = value >> USB_MDIO_CTRL_PHY_DATA_SHIFT; + + return (u16)value; +} + +static int rtk_usb_phy_write(struct reg_addr *regAddr, char addr, u16 data) +{ + unsigned int regVal; + + regVal = USB_MDIO_CTRL_PHY_WRITE | + (addr << USB_MDIO_CTRL_PHY_ADDR_SHIFT) | + (data << USB_MDIO_CTRL_PHY_DATA_SHIFT); + + writel(regVal, regAddr->reg_mdio_ctl); + + rtk_usb_phy3_wait_vbusy(regAddr); + + return 0; +} + +static void do_rtk_usb3_phy_toggle(struct rtk_usb_phy *rtk_phy, int i, + bool isConnect) +{ + struct reg_addr *regAddr; + struct phy_data *phy_data; + struct phy_parameter *phy_parameter; + size_t index; + + regAddr = &((struct reg_addr *)rtk_phy->reg_addr)[i]; + phy_data = &((struct phy_data *)rtk_phy->phy_data)[i]; + + if (!phy_data) { + dev_err(rtk_phy->dev, "%s phy_data is NULL!\n", __func__); + return; + } + + if (!phy_data->do_toggle) + return; + + phy_parameter = phy_data->parameter; + + index = PHY_ADDR_MAP_ARRAY_INDEX(PHY_ADDR_0x09); + + if (index < phy_data->size) { + u8 addr = (phy_parameter + index)->addr; + u16 data = (phy_parameter + index)->data; + + if (addr == 0xFF) { + addr = ARRAY_INDEX_MAP_PHY_ADDR(index); + data = rtk_usb_phy_read(regAddr, addr); + (phy_parameter + index)->addr = addr; + (phy_parameter + index)->data = data; + } + mdelay(1); + dev_info(rtk_phy->dev, + "%s ########## to toggle PHY addr 0x09 BIT(9)\n", + __func__); + rtk_usb_phy_write(regAddr, addr, data&(~BIT(9))); + mdelay(1); + rtk_usb_phy_write(regAddr, addr, data); + } + dev_info(rtk_phy->dev, "%s ########## PHY addr 0x1f = 0x%04x\n", + __func__, rtk_usb_phy_read(regAddr, PHY_ADDR_0x1F)); +} + +static int do_rtk_usb_phy_init(struct rtk_usb_phy *rtk_phy, int phy_index) +{ + struct reg_addr *regAddr = + &((struct reg_addr *)rtk_phy->reg_addr)[phy_index]; + struct phy_data *phy_data = + &((struct phy_data *)rtk_phy->phy_data)[phy_index]; + int index = 0; + struct phy_parameter *phy_parameter = phy_data->parameter; + + dev_dbg(rtk_phy->dev, "%s: init phy#%d\n", __func__, phy_index); + + if (phy_data->use_default_parameter) { + dev_info(rtk_phy->dev, "%s phy#%d use default parameter\n", + __func__, phy_index); + goto do_toggle; + } + + for (index = 0; index < phy_data->size; index++) { + u8 addr = (phy_parameter + index)->addr; + u16 data = (phy_parameter + index)->data; + + if (addr == 0xFF) + continue; + + if (addr == PHY_ADDR_0x20) { + u8 efuse_val = phy_data->efuse_usb_u3_tx_lfps_swing_trim; + u16 val_mask = USB_U3_TX_LFPS_SWING_TRIM_MASK; + int val_shift = USB_U3_TX_LFPS_SWING_TRIM_SHIFT; + + if (efuse_val) { + data &= ~(val_mask << val_shift); + data |= ((efuse_val & val_mask) << val_shift); + } + } + + rtk_usb_phy_write(regAddr, addr, data); + } + + for (index = 0; index < phy_data->size; index++) { + u8 addr = (phy_parameter + index)->addr; + u16 data = (phy_parameter + index)->data; + + if (addr == 0xFF) + continue; + + dev_dbg(rtk_phy->dev, "[USB3_PHY], addr = 0x%02x, data = 0x%04x ==> read value = 0x%04x\n", + addr, data, + rtk_usb_phy_read(regAddr, addr)); + } + +do_toggle: + if (phy_data->do_toggle_once) + phy_data->do_toggle = true; + + do_rtk_usb3_phy_toggle(rtk_phy, phy_index, false); + + if (phy_data->do_toggle_once) { + u16 check_value = 0; + int count = 10; + u16 value_0x0D, value_0x10; + + /* Enable Debug mode by set 0x0D and 0x10 */ + value_0x0D = rtk_usb_phy_read(regAddr, PHY_ADDR_0x0D); + value_0x10 = rtk_usb_phy_read(regAddr, PHY_ADDR_0x10); + + rtk_usb_phy_write(regAddr, PHY_ADDR_0x0D, + value_0x0D | REG_0x0D_RX_DEBUG_TEST_EN); + rtk_usb_phy_write(regAddr, PHY_ADDR_0x10, + (value_0x10 & ~REG_0x10_DEBUG_MODE_SETTING_MASK) | + REG_0x10_DEBUG_MODE_SETTING); + + check_value = rtk_usb_phy_read(regAddr, PHY_ADDR_0x30); + + while (!(check_value & BIT(15))) { + check_value = rtk_usb_phy_read(regAddr, PHY_ADDR_0x30); + mdelay(1); + if (count-- < 0) + break; + } + + if (!(check_value & BIT(15))) + dev_info(rtk_phy->dev, "toggle fail addr=0x%02x, data=0x%04x\n", + PHY_ADDR_0x30, check_value); + else + dev_info(rtk_phy->dev, "toggle okay addr=0x%02x, data=0x%04x\n", + PHY_ADDR_0x30, check_value); + + /* Disable Debug mode by set 0x0D and 0x10 to default*/ + rtk_usb_phy_write(regAddr, PHY_ADDR_0x0D, value_0x0D); + rtk_usb_phy_write(regAddr, PHY_ADDR_0x10, value_0x10); + + phy_data->do_toggle = false; + } + + + if (phy_data->check_rx_front_end_offset) { + u16 rx_offset_code, rx_offset_range; + bool do_update = false; + + rx_offset_code = rtk_usb_phy_read(regAddr, PHY_ADDR_0x1F); + if (((rx_offset_code & REG_0x1F_RX_OFFSET_CODE_MASK) == 0x0) || + ((rx_offset_code & REG_0x1F_RX_OFFSET_CODE_MASK) == + REG_0x1F_RX_OFFSET_CODE_MASK)) + do_update = true; + + rx_offset_range = rtk_usb_phy_read(regAddr, PHY_ADDR_0x0B); + if (((rx_offset_range & REG_0x0B_RX_OFFSET_RANGE_MASK) == + REG_0x0B_RX_OFFSET_RANGE_MASK) && do_update) { + dev_warn(rtk_phy->dev, "Don't update rx_offset_range (rx_offset_code=0x%x, rx_offset_range=0x%x)\n", + rx_offset_code, rx_offset_range); + do_update = false; + } + + if (do_update) { + u16 tmp1, tmp2; + + tmp1 = rx_offset_range & (~REG_0x0B_RX_OFFSET_RANGE_MASK); + tmp2 = rx_offset_range & REG_0x0B_RX_OFFSET_RANGE_MASK; + tmp2 += (1 << 2); + rx_offset_range = tmp1 | (tmp2 & REG_0x0B_RX_OFFSET_RANGE_MASK); + rtk_usb_phy_write(regAddr, PHY_ADDR_0x0B, rx_offset_range); + goto do_toggle; + } + } + + return 0; +} + +static int rtk_usb_phy_init(struct phy *phy) +{ + struct rtk_usb_phy *rtk_phy = phy_get_drvdata(phy); + int ret = 0; + int i; + unsigned long phy_init_time = jiffies; + + if (!rtk_phy) { + pr_err("%s rtk_phy is NULL!\n", __func__); + return -ENODEV; + } + + dev_dbg(rtk_phy->dev, "Init RTK USB 3.0 PHY\n"); + for (i = 0; i < rtk_phy->phyN; i++) + ret = do_rtk_usb_phy_init(rtk_phy, i); + + dev_info(rtk_phy->dev, "Initialized RTK USB 3.0 PHY (take %dms)\n", + jiffies_to_msecs(jiffies - phy_init_time)); + return ret; +} + +static int rtk_usb_phy_exit(struct phy *phy) +{ + struct rtk_usb_phy *rtk_phy = phy_get_drvdata(phy); + + if (!rtk_phy) { + pr_err("%s rtk_phy is NULL!\n", __func__); + return -ENODEV; + } + + dev_dbg(rtk_phy->dev, "Exit RTK USB 3.0 PHY\n"); + + return 0; +} + +static const struct phy_ops ops = { + .init = rtk_usb_phy_init, + .exit = rtk_usb_phy_exit, + .owner = THIS_MODULE, +}; + +static void rtk_usb_phy_toggle(struct usb_phy *usb3_phy, bool isConnect, int port) +{ + int index = port; + struct rtk_usb_phy *rtk_phy = NULL; + + if (usb3_phy != NULL && usb3_phy->dev != NULL) + rtk_phy = dev_get_drvdata(usb3_phy->dev); + + if (rtk_phy == NULL) { + pr_err("%s ERROR! NO this device\n", __func__); + return; + } + + if (index > rtk_phy->phyN) { + pr_err("%s %d ERROR! port=%d > phyN=%d\n", + __func__, __LINE__, index, rtk_phy->phyN); + return; + } + + do_rtk_usb3_phy_toggle(rtk_phy, index, isConnect); +} + +static int rtk_usb_phy_notify_port_status(struct usb_phy *x, int port, + u16 portstatus, u16 portchange) +{ + bool isConnect = false; + + pr_debug("%s port=%d portstatus=0x%x portchange=0x%x\n", + __func__, port, (int)portstatus, (int)portchange); + if (portstatus & USB_PORT_STAT_CONNECTION) + isConnect = true; + + if (portchange & USB_PORT_STAT_C_CONNECTION) + rtk_usb_phy_toggle(x, isConnect, port); + + return 0; +} + +#ifdef CONFIG_DEBUG_FS +static struct dentry *create_phy_debug_root(void) +{ + struct dentry *phy_debug_root; + + phy_debug_root = debugfs_lookup("phy", usb_debug_root); + if (!phy_debug_root) { + phy_debug_root = debugfs_create_dir("phy", usb_debug_root); + if (!phy_debug_root) + pr_err("%s Error phy_debug_root is NULL\n", __func__); + else + pr_debug("%s Create phy_debug_root folder\n", __func__); + } + + return phy_debug_root; +} + +static int rtk_usb3_parameter_show(struct seq_file *s, void *unused) +{ + struct rtk_usb_phy *rtk_phy = s->private; + int i, index; + + for (i = 0; i < rtk_phy->phyN; i++) { + struct reg_addr *regAddr = + &((struct reg_addr *)rtk_phy->reg_addr)[i]; + struct phy_data *phy_data = + &((struct phy_data *)rtk_phy->phy_data)[i]; + struct phy_parameter *phy_parameter; + + phy_parameter = phy_data->parameter; + + seq_printf(s, "[USB3_PHY] PHY %d\n", i); + + for (index = 0; index < phy_data->size; index++) { + u8 addr = ARRAY_INDEX_MAP_PHY_ADDR(index); + u16 data = (phy_parameter + index)->data; + + if ((phy_parameter + index)->addr == 0xFF) + seq_printf(s, "[USB3_PHY], addr = 0x%02x, data = none ==> read value = 0x%04x\n", + addr, + rtk_usb_phy_read(regAddr, addr)); + else + seq_printf(s, "[USB3_PHY], addr = 0x%02x, data = 0x%04x ==> read value = 0x%04x\n", + addr, data, + rtk_usb_phy_read(regAddr, addr)); + } + + seq_puts(s, "Property:\n"); + seq_printf(s, "check_efuse: %s\n", + phy_data->check_efuse?"Enable":"Disable"); + seq_printf(s, "efuse_usb_u3_tx_lfps_swing_trim: 0x%x\n", + (int)phy_data->efuse_usb_u3_tx_lfps_swing_trim); + seq_printf(s, "do_toggle: %s\n", + phy_data->do_toggle?"Enable":"Disable"); + seq_printf(s, "do_toggle_once: %s\n", + phy_data->do_toggle_once?"Enable":"Disable"); + seq_printf(s, "use_default_parameter: %s\n", + phy_data->use_default_parameter?"Enable":"Disable"); + } + return 0; +} + +static int rtk_usb3_parameter_open(struct inode *inode, struct file *file) +{ + return single_open(file, rtk_usb3_parameter_show, inode->i_private); +} + +static const struct file_operations rtk_usb3_parameter_fops = { + .open = rtk_usb3_parameter_open, + .read = seq_read, + .llseek = seq_lseek, + .release = single_release, +}; + +static int __get_parameter_at_page(struct seq_file *s, + struct rtk_usb_phy *rtk_phy, + struct phy_parameter *phy_parameter_array, + const char *phy_addr) +{ + struct phy_parameter *phy_parameter; + uint32_t addr; + int i, ret; + + ret = kstrtouint(phy_addr, 16, &addr); + if (ret < 0) { + pr_err("%s::kstrtouint() failed\n", __func__); + return -EINVAL; + } + + i = PHY_ADDR_MAP_ARRAY_INDEX(addr); + phy_parameter = (phy_parameter_array + i); + + if (phy_parameter->addr != 0xFF) + seq_printf(s, "Now Parameter addr 0x%02x = 0x%04x\n", + phy_parameter->addr, phy_parameter->data); + else + seq_printf(s, "Now Parameter addr 0x%02x is default\n", + addr); + + dev_dbg(rtk_phy->dev, "%s addr=0x%02x data=0x%04x\n", + __func__, phy_parameter->addr, phy_parameter->data); + + return 0; +} + +static int __set_parameter_at_page( + struct rtk_usb_phy *rtk_phy, + struct reg_addr *regAddr, struct phy_data *phy_data, + struct phy_parameter *phy_parameter_array, + const char *phy_addr, const char *phy_value) +{ + struct phy_parameter *phy_parameter; + uint32_t addr, value; + int i, ret; + + ret = kstrtouint(phy_addr, 16, &addr); + if (ret < 0) { + pr_err("%s::kstrtouint() failed\n", __func__); + return -EINVAL; + } + ret = kstrtouint(phy_value, 16, &value); + if (ret < 0) { + pr_err("%s::kstrtouint() failed\n", __func__); + return -EINVAL; + } + + i = PHY_ADDR_MAP_ARRAY_INDEX(addr); + phy_parameter = (phy_parameter_array + i); + + if (phy_parameter->addr != 0xFF) { + phy_parameter->data = value; + } else { + phy_parameter->addr = addr; + phy_parameter->data = value; + } + + dev_info(rtk_phy->dev, "%s addr=0x%02x data=0x%04x\n", + __func__, phy_parameter->addr, phy_parameter->data); + + if (addr == PHY_ADDR_0x20) + dev_info(rtk_phy->dev, + "%s PHY_ADDR_0x20 NOT use efuse u3_tx_lfps_swing_trim value\n", + __func__); + + if (rtk_usb_phy_write(regAddr, addr, value)) + dev_err(rtk_phy->dev, + "[%s:%d] Error: addr=0x%02x value=0x%04x\n", + __func__, __LINE__, addr, value); + + return 0; +} + +static int rtk_usb3_set_parameter_show(struct seq_file *s, void *unused) +{ + struct rtk_usb_phy *rtk_phy = s->private; + const struct file *file = s->file; + const char *file_name = file_dentry(file)->d_iname; + struct dentry *p_dentry = file_dentry(file)->d_parent; + const char *phy_dir_name = p_dentry->d_iname; + int ret, index; + struct phy_data *phy_data = NULL; + + for (index = 0; index < rtk_phy->phyN; index++) { + size_t sz = 30; + char name[30] = {0}; + + snprintf(name, sz, "phy%d", index); + if (strncmp(name, phy_dir_name, strlen(name)) == 0) { + phy_data = &((struct phy_data *)rtk_phy->phy_data)[index]; + break; + } + } + if (!phy_data) { + dev_err(rtk_phy->dev, + "%s: No phy_data for %s/%s\n", + __func__, phy_dir_name, file_name); + return -EINVAL; + } + + ret = __get_parameter_at_page(s, rtk_phy, phy_data->parameter, file_name); + if (ret < 0) + return ret; + + seq_puts(s, "Set phy parameter by following command\n"); + seq_printf(s, "echo \"value\" > %s/%s\n", + phy_dir_name, file_name); + + return 0; +} + +static int rtk_usb3_set_parameter_open(struct inode *inode, struct file *file) +{ + return single_open(file, rtk_usb3_set_parameter_show, inode->i_private); +} + +static ssize_t rtk_usb3_set_parameter_write(struct file *file, + const char __user *ubuf, size_t count, loff_t *ppos) +{ + const char *file_name = file_dentry(file)->d_iname; + struct dentry *p_dentry = file_dentry(file)->d_parent; + const char *phy_dir_name = p_dentry->d_iname; + struct seq_file *s = file->private_data; + struct rtk_usb_phy *rtk_phy = s->private; + struct reg_addr *regAddr = NULL; + struct phy_data *phy_data = NULL; + int ret = 0; + char buffer[40] = {0}; + int index; + + if (copy_from_user(&buffer, ubuf, + min_t(size_t, sizeof(buffer) - 1, count))) + return -EFAULT; + + for (index = 0; index < rtk_phy->phyN; index++) { + size_t sz = 30; + char name[30] = {0}; + + snprintf(name, sz, "phy%d", index); + if (strncmp(name, phy_dir_name, strlen(name)) == 0) { + regAddr = &((struct reg_addr *)rtk_phy->reg_addr)[index]; + phy_data = &((struct phy_data *)rtk_phy->phy_data)[index]; + break; + } + } + if (!regAddr) { + dev_err(rtk_phy->dev, + "%s: No regAddr for %s/%s\n", + __func__, phy_dir_name, file_name); + return -EINVAL; + } + if (!phy_data) { + dev_err(rtk_phy->dev, + "%s: No phy_data for %s/%s\n", + __func__, phy_dir_name, file_name); + return -EINVAL; + } + + ret = __set_parameter_at_page(rtk_phy, regAddr, phy_data, + phy_data->parameter, file_name, buffer); + if (ret < 0) + return ret; + + return count; +} + +static const struct file_operations rtk_usb3_set_parameter_fops = { + .open = rtk_usb3_set_parameter_open, + .write = rtk_usb3_set_parameter_write, + .read = seq_read, + .llseek = seq_lseek, + .release = single_release, +}; + +static int rtk_usb3_toggle_show(struct seq_file *s, void *unused) +{ + struct rtk_usb_phy *rtk_phy = s->private; + struct phy_data *phy_data; + int i; + + for (i = 0; i < rtk_phy->phyN; i++) { + phy_data = &((struct phy_data *)rtk_phy->phy_data)[i]; + seq_printf(s, "Now phy#%d do_toggle is %s.\n", + i, phy_data->do_toggle?"Enable":"Disable"); + } + seq_puts(s, "ehco 1 to enable toggle phy parameter.\n"); + + return 0; +} + +static int rtk_usb3_toggle_open(struct inode *inode, struct file *file) +{ + return single_open(file, rtk_usb3_toggle_show, inode->i_private); +} + +static ssize_t rtk_usb3_toggle_write(struct file *file, + const char __user *ubuf, size_t count, loff_t *ppos) +{ + struct seq_file *s = file->private_data; + struct rtk_usb_phy *rtk_phy = s->private; + char buf[32]; + struct phy_data *phy_data; + bool enable = false; + int i; + + if (copy_from_user(&buf, ubuf, min_t(size_t, sizeof(buf) - 1, count))) + return -EFAULT; + + if (!strncmp(buf, "1", 1)) + enable = true; + + for (i = 0; i < rtk_phy->phyN; i++) { + phy_data = &((struct phy_data *)rtk_phy->phy_data)[i]; + phy_data->do_toggle = enable; + dev_info(rtk_phy->dev, "Set phy#%d do_toggle is %s.\n", + i, phy_data->do_toggle?"Enable":"Disable"); + } + + return count; +} + +static const struct file_operations rtk_usb3_toggle_fops = { + .open = rtk_usb3_toggle_open, + .write = rtk_usb3_toggle_write, + .read = seq_read, + .llseek = seq_lseek, + .release = single_release, +}; + +static int create_debug_set_parameter_files(struct rtk_usb_phy *rtk_phy, + struct dentry *phy_dir, size_t addr_size) +{ + int i; + + for (i = 0; i < addr_size; i++) { + size_t sz = 30; + char name[30] = {0}; + + snprintf(name, sz, "%02x", ARRAY_INDEX_MAP_PHY_ADDR(i)); + + if (!debugfs_create_file(name, 0644, + phy_dir, rtk_phy, + &rtk_usb3_set_parameter_fops)) + dev_err(rtk_phy->dev, + "%s Error create file %s fail", + name, __func__); + } + + return 0; +} + +static inline void create_debug_files(struct rtk_usb_phy *rtk_phy) +{ + struct dentry *phy_debug_root = NULL; + struct dentry *set_parameter_dir = NULL; + + phy_debug_root = create_phy_debug_root(); + + if (!phy_debug_root) { + dev_err(rtk_phy->dev, "%s Error phy_debug_root is NULL", + __func__); + return; + } + rtk_phy->debug_dir = debugfs_create_dir(dev_name(rtk_phy->dev), + phy_debug_root); + if (!rtk_phy->debug_dir) { + dev_err(rtk_phy->dev, "%s Error debug_dir is NULL", __func__); + return; + } + + if (!debugfs_create_file("parameter", 0444, + rtk_phy->debug_dir, rtk_phy, + &rtk_usb3_parameter_fops)) + goto file_error; + + set_parameter_dir = debugfs_create_dir("set_parameter", + rtk_phy->debug_dir); + if (set_parameter_dir) { + int index, ret; + + for (index = 0; index < rtk_phy->phyN; index++) { + struct dentry *phy_dir; + struct phy_data *phy_data; + size_t sz = 30; + char name[30] = {0}; + + snprintf(name, sz, "phy%d", index); + + phy_data = &((struct phy_data *)rtk_phy->phy_data)[index]; + + phy_dir = debugfs_create_dir(name, set_parameter_dir); + if (!phy_dir) { + dev_err(rtk_phy->dev, + "%s Error create folder %s fail\n", + name, __func__); + goto file_error; + } + + ret = create_debug_set_parameter_files(rtk_phy, phy_dir, + phy_data->size); + if (ret < 0) { + dev_err(rtk_phy->dev, + "%s Error create files fail\n", + __func__); + goto file_error; + } + } + } + + if (!debugfs_create_file("toggle", 0644, rtk_phy->debug_dir, rtk_phy, + &rtk_usb3_toggle_fops)) + goto file_error; + + return; + +file_error: + debugfs_remove_recursive(rtk_phy->debug_dir); +} + +static inline void remove_debug_files(struct rtk_usb_phy *rtk_phy) +{ + debugfs_remove_recursive(rtk_phy->debug_dir); +} +#else +static inline void create_debug_files(struct rtk_usb_phy *rtk_phy) { } +static inline void remove_debug_files(struct rtk_usb_phy *rtk_phy) { } +#endif /* CONFIG_DEBUG_FS */ + +static int __get_phy_parameter_by_efuse(struct rtk_usb_phy *rtk_phy, + struct phy_data *phy_data, int index) +{ + u8 value = 0; + struct nvmem_cell *cell; + + if (!phy_data->check_efuse) + goto out; + + cell = nvmem_cell_get(rtk_phy->dev, "usb_u3_tx_lfps_swing_trim"); + if (IS_ERR(cell)) { + dev_warn(rtk_phy->dev, + "%s failed to get usb_u3_tx_lfps_swing_trim: %ld\n", + __func__, PTR_ERR(cell)); + } else { + unsigned char *buf; + size_t buf_size; + + buf = nvmem_cell_read(cell, &buf_size); + + value = buf[0] & USB_U3_TX_LFPS_SWING_TRIM_MASK; + + dev_dbg(rtk_phy->dev, + "phy index=%d buf=0x%x buf_size=%d value=0x%x\n", + index, buf[0], (int)buf_size, value); + kfree(buf); + nvmem_cell_put(cell); + } + + if ((value > 0) && (value < 0x8)) + phy_data->efuse_usb_u3_tx_lfps_swing_trim = 0x8; + else + phy_data->efuse_usb_u3_tx_lfps_swing_trim = (u8)value; + + dev_dbg(rtk_phy->dev, "Get Efuse usb_u3_tx_lfps_swing_trim=0x%x (value=0x%x)\n", + phy_data->efuse_usb_u3_tx_lfps_swing_trim, value); + +out: + return 0; +} + +static int __get_phy_parameter(struct device *dev, struct phy_data *phy_data, + struct device_node *sub_node) +{ + struct phy_parameter *phy_parameter; + int i, ret = 0; + int data_size, num_cells = 2; + + phy_data->size = MAX_USB_PHY_DATA_SIZE; + phy_data->parameter = devm_kzalloc(dev, + sizeof(struct phy_parameter) * phy_data->size, GFP_KERNEL); + if (!phy_data->parameter) + return -ENOMEM; + + if (!of_get_property(sub_node, "realtek,param", &data_size)) { + dev_dbg(dev, "%s No parameter (data_size=%d)\n", + __func__, data_size); + data_size = 0; + } + + if (!data_size) + goto out; + + phy_parameter = phy_data->parameter; + /* Set default addr to 0xff for no data case */ + for (i = 0; i < phy_data->size; i++) + (phy_parameter + i)->addr = 0xFF; + + data_size = data_size / (sizeof(u32) * num_cells); + for (i = 0; i < data_size; i++) { + struct phy_parameter *parameter; + u32 addr, data; + int offset, index; + + offset = i * num_cells; + + ret = of_property_read_u32_index(sub_node, "realtek,param", + offset, &addr); + if (ret) { + dev_err(dev, "ERROR: To get param i=%d addr=0x%x\n", + i, addr); + break; + } + + ret = of_property_read_u32_index(sub_node, "realtek,param", + offset + 1, &data); + if (ret) { + dev_err(dev, "ERROR: To get param i=%d addr=0x%x\n", + i, data); + break; + } + + index = PHY_ADDR_MAP_ARRAY_INDEX(addr); + parameter = (phy_parameter + index); + parameter->addr = (u8)addr; + parameter->data = (u16)data; + + dev_dbg(dev, "param index=%d addr=0x%x data=0x%x\n", index, + parameter->addr, parameter->data); + } + +out: + return ret; +} + +static int get_phy_parameter(struct rtk_usb_phy *rtk_phy, + struct device_node *sub_node) +{ + struct device *dev = rtk_phy->dev; + struct reg_addr *addr; + struct phy_data *phy_data; + int ret = 0; + int index; + + if (of_property_read_u32(sub_node, "reg", &index)) { + dev_err(dev, "sub_node without reg\n"); + return -EINVAL; + } + + dev_dbg(dev, "sub_node index=%d\n", index); + + addr = &((struct reg_addr *)rtk_phy->reg_addr)[index]; + phy_data = &((struct phy_data *)rtk_phy->phy_data)[index]; + + addr->reg_mdio_ctl = of_iomap(dev->of_node, 0) + index; + dev_dbg(dev, "%s %d #%d reg_mdio_ctl=%p\n", + __func__, __LINE__, index, addr->reg_mdio_ctl); + + if (!sub_node) { + dev_err(dev, "%s %d No device sub node\n", __func__, __LINE__); + goto err; + } + + ret = __get_phy_parameter(dev, phy_data, sub_node); + if (ret) + goto err; + + if (of_property_read_bool(sub_node, "realtek,do-toggle-once")) + phy_data->do_toggle_once = true; + else + phy_data->do_toggle_once = false; + + if (of_property_read_bool(sub_node, "realtek,do-toggle")) + phy_data->do_toggle = true; + else + phy_data->do_toggle = false; + + if (of_property_read_bool(sub_node, "realtek,use-default-parameter")) + phy_data->use_default_parameter = true; + else + phy_data->use_default_parameter = false; + + if (of_property_read_bool(sub_node, "realtek,check-rx-front-end-offset")) + phy_data->check_rx_front_end_offset = true; + else + phy_data->check_rx_front_end_offset = false; + + if (of_property_read_bool(sub_node, "realtek,check-efuse")) + phy_data->check_efuse = true; + else + phy_data->check_efuse = false; + + __get_phy_parameter_by_efuse(rtk_phy, phy_data, index); + +err: + return ret; +} + +static int rtk_usb3phy_probe(struct platform_device *pdev) +{ + struct rtk_usb_phy *rtk_phy; + struct device *dev = &pdev->dev; + struct device_node *node; + struct device_node *sub_node; + struct phy *generic_phy; + struct phy_provider *phy_provider; + int ret, phyN; + + rtk_phy = devm_kzalloc(dev, sizeof(*rtk_phy), GFP_KERNEL); + if (!rtk_phy) + return -ENOMEM; + + rtk_phy->dev = &pdev->dev; + rtk_phy->phy.dev = rtk_phy->dev; + rtk_phy->phy.label = "rtk-usb3phy"; + rtk_phy->phy.notify_port_status = rtk_usb_phy_notify_port_status; + + if (!dev->of_node) { + dev_err(dev, "%s %d No device node\n", __func__, __LINE__); + ret = -ENODEV; + goto err; + } + + node = dev->of_node; + + phyN = of_get_child_count(node); + rtk_phy->phyN = phyN; + dev_dbg(dev, "%s phyN=%d\n", __func__, rtk_phy->phyN); + + rtk_phy->reg_addr = devm_kzalloc(dev, + sizeof(struct reg_addr) * phyN, GFP_KERNEL); + if (!rtk_phy->reg_addr) + return -ENOMEM; + + rtk_phy->phy_data = devm_kzalloc(dev, + sizeof(struct phy_data) * phyN, GFP_KERNEL); + if (!rtk_phy->phy_data) + return -ENOMEM; + + for (sub_node = of_get_next_child(node, NULL); sub_node != NULL; + sub_node = of_get_next_child(node, sub_node)) { + ret = get_phy_parameter(rtk_phy, sub_node); + if (ret) { + dev_err(dev, "%s: get_phy_parameter fail ret=%d\n", + __func__, ret); + goto err; + } + } + + platform_set_drvdata(pdev, rtk_phy); + + generic_phy = devm_phy_create(rtk_phy->dev, NULL, &ops); + if (IS_ERR(generic_phy)) + return PTR_ERR(generic_phy); + + phy_set_drvdata(generic_phy, rtk_phy); + + phy_provider = devm_of_phy_provider_register(rtk_phy->dev, + of_phy_simple_xlate); + if (IS_ERR(phy_provider)) + return PTR_ERR(phy_provider); + + ret = usb_add_phy_dev(&rtk_phy->phy); + if (ret) + goto err; + + create_debug_files(rtk_phy); + +err: + dev_dbg(&pdev->dev, "Probe RTK USB 3.0 PHY (ret=%d)\n", ret); + + return ret; +} + +static void rtk_usb3phy_remove(struct platform_device *pdev) +{ + struct rtk_usb_phy *rtk_phy = platform_get_drvdata(pdev); + + remove_debug_files(rtk_phy); + + usb_remove_phy(&rtk_phy->phy); +} + +static const struct of_device_id usbphy_rtk_dt_match[] = { + { .compatible = "realtek,usb3phy", }, + {}, +}; +MODULE_DEVICE_TABLE(of, usbphy_rtk_dt_match); + +static struct platform_driver rtk_usb3phy_driver = { + .probe = rtk_usb3phy_probe, + .remove_new = rtk_usb3phy_remove, + .driver = { + .name = "rtk-usb3phy", + .owner = THIS_MODULE, + .of_match_table = usbphy_rtk_dt_match, + }, +}; + +module_platform_driver(rtk_usb3phy_driver); + +MODULE_LICENSE("GPL"); +MODULE_ALIAS("platform: rtk-usb3phy"); +MODULE_AUTHOR("Stanley Chang "); +MODULE_DESCRIPTION("Realtek usb 3.0 phy driver"); From patchwork Wed Jun 7 06:24:40 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: =?utf-8?b?U3RhbmxleSBDaGFuZ1vmmIzogrLlvrdd?= X-Patchwork-Id: 104264 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a59:994d:0:b0:3d9:f83d:47d9 with SMTP id k13csp46051vqr; Tue, 6 Jun 2023 23:28:03 -0700 (PDT) X-Google-Smtp-Source: ACHHUZ7OqTO21D9rfAuC9kpP305aD8lhUzu4dp35XNNvaYRgFMKtoRn0uvroDfGi5zS51xleAuwe X-Received: by 2002:a05:6a00:8d6:b0:654:ab4:305 with SMTP id s22-20020a056a0008d600b006540ab40305mr5934255pfu.2.1686119283075; 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[2620:137:e000::1:20]) by mx.google.com with ESMTP id z6-20020aa79e46000000b0064d72c6eab6si859137pfq.274.2023.06.06.23.27.50; Tue, 06 Jun 2023 23:28:03 -0700 (PDT) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) client-ip=2620:137:e000::1:20; Authentication-Results: mx.google.com; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S235053AbjFGG0b (ORCPT + 99 others); Wed, 7 Jun 2023 02:26:31 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:50550 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S234352AbjFGG03 (ORCPT ); Wed, 7 Jun 2023 02:26:29 -0400 Received: from rtits2.realtek.com.tw (rtits2.realtek.com [211.75.126.72]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 427641725; Tue, 6 Jun 2023 23:26:25 -0700 (PDT) Authenticated-By: X-SpamFilter-By: ArmorX SpamTrap 5.77 with qID 3576PJQ20024705, This message is accepted by code: ctloc85258 Received: from mail.realtek.com (rtexh36505.realtek.com.tw[172.21.6.25]) by rtits2.realtek.com.tw (8.15.2/2.81/5.90) with ESMTPS id 3576PJQ20024705 (version=TLSv1.2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128 verify=OK); Wed, 7 Jun 2023 14:25:19 +0800 Received: from RTEXMBS02.realtek.com.tw (172.21.6.95) by RTEXH36505.realtek.com.tw (172.21.6.25) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.2375.32; Wed, 7 Jun 2023 14:25:34 +0800 Received: from RTEXH36505.realtek.com.tw (172.21.6.25) by RTEXMBS02.realtek.com.tw (172.21.6.95) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.2375.7; Wed, 7 Jun 2023 14:25:33 +0800 Received: from localhost.localdomain (172.21.252.101) by RTEXH36505.realtek.com.tw (172.21.6.25) with Microsoft SMTP Server id 15.1.2375.32 via Frontend Transport; Wed, 7 Jun 2023 14:25:33 +0800 From: Stanley Chang To: Greg Kroah-Hartman CC: Stanley Chang , Vinod Koul , Kishon Vijay Abraham I , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Alan Stern , Ray Chi , Matthias Kaehlcke , Douglas Anderson , Michael Grzeschik , Mathias Nyman , Flavio Suligoi , , , , Subject: [PATCH v3 4/5] dt-bindings: phy: realtek: Add the doc about the Realtek SoC USB 2.0 PHY Date: Wed, 7 Jun 2023 14:24:40 +0800 Message-ID: <20230607062500.24669-4-stanley_chang@realtek.com> X-Mailer: git-send-email 2.40.1 In-Reply-To: <20230607062500.24669-1-stanley_chang@realtek.com> References: <20230607062500.24669-1-stanley_chang@realtek.com> MIME-Version: 1.0 X-KSE-ServerInfo: RTEXMBS02.realtek.com.tw, 9 X-KSE-AntiSpam-Interceptor-Info: fallback X-KSE-Antivirus-Interceptor-Info: fallback X-KSE-AntiSpam-Interceptor-Info: fallback X-KSE-ServerInfo: RTEXH36505.realtek.com.tw, 9 X-KSE-AntiSpam-Interceptor-Info: fallback X-KSE-Antivirus-Interceptor-Info: fallback X-KSE-AntiSpam-Interceptor-Info: fallback X-Spam-Status: No, score=-1.9 required=5.0 tests=BAYES_00,SPF_HELO_NONE, SPF_PASS,T_SCC_BODY_TEXT_LINE,URIBL_BLOCKED autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-getmail-retrieved-from-mailbox: =?utf-8?q?INBOX?= X-GMAIL-THRID: =?utf-8?q?1768024213255230530?= X-GMAIL-MSGID: =?utf-8?q?1768024213255230530?= Add the documentation explain the property about Realtek USB PHY driver. Realtek DHC (digital home center) RTD SoCs support DWC3 XHCI USB controller. Added the driver to drive the USB 2.0 PHY transceivers. Signed-off-by: Stanley Chang --- v2 to v3 change: 1. Broken down into two patches, one for each of USB 2 & 3. 2. Add more description about Realtek RTD SoCs architecture. 3. Removed parameter v1 support for simplification. 4. Revised the compatible name for fallback compatible. 5. Remove some properties that can be set in the driver. v1 to v2 change: Add phy-cells for generic phy driver --- .../bindings/phy/realtek,usb2phy.yaml | 213 ++++++++++++++++++ 1 file changed, 213 insertions(+) create mode 100644 Documentation/devicetree/bindings/phy/realtek,usb2phy.yaml diff --git a/Documentation/devicetree/bindings/phy/realtek,usb2phy.yaml b/Documentation/devicetree/bindings/phy/realtek,usb2phy.yaml new file mode 100644 index 000000000000..69911e20a561 --- /dev/null +++ b/Documentation/devicetree/bindings/phy/realtek,usb2phy.yaml @@ -0,0 +1,213 @@ +# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) +# Copyright 2023 Realtek Semiconductor Corporation +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/phy/realtek,usb2phy.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Realtek DHC SoCs USB 2.0 PHY + +maintainers: + - Stanley Chang + +description: + Realtek USB 2.0 PHY support the digital home center (DHC) RTD series SoCs. + The USB 2.0 PHY driver is designed to support the XHCI controller. The SoCs + support multiple XHCI controllers. One PHY device node maps to one XHCI + controller. + + RTD1295/RTD1619 SoCs USB + The USB architecture includes three XHCI controllers. + Each XHCI maps to one USB 2.0 PHY and map one USB 3.0 PHY on some + controllers. + XHCI controller#0 -- usb2phy -- phy#0 + |- usb3phy -- phy#0 + XHCI controller#1 -- usb2phy -- phy#0 + XHCI controller#2 -- usb2phy -- phy#0 + |- usb3phy -- phy#0 + + RTD1395 SoCs USB + The USB architecture includes two XHCI controllers. + The controller#0 has one USB 2.0 PHY. The controller#1 includes two USB 2.0 + PHY. + XHCI controller#0 -- usb2phy -- phy#0 + XHCI controller#1 -- usb2phy -- phy#0 + |- phy#1 + + RTD1319/RTD1619b SoCs USB + The USB architecture includes three XHCI controllers. + Each XHCI maps to one USB 2.0 PHY and map one USB 3.0 PHY on controllers#2. + XHCI controller#0 -- usb2phy -- phy#0 + XHCI controller#1 -- usb2phy -- phy#0 + XHCI controller#2 -- usb2phy -- phy#0 + |- usb3phy -- phy#0 + + RTD1319d SoCs USB + The USB architecture includes three XHCI controllers. + Each xhci maps to one USB 2.0 PHY and map one USB 3.0 PHY on controllers#0. + XHCI controller#0 -- usb2phy -- phy#0 + |- usb3phy -- phy#0 + XHCI controller#1 -- usb2phy -- phy#0 + XHCI controller#2 -- usb2phy -- phy#0 + + RTD1312c/RTD1315e SoCs USB + The USB architecture includes three XHCI controllers. + Each XHCI maps to one USB 2.0 PHY. + XHCI controller#0 -- usb2phy -- phy#0 + XHCI controller#1 -- usb2phy -- phy#0 + XHCI controller#2 -- usb2phy -- phy#0 + +properties: + compatible: + items: + - enum: + - realtek,rtd1295-usb2phy + - realtek,rtd1395-usb2phy + - realtek,rtd1619-usb2phy + - realtek,rtd1319-usb2phy + - realtek,rtd1619b-usb2phy + - realtek,rtd1312c-usb2phy + - realtek,rtd1319d-usb2phy + - realtek,rtd1315e-usb2phy + - const: realtek,usb2phy + + reg: + items: + - description: PHY data registers + - description: PHY control registers + + "#address-cells": + const: 1 + + "#size-cells": + const: 0 + + "#phy-cells": + const: 0 + + realtek,usb-ctrl: + description: The phandle of syscon used to control USB PHY power domain. + $ref: /schemas/types.yaml#/definitions/phandle + +patternProperties: + "^phy@[0-3]+$": + type: object + description: + Each sub-node is a PHY device for one XHCI controller. + For most Relatek SoCs, one XHCI controller only support one the USB 2.0 + phy. For RTD1395 SoC, the one XHCI controller has two USB 2.0 PHYs. + properties: + realtek,page0-param: + description: PHY parameter at page 0. The data are the pair of the + offset and value. + $ref: /schemas/types.yaml#/definitions/uint32-array + + realtek,page1-param: + description: PHY parameter at page 1. The data are the pair of the + offset and value. + $ref: /schemas/types.yaml#/definitions/uint32-array + + realtek,page2-param: + description: PHY parameter at page 2. The data are the pair of the + offset and value. If the PHY support the page 2 parameter. + $ref: /schemas/types.yaml#/definitions/uint32-array + + realtek,support-page2-param: + description: Set this flag if PHY support page 2 parameter. + type: boolean + + realtek,do-toggle: + description: Set this flag to enable PHY parameter toggle when port + status change. + type: boolean + + realtek,do-toggle-driving: + description: Set this flag to enable PHY parameter toggle for adjust + the driving when port status change. + type: boolean + + realtek,check-efuse: + description: Enable to update PHY parameter from reading otp table. + type: boolean + + realtek,use-default-parameter: + description: Don't set parameter and use default value in hardware. + type: boolean + + realtek,is-double-sensitivity-mode: + description: Set this flag to enable double sensitivity mode. + type: boolean + + realtek,ldo-force-enable: + description: Set this flag to force enable ldo mode. + type: boolean + + realtek,ldo-driving-compensate: + description: Set the value for adjust the PHY driving for ldo mode. + $ref: /schemas/types.yaml#/definitions/uint32 + + realtek,driving-compensate: + description: Set the value for adjust the PHY driving for efuse + table v2. + $ref: /schemas/types.yaml#/definitions/uint32 + +required: + - compatible + - reg + - "#address-cells" + - "#size-cells" + - "#phy-cells" + +additionalProperties: false + +examples: + - | + usb_port0_usb2phy: usb-phy@13214 { + compatible = "realtek,rtd1319d-usb2phy", "realtek,usb2phy"; + reg = <0x13214 0x4>, <0x28280 0x4>; + #address-cells = <1>; + #size-cells = <0>; + #phy-cells = <0>; + realtek,usb-ctrl = <&usb_ctrl>; + + phy@0 { + reg = <0>; + realtek,page0-param = + <0xe0 0xa3>, <0xe4 0xb2>, <0xe5 0x4e>, <0xe6 0x42>; + realtek,page1-param = <0xe3 0x64>; + realtek,page2-param = <0xe7 0x45>; + realtek,support-page2-param; + realtek,do-toggle; + realtek.do-toggle-driving; + realtek,check-efuse; + realtek,is-double-sensitivity-mode; + realtek,ldo-force-enable; + }; + }; + + - | + usb_port1_usb2phy: usb-phy@13c14 { + compatible = "realtek,rtd1395-usb2phy", "realtek,usb2phy"; + reg = <0x132c4 0x4>, <0x31280 0x8>; + #address-cells = <1>; + #size-cells = <0>; + #phy-cells = <0>; + realtek,usb-ctrl = <&usb_ctrl>; + + phy@0 { + reg = <0>; + realtek,page0-param = + <0xe0 0xa3>, <0xe4 0xb2>, <0xe5 0x4e>, <0xe6 0x42>; + realtek,page1-param = <0xe3 0x00>; + realtek,do-toggle; + realtek,check-efuse; + }; + phy@1 { + reg = <1>; + realtek,page0-param = + <0xe0 0xe0>, <0xe4 0xb2>, <0xe5 0x4e>, <0xe6 0x42>; + realtek,page1-param = <0xe3 0x00>; + realtek,do-toggle; + realtek,check-efuse; + }; + }; From patchwork Wed Jun 7 06:24:41 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: =?utf-8?b?U3RhbmxleSBDaGFuZ1vmmIzogrLlvrdd?= X-Patchwork-Id: 104266 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a59:994d:0:b0:3d9:f83d:47d9 with SMTP id k13csp46268vqr; Tue, 6 Jun 2023 23:28:47 -0700 (PDT) X-Google-Smtp-Source: ACHHUZ6w0/KtSVGFfIpeXd8nFN9/C0ClepSc9fdNO3lNwl/frqKpnwey8s5wVDF7YEPNB81IVAi8 X-Received: by 2002:a05:6a21:328b:b0:105:12ab:878f with SMTP id yt11-20020a056a21328b00b0010512ab878fmr2456945pzb.56.1686119327222; Tue, 06 Jun 2023 23:28:47 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1686119327; cv=none; d=google.com; s=arc-20160816; b=Ybbk6iicz1/9fAChAbTulCfmD/JRNvM3PJzU8+fs87ixwAn4asCmD7Zj5Gwbvu5tma SBDXFJLLtBoO+D4aJ4XJbJYr92faxlUDpdeAo53NU3Y8Lvp+eGCUFmdBSRYKbWHB4WyV k7RLK7gdr1r3jnWTMERjo4UPDvALEWirr29hpzUAghB36vLHDJdh/+LdKkbN3RCzUz0x K6loGFd/GESEh36qdjJbfIIHNDChq9rPQPfnytGO4Gy10v/5IwveTDp0xx2q91DyJKq8 /xfPsDkeY3LsRo90O32V+XNgVYgOzdh3SqdN2m3MDJaFCczK6THNuUFYWW5gGdGRKcrm sL6A== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from :authenticated-by; bh=73QkG/84gsbi/2sAihP5yeD7gBimgxE7rFbqxWzTKeM=; b=zt0Udvyif+UitfCwjTi1G3Dq+5zmKw7PUJlzSFv4x/6ppsvbF7ikFnClmxN4i/mzVS uQNJiZbVvWFDZHtPCtr0IvaEr9BLi+74wSkvNtFVoL2pzPrRLTKzsTM7ZyGh/NYUtHhi gDWPrjDMhI2235Nbb7VB9XIUk7+aYyMAwTtOaLw+bu6WfytEyfs8pJoRqAlmg5aYuEC/ TBgPoO+KYBqaaKR0eXUWKpk3NTF+lAlqhX8m1ieTSjjNGyZPdJG24e1WqNxz4FK6SIWp cApE7iIgncrdQ5UwTvDC1Mum8+vaUAmaCxxsZFzSREm9jR/lpiEh6vptE5pAqygFKryg kHaA== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: from out1.vger.email (out1.vger.email. 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Realtek DHC (digital home center) RTD SoCs support DWC3 XHCI USB controller. Added the driver to drive the USB 3.0 PHY transceivers. Signed-off-by: Stanley Chang --- v2 to v3 change: 1. Broken down into two patches, one for each of USB 2 & 3. 2. Add more description about Realtek RTD SoCs architecture. 3. Removed parameter v1 support for simplification. 4. Revised the compatible name for fallback compatible. 5. Remove some properties that can be set in the driver. v1 to v2 change: Add phy-cells for generic phy driver --- .../bindings/phy/realtek,usb3phy.yaml | 156 ++++++++++++++++++ 1 file changed, 156 insertions(+) create mode 100644 Documentation/devicetree/bindings/phy/realtek,usb3phy.yaml diff --git a/Documentation/devicetree/bindings/phy/realtek,usb3phy.yaml b/Documentation/devicetree/bindings/phy/realtek,usb3phy.yaml new file mode 100644 index 000000000000..b45c398bba5f --- /dev/null +++ b/Documentation/devicetree/bindings/phy/realtek,usb3phy.yaml @@ -0,0 +1,156 @@ +# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) +# Copyright 2023 Realtek Semiconductor Corporation +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/phy/realtek,usb3phy.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Realtek DHC SoCs USB 3.0 PHY + +maintainers: + - Stanley Chang + +description: + Realtek USB 3.0 PHY support the digital home center (DHC) RTD series SoCs. + The USB 3.0 PHY driver is designed to support the XHCI controller. The SoCs + support multiple XHCI controllers. One PHY device node maps to one XHCI + controller. + + RTD1295/RTD1619 SoCs USB + The USB architecture includes three XHCI controllers. + Each XHCI maps to one USB 2.0 PHY and map one USB 3.0 PHY on some + controllers. + XHCI controller#0 -- usb2phy -- phy#0 + |- usb3phy -- phy#0 + XHCI controller#1 -- usb2phy -- phy#0 + XHCI controller#2 -- usb2phy -- phy#0 + |- usb3phy -- phy#0 + + RTD1395 SoCs USB + The USB architecture includes two XHCI controllers. + The controller#0 has one USB 2.0 PHY. The controller#1 includes two USB 2.0 + PHY. + XHCI controller#0 -- usb2phy -- phy#0 + XHCI controller#1 -- usb2phy -- phy#0 + |- phy#1 + + RTD1319/RTD1619b SoCs USB + The USB architecture includes three XHCI controllers. + Each XHCI maps to one USB 2.0 PHY and map one USB 3.0 PHY on controllers#2. + XHCI controller#0 -- usb2phy -- phy#0 + XHCI controller#1 -- usb2phy -- phy#0 + XHCI controller#2 -- usb2phy -- phy#0 + |- usb3phy -- phy#0 + + RTD1319d SoCs USB + The USB architecture includes three XHCI controllers. + Each xhci maps to one USB 2.0 PHY and map one USB 3.0 PHY on controllers#0. + XHCI controller#0 -- usb2phy -- phy#0 + |- usb3phy -- phy#0 + XHCI controller#1 -- usb2phy -- phy#0 + XHCI controller#2 -- usb2phy -- phy#0 + + RTD1312c/RTD1315e SoCs USB + The USB architecture includes three XHCI controllers. + Each XHCI maps to one USB 2.0 PHY. + XHCI controller#0 -- usb2phy -- phy#0 + XHCI controller#1 -- usb2phy -- phy#0 + XHCI controller#2 -- usb2phy -- phy#0 + +properties: + compatible: + items: + - enum: + - realtek,rtd1295-usb3phy + - realtek,rtd1619-usb3phy + - realtek,rtd1319-usb3phy + - realtek,rtd1619b-usb3phy + - realtek,rtd1319d-usb3phy + - const: realtek,usb3phy + + reg: + description: PHY data registers + maxItems: 1 + + "#address-cells": + const: 1 + + "#size-cells": + const: 0 + + "#phy-cells": + const: 0 + +patternProperties: + "^phy@[0-3]+$": + description: Each sub-node is a PHY device for one XHCI controller. + type: object + properties: + realtek,param: + description: The data of PHY parameter are the pair of the + offset and value. + $ref: /schemas/types.yaml#/definitions/uint8-array + + realtek,do-toggle: + description: Set this flag to enable the PHY parameter toggle + when port status change. + type: boolean + + realtek,do-toggle-once: + description: Set this flag to do PHY parameter toggle only on + PHY init. + type: boolean + + realtek,check-efuse: + description: Enable to update PHY parameter from reading otp table. + type: boolean + + realtek,use-default-parameter: + description: Don't set parameter and use default value in hardware. + type: boolean + + realtek,check-rx-front-end-offset: + description: Enable to check rx front end offset. + type: boolean + +required: + - compatible + - reg + - "#address-cells" + - "#size-cells" + - "#phy-cells" + +additionalProperties: false + +examples: + - | + usb_port2_usb3phy: usb-phy@13e10 { + compatible = "realtek,rtd1319d-usb3phy", "realtek,usb3phy"; + reg = <0x13e10 0x4>; + #address-cells = <1>; + #size-cells = <0>; + #phy-cells = <0>; + + phy@0 { + reg = <0>; + realtek,param = + <0x01 0xac8c>, + <0x06 0x0017>, + <0x09 0x724c>, + <0x0B 0xb90d>, + <0x0A 0xb610>, + <0x0D 0xef2a>, + <0x0F 0x9050>, + <0x10 0x000c>, + <0x20 0x70ff>, + <0x21 0xcfaa>, + <0x22 0x0013>, + <0x23 0xdb66>, + <0x26 0x8609>, + <0x29 0xff13>, + <0x2A 0x3070>; + realtek,do-toggle-once; + realtek,check-efuse; + }; + }; +