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[83.9.31.150]) by smtp.gmail.com with ESMTPSA id y4-20020a05651c020400b002ab1536377fsm1884219ljn.105.2023.06.06.10.29.19 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 06 Jun 2023 10:29:20 -0700 (PDT) From: Konrad Dybcio Date: Tue, 06 Jun 2023 19:29:19 +0200 Subject: [PATCH] arm64: dts: qcom: qcm2290: Add USB3 PHY MIME-Version: 1.0 Message-Id: <20230606-topic-qcm2290_usb3-v1-1-3e8fbcb89088@linaro.org> X-B4-Tracking: v=1; b=H4sIAO5sf2QC/x2N0QrCMAwAf2Xk2UDNWLH+ioikNXWB2c3GiTD27 xYf7+C4DUyqisG526DKR03n0uB46CCNXB6Cem8M5Kh33nl8z4smfKUnUXC31WKPQ/YnphAGzh5 aGNkEY+WSxpaWdZqaXKpk/f5Pl+u+/wAwVtjWeQAAAA== To: Andy Gross , Bjorn Andersson , Rob Herring , Krzysztof Kozlowski , Conor Dooley Cc: Marijn Suijten , linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, Konrad Dybcio X-Mailer: b4 0.12.2 X-Developer-Signature: v=1; a=ed25519-sha256; t=1686072559; l=2128; i=konrad.dybcio@linaro.org; s=20230215; h=from:subject:message-id; bh=AkMqnuWaPJkCWdsPFrwJlwWzF/mTmk/8kpPTns9s3nI=; b=kig3KlbpKeoUjT3Jf+ujcsgfVhZWjBtl0iM/EnPZsdV/V/gyJoGPM0G8DItA5hUQS9w278qcb PrrBU/3a8ffAWD+d2Q/o+wF2eAOIDNT2f3O5A/vfsxggnAlaspwkG7I X-Developer-Key: i=konrad.dybcio@linaro.org; a=ed25519; pk=iclgkYvtl2w05SSXO5EjjSYlhFKsJ+5OSZBjOkQuEms= X-Spam-Status: No, score=-2.1 required=5.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,RCVD_IN_DNSWL_NONE, SPF_HELO_NONE,SPF_PASS,T_SCC_BODY_TEXT_LINE,URIBL_BLOCKED autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-getmail-retrieved-from-mailbox: =?utf-8?q?INBOX?= X-GMAIL-THRID: =?utf-8?q?1767976780142693973?= X-GMAIL-MSGID: =?utf-8?q?1767976780142693973?= Describe the USB3 PHY and hook it up to the USB3 controller. Signed-off-by: Konrad Dybcio --- The corresponding patch enabling in on RB1 will be posted after the regulator situation gets resolved. It is confirmed working with a totally hacked-up regulator setup though.. --- arch/arm64/boot/dts/qcom/qcm2290.dtsi | 30 ++++++++++++++++++++++++++++-- 1 file changed, 28 insertions(+), 2 deletions(-) --- base-commit: 6db29e14f4fb7bce9eb5290288e71b05c2b0d118 change-id: 20230606-topic-qcm2290_usb3-5f68a2995af6 Best regards, diff --git a/arch/arm64/boot/dts/qcom/qcm2290.dtsi b/arch/arm64/boot/dts/qcom/qcm2290.dtsi index b29bc4e4b837..1a02faacedda 100644 --- a/arch/arm64/boot/dts/qcom/qcm2290.dtsi +++ b/arch/arm64/boot/dts/qcom/qcm2290.dtsi @@ -577,6 +577,32 @@ usb_hsphy: phy@1613000 { status = "disabled"; }; + usb_qmpphy: phy@1615000 { + compatible = "qcom,qcm2290-qmp-usb3-phy"; + reg = <0x0 0x01615000 0x0 0x1000>; + + clocks = <&gcc GCC_AHB2PHY_USB_CLK>, + <&gcc GCC_USB3_PRIM_CLKREF_CLK>, + <&gcc GCC_USB3_PRIM_PHY_COM_AUX_CLK>, + <&gcc GCC_USB3_PRIM_PHY_PIPE_CLK>; + clock-names = "cfg_ahb", + "ref", + "com_aux", + "pipe"; + + resets = <&gcc GCC_USB3_PHY_PRIM_SP0_BCR>, + <&gcc GCC_USB3PHY_PHY_PRIM_SP0_BCR>; + reset-names = "phy", + "phy_phy"; + + #clock-cells = <0>; + clock-output-names = "usb3_phy_pipe_clk_src"; + + #phy-cells = <0>; + + status = "disabled"; + }; + qfprom@1b44000 { compatible = "qcom,qcm2290-qfprom", "qcom,qfprom"; reg = <0x0 0x01b44000 0x0 0x3000>; @@ -1001,8 +1027,8 @@ usb_dwc3: usb@4e00000 { compatible = "snps,dwc3"; reg = <0x0 0x04e00000 0x0 0xcd00>; interrupts = ; - phys = <&usb_hsphy>; - phy-names = "usb2-phy"; + phys = <&usb_hsphy>, <&usb_qmpphy>; + phy-names = "usb2-phy", "usb3-phy"; iommus = <&apps_smmu 0x120 0x0>; snps,dis_u2_susphy_quirk; snps,dis_enblslpm_quirk;