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Tue, 6 Jun 2023 09:19:28 GMT Received: from smtpav07.fra02v.mail.ibm.com (unknown [127.0.0.1]) by IMSVA (Postfix) with ESMTP id 5663B2004B; Tue, 6 Jun 2023 09:19:28 +0000 (GMT) Received: from smtpav07.fra02v.mail.ibm.com (unknown [127.0.0.1]) by IMSVA (Postfix) with ESMTP id 4946A20040; Tue, 6 Jun 2023 09:19:26 +0000 (GMT) Received: from [9.177.93.112] (unknown [9.177.93.112]) by smtpav07.fra02v.mail.ibm.com (Postfix) with ESMTP; Tue, 6 Jun 2023 09:19:25 +0000 (GMT) Message-ID: <124c676e-27ed-252e-3f33-0f9b370ef08e@linux.ibm.com> Date: Tue, 6 Jun 2023 17:19:24 +0800 MIME-Version: 1.0 User-Agent: Mozilla/5.0 (Macintosh; Intel Mac OS X 10.15; rv:91.0) Gecko/20100101 Thunderbird/91.6.1 Content-Language: en-US Subject: [PATCH] rs6000: Guard __builtin_{un,}pack_vector_int128 with vsx [PR109932] To: GCC Patches Cc: Segher Boessenkool , David Edelsohn , Peter Bergner X-TM-AS-GCONF: 00 X-Proofpoint-ORIG-GUID: FMChnFRvx1R2Hd_elAlH-M17tbNzbNNR X-Proofpoint-GUID: eIzY5sL-4KDjVWSLebzWIWdEm5wkYWvZ X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.254,Aquarius:18.0.957,Hydra:6.0.573,FMLib:17.11.176.26 definitions=2023-06-06_05,2023-06-05_01,2023-05-22_02 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 mlxscore=0 malwarescore=0 mlxlogscore=900 suspectscore=0 bulkscore=0 phishscore=0 lowpriorityscore=0 priorityscore=1501 clxscore=1015 spamscore=0 impostorscore=0 adultscore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.12.0-2304280000 definitions=main-2306060078 X-Spam-Status: No, score=-11.8 required=5.0 tests=BAYES_00, DKIM_SIGNED, DKIM_VALID, DKIM_VALID_EF, GIT_PATCH_0, KAM_SHORT, RCVD_IN_MSPIKE_H5, RCVD_IN_MSPIKE_WL, SPF_HELO_NONE, SPF_PASS, TXREP, T_SCC_BODY_TEXT_LINE autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on server2.sourceware.org X-BeenThere: gcc-patches@gcc.gnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Gcc-patches mailing list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-Patchwork-Original-From: "Kewen.Lin via Gcc-patches" From: "Kewen.Lin" Reply-To: "Kewen.Lin" Errors-To: gcc-patches-bounces+ouuuleilei=gmail.com@gcc.gnu.org Sender: "Gcc-patches" X-getmail-retrieved-from-mailbox: =?utf-8?q?INBOX?= X-GMAIL-THRID: =?utf-8?q?1767944460866373337?= X-GMAIL-MSGID: =?utf-8?q?1767944460866373337?= Hi, As PR109932 shows, builtins __builtin_{un,}pack_vector_int128 should be guarded under vsx rather than power7, as their corresponding bif patterns have the conditions TARGET_VSX and VECTOR_MEM_ALTIVEC_OR_VSX_P (V1TImode). This patch is to move __builtin_{un,}pack_vector_int128 to stanza vsx to ensure their supports. Bootstrapped and regtested on powerpc64-linux-gnu P7/P8/P9 and powerpc64le-linux-gnu P9 and P10. I'll push this next week if no objections. BR, Kewen ----- PR target/109932 gcc/ChangeLog: * config/rs6000/rs6000-builtins.def (__builtin_pack_vector_int128, __builtin_unpack_vector_int128): Move from stanza power7 to vsx. gcc/testsuite/ChangeLog: * gcc.target/powerpc/pr109932-1.c: New test. * gcc.target/powerpc/pr109932-2.c: New test. --- gcc/config/rs6000/rs6000-builtins.def | 14 +++++++------- gcc/testsuite/gcc.target/powerpc/pr109932-1.c | 16 ++++++++++++++++ gcc/testsuite/gcc.target/powerpc/pr109932-2.c | 16 ++++++++++++++++ 3 files changed, 39 insertions(+), 7 deletions(-) create mode 100644 gcc/testsuite/gcc.target/powerpc/pr109932-1.c create mode 100644 gcc/testsuite/gcc.target/powerpc/pr109932-2.c -- 2.25.1 diff --git a/gcc/config/rs6000/rs6000-builtins.def b/gcc/config/rs6000/rs6000-builtins.def index 92d9b46e1b9..a38184b0ef9 100644 --- a/gcc/config/rs6000/rs6000-builtins.def +++ b/gcc/config/rs6000/rs6000-builtins.def @@ -2009,6 +2009,13 @@ const vsll __builtin_vsx_xxspltd_2di (vsll, const int<1>); XXSPLTD_V2DI vsx_xxspltd_v2di {} + const vsq __builtin_pack_vector_int128 (unsigned long long, \ + unsigned long long); + PACK_V1TI packv1ti {} + + const unsigned long __builtin_unpack_vector_int128 (vsq, const int<1>); + UNPACK_V1TI unpackv1ti {} + ; Power7 builtins (ISA 2.06). [power7] @@ -2030,16 +2037,9 @@ const unsigned int __builtin_divweu (unsigned int, unsigned int); DIVWEU diveu_si {} - const vsq __builtin_pack_vector_int128 (unsigned long long, \ - unsigned long long); - PACK_V1TI packv1ti {} - void __builtin_ppc_speculation_barrier (); SPECBARR speculation_barrier {} - const unsigned long __builtin_unpack_vector_int128 (vsq, const int<1>); - UNPACK_V1TI unpackv1ti {} - ; Power7 builtins requiring 64-bit GPRs (even with 32-bit addressing). [power7-64] diff --git a/gcc/testsuite/gcc.target/powerpc/pr109932-1.c b/gcc/testsuite/gcc.target/powerpc/pr109932-1.c new file mode 100644 index 00000000000..3e3f9eaa65e --- /dev/null +++ b/gcc/testsuite/gcc.target/powerpc/pr109932-1.c @@ -0,0 +1,16 @@ +/* { dg-require-effective-target powerpc_altivec_ok } */ +/* { dg-options "-maltivec -mno-vsx" } */ + +/* Verify there is no ICE but one expected error message instead. */ + +#include + +extern vector signed __int128 res_vslll; +extern unsigned long long aull[2]; + +void +testVectorInt128Pack () +{ + res_vslll = __builtin_pack_vector_int128 (aull[0], aull[1]); /* { dg-error "'__builtin_pack_vector_int128' requires the '-mvsx' option" } */ +} + diff --git a/gcc/testsuite/gcc.target/powerpc/pr109932-2.c b/gcc/testsuite/gcc.target/powerpc/pr109932-2.c new file mode 100644 index 00000000000..3e3f9eaa65e --- /dev/null +++ b/gcc/testsuite/gcc.target/powerpc/pr109932-2.c @@ -0,0 +1,16 @@ +/* { dg-require-effective-target powerpc_altivec_ok } */ +/* { dg-options "-maltivec -mno-vsx" } */ + +/* Verify there is no ICE but one expected error message instead. */ + +#include + +extern vector signed __int128 res_vslll; +extern unsigned long long aull[2]; + +void +testVectorInt128Pack () +{ + res_vslll = __builtin_pack_vector_int128 (aull[0], aull[1]); /* { dg-error "'__builtin_pack_vector_int128' requires the '-mvsx' option" } */ +} +