From patchwork Mon Jun 5 15:19:51 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Detlev Casanova X-Patchwork-Id: 103346 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a59:994d:0:b0:3d9:f83d:47d9 with SMTP id k13csp2767341vqr; Mon, 5 Jun 2023 08:30:40 -0700 (PDT) X-Google-Smtp-Source: ACHHUZ439BdoLtMV3CYx7s+OkIXM50iiV86X/rUsKuFEoYgFh7uzhopmhykLTQGqkegjEpTkMa5y X-Received: by 2002:a17:90a:1cb:b0:259:452b:7270 with SMTP id 11-20020a17090a01cb00b00259452b7270mr1456117pjd.37.1685979039775; Mon, 05 Jun 2023 08:30:39 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1685979039; cv=none; d=google.com; s=arc-20160816; b=tskUD3qHtZ3PG4H1lK0ti2eHzOyKIoEYVlxjfK1hYQQgPoSd0FWQ+GJ7L5fRRFGuTY bIZg6L9aQsUVwRCjNFvVAJy/oGRG2IdYANF0n/a81OLV//aH/K8MKOAsSPIAklV5zOVB BZWI7E4cF+a4ih08tzgMOxNjD05TgK65NO+OWamG9NGYPRGsLrhA7H6CXIIF6jU18Ch0 1iBkNZw1CqbNAPlnjqkIPUpTildkSXyASHH20488hXeDFR0qtq07dvB2STfEN/nuqfe/ SF++pOWaoSx7YxU8MCnzoVAY3uq/DRPigby+qjyWn4FYipvPK+fy+9+AVdVKAI/7NW6z aeXw== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from :dkim-signature; bh=9+emfugo9/jqojZ717IbvJ2xd3/WKJwi84/mdvt8WwU=; b=1Bw16cKKaHaQYIHm/WzlMsqhzslcu9Ptm8Vqp63xaxMNO4cu4TLRnCHACqWATWSB03 PzaDLn2cQcNhjgKDDljPgxTnvS4UkOS1FydSORzKEgV/xwVF+W1LV1BP8GyGP79WYWuz Cfx5/J2oLuqXoS0dcCSdmj5vjcuOa5H9wf6cTS/DgnKMah6mgg6diRE+3vRn1HMgebYe 8snbQfnEbsOlNeXbPjuOWLqNE62jxd9nMHi2V37EeiEmLADC/Rru4B3anC8RuYJy77pK atoiGHo2SR/zvS6Wt/SuqZeo7cg/k/9abDTvv1R+6J9OA+po8HPStHXqyCzcCUh/MFQN Ir/A== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@collabora.com header.s=mail header.b=eGOY0ZBk; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=QUARANTINE sp=QUARANTINE dis=NONE) header.from=collabora.com Received: from out1.vger.email (out1.vger.email. [2620:137:e000::1:20]) by mx.google.com with ESMTP id a3-20020a17090a854300b0023def94be5esi5597980pjw.20.2023.06.05.08.30.27; Mon, 05 Jun 2023 08:30:39 -0700 (PDT) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) client-ip=2620:137:e000::1:20; Authentication-Results: mx.google.com; dkim=pass header.i=@collabora.com header.s=mail header.b=eGOY0ZBk; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=QUARANTINE sp=QUARANTINE dis=NONE) header.from=collabora.com Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S234736AbjFEPUY (ORCPT + 99 others); Mon, 5 Jun 2023 11:20:24 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:57874 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S234536AbjFEPUS (ORCPT ); Mon, 5 Jun 2023 11:20:18 -0400 Received: from madras.collabora.co.uk (madras.collabora.co.uk [IPv6:2a00:1098:0:82:1000:25:2eeb:e5ab]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id D4558EA; Mon, 5 Jun 2023 08:20:17 -0700 (PDT) Received: from arisu.mtl.collabora.ca (mtl.collabora.ca [66.171.169.34]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (4096 bits) server-digest SHA256) (No client certificate requested) (Authenticated sender: detlev) by madras.collabora.co.uk (Postfix) with ESMTPSA id 232536600368; Mon, 5 Jun 2023 16:20:15 +0100 (BST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=collabora.com; s=mail; t=1685978416; bh=vWggyIWMQJwPp+5rrAFGhNQx/8NDyETfk2n0HVwyCl8=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=eGOY0ZBk4S0A2fnyPG482C+4kaHdXZ4SsW7HeHKjuh7/17gxCPUYADV6p3Aeh9oSK MEJrfiUmIXdPsT5dI5l80HRzhSr5nme8zfUk194FpwRgoe9QuSiDJozB3a2Rda5PYM wYXt4da5Go9KOVsiWlGrSjQsuNQZfuwgtNwDhUFkYNNPZb/x2Qt3lq4q/8C3uSF8bx NMdnPIEBvEx2cp3c0wKHUkaj69SM3w4NobSwB33nXxSF3Dm75bKhpKGLWBwuqaw9UW GAEHcTF7Xs5cZQulNWqdI4VGvPqBFwkHjoYKRJe2mGBD/4lEjhlrC9HexOZtWGE5Ys umtTXtwowXu2g== From: Detlev Casanova To: linux-kernel@vger.kernel.org Cc: Andrew Lunn , Heiner Kallweit , Russell King , "David S . Miller" , Eric Dumazet , Jakub Kicinski , Paolo Abeni , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Florian Fainelli , netdev@vger.kernel.org, devicetree@vger.kernel.org, Detlev Casanova , Florian Fainelli Subject: [PATCH v3 1/3] net: phy: realtek: Add optional external PHY clock Date: Mon, 5 Jun 2023 11:19:51 -0400 Message-Id: <20230605151953.48539-2-detlev.casanova@collabora.com> X-Mailer: git-send-email 2.39.3 In-Reply-To: <20230605151953.48539-1-detlev.casanova@collabora.com> References: <20230605151953.48539-1-detlev.casanova@collabora.com> MIME-Version: 1.0 X-Spam-Status: No, score=-2.1 required=5.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,SPF_HELO_NONE,SPF_PASS, T_SCC_BODY_TEXT_LINE autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-getmail-retrieved-from-mailbox: =?utf-8?q?INBOX?= X-GMAIL-THRID: =?utf-8?q?1767877157624064732?= X-GMAIL-MSGID: =?utf-8?q?1767877157624064732?= In some cases, the PHY can use an external clock source instead of a crystal. Add an optional clock in the phy node to make sure that the clock source is enabled, if specified, before probing. Reviewed-by: Florian Fainelli Reviewed-by: Andrew Lunn Signed-off-by: Detlev Casanova --- drivers/net/phy/realtek.c | 7 +++++++ 1 file changed, 7 insertions(+) diff --git a/drivers/net/phy/realtek.c b/drivers/net/phy/realtek.c index 3d99fd6664d7..b13dd0b3c99e 100644 --- a/drivers/net/phy/realtek.c +++ b/drivers/net/phy/realtek.c @@ -12,6 +12,7 @@ #include #include #include +#include #define RTL821x_PHYSR 0x11 #define RTL821x_PHYSR_DUPLEX BIT(13) @@ -80,6 +81,7 @@ struct rtl821x_priv { u16 phycr1; u16 phycr2; bool has_phycr2; + struct clk *clk; }; static int rtl821x_read_page(struct phy_device *phydev) @@ -103,6 +105,11 @@ static int rtl821x_probe(struct phy_device *phydev) if (!priv) return -ENOMEM; + priv->clk = devm_clk_get_optional_enabled(dev, NULL); + if (IS_ERR(priv->clk)) + return dev_err_probe(dev, PTR_ERR(priv->clk), + "failed to get phy clock\n"); + ret = phy_read_paged(phydev, 0xa43, RTL8211F_PHYCR1); if (ret < 0) return ret; From patchwork Mon Jun 5 15:19:52 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Detlev Casanova X-Patchwork-Id: 103348 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a59:994d:0:b0:3d9:f83d:47d9 with SMTP id k13csp2767449vqr; Mon, 5 Jun 2023 08:30:49 -0700 (PDT) X-Google-Smtp-Source: ACHHUZ5rNM1XZUbdPYdibf7i/RKokfqHh3DhEJNFCbr6DC48oNUjk99xs56IMGTGgw/wfHwg4ZKi X-Received: by 2002:a05:6a20:a59c:b0:10c:1378:f2ae with SMTP id bc28-20020a056a20a59c00b0010c1378f2aemr2557734pzb.46.1685979048899; Mon, 05 Jun 2023 08:30:48 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1685979048; cv=none; d=google.com; s=arc-20160816; b=YSoosidGzBB/F8gBlBHEuBzQiMnn84Yw3vLGCJcIqyqI6Ev5Vv62MpkYXlP16wFDEz KPDhxEiBZNCm0QqoUjjBuZt6K/b8pxL2C8QVFMJ2ENlxDXWNp5o7KE0ylIHnMf/mBY0L 4EmFgtyDnjfYTzxc/JtYK5oCOPHdKRDcoD3RiWkgTwJ9voa/F+7iCSgLb116a4Y82/t3 HJqQFM62zUiIp+a720VwbTOXrwBtY6+GTcc7w7uSYbYvj6MRurs7EyOgjTKuyfuSqmGA wJOTxSn/vb3d4MmWjlxSaYc4PeGdyNev0H8GOk4Zzdum9N7n2H0IuaaB4+o+CkYL08SS 82rA== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from :dkim-signature; bh=eTbzaN+m19ZAFNBt13eTJrghco8x8XeRqxkUax55i6c=; b=AGeGwJhARixHsJbV/+WCcbkAoILXqn5rvH4PRXD02/vCyiGNknx1Ym4uUzC0rzCxLz n28IoTTiIa3TnBC9XG81ZF4r7CtXPNXKnlN+IRKqf3YQapV28b0VC0B1YT9eNSa+INXC rfrIkRvziyog9Qu0DfLe+7fyFA1h0QxlsJj2NBagBtWq49aNjNFfMUlIhh7gEFYkRXTn S1WFiPiJe8Y0TUOihUe+gCMUEGCVRbGZ7KiLgWY59ToMfnzt0QWbeR3RVrNlGZeHllEO zbHcsXoj+NazNdM0OqeChgXMpDfIb5EAXMF6l2bMpO4U6YZ74XldtNZhHo8OTLFieFAI MNrg== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@collabora.com header.s=mail header.b=dIR4v7Wt; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=QUARANTINE sp=QUARANTINE dis=NONE) header.from=collabora.com Received: from out1.vger.email (out1.vger.email. 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Miller" , Eric Dumazet , Jakub Kicinski , Paolo Abeni , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Florian Fainelli , netdev@vger.kernel.org, devicetree@vger.kernel.org, Detlev Casanova , Krzysztof Kozlowski Subject: [PATCH v3 2/3] dt-bindings: net: phy: Document support for external PHY clk Date: Mon, 5 Jun 2023 11:19:52 -0400 Message-Id: <20230605151953.48539-3-detlev.casanova@collabora.com> X-Mailer: git-send-email 2.39.3 In-Reply-To: <20230605151953.48539-1-detlev.casanova@collabora.com> References: <20230605151953.48539-1-detlev.casanova@collabora.com> MIME-Version: 1.0 X-Spam-Status: No, score=-2.1 required=5.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,SPF_HELO_NONE,SPF_PASS, T_SCC_BODY_TEXT_LINE autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-getmail-retrieved-from-mailbox: =?utf-8?q?INBOX?= X-GMAIL-THRID: =?utf-8?q?1767877166710469468?= X-GMAIL-MSGID: =?utf-8?q?1767877166710469468?= Ethern PHYs can have external an clock that needs to be activated before communicating with the PHY. Acked-by: Krzysztof Kozlowski Signed-off-by: Detlev Casanova --- Documentation/devicetree/bindings/net/ethernet-phy.yaml | 6 ++++++ 1 file changed, 6 insertions(+) diff --git a/Documentation/devicetree/bindings/net/ethernet-phy.yaml b/Documentation/devicetree/bindings/net/ethernet-phy.yaml index 4f574532ee13..c1241c8a3b77 100644 --- a/Documentation/devicetree/bindings/net/ethernet-phy.yaml +++ b/Documentation/devicetree/bindings/net/ethernet-phy.yaml @@ -93,6 +93,12 @@ properties: the turn around line low at end of the control phase of the MDIO transaction. + clocks: + maxItems: 1 + description: + External clock connected to the PHY. If not specified it is assumed + that the PHY uses a fixed crystal or an internal oscillator. + enet-phy-lane-swap: $ref: /schemas/types.yaml#/definitions/flag description: From patchwork Mon Jun 5 15:19:53 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Detlev Casanova X-Patchwork-Id: 103347 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a59:994d:0:b0:3d9:f83d:47d9 with SMTP id k13csp2767445vqr; Mon, 5 Jun 2023 08:30:48 -0700 (PDT) X-Google-Smtp-Source: ACHHUZ4MVjWYofp1/UQIxYpN8P6Vm7xwY+UwcA4FWA7i3PjsazAlJaxCFNUgvwejkbVT0qQVGr8q X-Received: by 2002:a17:902:db04:b0:1b0:4bc7:31ee with SMTP id m4-20020a170902db0400b001b04bc731eemr9583176plx.32.1685979048584; Mon, 05 Jun 2023 08:30:48 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1685979048; cv=none; d=google.com; s=arc-20160816; b=T9HzmzAfkpgt3+UJr3yR0knNUYNOEjW8mDqgDbYE5Cwa6mYWYS1uw30QHOBgkdjgr/ AOcCTTLL/QW4U2mnJbAmUtU/RSyKEpoYMJPm+zigCzI39Kt0klX1TS0E2GTOq1ggcb/k 27zD79m1Hi651sB1OUQUKV0wizgb8wJN7R95TE+4ZM9fxr6guIuhgj6DFzE0BjHV94t4 hl7o0gTYPrzqeKfzNpWrVRTUIOU4hmNRB2CqF9XMedWz2Jx72xP0E6g623G6JDOJFq1t DfdTIWwH7sDc4390r8rPSshSZ+DXe1xQ477hPCXh0WE7wVy3HaWeKL8xHd0m1ELLPTwV 6YHA== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from :dkim-signature; bh=y+rSDg5DEz8xOhiY9IlD82p0q5ebCPAMgxP0L1q71zQ=; b=KFuY8wuQxso7t45KILx5jCP1HwbvefA0TNVogJzazMnf29fDAtOKoTMh++9gTOK+yg Afownm8QMy7zK4yxgAVMiMO2M9NBER/vZmYuWT4rcb+qLGGNrXscok99zCMQWjRcwEdO qtqO46jkdWNAnARkY/oCf2gwjbh0+vx+Fvca0sldECBjhcG+wraWepoamgRV2vMKtTBK T6SeUXHyaFyQF9Y7rfdIHvcWusL/LYsTJKRB0LyrVhnc8XpoBqL+8xdUmRNYXIPM5Ch1 qhkFpmELQcT/vnoPBDmCnz/NkXbhUqF5hz1F3grbQwAi1ekq60grPJbPgEl7l/UGUsN9 VbsA== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@collabora.com header.s=mail header.b=RAncdZhz; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=QUARANTINE sp=QUARANTINE dis=NONE) header.from=collabora.com Received: from out1.vger.email (out1.vger.email. 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Miller" , Eric Dumazet , Jakub Kicinski , Paolo Abeni , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Florian Fainelli , netdev@vger.kernel.org, devicetree@vger.kernel.org, Detlev Casanova , Florian Fainelli Subject: [PATCH v3 3/3] net: phy: realtek: Disable clock on suspend Date: Mon, 5 Jun 2023 11:19:53 -0400 Message-Id: <20230605151953.48539-4-detlev.casanova@collabora.com> X-Mailer: git-send-email 2.39.3 In-Reply-To: <20230605151953.48539-1-detlev.casanova@collabora.com> References: <20230605151953.48539-1-detlev.casanova@collabora.com> MIME-Version: 1.0 X-Spam-Status: No, score=-2.1 required=5.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,SPF_HELO_NONE,SPF_PASS, T_SCC_BODY_TEXT_LINE autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-getmail-retrieved-from-mailbox: =?utf-8?q?INBOX?= X-GMAIL-THRID: =?utf-8?q?1767877166768064833?= X-GMAIL-MSGID: =?utf-8?q?1767877166768064833?= For PHYs that call rtl821x_probe() where an external clock can be configured, make sure that the clock is disabled when ->suspend() is called and enabled on resume. The PHY_ALWAYS_CALL_SUSPEND is added to ensure that the suspend function is actually always called. Reviewed-by: Florian Fainelli Signed-off-by: Detlev Casanova --- drivers/net/phy/realtek.c | 24 ++++++++++++++++++++++-- 1 file changed, 22 insertions(+), 2 deletions(-) diff --git a/drivers/net/phy/realtek.c b/drivers/net/phy/realtek.c index b13dd0b3c99e..62eac4835def 100644 --- a/drivers/net/phy/realtek.c +++ b/drivers/net/phy/realtek.c @@ -426,10 +426,28 @@ static int rtl8211f_config_init(struct phy_device *phydev) return genphy_soft_reset(phydev); } +static int rtl821x_suspend(struct phy_device *phydev) +{ + struct rtl821x_priv *priv = phydev->priv; + int ret = genphy_suspend(phydev); + + if (ret) + return ret; + + if (!phydev->wol_enabled) + clk_disable_unprepare(priv->clk); + + return ret; +} + static int rtl821x_resume(struct phy_device *phydev) { + struct rtl821x_priv *priv = phydev->priv; int ret; + if (!phydev->wol_enabled) + clk_prepare_enable(priv->clk); + ret = genphy_resume(phydev); if (ret < 0) return ret; @@ -934,10 +952,11 @@ static struct phy_driver realtek_drvs[] = { .read_status = rtlgen_read_status, .config_intr = &rtl8211f_config_intr, .handle_interrupt = rtl8211f_handle_interrupt, - .suspend = genphy_suspend, + .suspend = rtl821x_suspend, .resume = rtl821x_resume, .read_page = rtl821x_read_page, .write_page = rtl821x_write_page, + .flags = PHY_ALWAYS_CALL_SUSPEND, }, { PHY_ID_MATCH_EXACT(RTL_8211FVD_PHYID), .name = "RTL8211F-VD Gigabit Ethernet", @@ -946,10 +965,11 @@ static struct phy_driver realtek_drvs[] = { .read_status = rtlgen_read_status, .config_intr = &rtl8211f_config_intr, .handle_interrupt = rtl8211f_handle_interrupt, - .suspend = genphy_suspend, + .suspend = rtl821x_suspend, .resume = rtl821x_resume, .read_page = rtl821x_read_page, .write_page = rtl821x_write_page, + .flags = PHY_ALWAYS_CALL_SUSPEND, }, { .name = "Generic FE-GE Realtek PHY", .match_phy_device = rtlgen_match_phy_device,