From patchwork Fri Jun 2 08:49:23 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: William Qiu X-Patchwork-Id: 102379 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a59:994d:0:b0:3d9:f83d:47d9 with SMTP id k13csp882719vqr; Fri, 2 Jun 2023 01:51:48 -0700 (PDT) X-Google-Smtp-Source: ACHHUZ6oVnKvLVmLFfhpzlH9IvFX3bRSOkLi6iF3ZccLqX7pgM65Up8A2tCMgowu7lSe+g1wW5je X-Received: by 2002:a92:cd11:0:b0:33d:136f:249f with SMTP id z17-20020a92cd11000000b0033d136f249fmr4767154iln.22.1685695908014; Fri, 02 Jun 2023 01:51:48 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1685695907; cv=none; d=google.com; s=arc-20160816; b=KaTIKSvL7Qx+iTwGd7+xslCINSK8WhhtlUJ/gD0lkASHp0Tkvs2OgUDdyuqi8Ksxob w/7VqffL/fLJcO5E/li485u20GcqCi5BFQaK3sD+bEv7RuTFqDgDSGZwqVcjztIEDh0g vuaa0wRqUmWJFx/YdgWT597Gtd1Eh5BowZFTQjtk/pSZ9Jhie4U29qyjAcyp6BPsjUi6 M1on+DYXtYISGPVp1uPlejGDCsafXA1nbY0aPqNj02VKBfQeUldeincHYs2pS2nOxO0p Le0co4k2yzAl5wlH2APr78Nzz+fwiW52NPD6L6mfmL+WB1W2eI8jRhuTrUgGuBtLCMrL 1x4A== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from; bh=1P7pH1A5FXu8efNdgCehLQLHsCeRRn5k0LSLV3y8iZQ=; b=ifyAS9bPSTjS0kpgfvQu8+jJ39pEXwYilhmb8rZb9jMDs0QohaFSs+Zb5Q8+ooZBX9 +cemx/eJ8k0KcPeENoNr0GTtE6l/zFZyozUD7Z4u4cro6qln377XgWo7XlK4Z0E3xSDf 7VRm/xKPAIGbk28WxF/n5Of5KRZDzJYbi0NQugC5mo8kvKd2RQ4kfrPN0u/J9FQ6OzHL 8H1Raoz78RD12WuCH3DgubREGU9gzdVuHNbPU+pUVpzdT4xIbvPl/40jK2nPudl1zKdS FwcyhjKpcVhRVKxea7YKWeI+Si3hc9dTqN/mnNl1enIHl0v1GseetpQNRakM1gVMH9Rk mxPQ== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: from out1.vger.email (out1.vger.email. [2620:137:e000::1:20]) by mx.google.com with ESMTP id d12-20020a630e0c000000b0052132a8e4e3si650543pgl.510.2023.06.02.01.51.31; Fri, 02 Jun 2023 01:51:47 -0700 (PDT) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) client-ip=2620:137:e000::1:20; Authentication-Results: mx.google.com; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S234570AbjFBIt6 convert rfc822-to-8bit (ORCPT + 99 others); Fri, 2 Jun 2023 04:49:58 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:48578 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S234135AbjFBItc (ORCPT ); Fri, 2 Jun 2023 04:49:32 -0400 Received: from fd01.gateway.ufhost.com (fd01.gateway.ufhost.com [61.152.239.71]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id CA7C4E50; Fri, 2 Jun 2023 01:49:30 -0700 (PDT) Received: from EXMBX165.cuchost.com (unknown [175.102.18.54]) (using TLSv1 with cipher DHE-RSA-AES256-SHA (256/256 bits)) (Client CN "EXMBX165", Issuer "EXMBX165" (not verified)) by fd01.gateway.ufhost.com (Postfix) with ESMTP id 4EA04807D; Fri, 2 Jun 2023 16:49:28 +0800 (CST) Received: from EXMBX168.cuchost.com (172.16.6.78) by EXMBX165.cuchost.com (172.16.6.75) with Microsoft SMTP Server (TLS) id 15.0.1497.42; Fri, 2 Jun 2023 16:49:28 +0800 Received: from williamqiu-virtual-machine.starfivetech.com (171.223.208.138) by EXMBX168.cuchost.com (172.16.6.78) with Microsoft SMTP Server (TLS) id 15.0.1497.42; Fri, 2 Jun 2023 16:49:27 +0800 From: William Qiu To: , , , CC: Mark Brown , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Emil Renner Berthing , Ziv Xu , William Qiu Subject: [PATCH v2 1/3] dt-bindings: qspi: cdns,qspi-nor: Add clocks for StarFive JH7110 SoC Date: Fri, 2 Jun 2023 16:49:23 +0800 Message-ID: <20230602084925.215411-2-william.qiu@starfivetech.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20230602084925.215411-1-william.qiu@starfivetech.com> References: <20230602084925.215411-1-william.qiu@starfivetech.com> MIME-Version: 1.0 X-Originating-IP: [171.223.208.138] X-ClientProxiedBy: EXCAS064.cuchost.com (172.16.6.24) To EXMBX168.cuchost.com (172.16.6.78) X-YovoleRuleAgent: yovoleflag X-Spam-Status: No, score=-1.9 required=5.0 tests=BAYES_00,SPF_HELO_PASS, SPF_PASS,T_SCC_BODY_TEXT_LINE autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-getmail-retrieved-from-mailbox: =?utf-8?q?INBOX?= X-GMAIL-THRID: =?utf-8?q?1767580272657808371?= X-GMAIL-MSGID: =?utf-8?q?1767580272657808371?= The QSPI controller needs three clock items to work properly on StarFive JH7110 SoC, so there is need to change the maxItems's value to 3. Other platforms do not have this constraint. Signed-off-by: William Qiu Reviewed-by: Hal Feng Reviewed-by: Conor Dooley --- .../devicetree/bindings/spi/cdns,qspi-nor.yaml | 15 ++++++++++++--- 1 file changed, 12 insertions(+), 3 deletions(-) diff --git a/Documentation/devicetree/bindings/spi/cdns,qspi-nor.yaml b/Documentation/devicetree/bindings/spi/cdns,qspi-nor.yaml index b310069762dd..b6a27171d965 100644 --- a/Documentation/devicetree/bindings/spi/cdns,qspi-nor.yaml +++ b/Documentation/devicetree/bindings/spi/cdns,qspi-nor.yaml @@ -26,6 +26,15 @@ allOf: const: starfive,jh7110-qspi then: properties: + clocks: + maxItems: 3 + + clock-names: + items: + - const: ref_clk + - const: hclk + - const: pclk + resets: minItems: 2 maxItems: 3 @@ -38,6 +47,9 @@ allOf: else: properties: + clocks: + maxItems: 1 + resets: maxItems: 2 @@ -69,9 +81,6 @@ properties: interrupts: maxItems: 1 - clocks: - maxItems: 1 - cdns,fifo-depth: description: Size of the data FIFO in words. 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[2620:137:e000::1:20]) by mx.google.com with ESMTP id l70-20020a638849000000b0051b8a81c5d0si649537pgd.606.2023.06.02.01.56.50; Fri, 02 Jun 2023 01:57:04 -0700 (PDT) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) client-ip=2620:137:e000::1:20; Authentication-Results: mx.google.com; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S233639AbjFBIuB convert rfc822-to-8bit (ORCPT + 99 others); Fri, 2 Jun 2023 04:50:01 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:50990 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S234121AbjFBIte (ORCPT ); Fri, 2 Jun 2023 04:49:34 -0400 Received: from ex01.ufhost.com (ex01.ufhost.com [61.152.239.75]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id B4131E51; Fri, 2 Jun 2023 01:49:31 -0700 (PDT) Received: from EXMBX166.cuchost.com (unknown [175.102.18.54]) (using TLSv1 with cipher DHE-RSA-AES256-SHA (256/256 bits)) (Client CN "EXMBX166", Issuer "EXMBX166" (not verified)) by ex01.ufhost.com (Postfix) with ESMTP id 1F96424E276; Fri, 2 Jun 2023 16:49:29 +0800 (CST) Received: from EXMBX168.cuchost.com (172.16.6.78) by EXMBX166.cuchost.com (172.16.6.76) with Microsoft SMTP Server (TLS) id 15.0.1497.42; Fri, 2 Jun 2023 16:49:29 +0800 Received: from williamqiu-virtual-machine.starfivetech.com (171.223.208.138) by EXMBX168.cuchost.com (172.16.6.78) with Microsoft SMTP Server (TLS) id 15.0.1497.42; Fri, 2 Jun 2023 16:49:28 +0800 From: William Qiu To: , , , CC: Mark Brown , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Emil Renner Berthing , Ziv Xu , William Qiu Subject: [PATCH v2 2/3] spi: cadence-quadspi: Add clock configuration for StarFive JH7110 QSPI Date: Fri, 2 Jun 2023 16:49:24 +0800 Message-ID: <20230602084925.215411-3-william.qiu@starfivetech.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20230602084925.215411-1-william.qiu@starfivetech.com> References: <20230602084925.215411-1-william.qiu@starfivetech.com> MIME-Version: 1.0 X-Originating-IP: [171.223.208.138] X-ClientProxiedBy: EXCAS064.cuchost.com (172.16.6.24) To EXMBX168.cuchost.com (172.16.6.78) X-YovoleRuleAgent: yovoleflag X-Spam-Status: No, score=-1.9 required=5.0 tests=BAYES_00,SPF_HELO_NONE, SPF_PASS,T_SCC_BODY_TEXT_LINE autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-getmail-retrieved-from-mailbox: =?utf-8?q?INBOX?= X-GMAIL-THRID: =?utf-8?q?1767580604230024302?= X-GMAIL-MSGID: =?utf-8?q?1767580604230024302?= Add QSPI clock operation in device probe. Signed-off-by: William Qiu Reviewed-by: Hal Feng --- drivers/spi/spi-cadence-quadspi.c | 20 ++++++++++++++++++++ 1 file changed, 20 insertions(+) diff --git a/drivers/spi/spi-cadence-quadspi.c b/drivers/spi/spi-cadence-quadspi.c index 6ddb2dfc0f00..21788472c7fb 100644 --- a/drivers/spi/spi-cadence-quadspi.c +++ b/drivers/spi/spi-cadence-quadspi.c @@ -63,6 +63,8 @@ struct cqspi_st { struct platform_device *pdev; struct spi_master *master; struct clk *clk; + struct clk_bulk_data *clks; + unsigned int num_clks; unsigned int sclk; void __iomem *iobase; @@ -1715,6 +1717,16 @@ static int cqspi_probe(struct platform_device *pdev) } if (of_device_is_compatible(pdev->dev.of_node, "starfive,jh7110-qspi")) { + cqspi->num_clks = devm_clk_bulk_get_all(dev, &cqspi->clks); + if (cqspi->num_clks < 0) { + dev_err(dev, "Cannot claim clock: %u\n", cqspi->num_clks); + return -EINVAL; + } + + ret = clk_bulk_prepare_enable(cqspi->num_clks, cqspi->clks); + if (ret) + dev_err(dev, "Cannot enable clock clks\n"); + rstc_ref = devm_reset_control_get_optional_exclusive(dev, "rstc_ref"); if (IS_ERR(rstc_ref)) { ret = PTR_ERR(rstc_ref); @@ -1816,6 +1828,9 @@ static void cqspi_remove(struct platform_device *pdev) clk_disable_unprepare(cqspi->clk); + if (of_device_is_compatible(pdev->dev.of_node, "starfive,jh7110-qspi")) + clk_bulk_disable_unprepare(cqspi->num_clks, cqspi->clks); + pm_runtime_put_sync(&pdev->dev); pm_runtime_disable(&pdev->dev); } @@ -1831,6 +1846,9 @@ static int cqspi_suspend(struct device *dev) clk_disable_unprepare(cqspi->clk); + if (of_device_is_compatible(dev->of_node, "starfive,jh7110-qspi")) + clk_bulk_disable_unprepare(cqspi->num_clks, cqspi->clks); + return ret; } @@ -1840,6 +1858,8 @@ static int cqspi_resume(struct device *dev) struct spi_master *master = dev_get_drvdata(dev); clk_prepare_enable(cqspi->clk); + if (of_device_is_compatible(dev->of_node, "starfive,jh7110-qspi")) + clk_bulk_prepare_enable(cqspi->num_clks, cqspi->clks); cqspi_wait_idle(cqspi); cqspi_controller_init(cqspi); From patchwork Fri Jun 2 08:49:25 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: William Qiu X-Patchwork-Id: 102383 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a59:994d:0:b0:3d9:f83d:47d9 with SMTP id k13csp883460vqr; Fri, 2 Jun 2023 01:53:53 -0700 (PDT) X-Google-Smtp-Source: ACHHUZ51FRYwugFg+yGTZD7u27B3vjtC6WlHM+nu0YfDZk2620UlTIs1XDBunJCYR3RhhPv4izoL X-Received: by 2002:a92:d581:0:b0:33b:568a:2981 with SMTP id a1-20020a92d581000000b0033b568a2981mr6397934iln.8.1685696033025; Fri, 02 Jun 2023 01:53:53 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1685696032; cv=none; d=google.com; s=arc-20160816; b=BiGBRul9TjejnSP7DntU16z67ZoFcqbnprZhu1KESju0A2Gqz1izp7oDB3+y8WEv2j Xp/92FI2WlEKiia9H3OYueY4aAhEIlcoXwo/AW3rDsuIRXuSpZ2d8Sf9prsdjypDA9w6 Z3qG1IFZ7e8zcsgFaWbOTmpYt/2LrVQ7CJm2zQJzavzYuwEUPmP6Td2TsDDGxHi4jnCm oryyJjESNAreY36d90mEXqTY2VSCu6yYgld37tw3ndmPYy1YwLEm3yqG4PbjQJGIcQcg R78RzOPo6h1Z2fDKDbh1Z5SnnQyUFqygExSRdXD/+Y/I7vRRYC+XykAsgcDOQRx/hiv/ hW4Q== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from; bh=JKAgUw4NuVzjTi+MHI2fDjqc9zKtJu21SiEz3rvwc8c=; b=QDhjO5N+kdDR07YRGex/o8hGyurclogN7kjlRrhEmjxxk+ehjNtspit/OqvEymmdkZ uUY+9AIE8exV36SW9psR5zyX5uXtjhRVZC02bKujyNvkZdkXVNi6f75jsLUSZjp6LOKi QIs1tdNjth8LsZdbRoN2Ckp25Z2AKkzbbDdwIdjc400SMuaR2RNPCcqj852x3Nwm++Fh 1hqcXEruJWwCNHOuSm/iE9WYpFzTc8ul9SjgFy+OKu2FPq9FQy4fcCWwmlN4qR+p2Fqv WJXG7qKRxx1YylwNnc/S+kuQiIjyjvItbvp8bm3Ne8C/v++NiKtAAjTP2Sf/rCDo3iXi j5MQ== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: from out1.vger.email (out1.vger.email. [2620:137:e000::1:20]) by mx.google.com with ESMTP id j5-20020a63fc05000000b005428de93a2bsi635561pgi.863.2023.06.02.01.53.38; Fri, 02 Jun 2023 01:53:52 -0700 (PDT) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) client-ip=2620:137:e000::1:20; Authentication-Results: mx.google.com; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S234930AbjFBIuZ convert rfc822-to-8bit (ORCPT + 99 others); Fri, 2 Jun 2023 04:50:25 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:51286 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S234963AbjFBItv (ORCPT ); Fri, 2 Jun 2023 04:49:51 -0400 Received: from fd01.gateway.ufhost.com (fd01.gateway.ufhost.com [61.152.239.71]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id F3EBE1AE; Fri, 2 Jun 2023 01:49:49 -0700 (PDT) Received: from EXMBX165.cuchost.com (unknown [175.102.18.54]) (using TLSv1 with cipher DHE-RSA-AES256-SHA (256/256 bits)) (Client CN "EXMBX165", Issuer "EXMBX165" (not verified)) by fd01.gateway.ufhost.com (Postfix) with ESMTP id 74D7380C1; Fri, 2 Jun 2023 16:49:48 +0800 (CST) Received: from EXMBX168.cuchost.com (172.16.6.78) by EXMBX165.cuchost.com (172.16.6.75) with Microsoft SMTP Server (TLS) id 15.0.1497.42; Fri, 2 Jun 2023 16:49:48 +0800 Received: from williamqiu-virtual-machine.starfivetech.com (171.223.208.138) by EXMBX168.cuchost.com (172.16.6.78) with Microsoft SMTP Server (TLS) id 15.0.1497.42; Fri, 2 Jun 2023 16:49:28 +0800 From: William Qiu To: , , , CC: Mark Brown , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Emil Renner Berthing , Ziv Xu , William Qiu Subject: [PATCH v2 3/3] riscv: dts: starfive: Add QSPI controller node for StarFive JH7110 SoC Date: Fri, 2 Jun 2023 16:49:25 +0800 Message-ID: <20230602084925.215411-4-william.qiu@starfivetech.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20230602084925.215411-1-william.qiu@starfivetech.com> References: <20230602084925.215411-1-william.qiu@starfivetech.com> MIME-Version: 1.0 X-Originating-IP: [171.223.208.138] X-ClientProxiedBy: EXCAS064.cuchost.com (172.16.6.24) To EXMBX168.cuchost.com (172.16.6.78) X-YovoleRuleAgent: yovoleflag X-Spam-Status: No, score=-1.9 required=5.0 tests=BAYES_00,SPF_HELO_PASS, SPF_PASS,T_SCC_BODY_TEXT_LINE autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-getmail-retrieved-from-mailbox: =?utf-8?q?INBOX?= X-GMAIL-THRID: =?utf-8?q?1767580403662866415?= X-GMAIL-MSGID: =?utf-8?q?1767580403662866415?= Add the quad spi controller node for the StarFive JH7110 SoC. Co-developed-by: Ziv Xu Signed-off-by: Ziv Xu Signed-off-by: William Qiu Reviewed-by: Hal Feng --- .../jh7110-starfive-visionfive-2.dtsi | 32 +++++++++++++++++++ arch/riscv/boot/dts/starfive/jh7110.dtsi | 18 +++++++++++ 2 files changed, 50 insertions(+) diff --git a/arch/riscv/boot/dts/starfive/jh7110-starfive-visionfive-2.dtsi b/arch/riscv/boot/dts/starfive/jh7110-starfive-visionfive-2.dtsi index 2a6d81609284..22212c1150f9 100644 --- a/arch/riscv/boot/dts/starfive/jh7110-starfive-visionfive-2.dtsi +++ b/arch/riscv/boot/dts/starfive/jh7110-starfive-visionfive-2.dtsi @@ -126,6 +126,38 @@ &i2c6 { status = "okay"; }; +&qspi { + #address-cells = <1>; + #size-cells = <0>; + + nor_flash: flash@0 { + compatible = "jedec,spi-nor"; + reg=<0>; + cdns,read-delay = <5>; + spi-max-frequency = <12000000>; + cdns,tshsl-ns = <1>; + cdns,tsd2d-ns = <1>; + cdns,tchsh-ns = <1>; + cdns,tslch-ns = <1>; + + partitions { + compatible = "fixed-partitions"; + #address-cells = <1>; + #size-cells = <1>; + + spl@0 { + reg = <0x0 0x20000>; + }; + uboot@100000 { + reg = <0x100000 0x300000>; + }; + data@f00000 { + reg = <0xf00000 0x100000>; + }; + }; + }; +}; + &sysgpio { i2c0_pins: i2c0-0 { i2c-pins { diff --git a/arch/riscv/boot/dts/starfive/jh7110.dtsi b/arch/riscv/boot/dts/starfive/jh7110.dtsi index 4c5fdb905da8..e1a51e57a851 100644 --- a/arch/riscv/boot/dts/starfive/jh7110.dtsi +++ b/arch/riscv/boot/dts/starfive/jh7110.dtsi @@ -440,6 +440,24 @@ i2c6: i2c@12060000 { status = "disabled"; }; + qspi: spi@13010000 { + compatible = "starfive,jh7110-qspi", "cdns,qspi-nor"; + reg = <0x0 0x13010000 0x0 0x10000 + 0x0 0x21000000 0x0 0x400000>; + interrupts = <25>; + clocks = <&syscrg JH7110_SYSCLK_QSPI_REF>, + <&syscrg JH7110_SYSCLK_QSPI_AHB>, + <&syscrg JH7110_SYSCLK_QSPI_APB>; + clock-names = "ref_clk", "hclk", "pclk"; + resets = <&syscrg JH7110_SYSRST_QSPI_APB>, + <&syscrg JH7110_SYSRST_QSPI_AHB>, + <&syscrg JH7110_SYSRST_QSPI_REF>; + reset-names = "qspi", "qspi-ocp", "rstc_ref"; + cdns,fifo-depth = <256>; + cdns,fifo-width = <4>; + cdns,trigger-address = <0x0>; + }; + syscrg: clock-controller@13020000 { compatible = "starfive,jh7110-syscrg"; reg = <0x0 0x13020000 0x0 0x10000>;