From patchwork Fri Jun 2 06:25:39 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Anshuman Khandual X-Patchwork-Id: 102320 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a59:994d:0:b0:3d9:f83d:47d9 with SMTP id k13csp831733vqr; Thu, 1 Jun 2023 23:37:38 -0700 (PDT) X-Google-Smtp-Source: ACHHUZ6KgDHed8XQG2zngtgV9HwrTPOLDxYlvKLrVsUibZafLEGmooMUv2FIhmYCKk8IJmQkq9DU X-Received: by 2002:a92:d986:0:b0:33a:a518:653f with SMTP id r6-20020a92d986000000b0033aa518653fmr8786112iln.15.1685687857893; Thu, 01 Jun 2023 23:37:37 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1685687857; cv=none; d=google.com; s=arc-20160816; b=e0XWJJKNQuG7vebrDZ0Pday+QbyUqI4LWE5F76i3OVsbhZOBzwYWcBMoeNGMqe9lgH hw52Y2c9Sv82jdirt+n2+OrJx9OIbiK/xeF2rAsLa6Jhfyz6Gm0PGQJ73eB460Bc0ie+ kAaAdQL3pH4mMr5FA3+TfqlL6TsmiVJt4jNoOWoWjOQ6+Q9KS2TyPaPgVshic8DYYJEq 9uctiVntbczHR4G0fFkN+fJlJImVZPbdwg8u/FFgzrkD4QVIj/h2+28ZxGEY1A5CKie/ rgDZTJoeInSKEwdPPX0fXYcniJc2T8lycE1iFdUMfe1WhOmbyjNwEFm5doAd0yaWAdcY VioQ== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from; bh=50rP4mPQUnyk5nKJR02nvctlXJDAAjkNzx7izSro2Qc=; b=PHCRxNCr9uXXoFpSQR3Mok0EuzBDYCDQe8aETO/GMLOLW9Yp8sM63ymzwOLg6KnW4U d84P1x1YaomqeSAbF+/svQlFQV8xrp9NF4+qDmqa6yMgZiKofTGon0fdvsayBt5WskGT mTkT1fGpFC/IsFebi090ikHUu3u3QY9qxYaV3M4Vji1/cggX86rT3A/k+FH8Fc0mQIef DlDTxYm1pL95BYt+lnomW4jmygpXTY/FOpzmKXh2840P7Q+sGpEQiNy7GtafvrjrP+re eWDIZsQLDUEq+HhZESvUGtBjefREB4LjcJdG/1KlsZmqKL+FqF4zqukJcuOVTeObUFw7 oTbA== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=arm.com Received: from out1.vger.email (out1.vger.email. [2620:137:e000::1:20]) by mx.google.com with ESMTP id y11-20020aa79aeb000000b00643a730d50bsi197633pfp.389.2023.06.01.23.37.22; Thu, 01 Jun 2023 23:37:37 -0700 (PDT) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) client-ip=2620:137:e000::1:20; Authentication-Results: mx.google.com; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=arm.com Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S233687AbjFBG0Q (ORCPT + 99 others); Fri, 2 Jun 2023 02:26:16 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:39762 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S232000AbjFBG0N (ORCPT ); Fri, 2 Jun 2023 02:26:13 -0400 Received: from foss.arm.com (foss.arm.com [217.140.110.172]) by lindbergh.monkeyblade.net (Postfix) with ESMTP id 50336EB for ; Thu, 1 Jun 2023 23:26:10 -0700 (PDT) Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id 7BDDF1063; Thu, 1 Jun 2023 23:26:55 -0700 (PDT) Received: from a077893.blr.arm.com (unknown [10.162.41.6]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPA id 0D2DB3F67D; Thu, 1 Jun 2023 23:26:05 -0700 (PDT) From: Anshuman Khandual To: linux-arm-kernel@lists.infradead.org, broonie@kernel.org Cc: Anshuman Khandual , Catalin Marinas , Will Deacon , Marc Zyngier , Rob Herring , Suzuki K Poulose , James Morse , kvmarm@lists.linux.dev, coresight@lists.linaro.org, linux-kernel@vger.kernel.org Subject: [PATCH V2 01/14] arm64/sysreg: Rename TRBLIMITR_EL1 fields per auto-gen tools format Date: Fri, 2 Jun 2023 11:55:39 +0530 Message-Id: <20230602062552.565992-2-anshuman.khandual@arm.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20230602062552.565992-1-anshuman.khandual@arm.com> References: <20230602062552.565992-1-anshuman.khandual@arm.com> MIME-Version: 1.0 X-Spam-Status: No, score=-4.2 required=5.0 tests=BAYES_00,RCVD_IN_DNSWL_MED, SPF_HELO_NONE,SPF_NONE,T_SCC_BODY_TEXT_LINE autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-getmail-retrieved-from-mailbox: =?utf-8?q?INBOX?= X-GMAIL-THRID: =?utf-8?q?1767571831076260209?= X-GMAIL-MSGID: =?utf-8?q?1767571831076260209?= This renames TRBLIMITR_EL1 register fields per auto-gen tools format without causing any functional change in the TRBE driver. Cc: Catalin Marinas Cc: Will Deacon Cc: Marc Zyngier Cc: Mark Brown Cc: Rob Herring Cc: Suzuki K Poulose Cc: James Morse Cc: kvmarm@lists.linux.dev Cc: coresight@lists.linaro.org Cc: linux-arm-kernel@lists.infradead.org Cc: linux-kernel@vger.kernel.org Signed-off-by: Anshuman Khandual --- arch/arm64/include/asm/sysreg.h | 16 +++++++-------- arch/arm64/kvm/hyp/nvhe/debug-sr.c | 2 +- drivers/hwtracing/coresight/coresight-trbe.c | 21 ++++++++++---------- drivers/hwtracing/coresight/coresight-trbe.h | 7 ++++--- 4 files changed, 24 insertions(+), 22 deletions(-) diff --git a/arch/arm64/include/asm/sysreg.h b/arch/arm64/include/asm/sysreg.h index e72d9aaab6b1..b2b67ae7525b 100644 --- a/arch/arm64/include/asm/sysreg.h +++ b/arch/arm64/include/asm/sysreg.h @@ -246,14 +246,14 @@ #define SYS_TRBTRG_EL1 sys_reg(3, 0, 9, 11, 6) #define SYS_TRBIDR_EL1 sys_reg(3, 0, 9, 11, 7) -#define TRBLIMITR_LIMIT_MASK GENMASK_ULL(51, 0) -#define TRBLIMITR_LIMIT_SHIFT 12 -#define TRBLIMITR_NVM BIT(5) -#define TRBLIMITR_TRIG_MODE_MASK GENMASK(1, 0) -#define TRBLIMITR_TRIG_MODE_SHIFT 3 -#define TRBLIMITR_FILL_MODE_MASK GENMASK(1, 0) -#define TRBLIMITR_FILL_MODE_SHIFT 1 -#define TRBLIMITR_ENABLE BIT(0) +#define TRBLIMITR_EL1_LIMIT_MASK GENMASK_ULL(63, 12) +#define TRBLIMITR_EL1_LIMIT_SHIFT 12 +#define TRBLIMITR_EL1_nVM BIT(5) +#define TRBLIMITR_EL1_TM_MASK GENMASK(4, 3) +#define TRBLIMITR_EL1_TM_SHIFT 3 +#define TRBLIMITR_EL1_FM_MASK GENMASK(2, 1) +#define TRBLIMITR_EL1_FM_SHIFT 1 +#define TRBLIMITR_EL1_E BIT(0) #define TRBPTR_PTR_MASK GENMASK_ULL(63, 0) #define TRBPTR_PTR_SHIFT 0 #define TRBBASER_BASE_MASK GENMASK_ULL(51, 0) diff --git a/arch/arm64/kvm/hyp/nvhe/debug-sr.c b/arch/arm64/kvm/hyp/nvhe/debug-sr.c index d756b939f296..4558c02eb352 100644 --- a/arch/arm64/kvm/hyp/nvhe/debug-sr.c +++ b/arch/arm64/kvm/hyp/nvhe/debug-sr.c @@ -56,7 +56,7 @@ static void __debug_save_trace(u64 *trfcr_el1) *trfcr_el1 = 0; /* Check if the TRBE is enabled */ - if (!(read_sysreg_s(SYS_TRBLIMITR_EL1) & TRBLIMITR_ENABLE)) + if (!(read_sysreg_s(SYS_TRBLIMITR_EL1) & TRBLIMITR_EL1_E)) return; /* * Prohibit trace generation while we are in guest. diff --git a/drivers/hwtracing/coresight/coresight-trbe.c b/drivers/hwtracing/coresight/coresight-trbe.c index 1fc4fd79a1c6..1d9d141c62e9 100644 --- a/drivers/hwtracing/coresight/coresight-trbe.c +++ b/drivers/hwtracing/coresight/coresight-trbe.c @@ -218,7 +218,7 @@ static inline void set_trbe_enabled(struct trbe_cpudata *cpudata, u64 trblimitr) * Enable the TRBE without clearing LIMITPTR which * might be required for fetching the buffer limits. */ - trblimitr |= TRBLIMITR_ENABLE; + trblimitr |= TRBLIMITR_EL1_E; write_sysreg_s(trblimitr, SYS_TRBLIMITR_EL1); /* Synchronize the TRBE enable event */ @@ -236,7 +236,7 @@ static inline void set_trbe_disabled(struct trbe_cpudata *cpudata) * Disable the TRBE without clearing LIMITPTR which * might be required for fetching the buffer limits. */ - trblimitr &= ~TRBLIMITR_ENABLE; + trblimitr &= ~TRBLIMITR_EL1_E; write_sysreg_s(trblimitr, SYS_TRBLIMITR_EL1); if (trbe_needs_drain_after_disable(cpudata)) @@ -596,13 +596,13 @@ static void set_trbe_limit_pointer_enabled(struct trbe_buf *buf) u64 trblimitr = read_sysreg_s(SYS_TRBLIMITR_EL1); unsigned long addr = buf->trbe_limit; - WARN_ON(!IS_ALIGNED(addr, (1UL << TRBLIMITR_LIMIT_SHIFT))); + WARN_ON(!IS_ALIGNED(addr, (1UL << TRBLIMITR_EL1_LIMIT_SHIFT))); WARN_ON(!IS_ALIGNED(addr, PAGE_SIZE)); - trblimitr &= ~TRBLIMITR_NVM; - trblimitr &= ~(TRBLIMITR_FILL_MODE_MASK << TRBLIMITR_FILL_MODE_SHIFT); - trblimitr &= ~(TRBLIMITR_TRIG_MODE_MASK << TRBLIMITR_TRIG_MODE_SHIFT); - trblimitr &= ~(TRBLIMITR_LIMIT_MASK << TRBLIMITR_LIMIT_SHIFT); + trblimitr &= ~TRBLIMITR_EL1_nVM; + trblimitr &= ~TRBLIMITR_EL1_FM_MASK; + trblimitr &= ~TRBLIMITR_EL1_TM_MASK; + trblimitr &= ~TRBLIMITR_EL1_LIMIT_MASK; /* * Fill trace buffer mode is used here while configuring the @@ -613,14 +613,15 @@ static void set_trbe_limit_pointer_enabled(struct trbe_buf *buf) * trace data in the interrupt handler, before reconfiguring * the TRBE. */ - trblimitr |= (TRBE_FILL_MODE_FILL & TRBLIMITR_FILL_MODE_MASK) << TRBLIMITR_FILL_MODE_SHIFT; + trblimitr |= (TRBLIMITR_EL1_FM_FILL << TRBLIMITR_EL1_FM_SHIFT) & + TRBLIMITR_EL1_FM_MASK; /* * Trigger mode is not used here while configuring the TRBE for * the trace capture. Hence just keep this in the ignore mode. */ - trblimitr |= (TRBE_TRIG_MODE_IGNORE & TRBLIMITR_TRIG_MODE_MASK) << - TRBLIMITR_TRIG_MODE_SHIFT; + trblimitr |= (TRBLIMITR_EL1_TM_IGNR << TRBLIMITR_EL1_TM_SHIFT) & + TRBLIMITR_EL1_TM_MASK; trblimitr |= (addr & PAGE_MASK); set_trbe_enabled(buf->cpudata, trblimitr); } diff --git a/drivers/hwtracing/coresight/coresight-trbe.h b/drivers/hwtracing/coresight/coresight-trbe.h index 98ff1b17ad07..8ea7079d60bb 100644 --- a/drivers/hwtracing/coresight/coresight-trbe.h +++ b/drivers/hwtracing/coresight/coresight-trbe.h @@ -30,7 +30,7 @@ static inline bool is_trbe_enabled(void) { u64 trblimitr = read_sysreg_s(SYS_TRBLIMITR_EL1); - return trblimitr & TRBLIMITR_ENABLE; + return trblimitr & TRBLIMITR_EL1_E; } #define TRBE_EC_OTHERS 0 @@ -86,8 +86,9 @@ static inline bool is_trbe_running(u64 trbsr) #define TRBE_TRIG_MODE_STOP 0 #define TRBE_TRIG_MODE_IRQ 1 -#define TRBE_TRIG_MODE_IGNORE 3 +#define TRBLIMITR_EL1_TM_IGNR 3 +#define TRBLIMITR_EL1_FM_FILL 0 #define TRBE_FILL_MODE_FILL 0 #define TRBE_FILL_MODE_WRAP 1 #define TRBE_FILL_MODE_CIRCULAR_BUFFER 3 @@ -121,7 +122,7 @@ static inline void set_trbe_write_pointer(unsigned long addr) static inline unsigned long get_trbe_limit_pointer(void) { u64 trblimitr = read_sysreg_s(SYS_TRBLIMITR_EL1); - unsigned long addr = trblimitr & (TRBLIMITR_LIMIT_MASK << TRBLIMITR_LIMIT_SHIFT); + unsigned long addr = trblimitr & TRBLIMITR_EL1_LIMIT_MASK; WARN_ON(!IS_ALIGNED(addr, PAGE_SIZE)); return addr; From patchwork Fri Jun 2 06:25:40 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Anshuman Khandual X-Patchwork-Id: 102314 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a59:994d:0:b0:3d9:f83d:47d9 with SMTP id k13csp828381vqr; Thu, 1 Jun 2023 23:27:54 -0700 (PDT) X-Google-Smtp-Source: ACHHUZ4pApveRdmFD5RP7kpnQO33HfnbEjFLFyq5WSaHFaLETCagkL7swHJuodyCXw1Dow0AOw+A X-Received: by 2002:a05:6a20:431b:b0:106:999f:64df with SMTP id h27-20020a056a20431b00b00106999f64dfmr13528563pzk.58.1685687274338; Thu, 01 Jun 2023 23:27:54 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1685687274; cv=none; d=google.com; s=arc-20160816; b=BKrMkpdcu9JeVPcmohoB8SH+5BQ+BhOSMLi3OGIApAgc2og6gxk4CT4FkGTRMrGnW2 bsp8e7wVJo0bRaoAwK3Sgp1by9tCSyvv/EbcDnb360SENj6c33afXdT6Aq18Gjs+MgIu J7f9JkWFY3dYMBF+H/G8FSxW+Qc9ei4JwrPdgR6WJP5rLub4zIoHkTKOeTqwuT8qONCt GYo8oo8TodZs6dj75b6qxh/XucS/LGFQsMsPEwhv0YQBaw73Gkg4zhE1dwERBHtqgcYT SnUSLB7fo8cqok7xHBfm4x7s2O5SEGgmACpA/YAFuZXlR9QJXH+39Z4Maftp120R5N4V p6VQ== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from; bh=z2/4qSXRE2q3Ba535MkTTdZxaIgUT+UNqWuh/xW0kpw=; b=nG0N0DWljIDPNJ1BVcSiYjIQB8eS8LNIQzDWZ32TNZ/PFlOhBeIOpthafG+jQvzZdg r+CiXBdFFVfEpljoESYrBHEn71AnuGfPX0S68M5C6mjsYeB5hiGrsC2y6nsw7PbfnyOd 3o4v6HexKWi1g6lGe9Wv85+XqJ9ANXVqD+/uMycV2PusBhZRoITeARXuqgItNYeKqVG/ UufYNeKmnlFcqIw4Qhk2MDWpIgLzyjCFzRx+kQQXZxmy9mIofQFo7brSdplC3MXaHQbp OiIXrcpuxaTeVrp899wvAXb1Dw7Xn87B/mWx0DDPN+flr0GFp7EGtMjCEvXQ5jEBRF4X KAXw== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=arm.com Received: from out1.vger.email (out1.vger.email. [2620:137:e000::1:20]) by mx.google.com with ESMTP id w63-20020a638242000000b0053011490008si431427pgd.885.2023.06.01.23.27.41; Thu, 01 Jun 2023 23:27:54 -0700 (PDT) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) client-ip=2620:137:e000::1:20; Authentication-Results: mx.google.com; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=arm.com Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S233766AbjFBG0S (ORCPT + 99 others); Fri, 2 Jun 2023 02:26:18 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:39774 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S233739AbjFBG0Q (ORCPT ); Fri, 2 Jun 2023 02:26:16 -0400 Received: from foss.arm.com (foss.arm.com [217.140.110.172]) by lindbergh.monkeyblade.net (Postfix) with ESMTP id 16242E7 for ; Thu, 1 Jun 2023 23:26:15 -0700 (PDT) Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id 45EA11474; Thu, 1 Jun 2023 23:27:00 -0700 (PDT) Received: from a077893.blr.arm.com (unknown [10.162.41.6]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPA id A2AB33F67D; Thu, 1 Jun 2023 23:26:10 -0700 (PDT) From: Anshuman Khandual To: linux-arm-kernel@lists.infradead.org, broonie@kernel.org Cc: Anshuman Khandual , Catalin Marinas , Will Deacon , Marc Zyngier , Rob Herring , Suzuki K Poulose , James Morse , kvmarm@lists.linux.dev, coresight@lists.linaro.org, linux-kernel@vger.kernel.org Subject: [PATCH V2 02/14] arm64/sysreg: Rename TRBPTR_EL1 fields per auto-gen tools format Date: Fri, 2 Jun 2023 11:55:40 +0530 Message-Id: <20230602062552.565992-3-anshuman.khandual@arm.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20230602062552.565992-1-anshuman.khandual@arm.com> References: <20230602062552.565992-1-anshuman.khandual@arm.com> MIME-Version: 1.0 X-Spam-Status: No, score=-4.2 required=5.0 tests=BAYES_00,RCVD_IN_DNSWL_MED, SPF_HELO_NONE,SPF_NONE,T_SCC_BODY_TEXT_LINE autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-getmail-retrieved-from-mailbox: =?utf-8?q?INBOX?= X-GMAIL-THRID: =?utf-8?q?1767571219086449423?= X-GMAIL-MSGID: =?utf-8?q?1767571219086449423?= This renames TRBPTR_EL1 register fields per auto-gen tools format without causing any functional change in the TRBE driver. Cc: Catalin Marinas Cc: Will Deacon Cc: Marc Zyngier Cc: Mark Brown Cc: Rob Herring Cc: Suzuki K Poulose Cc: James Morse Cc: kvmarm@lists.linux.dev Cc: coresight@lists.linaro.org Cc: linux-arm-kernel@lists.infradead.org Cc: linux-kernel@vger.kernel.org Signed-off-by: Anshuman Khandual --- arch/arm64/include/asm/sysreg.h | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/arch/arm64/include/asm/sysreg.h b/arch/arm64/include/asm/sysreg.h index b2b67ae7525b..2cb1078bc67f 100644 --- a/arch/arm64/include/asm/sysreg.h +++ b/arch/arm64/include/asm/sysreg.h @@ -254,8 +254,8 @@ #define TRBLIMITR_EL1_FM_MASK GENMASK(2, 1) #define TRBLIMITR_EL1_FM_SHIFT 1 #define TRBLIMITR_EL1_E BIT(0) -#define TRBPTR_PTR_MASK GENMASK_ULL(63, 0) -#define TRBPTR_PTR_SHIFT 0 +#define TRBPTR_EL1_PTR_MASK GENMASK_ULL(63, 0) +#define TRBPTR_EL1_PTR_SHIFT 0 #define TRBBASER_BASE_MASK GENMASK_ULL(51, 0) #define TRBBASER_BASE_SHIFT 12 #define TRBSR_EC_MASK GENMASK(5, 0) From patchwork Fri Jun 2 06:25:41 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Anshuman Khandual X-Patchwork-Id: 102319 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a59:994d:0:b0:3d9:f83d:47d9 with SMTP id k13csp831732vqr; Thu, 1 Jun 2023 23:37:38 -0700 (PDT) X-Google-Smtp-Source: ACHHUZ7f06BsSwIRdBat+e7Lcx5yLlnooPPCe9z25Yjjk8wxgBszadKNg2uuC+QPfN+7yzvbNBpq X-Received: by 2002:a05:6a21:6da3:b0:10d:5390:ea90 with SMTP id wl35-20020a056a216da300b0010d5390ea90mr9433121pzb.59.1685687857877; Thu, 01 Jun 2023 23:37:37 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1685687857; cv=none; d=google.com; s=arc-20160816; b=aqLRkmDRTMd4zpZatxmPjYf6meUxjSmYYdWvTXNTbYcbQpv01/G3RnOkRoPo2zfz5e S26j2hLeWSxiKyoV0MIZV6ns3anLaG8fu/sII4pCcu+OTOFV1wXaC97mqYONy4GGoJ1/ Ue9greEffTCTehSsco95JCwQkkOvJqNWF58T5jPC02tCDKONAAzUh4jDx85FIF7gfjMG XhA1g5g7qpPV5H7c+UK86MhrqDB/XEgLmzQZkku073AAWJZ8jFBBLTrni+Jud8xUTOZn t09CriruQRFMurjH9o+d/B9EismEbx5QtizeVEv8O4nuiTKcPsOmb7BnRk+DsCbUQlxn MZwQ== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from; bh=Fs7AYq/4X9tCM+KnAUd9oRfMUVxD1owi6UJaEPqC+RU=; b=O+ApePoqGHxUpFvlSf+ZuAGyZMX3JoJ26UHzjxSG7OOyC+gqqflKf7HXMOFRxrtniF GO3VjSrHSlcC91XPoDFnbwFQU9yD/z6d72xyH8OMAbXTfW/3/doXoN5RUTQLpGQ5UuUa IdlH+vl20YyEG0jHS0fjkEf0/RzXfIYqdl+Gzx18JapTFCqnKG08fPUQyfgyYQ8c7GnQ SO+1AaBCr28zxYfl1w5U6jsRdPQqWShs9TA3n0IdqXsQtqZ/pL2wgTo5QlHCfGug7ndh gVyVNLhGaxrLTkxhuEBTxis+EM5W1kcKQxzcK9EXjhc+Xjxtf8ZOCwiqw5nCJ2qmnTov SUPw== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=arm.com Received: from out1.vger.email (out1.vger.email. [2620:137:e000::1:20]) by mx.google.com with ESMTP id e12-20020a17090301cc00b001ac9a3ebb38si392592plh.360.2023.06.01.23.37.22; Thu, 01 Jun 2023 23:37:37 -0700 (PDT) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) client-ip=2620:137:e000::1:20; Authentication-Results: mx.google.com; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=arm.com Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S233761AbjFBG0g (ORCPT + 99 others); Fri, 2 Jun 2023 02:26:36 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:39912 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S233808AbjFBG0W (ORCPT ); Fri, 2 Jun 2023 02:26:22 -0400 Received: from foss.arm.com (foss.arm.com [217.140.110.172]) by lindbergh.monkeyblade.net (Postfix) with ESMTP id CC9B11B3 for ; Thu, 1 Jun 2023 23:26:19 -0700 (PDT) Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id F32A31042; Thu, 1 Jun 2023 23:27:04 -0700 (PDT) Received: from a077893.blr.arm.com (unknown [10.162.41.6]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPA id 73D6F3F67D; Thu, 1 Jun 2023 23:26:15 -0700 (PDT) From: Anshuman Khandual To: linux-arm-kernel@lists.infradead.org, broonie@kernel.org Cc: Anshuman Khandual , Catalin Marinas , Will Deacon , Marc Zyngier , Rob Herring , Suzuki K Poulose , James Morse , kvmarm@lists.linux.dev, coresight@lists.linaro.org, linux-kernel@vger.kernel.org Subject: [PATCH V2 03/14] arm64/sysreg: Rename TRBBASER_EL1 fields per auto-gen tools format Date: Fri, 2 Jun 2023 11:55:41 +0530 Message-Id: <20230602062552.565992-4-anshuman.khandual@arm.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20230602062552.565992-1-anshuman.khandual@arm.com> References: <20230602062552.565992-1-anshuman.khandual@arm.com> MIME-Version: 1.0 X-Spam-Status: No, score=-4.2 required=5.0 tests=BAYES_00,RCVD_IN_DNSWL_MED, SPF_HELO_NONE,SPF_NONE,T_SCC_BODY_TEXT_LINE autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-getmail-retrieved-from-mailbox: =?utf-8?q?INBOX?= X-GMAIL-THRID: =?utf-8?q?1767571831545174289?= X-GMAIL-MSGID: =?utf-8?q?1767571831545174289?= This renames TRBBASER_EL1 register fields per auto-gen tools format without causing any functional change in the TRBE driver. Cc: Catalin Marinas Cc: Will Deacon Cc: Marc Zyngier Cc: Mark Brown Cc: Rob Herring Cc: Suzuki K Poulose Cc: James Morse Cc: kvmarm@lists.linux.dev Cc: coresight@lists.linaro.org Cc: linux-arm-kernel@lists.infradead.org Cc: linux-kernel@vger.kernel.org Signed-off-by: Anshuman Khandual --- arch/arm64/include/asm/sysreg.h | 4 ++-- drivers/hwtracing/coresight/coresight-trbe.h | 4 ++-- 2 files changed, 4 insertions(+), 4 deletions(-) diff --git a/arch/arm64/include/asm/sysreg.h b/arch/arm64/include/asm/sysreg.h index 2cb1078bc67f..9b2d1c6faf13 100644 --- a/arch/arm64/include/asm/sysreg.h +++ b/arch/arm64/include/asm/sysreg.h @@ -256,8 +256,8 @@ #define TRBLIMITR_EL1_E BIT(0) #define TRBPTR_EL1_PTR_MASK GENMASK_ULL(63, 0) #define TRBPTR_EL1_PTR_SHIFT 0 -#define TRBBASER_BASE_MASK GENMASK_ULL(51, 0) -#define TRBBASER_BASE_SHIFT 12 +#define TRBBASER_EL1_BASE_MASK GENMASK_ULL(63, 12) +#define TRBBASER_EL1_BASE_SHIFT 12 #define TRBSR_EC_MASK GENMASK(5, 0) #define TRBSR_EC_SHIFT 26 #define TRBSR_IRQ BIT(22) diff --git a/drivers/hwtracing/coresight/coresight-trbe.h b/drivers/hwtracing/coresight/coresight-trbe.h index 8ea7079d60bb..0b73d9d10aa8 100644 --- a/drivers/hwtracing/coresight/coresight-trbe.h +++ b/drivers/hwtracing/coresight/coresight-trbe.h @@ -131,7 +131,7 @@ static inline unsigned long get_trbe_limit_pointer(void) static inline unsigned long get_trbe_base_pointer(void) { u64 trbbaser = read_sysreg_s(SYS_TRBBASER_EL1); - unsigned long addr = trbbaser & (TRBBASER_BASE_MASK << TRBBASER_BASE_SHIFT); + unsigned long addr = trbbaser & TRBBASER_EL1_BASE_MASK; WARN_ON(!IS_ALIGNED(addr, PAGE_SIZE)); return addr; @@ -140,7 +140,7 @@ static inline unsigned long get_trbe_base_pointer(void) static inline void set_trbe_base_pointer(unsigned long addr) { WARN_ON(is_trbe_enabled()); - WARN_ON(!IS_ALIGNED(addr, (1UL << TRBBASER_BASE_SHIFT))); + WARN_ON(!IS_ALIGNED(addr, (1UL << TRBBASER_EL1_BASE_SHIFT))); WARN_ON(!IS_ALIGNED(addr, PAGE_SIZE)); write_sysreg_s(addr, SYS_TRBBASER_EL1); } From patchwork Fri Jun 2 06:25:42 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Anshuman Khandual X-Patchwork-Id: 102323 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a59:994d:0:b0:3d9:f83d:47d9 with SMTP id k13csp832495vqr; Thu, 1 Jun 2023 23:40:05 -0700 (PDT) X-Google-Smtp-Source: ACHHUZ6vlqI/EtZ9ub3pbIxlbY9JyDPIN9bdgV2aB1+q9tyKJfuwRzYivY5Jx5f67tIW85gh+B56 X-Received: by 2002:a17:90b:358d:b0:256:6167:c725 with SMTP id mm13-20020a17090b358d00b002566167c725mr1532392pjb.6.1685688005328; Thu, 01 Jun 2023 23:40:05 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1685688005; cv=none; d=google.com; s=arc-20160816; b=Yy4UN+qpmrSru4wsJy3hLyjMGKgEXWvuiBAH3bxQFyTGL3BqvRp61OXYiB0RNlD7gC 0d1e5SW348r7PjXt70HZSLoAlW2JvivzQqjSeJF4VTMhBu2t/ymwHmM4uL+S4zZQ6dWP qHgHQGL9vUjWI9LuBeh71W/3ttH6npEi9F/SG1zU6dHB2Rx0MwEfHAJoOGC9FDE5W7+0 mSxD0mHyucjLU0hZO7ecRw/6AI0nHfzB3qKMyrmRvhWznQfBmj5x13YvoH8zUgJU540L RljBZRwUf/VMzD3unAg+dNZj0BDwPYVOTasDlQT9ETBeflLbHLZTLrET4GDxsD5h9QE2 k2jg== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from; bh=taRKITUUvSV+chW3cyHGEptPAQgtqMhjExfburielZE=; b=uQq/UJFYVpXJHchpGkcxA9nTlDXzhkZK6Hw1HbjSkk5IOk0iAj9Su+WGUr9hj5cWnm v7zQ2hMYHEhX9tjcYhOOSOZKkjQI9Q+/kSu2BVbRUWRYrNSVEraPwFq1Q9sROvHbGrFS q8orgVd1laHvyT5/hCooWWmpIUN6TDMA2f5uscMdv3e/Iz5ch8Lh+mG5z53AtQeAnOKO s8U7MCsV6vhgla1ZUg2ZjWIWVzA9aDMFdt+1ejYNodNEwGa3ojX4lA3svH2HwdJ9JFp+ TNQ4OmnNGJfwoSfYHuU0a+36UH9JwbUze1pGCgaN6APsWi0w1Hz8yH9hR3gMx7Y1mEjM WwCg== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=arm.com Received: from out1.vger.email (out1.vger.email. [2620:137:e000::1:20]) by mx.google.com with ESMTP id gb13-20020a17090b060d00b0025677f1197asi2318267pjb.12.2023.06.01.23.39.50; Thu, 01 Jun 2023 23:40:05 -0700 (PDT) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) client-ip=2620:137:e000::1:20; Authentication-Results: mx.google.com; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=arm.com Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S233770AbjFBG07 (ORCPT + 99 others); Fri, 2 Jun 2023 02:26:59 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:39872 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S233838AbjFBG0c (ORCPT ); Fri, 2 Jun 2023 02:26:32 -0400 Received: from foss.arm.com (foss.arm.com [217.140.110.172]) by lindbergh.monkeyblade.net (Postfix) with ESMTP id 1A796E4C for ; Thu, 1 Jun 2023 23:26:24 -0700 (PDT) Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id 48E6C1042; Thu, 1 Jun 2023 23:27:09 -0700 (PDT) Received: from a077893.blr.arm.com (unknown [10.162.41.6]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPA id 123003F67D; Thu, 1 Jun 2023 23:26:19 -0700 (PDT) From: Anshuman Khandual To: linux-arm-kernel@lists.infradead.org, broonie@kernel.org Cc: Anshuman Khandual , Catalin Marinas , Will Deacon , Marc Zyngier , Rob Herring , Suzuki K Poulose , James Morse , kvmarm@lists.linux.dev, coresight@lists.linaro.org, linux-kernel@vger.kernel.org Subject: [PATCH V2 04/14] arm64/sysreg: Rename TRBSR_EL1 fields per auto-gen tools format Date: Fri, 2 Jun 2023 11:55:42 +0530 Message-Id: <20230602062552.565992-5-anshuman.khandual@arm.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20230602062552.565992-1-anshuman.khandual@arm.com> References: <20230602062552.565992-1-anshuman.khandual@arm.com> MIME-Version: 1.0 X-Spam-Status: No, score=-4.2 required=5.0 tests=BAYES_00,RCVD_IN_DNSWL_MED, SPF_HELO_NONE,SPF_NONE,T_SCC_BODY_TEXT_LINE autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-getmail-retrieved-from-mailbox: =?utf-8?q?INBOX?= X-GMAIL-THRID: =?utf-8?q?1767571985776896804?= X-GMAIL-MSGID: =?utf-8?q?1767571985776896804?= This renames TRBSR_EL1 register fields per auto-gen tools format without causing any functional change in the TRBE driver. Cc: Catalin Marinas Cc: Will Deacon Cc: Marc Zyngier Cc: Mark Brown Cc: Rob Herring Cc: Suzuki K Poulose Cc: James Morse Cc: kvmarm@lists.linux.dev Cc: coresight@lists.linaro.org Cc: linux-arm-kernel@lists.infradead.org Cc: linux-kernel@vger.kernel.org Signed-off-by: Anshuman Khandual --- arch/arm64/include/asm/sysreg.h | 26 ++++++++++---------- drivers/hwtracing/coresight/coresight-trbe.c | 12 ++++----- drivers/hwtracing/coresight/coresight-trbe.h | 16 ++++++------ 3 files changed, 27 insertions(+), 27 deletions(-) diff --git a/arch/arm64/include/asm/sysreg.h b/arch/arm64/include/asm/sysreg.h index 9b2d1c6faf13..af9e93ca1905 100644 --- a/arch/arm64/include/asm/sysreg.h +++ b/arch/arm64/include/asm/sysreg.h @@ -258,19 +258,19 @@ #define TRBPTR_EL1_PTR_SHIFT 0 #define TRBBASER_EL1_BASE_MASK GENMASK_ULL(63, 12) #define TRBBASER_EL1_BASE_SHIFT 12 -#define TRBSR_EC_MASK GENMASK(5, 0) -#define TRBSR_EC_SHIFT 26 -#define TRBSR_IRQ BIT(22) -#define TRBSR_TRG BIT(21) -#define TRBSR_WRAP BIT(20) -#define TRBSR_ABORT BIT(18) -#define TRBSR_STOP BIT(17) -#define TRBSR_MSS_MASK GENMASK(15, 0) -#define TRBSR_MSS_SHIFT 0 -#define TRBSR_BSC_MASK GENMASK(5, 0) -#define TRBSR_BSC_SHIFT 0 -#define TRBSR_FSC_MASK GENMASK(5, 0) -#define TRBSR_FSC_SHIFT 0 +#define TRBSR_EL1_EC_MASK GENMASK(31, 26) +#define TRBSR_EL1_EC_SHIFT 26 +#define TRBSR_EL1_IRQ BIT(22) +#define TRBSR_EL1_TRG BIT(21) +#define TRBSR_EL1_WRAP BIT(20) +#define TRBSR_EL1_EA BIT(18) +#define TRBSR_EL1_S BIT(17) +#define TRBSR_EL1_MSS_MASK GENMASK(15, 0) +#define TRBSR_EL1_MSS_SHIFT 0 +#define TRBSR_EL1_BSC_MASK GENMASK(5, 0) +#define TRBSR_EL1_BSC_SHIFT 0 +#define TRBSR_EL1_FSC_MASK GENMASK(5, 0) +#define TRBSR_EL1_FSC_SHIFT 0 #define TRBMAR_SHARE_MASK GENMASK(1, 0) #define TRBMAR_SHARE_SHIFT 8 #define TRBMAR_OUTER_MASK GENMASK(3, 0) diff --git a/drivers/hwtracing/coresight/coresight-trbe.c b/drivers/hwtracing/coresight/coresight-trbe.c index 1d9d141c62e9..1bab91ce8e95 100644 --- a/drivers/hwtracing/coresight/coresight-trbe.c +++ b/drivers/hwtracing/coresight/coresight-trbe.c @@ -582,12 +582,12 @@ static void clr_trbe_status(void) u64 trbsr = read_sysreg_s(SYS_TRBSR_EL1); WARN_ON(is_trbe_enabled()); - trbsr &= ~TRBSR_IRQ; - trbsr &= ~TRBSR_TRG; - trbsr &= ~TRBSR_WRAP; - trbsr &= ~(TRBSR_EC_MASK << TRBSR_EC_SHIFT); - trbsr &= ~(TRBSR_BSC_MASK << TRBSR_BSC_SHIFT); - trbsr &= ~TRBSR_STOP; + trbsr &= ~TRBSR_EL1_IRQ; + trbsr &= ~TRBSR_EL1_TRG; + trbsr &= ~TRBSR_EL1_WRAP; + trbsr &= ~TRBSR_EL1_EC_MASK; + trbsr &= ~TRBSR_EL1_BSC_MASK; + trbsr &= ~TRBSR_EL1_S; write_sysreg_s(trbsr, SYS_TRBSR_EL1); } diff --git a/drivers/hwtracing/coresight/coresight-trbe.h b/drivers/hwtracing/coresight/coresight-trbe.h index 0b73d9d10aa8..3743d9085355 100644 --- a/drivers/hwtracing/coresight/coresight-trbe.h +++ b/drivers/hwtracing/coresight/coresight-trbe.h @@ -39,7 +39,7 @@ static inline bool is_trbe_enabled(void) static inline int get_trbe_ec(u64 trbsr) { - return (trbsr >> TRBSR_EC_SHIFT) & TRBSR_EC_MASK; + return (trbsr & TRBSR_EL1_EC_MASK) >> TRBSR_EL1_EC_SHIFT; } #define TRBE_BSC_NOT_STOPPED 0 @@ -48,40 +48,40 @@ static inline int get_trbe_ec(u64 trbsr) static inline int get_trbe_bsc(u64 trbsr) { - return (trbsr >> TRBSR_BSC_SHIFT) & TRBSR_BSC_MASK; + return (trbsr & TRBSR_EL1_BSC_MASK) >> TRBSR_EL1_BSC_SHIFT; } static inline void clr_trbe_irq(void) { u64 trbsr = read_sysreg_s(SYS_TRBSR_EL1); - trbsr &= ~TRBSR_IRQ; + trbsr &= ~TRBSR_EL1_IRQ; write_sysreg_s(trbsr, SYS_TRBSR_EL1); } static inline bool is_trbe_irq(u64 trbsr) { - return trbsr & TRBSR_IRQ; + return trbsr & TRBSR_EL1_IRQ; } static inline bool is_trbe_trg(u64 trbsr) { - return trbsr & TRBSR_TRG; + return trbsr & TRBSR_EL1_TRG; } static inline bool is_trbe_wrap(u64 trbsr) { - return trbsr & TRBSR_WRAP; + return trbsr & TRBSR_EL1_WRAP; } static inline bool is_trbe_abort(u64 trbsr) { - return trbsr & TRBSR_ABORT; + return trbsr & TRBSR_EL1_EA; } static inline bool is_trbe_running(u64 trbsr) { - return !(trbsr & TRBSR_STOP); + return !(trbsr & TRBSR_EL1_S); } #define TRBE_TRIG_MODE_STOP 0 From patchwork Fri Jun 2 06:25:43 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Anshuman Khandual X-Patchwork-Id: 102318 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a59:994d:0:b0:3d9:f83d:47d9 with SMTP id k13csp831734vqr; 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[2620:137:e000::1:20]) by mx.google.com with ESMTP id 20-20020a631854000000b0051b9a71329fsi493106pgy.360.2023.06.01.23.37.22; Thu, 01 Jun 2023 23:37:37 -0700 (PDT) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) client-ip=2620:137:e000::1:20; Authentication-Results: mx.google.com; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=arm.com Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S233572AbjFBG1G (ORCPT + 99 others); Fri, 2 Jun 2023 02:27:06 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:39872 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S233873AbjFBG0j (ORCPT ); Fri, 2 Jun 2023 02:26:39 -0400 Received: from foss.arm.com (foss.arm.com [217.140.110.172]) by lindbergh.monkeyblade.net (Postfix) with ESMTP id 7641BE6B for ; Thu, 1 Jun 2023 23:26:28 -0700 (PDT) Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id 9BFA11063; Thu, 1 Jun 2023 23:27:13 -0700 (PDT) Received: from a077893.blr.arm.com (unknown [10.162.41.6]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPA id 5E3913F67D; Thu, 1 Jun 2023 23:26:24 -0700 (PDT) From: Anshuman Khandual To: linux-arm-kernel@lists.infradead.org, broonie@kernel.org Cc: Anshuman Khandual , Catalin Marinas , Will Deacon , Marc Zyngier , Rob Herring , Suzuki K Poulose , James Morse , kvmarm@lists.linux.dev, coresight@lists.linaro.org, linux-kernel@vger.kernel.org Subject: [PATCH V2 05/14] arm64/sysreg: Rename TRBMAR_EL1 fields per auto-gen tools format Date: Fri, 2 Jun 2023 11:55:43 +0530 Message-Id: <20230602062552.565992-6-anshuman.khandual@arm.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20230602062552.565992-1-anshuman.khandual@arm.com> References: <20230602062552.565992-1-anshuman.khandual@arm.com> MIME-Version: 1.0 X-Spam-Status: No, score=-4.2 required=5.0 tests=BAYES_00,RCVD_IN_DNSWL_MED, SPF_HELO_NONE,SPF_NONE,T_SCC_BODY_TEXT_LINE autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-getmail-retrieved-from-mailbox: =?utf-8?q?INBOX?= X-GMAIL-THRID: =?utf-8?q?1767571831244013414?= X-GMAIL-MSGID: =?utf-8?q?1767571831244013414?= This renames TRBMAR_EL1 register fields per auto-gen tools format without causing any functional change in the TRBE driver. Cc: Catalin Marinas Cc: Will Deacon Cc: Marc Zyngier Cc: Mark Brown Cc: Rob Herring Cc: Suzuki K Poulose Cc: James Morse Cc: kvmarm@lists.linux.dev Cc: coresight@lists.linaro.org Cc: linux-arm-kernel@lists.infradead.org Cc: linux-kernel@vger.kernel.org Signed-off-by: Anshuman Khandual --- arch/arm64/include/asm/sysreg.h | 10 ++++------ 1 file changed, 4 insertions(+), 6 deletions(-) diff --git a/arch/arm64/include/asm/sysreg.h b/arch/arm64/include/asm/sysreg.h index af9e93ca1905..58cc9fd1935e 100644 --- a/arch/arm64/include/asm/sysreg.h +++ b/arch/arm64/include/asm/sysreg.h @@ -271,12 +271,10 @@ #define TRBSR_EL1_BSC_SHIFT 0 #define TRBSR_EL1_FSC_MASK GENMASK(5, 0) #define TRBSR_EL1_FSC_SHIFT 0 -#define TRBMAR_SHARE_MASK GENMASK(1, 0) -#define TRBMAR_SHARE_SHIFT 8 -#define TRBMAR_OUTER_MASK GENMASK(3, 0) -#define TRBMAR_OUTER_SHIFT 4 -#define TRBMAR_INNER_MASK GENMASK(3, 0) -#define TRBMAR_INNER_SHIFT 0 +#define TRBMAR_EL1_SH_MASK GENMASK(9, 8) +#define TRBMAR_EL1_SH_SHIFT 8 +#define TRBMAR_EL1_Attr_MASK GENMASK(7, 0) +#define TRBMAR_EL1_Attr_SHIFT 0 #define TRBTRG_TRG_MASK GENMASK(31, 0) #define TRBTRG_TRG_SHIFT 0 #define TRBIDR_FLAG BIT(5) From patchwork Fri Jun 2 06:25:44 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Anshuman Khandual X-Patchwork-Id: 102322 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a59:994d:0:b0:3d9:f83d:47d9 with SMTP id k13csp832024vqr; Thu, 1 Jun 2023 23:38:34 -0700 (PDT) X-Google-Smtp-Source: ACHHUZ7NW68KzDybQ1Z0VroqLtPCUWNpRISv0/Vnf/Ve3+IiB7Gs4XNCswRxrp8za1qwoege23hP X-Received: by 2002:a05:6a21:99a7:b0:10e:e58d:ce85 with SMTP id ve39-20020a056a2199a700b0010ee58dce85mr13280616pzb.10.1685687914336; Thu, 01 Jun 2023 23:38:34 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1685687914; cv=none; d=google.com; s=arc-20160816; b=uL9LwJfap3Nx3lbOUdNImHkaitEqHHJmgTLFgYmoZpCT6iOgHhW7CxJ5RHnydRUzpM vphKneMylrrfoQf1d3c+8aCLdzniWrwdTID9wQdFWYXOh8ueGiGD8HfqwVMjTiIRwR0e 0dx/AW61A4vzbnwvN5kMGY91SLoVexW9sPlAhrnn+yVvrSKrZaC7ccL1G/wrBkWszcET SmmJtF5NTdqO2ykHR+d4DyLk7QBsFQACUiKF1ahBI3ypAC3MwzXK1W6RWtBAzGvXkS+w pXrChkJhb37Q3p58pZP+n0y9zlJpMIX9TkSwSATlvbo2lg0dPMwiEmFt7lp/R9KI1GH+ n9tQ== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from; bh=+TcuMOtVkcZAg4du7FDC+IY0yPph8RtmWgggpda9BTE=; b=kYhgCyXdvlR69XvlwohJKwQgJY3YPHOOwU7zKfzWn7ebZo5SRcza1IE6AGMYdD/Hwk A/E5MGrZxfUkSH34Qhoc7Eh/cS97GbdgwMEog1KJP9UopXfg4P3HqtxvA7nJ0G1NihnB Ag7kDe7Qxzm+zriWh8KIBjn2EDoInfZZK4eH1pDSDsZOl1VqF+UZne3c0yCaU7Sr3/nb 8Sv/vWKUHIlp7yDJ5LdrbPlgbfS2FEtRtSVQkqjVPRZuH2Le8fy9ONBERxroLvtJhMJt folCb8S+Fy/PBTpoPQRMG7cxM1zWYulncezIobSbzX2Web5UyBltIOgXKwpTg/J+HmIK 6T9Q== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=arm.com Received: from out1.vger.email (out1.vger.email. [2620:137:e000::1:20]) by mx.google.com with ESMTP id h11-20020a65480b000000b0053f26bf15ccsi498251pgs.82.2023.06.01.23.38.20; Thu, 01 Jun 2023 23:38:34 -0700 (PDT) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) client-ip=2620:137:e000::1:20; Authentication-Results: mx.google.com; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=arm.com Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S233876AbjFBG1J (ORCPT + 99 others); Fri, 2 Jun 2023 02:27:09 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:40158 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S233919AbjFBG0u (ORCPT ); Fri, 2 Jun 2023 02:26:50 -0400 Received: from foss.arm.com (foss.arm.com [217.140.110.172]) by lindbergh.monkeyblade.net (Postfix) with ESMTP id D9EEF1B1 for ; Thu, 1 Jun 2023 23:26:32 -0700 (PDT) Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id 00A851042; Thu, 1 Jun 2023 23:27:18 -0700 (PDT) Received: from a077893.blr.arm.com (unknown [10.162.41.6]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPA id B46D83F67D; Thu, 1 Jun 2023 23:26:28 -0700 (PDT) From: Anshuman Khandual To: linux-arm-kernel@lists.infradead.org, broonie@kernel.org Cc: Anshuman Khandual , Catalin Marinas , Will Deacon , Marc Zyngier , Rob Herring , Suzuki K Poulose , James Morse , kvmarm@lists.linux.dev, coresight@lists.linaro.org, linux-kernel@vger.kernel.org Subject: [PATCH V2 06/14] arm64/sysreg: Rename TRBTRG_EL1 fields per auto-gen tools format Date: Fri, 2 Jun 2023 11:55:44 +0530 Message-Id: <20230602062552.565992-7-anshuman.khandual@arm.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20230602062552.565992-1-anshuman.khandual@arm.com> References: <20230602062552.565992-1-anshuman.khandual@arm.com> MIME-Version: 1.0 X-Spam-Status: No, score=-4.2 required=5.0 tests=BAYES_00,RCVD_IN_DNSWL_MED, SPF_HELO_NONE,SPF_NONE,T_SCC_BODY_TEXT_LINE autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-getmail-retrieved-from-mailbox: =?utf-8?q?INBOX?= X-GMAIL-THRID: =?utf-8?q?1767571890620012133?= X-GMAIL-MSGID: =?utf-8?q?1767571890620012133?= This renames TRBTRG_EL1 register fields per auto-gen tools format without causing any functional change in the TRBE driver. Cc: Catalin Marinas Cc: Will Deacon Cc: Marc Zyngier Cc: Mark Brown Cc: Rob Herring Cc: Suzuki K Poulose Cc: James Morse Cc: kvmarm@lists.linux.dev Cc: coresight@lists.linaro.org Cc: linux-arm-kernel@lists.infradead.org Cc: linux-kernel@vger.kernel.org Signed-off-by: Anshuman Khandual --- arch/arm64/include/asm/sysreg.h | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/arch/arm64/include/asm/sysreg.h b/arch/arm64/include/asm/sysreg.h index 58cc9fd1935e..f1de473ff027 100644 --- a/arch/arm64/include/asm/sysreg.h +++ b/arch/arm64/include/asm/sysreg.h @@ -275,8 +275,8 @@ #define TRBMAR_EL1_SH_SHIFT 8 #define TRBMAR_EL1_Attr_MASK GENMASK(7, 0) #define TRBMAR_EL1_Attr_SHIFT 0 -#define TRBTRG_TRG_MASK GENMASK(31, 0) -#define TRBTRG_TRG_SHIFT 0 +#define TRBTRG_EL1_TRG_MASK GENMASK(31, 0) +#define TRBTRG_EL1_TRG_SHIFT 0 #define TRBIDR_FLAG BIT(5) #define TRBIDR_PROG BIT(4) #define TRBIDR_ALIGN_MASK GENMASK(3, 0) From patchwork Fri Jun 2 06:25:45 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Anshuman Khandual X-Patchwork-Id: 102315 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a59:994d:0:b0:3d9:f83d:47d9 with SMTP id k13csp828452vqr; Thu, 1 Jun 2023 23:28:06 -0700 (PDT) X-Google-Smtp-Source: ACHHUZ7tBaK+KIaYA2NYcKbyT9SeWwZzbY7NIdTyFn80r49C2deCEGdZ1IHp4kHxSqNR0f+oBXIb X-Received: by 2002:a17:90a:4c85:b0:256:6f35:fd60 with SMTP id k5-20020a17090a4c8500b002566f35fd60mr1557706pjh.17.1685687285864; Thu, 01 Jun 2023 23:28:05 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1685687285; cv=none; d=google.com; s=arc-20160816; b=e5fXQ2MRgz+csee9mx1NuzOpvfZReaMpFrUVa6NPCn9ZKwtPXbC81CVUBf9veJcoNx kIO2vv92pm+s8JlDqmIA+Yj62k/rt7TJoY8wlaWXoxQHYFB/L3/FgfgTO4NprgTbTc3c t6syeZxzDknxDqye6mhzwRupciGwt0yNqWtCAnMEqHGdyED3Mqt6FFJCPbAOq8v2Qttd Ct/O0e7B/Hapo+S/VBC1i4TpcmtWUioYlPPrsMeSpil35lyPhTvkNafBewhTV4vx41nX sJnizBvfvnoKLdP91FVV/+wl36+yFG6zehXaauvRb/944/fovp5CoVnnahbq5Qqxuos0 zhGA== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from; bh=x6FaCo24Edi7rqCVlHeitni63xcBhXoloOyk52PKd1s=; b=dd+kySqPEGkgA9prH6IaMgEU05lMcBRhL0DP+9OtGRGBnaShWwaA9PiC+t2LbXh+K9 KlrydX746+CJ3uVe6Qe79ozVjr652d4Ty4tp1Ni4tvUng4T9mTrMB9OoNMzMbi2M1eqm oFJ8mCNuBDjGIsEm/9WWwMOBRHplwgbKlwo5x03Pl3Iee7cb7H4glzGrkQqYqKcjF9HL xT7tLqmNI/mXgnvN5MbByFl9L3v3BoqsBBUXSUSdvrjoLa00pwUNP99uLw8mVBllpWWB ZxOreS5IY5oVyGGzg/LP+N6P6kqGzGpZirPeSrUqAYpSv2h202bc85GdGTVDk7jvG1rx B27g== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=arm.com Received: from out1.vger.email (out1.vger.email. [2620:137:e000::1:20]) by mx.google.com with ESMTP id pf11-20020a17090b1d8b00b002565931f7c0si2383280pjb.127.2023.06.01.23.27.54; Thu, 01 Jun 2023 23:28:05 -0700 (PDT) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) client-ip=2620:137:e000::1:20; Authentication-Results: mx.google.com; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=arm.com Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S233902AbjFBG1L (ORCPT + 99 others); Fri, 2 Jun 2023 02:27:11 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:40186 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S233937AbjFBG0x (ORCPT ); Fri, 2 Jun 2023 02:26:53 -0400 Received: from foss.arm.com (foss.arm.com [217.140.110.172]) by lindbergh.monkeyblade.net (Postfix) with ESMTP id 38D641BD for ; Thu, 1 Jun 2023 23:26:37 -0700 (PDT) Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id 6268E12FC; Thu, 1 Jun 2023 23:27:22 -0700 (PDT) Received: from a077893.blr.arm.com (unknown [10.162.41.6]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPA id 2F5DE3F67D; Thu, 1 Jun 2023 23:26:32 -0700 (PDT) From: Anshuman Khandual To: linux-arm-kernel@lists.infradead.org, broonie@kernel.org Cc: Anshuman Khandual , Catalin Marinas , Will Deacon , Marc Zyngier , Rob Herring , Suzuki K Poulose , James Morse , kvmarm@lists.linux.dev, coresight@lists.linaro.org, linux-kernel@vger.kernel.org Subject: [PATCH V2 07/14] arm64/sysreg: Rename TRBIDR_EL1 fields per auto-gen tools format Date: Fri, 2 Jun 2023 11:55:45 +0530 Message-Id: <20230602062552.565992-8-anshuman.khandual@arm.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20230602062552.565992-1-anshuman.khandual@arm.com> References: <20230602062552.565992-1-anshuman.khandual@arm.com> MIME-Version: 1.0 X-Spam-Status: No, score=-4.2 required=5.0 tests=BAYES_00,RCVD_IN_DNSWL_MED, SPF_HELO_NONE,SPF_NONE,T_SCC_BODY_TEXT_LINE autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-getmail-retrieved-from-mailbox: =?utf-8?q?INBOX?= X-GMAIL-THRID: =?utf-8?q?1767571231751232336?= X-GMAIL-MSGID: =?utf-8?q?1767571231751232336?= This renames TRBIDR_EL1 register fields per auto-gen tools format without causing any functional change in the TRBE driver. Cc: Catalin Marinas Cc: Will Deacon Cc: Marc Zyngier Cc: Mark Brown Cc: Rob Herring Cc: Suzuki K Poulose Cc: James Morse Cc: kvmarm@lists.linux.dev Cc: coresight@lists.linaro.org Cc: linux-arm-kernel@lists.infradead.org Cc: linux-kernel@vger.kernel.org Signed-off-by: Anshuman Khandual --- arch/arm64/include/asm/el2_setup.h | 2 +- arch/arm64/include/asm/sysreg.h | 8 ++++---- arch/arm64/kvm/debug.c | 2 +- drivers/hwtracing/coresight/coresight-trbe.h | 6 +++--- 4 files changed, 9 insertions(+), 9 deletions(-) diff --git a/arch/arm64/include/asm/el2_setup.h b/arch/arm64/include/asm/el2_setup.h index 037724b19c5c..63ea1ef6c99e 100644 --- a/arch/arm64/include/asm/el2_setup.h +++ b/arch/arm64/include/asm/el2_setup.h @@ -69,7 +69,7 @@ cbz x0, .Lskip_trace_\@ // Skip if TraceBuffer is not present mrs_s x0, SYS_TRBIDR_EL1 - and x0, x0, TRBIDR_PROG + and x0, x0, TRBIDR_EL1_P cbnz x0, .Lskip_trace_\@ // If TRBE is available at EL2 mov x0, #(MDCR_EL2_E2TB_MASK << MDCR_EL2_E2TB_SHIFT) diff --git a/arch/arm64/include/asm/sysreg.h b/arch/arm64/include/asm/sysreg.h index f1de473ff027..114d38acdca5 100644 --- a/arch/arm64/include/asm/sysreg.h +++ b/arch/arm64/include/asm/sysreg.h @@ -277,10 +277,10 @@ #define TRBMAR_EL1_Attr_SHIFT 0 #define TRBTRG_EL1_TRG_MASK GENMASK(31, 0) #define TRBTRG_EL1_TRG_SHIFT 0 -#define TRBIDR_FLAG BIT(5) -#define TRBIDR_PROG BIT(4) -#define TRBIDR_ALIGN_MASK GENMASK(3, 0) -#define TRBIDR_ALIGN_SHIFT 0 +#define TRBIDR_EL1_F BIT(5) +#define TRBIDR_EL1_P BIT(4) +#define TRBIDR_EL1_Align_MASK GENMASK(3, 0) +#define TRBIDR_EL1_Align_SHIFT 0 #define SYS_PMINTENSET_EL1 sys_reg(3, 0, 9, 14, 1) #define SYS_PMINTENCLR_EL1 sys_reg(3, 0, 9, 14, 2) diff --git a/arch/arm64/kvm/debug.c b/arch/arm64/kvm/debug.c index 55f80fb93925..8725291cb00a 100644 --- a/arch/arm64/kvm/debug.c +++ b/arch/arm64/kvm/debug.c @@ -333,7 +333,7 @@ void kvm_arch_vcpu_load_debug_state_flags(struct kvm_vcpu *vcpu) /* Check if we have TRBE implemented and available at the host */ if (cpuid_feature_extract_unsigned_field(dfr0, ID_AA64DFR0_EL1_TraceBuffer_SHIFT) && - !(read_sysreg_s(SYS_TRBIDR_EL1) & TRBIDR_PROG)) + !(read_sysreg_s(SYS_TRBIDR_EL1) & TRBIDR_EL1_P)) vcpu_set_flag(vcpu, DEBUG_STATE_SAVE_TRBE); } diff --git a/drivers/hwtracing/coresight/coresight-trbe.h b/drivers/hwtracing/coresight/coresight-trbe.h index 3743d9085355..d661b062293f 100644 --- a/drivers/hwtracing/coresight/coresight-trbe.h +++ b/drivers/hwtracing/coresight/coresight-trbe.h @@ -95,17 +95,17 @@ static inline bool is_trbe_running(u64 trbsr) static inline bool get_trbe_flag_update(u64 trbidr) { - return trbidr & TRBIDR_FLAG; + return trbidr & TRBIDR_EL1_F; } static inline bool is_trbe_programmable(u64 trbidr) { - return !(trbidr & TRBIDR_PROG); + return !(trbidr & TRBIDR_EL1_P); } static inline int get_trbe_address_align(u64 trbidr) { - return (trbidr >> TRBIDR_ALIGN_SHIFT) & TRBIDR_ALIGN_MASK; + return (trbidr & TRBIDR_EL1_Align_MASK) >> TRBIDR_EL1_Align_SHIFT; } static inline unsigned long get_trbe_write_pointer(void) From patchwork Fri Jun 2 06:25:46 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Anshuman Khandual X-Patchwork-Id: 102324 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a59:994d:0:b0:3d9:f83d:47d9 with SMTP id k13csp832746vqr; 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[2620:137:e000::1:20]) by mx.google.com with ESMTP id b5-20020a170902e94500b001b04782fcdcsi397079pll.319.2023.06.01.23.40.35; Thu, 01 Jun 2023 23:40:50 -0700 (PDT) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) client-ip=2620:137:e000::1:20; Authentication-Results: mx.google.com; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=arm.com Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S233944AbjFBG1R (ORCPT + 99 others); Fri, 2 Jun 2023 02:27:17 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:40086 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S233213AbjFBG06 (ORCPT ); Fri, 2 Jun 2023 02:26:58 -0400 Received: from foss.arm.com (foss.arm.com [217.140.110.172]) by lindbergh.monkeyblade.net (Postfix) with ESMTP id B67C7E49 for ; Thu, 1 Jun 2023 23:26:41 -0700 (PDT) Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id C4E621063; Thu, 1 Jun 2023 23:27:26 -0700 (PDT) Received: from a077893.blr.arm.com (unknown [10.162.41.6]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPA id 783573F67D; Thu, 1 Jun 2023 23:26:37 -0700 (PDT) From: Anshuman Khandual To: linux-arm-kernel@lists.infradead.org, broonie@kernel.org Cc: Anshuman Khandual , Catalin Marinas , Will Deacon , Marc Zyngier , Rob Herring , Suzuki K Poulose , James Morse , kvmarm@lists.linux.dev, coresight@lists.linaro.org, linux-kernel@vger.kernel.org Subject: [PATCH V2 08/14] arm64/sysreg: Convert TRBLIMITR_EL1 register to automatic generation Date: Fri, 2 Jun 2023 11:55:46 +0530 Message-Id: <20230602062552.565992-9-anshuman.khandual@arm.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20230602062552.565992-1-anshuman.khandual@arm.com> References: <20230602062552.565992-1-anshuman.khandual@arm.com> MIME-Version: 1.0 X-Spam-Status: No, score=-4.2 required=5.0 tests=BAYES_00,RCVD_IN_DNSWL_MED, SPF_HELO_NONE,SPF_NONE,T_SCC_BODY_TEXT_LINE autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-getmail-retrieved-from-mailbox: =?utf-8?q?INBOX?= X-GMAIL-THRID: =?utf-8?q?1767572032646766137?= X-GMAIL-MSGID: =?utf-8?q?1767572032646766137?= This converts TRBLIMITR_EL1 register to automatic generation without causing any functional change. Cc: Catalin Marinas Cc: Will Deacon Cc: Marc Zyngier Cc: Mark Brown Cc: Rob Herring Cc: Suzuki K Poulose Cc: James Morse Cc: linux-arm-kernel@lists.infradead.org Cc: linux-kernel@vger.kernel.org Signed-off-by: Anshuman Khandual Reviewed-by: Mark Brown --- arch/arm64/include/asm/sysreg.h | 12 ------------ arch/arm64/tools/sysreg | 18 ++++++++++++++++++ drivers/hwtracing/coresight/coresight-trbe.h | 9 --------- 3 files changed, 18 insertions(+), 21 deletions(-) diff --git a/arch/arm64/include/asm/sysreg.h b/arch/arm64/include/asm/sysreg.h index 114d38acdca5..643b7ccf6172 100644 --- a/arch/arm64/include/asm/sysreg.h +++ b/arch/arm64/include/asm/sysreg.h @@ -235,10 +235,6 @@ /*** End of Statistical Profiling Extension ***/ -/* - * TRBE Registers - */ -#define SYS_TRBLIMITR_EL1 sys_reg(3, 0, 9, 11, 0) #define SYS_TRBPTR_EL1 sys_reg(3, 0, 9, 11, 1) #define SYS_TRBBASER_EL1 sys_reg(3, 0, 9, 11, 2) #define SYS_TRBSR_EL1 sys_reg(3, 0, 9, 11, 3) @@ -246,14 +242,6 @@ #define SYS_TRBTRG_EL1 sys_reg(3, 0, 9, 11, 6) #define SYS_TRBIDR_EL1 sys_reg(3, 0, 9, 11, 7) -#define TRBLIMITR_EL1_LIMIT_MASK GENMASK_ULL(63, 12) -#define TRBLIMITR_EL1_LIMIT_SHIFT 12 -#define TRBLIMITR_EL1_nVM BIT(5) -#define TRBLIMITR_EL1_TM_MASK GENMASK(4, 3) -#define TRBLIMITR_EL1_TM_SHIFT 3 -#define TRBLIMITR_EL1_FM_MASK GENMASK(2, 1) -#define TRBLIMITR_EL1_FM_SHIFT 1 -#define TRBLIMITR_EL1_E BIT(0) #define TRBPTR_EL1_PTR_MASK GENMASK_ULL(63, 0) #define TRBPTR_EL1_PTR_SHIFT 0 #define TRBBASER_EL1_BASE_MASK GENMASK_ULL(63, 12) diff --git a/arch/arm64/tools/sysreg b/arch/arm64/tools/sysreg index c9a0d1fa3209..a43309607d42 100644 --- a/arch/arm64/tools/sysreg +++ b/arch/arm64/tools/sysreg @@ -2200,3 +2200,21 @@ Sysreg ICC_NMIAR1_EL1 3 0 12 9 5 Res0 63:24 Field 23:0 INTID EndSysreg + +Sysreg TRBLIMITR_EL1 3 0 9 11 0 +Field 63:12 LIMIT +Res0 11:7 +Field 6 XE +Field 5 nVM +Enum 4:3 TM + 0b00 STOP + 0b01 IRQ + 0b11 IGNR +EndEnum +Enum 2:1 FM + 0b00 FILL + 0b01 WRAP + 0b11 CBUF +EndEnum +Field 0 E +EndSysreg diff --git a/drivers/hwtracing/coresight/coresight-trbe.h b/drivers/hwtracing/coresight/coresight-trbe.h index d661b062293f..77cbb5c63878 100644 --- a/drivers/hwtracing/coresight/coresight-trbe.h +++ b/drivers/hwtracing/coresight/coresight-trbe.h @@ -84,15 +84,6 @@ static inline bool is_trbe_running(u64 trbsr) return !(trbsr & TRBSR_EL1_S); } -#define TRBE_TRIG_MODE_STOP 0 -#define TRBE_TRIG_MODE_IRQ 1 -#define TRBLIMITR_EL1_TM_IGNR 3 - -#define TRBLIMITR_EL1_FM_FILL 0 -#define TRBE_FILL_MODE_FILL 0 -#define TRBE_FILL_MODE_WRAP 1 -#define TRBE_FILL_MODE_CIRCULAR_BUFFER 3 - static inline bool get_trbe_flag_update(u64 trbidr) { return trbidr & TRBIDR_EL1_F; From patchwork Fri Jun 2 06:25:47 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Anshuman Khandual X-Patchwork-Id: 102316 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a59:994d:0:b0:3d9:f83d:47d9 with SMTP id k13csp828706vqr; Thu, 1 Jun 2023 23:29:02 -0700 (PDT) X-Google-Smtp-Source: ACHHUZ56c7s/R2HI/H6YSPvrSfpObtd6h79xX64B/8R2XuURYReGTaPO1Rb9B1qxkev+mByJJ7mp X-Received: by 2002:a05:6a00:168a:b0:64d:2487:5b3c with SMTP id k10-20020a056a00168a00b0064d24875b3cmr11702000pfc.29.1685687342210; Thu, 01 Jun 2023 23:29:02 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1685687342; cv=none; d=google.com; s=arc-20160816; b=arVlDihhawEQJZHta37NuQqUum/Qoe4gtv4owkqeCrcr2sVakxaBPitA6B0xsU9dlc K5SuM/ts0FN73hWs83iOs7rZzAfdUJPah90fsqm5vyk/XaZkrRoNw0xMnRys+Yv6VBV4 gMPCcncXKTCQ4WWw9Se4AAC4M4qMY+ox/SF9jgTdpU4u0g1uzjw9phvsmKddefsAjuHv 24l3Hx6qi3MkHLSG2Xwu6Ya8AtpsDDucvzOOYoN3ODxUQ+MI09T130fgby1HI8iuHhe+ kFE2vhL2ex0heXLsFnmuA3oX9VI/UBhG3FPIqY3k0K/24ejbE6KTJlEVrgJ7pRg4FNN6 BgmA== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from; bh=nG6H2uql6z4WfqZAhq+MRj4sgGX++cwMUXvLQGq3Oj8=; b=wPBpA6mJIT3dMSp5oHzaj9CwTOO12Tn9Lz20uvVBqLK8eODdEgD0pHnLBLSr7P3Ajn Uj3Z+tei5pSy/i8+g3MAjGq4UO2hgs6o9gKK0yQGu0t6aGy9WaVGeegHFLoDc9drzbw9 LERfX2BkHLpe3L9a/MjveugCbGIExg7VEgmlOo4RDZydrsJm0VgDFz25WLQJ2VuexJsm 26juB52HxT99HLUTjKPqKtPEVpDfwJaDtERkMhF+1paDhoNJ43XUic/rdjXxZ7337QLx V1dE3a+PwtOWn/E6xa0I4nrGBYbxyxx/E2fVYPT8AYpmaXoUkJGpKLa+Y8rXdBKfKeFt mK9A== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=arm.com Received: from out1.vger.email (out1.vger.email. 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Cc: Catalin Marinas Cc: Will Deacon Cc: Marc Zyngier Cc: Mark Brown Cc: Rob Herring Cc: Suzuki K Poulose Cc: James Morse Cc: linux-arm-kernel@lists.infradead.org Cc: linux-kernel@vger.kernel.org Signed-off-by: Anshuman Khandual Reviewed-by: Mark Brown --- arch/arm64/include/asm/sysreg.h | 3 --- arch/arm64/tools/sysreg | 4 ++++ 2 files changed, 4 insertions(+), 3 deletions(-) diff --git a/arch/arm64/include/asm/sysreg.h b/arch/arm64/include/asm/sysreg.h index 643b7ccf6172..13b144075381 100644 --- a/arch/arm64/include/asm/sysreg.h +++ b/arch/arm64/include/asm/sysreg.h @@ -235,15 +235,12 @@ /*** End of Statistical Profiling Extension ***/ -#define SYS_TRBPTR_EL1 sys_reg(3, 0, 9, 11, 1) #define SYS_TRBBASER_EL1 sys_reg(3, 0, 9, 11, 2) #define SYS_TRBSR_EL1 sys_reg(3, 0, 9, 11, 3) #define SYS_TRBMAR_EL1 sys_reg(3, 0, 9, 11, 4) #define SYS_TRBTRG_EL1 sys_reg(3, 0, 9, 11, 6) #define SYS_TRBIDR_EL1 sys_reg(3, 0, 9, 11, 7) -#define TRBPTR_EL1_PTR_MASK GENMASK_ULL(63, 0) -#define TRBPTR_EL1_PTR_SHIFT 0 #define TRBBASER_EL1_BASE_MASK GENMASK_ULL(63, 12) #define TRBBASER_EL1_BASE_SHIFT 12 #define TRBSR_EL1_EC_MASK GENMASK(31, 26) diff --git a/arch/arm64/tools/sysreg b/arch/arm64/tools/sysreg index a43309607d42..ad6da3ea1cd5 100644 --- a/arch/arm64/tools/sysreg +++ b/arch/arm64/tools/sysreg @@ -2218,3 +2218,7 @@ Enum 2:1 FM EndEnum Field 0 E EndSysreg + +Sysreg TRBPTR_EL1 3 0 9 11 1 +Field 63:0 PTR +EndSysreg From patchwork Fri Jun 2 06:25:48 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Anshuman Khandual X-Patchwork-Id: 102321 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a59:994d:0:b0:3d9:f83d:47d9 with SMTP id k13csp831890vqr; Thu, 1 Jun 2023 23:38:06 -0700 (PDT) X-Google-Smtp-Source: ACHHUZ4sIrgeujPMJ8lI9RcVVcmY9YXstlPxVkb+SrSYRQHKEk23bPt+SMaOws1Rs84PRUXIr/wX X-Received: by 2002:a05:6a21:1508:b0:10f:8b61:195f with SMTP id nq8-20020a056a21150800b0010f8b61195fmr11228561pzb.46.1685687885949; Thu, 01 Jun 2023 23:38:05 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1685687885; cv=none; d=google.com; s=arc-20160816; b=jLWJBlICylKYc5C18LjqvVfQtR0dogPtR2q4L8d7Y2ecFC8mcyYPsPrDEAr2ukhxsA MCs2JsWvSl+gil+vKC3zIkG6a1LlhZGhcQm/N2hRYBiaj3zQdub6MsntQ6bTvwFnFSNa e9JJ7BOV6nSlubAvFVdcy3Li+bhQwXO7n4nOzaeEfDnphJDc06+yfnIzGPIFcaz8zysk BcfspX9dsgUcIqBv1h1jF2Xc6DOGlrZiFscu9zg0Gp9GrSk4UvCrgaG3u7eLx3GHwriI pMQnUUr2VDzECOPa/eWneNGWPV+PcWLqDo6jZm2cO6q/1XBuO7KbsTwH0y1J6beiy0+a 3IjQ== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from; bh=iCME+Zvy23O52qG6gQvCOp+WSKT64HIxQmz+T9nrpNY=; b=GExGcbENkWA+YMSzy2KxRqQrW3G4gy1VZRGVh69vm0dRjXj5L3xuTJ5GtGpFoi3wW3 19ZT8cJj+F0yQC9Jfpz0Q+noNY1PwRFbDk9adjLpWWF55OLwGQ2qJf89Bl8AzZp7tTzO Z1x2f2EuZBXwwxLQQJrLsiWfyJ33I1ckH6LugI3OOFpEuB0kp1lXQpMCwmqFL2hY/nHs NnRPOaG1QrTUceUYWR7vp9ib8BbwuSj0heSG3F66Ju4z0XlHE065g+MF+CgfMTTyAcOz IDYoIGC19LVF3reNM83A0YPfEKwsDdkRSV1Iu40JI5u+fdeP3scY8LiQCdL34oMJ/vMj r3dQ== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=arm.com Received: from out1.vger.email (out1.vger.email. [2620:137:e000::1:20]) by mx.google.com with ESMTP id y11-20020aa79aeb000000b00643a730d50bsi197633pfp.389.2023.06.01.23.37.52; Thu, 01 Jun 2023 23:38:05 -0700 (PDT) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) client-ip=2620:137:e000::1:20; Authentication-Results: mx.google.com; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=arm.com Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S233814AbjFBG1c (ORCPT + 99 others); Fri, 2 Jun 2023 02:27:32 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:40564 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S233836AbjFBG1D (ORCPT ); Fri, 2 Jun 2023 02:27:03 -0400 Received: from foss.arm.com (foss.arm.com [217.140.110.172]) by lindbergh.monkeyblade.net (Postfix) with ESMTP id C439819B for ; Thu, 1 Jun 2023 23:26:50 -0700 (PDT) Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id 033221042; Thu, 1 Jun 2023 23:27:36 -0700 (PDT) Received: from a077893.blr.arm.com (unknown [10.162.41.6]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPA id 88B033F67D; Thu, 1 Jun 2023 23:26:46 -0700 (PDT) From: Anshuman Khandual To: linux-arm-kernel@lists.infradead.org, broonie@kernel.org Cc: Anshuman Khandual , Catalin Marinas , Will Deacon , Marc Zyngier , Rob Herring , Suzuki K Poulose , James Morse , kvmarm@lists.linux.dev, coresight@lists.linaro.org, linux-kernel@vger.kernel.org Subject: [PATCH V2 10/14] arm64/sysreg: Convert TRBBASER_EL1 register to automatic generation Date: Fri, 2 Jun 2023 11:55:48 +0530 Message-Id: <20230602062552.565992-11-anshuman.khandual@arm.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20230602062552.565992-1-anshuman.khandual@arm.com> References: <20230602062552.565992-1-anshuman.khandual@arm.com> MIME-Version: 1.0 X-Spam-Status: No, score=-4.2 required=5.0 tests=BAYES_00,RCVD_IN_DNSWL_MED, SPF_HELO_NONE,SPF_NONE,T_SCC_BODY_TEXT_LINE autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-getmail-retrieved-from-mailbox: =?utf-8?q?INBOX?= X-GMAIL-THRID: =?utf-8?q?1767571860895255603?= X-GMAIL-MSGID: =?utf-8?q?1767571860895255603?= This converts TRBBASER_EL1 register to automatic generation without causing any functional change. Cc: Catalin Marinas Cc: Will Deacon Cc: Marc Zyngier Cc: Mark Brown Cc: Rob Herring Cc: Suzuki K Poulose Cc: James Morse Cc: linux-arm-kernel@lists.infradead.org Cc: linux-kernel@vger.kernel.org Signed-off-by: Anshuman Khandual Reviewed-by: Mark Brown --- arch/arm64/include/asm/sysreg.h | 3 --- arch/arm64/tools/sysreg | 5 +++++ 2 files changed, 5 insertions(+), 3 deletions(-) diff --git a/arch/arm64/include/asm/sysreg.h b/arch/arm64/include/asm/sysreg.h index 13b144075381..27d89b7ea0fa 100644 --- a/arch/arm64/include/asm/sysreg.h +++ b/arch/arm64/include/asm/sysreg.h @@ -235,14 +235,11 @@ /*** End of Statistical Profiling Extension ***/ -#define SYS_TRBBASER_EL1 sys_reg(3, 0, 9, 11, 2) #define SYS_TRBSR_EL1 sys_reg(3, 0, 9, 11, 3) #define SYS_TRBMAR_EL1 sys_reg(3, 0, 9, 11, 4) #define SYS_TRBTRG_EL1 sys_reg(3, 0, 9, 11, 6) #define SYS_TRBIDR_EL1 sys_reg(3, 0, 9, 11, 7) -#define TRBBASER_EL1_BASE_MASK GENMASK_ULL(63, 12) -#define TRBBASER_EL1_BASE_SHIFT 12 #define TRBSR_EL1_EC_MASK GENMASK(31, 26) #define TRBSR_EL1_EC_SHIFT 26 #define TRBSR_EL1_IRQ BIT(22) diff --git a/arch/arm64/tools/sysreg b/arch/arm64/tools/sysreg index ad6da3ea1cd5..c58731f69467 100644 --- a/arch/arm64/tools/sysreg +++ b/arch/arm64/tools/sysreg @@ -2222,3 +2222,8 @@ EndSysreg Sysreg TRBPTR_EL1 3 0 9 11 1 Field 63:0 PTR EndSysreg + +Sysreg TRBBASER_EL1 3 0 9 11 2 +Field 63:12 BASE +Res0 11:0 +EndSysreg From patchwork Fri Jun 2 06:25:49 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Anshuman Khandual X-Patchwork-Id: 102326 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a59:994d:0:b0:3d9:f83d:47d9 with SMTP id k13csp832974vqr; Thu, 1 Jun 2023 23:41:29 -0700 (PDT) X-Google-Smtp-Source: ACHHUZ5r7I5k5107rPq5sHPbXVp0ejteYW9qpqHn8/bwg+bEZOUZS3xqwEnXFDg1wIdektITBRG8 X-Received: by 2002:a9d:4818:0:b0:6a6:23fd:3ed7 with SMTP id c24-20020a9d4818000000b006a623fd3ed7mr1674941otf.34.1685688089651; Thu, 01 Jun 2023 23:41:29 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1685688089; cv=none; d=google.com; s=arc-20160816; b=TSsCwArQktB2G2kkU+4VOorfwvdgGXQSG8XZWEKASF1miXvb0db9zbRYHxHodkB32/ AFIsp7yzK2GwFPRTv52agTrA6bp7YQwWTVS3apAlNbsYbw1cRZeS9JAabf9IvPBF9CgS byq0ro99ZpjatAIJKnkkGI2gZal99+PVwiq6t1YemI0n6cdb4NZ5Jwx10hDGbtnwZlU/ ywXXWso64AjbZ1H2kqGW6yFpXp/WII7mnT/AdC8rF4iKg1vWNhrT5r2nIt4MZmVNingZ SGev31MLp6zfuU/GR3IyFkaxkfUAGm1YOfhoVZVvp/Fm2aaOBAdrpz0d9T955isowIzR LK5g== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from; bh=1pyu6TFvzyw+LE/plo99GQXhaBpomXfhCZ5gmCOPGPc=; b=E9wz6Ynwj79NdJ/E96yFB2MB+gophbbout2mlbub4PiF/qY5Erp7/zixhQ7+SsKIDY NojHhVRdWOd27vD95muTviuhJzh2ZdaE16OnNtj9gSSiNPlYnqAf+yx08HzZaAuMOma1 MX8nzhVdIjORtdWukwksxjAKJqv+I+L6QwICLGuOYqXyNqUnU7yf7akeLPQnaWEFMPKu ZPa78YH+UY07WrMAsGqIN238ZDFUvnM/A2Xpjxak3ReNW1g2fGZEe02e3azuwFjqmrTS YKFatc4PyQpZ6YjSu3v+MBNioSugyShn+vDCkSYdHe2cM+wYzQSZUeHF30cazOsMA8Rc BXjQ== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=arm.com Received: from out1.vger.email (out1.vger.email. [2620:137:e000::1:20]) by mx.google.com with ESMTP id q24-20020a637518000000b005348f85f89fsi535505pgc.226.2023.06.01.23.41.15; Thu, 01 Jun 2023 23:41:29 -0700 (PDT) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) client-ip=2620:137:e000::1:20; Authentication-Results: mx.google.com; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=arm.com Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S233917AbjFBG1j (ORCPT + 99 others); Fri, 2 Jun 2023 02:27:39 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:40158 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S233784AbjFBG1G (ORCPT ); Fri, 2 Jun 2023 02:27:06 -0400 Received: from foss.arm.com (foss.arm.com [217.140.110.172]) by lindbergh.monkeyblade.net (Postfix) with ESMTP id 13382196 for ; Thu, 1 Jun 2023 23:26:55 -0700 (PDT) Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id 45EF212FC; Thu, 1 Jun 2023 23:27:40 -0700 (PDT) Received: from a077893.blr.arm.com (unknown [10.162.41.6]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPA id 1B08D3F67D; Thu, 1 Jun 2023 23:26:50 -0700 (PDT) From: Anshuman Khandual To: linux-arm-kernel@lists.infradead.org, broonie@kernel.org Cc: Anshuman Khandual , Catalin Marinas , Will Deacon , Marc Zyngier , Rob Herring , Suzuki K Poulose , James Morse , kvmarm@lists.linux.dev, coresight@lists.linaro.org, linux-kernel@vger.kernel.org Subject: [PATCH V2 11/14] arm64/sysreg: Convert TRBSR_EL1 register to automatic generation Date: Fri, 2 Jun 2023 11:55:49 +0530 Message-Id: <20230602062552.565992-12-anshuman.khandual@arm.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20230602062552.565992-1-anshuman.khandual@arm.com> References: <20230602062552.565992-1-anshuman.khandual@arm.com> MIME-Version: 1.0 X-Spam-Status: No, score=-4.2 required=5.0 tests=BAYES_00,RCVD_IN_DNSWL_MED, SPF_HELO_NONE,SPF_NONE,T_SCC_BODY_TEXT_LINE autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-getmail-retrieved-from-mailbox: =?utf-8?q?INBOX?= X-GMAIL-THRID: =?utf-8?q?1767572074188683976?= X-GMAIL-MSGID: =?utf-8?q?1767572074188683976?= This converts TRBSR_EL1 register to automatic generation without causing any functional change. Cc: Catalin Marinas Cc: Will Deacon Cc: Marc Zyngier Cc: Mark Brown Cc: Rob Herring Cc: Suzuki K Poulose Cc: James Morse Cc: linux-arm-kernel@lists.infradead.org Cc: linux-kernel@vger.kernel.org Signed-off-by: Anshuman Khandual Reviewed-by: Mark Brown --- arch/arm64/include/asm/sysreg.h | 12 ------------ arch/arm64/tools/sysreg | 16 ++++++++++++++++ 2 files changed, 16 insertions(+), 12 deletions(-) diff --git a/arch/arm64/include/asm/sysreg.h b/arch/arm64/include/asm/sysreg.h index 27d89b7ea0fa..768d12fc4834 100644 --- a/arch/arm64/include/asm/sysreg.h +++ b/arch/arm64/include/asm/sysreg.h @@ -235,24 +235,12 @@ /*** End of Statistical Profiling Extension ***/ -#define SYS_TRBSR_EL1 sys_reg(3, 0, 9, 11, 3) #define SYS_TRBMAR_EL1 sys_reg(3, 0, 9, 11, 4) #define SYS_TRBTRG_EL1 sys_reg(3, 0, 9, 11, 6) #define SYS_TRBIDR_EL1 sys_reg(3, 0, 9, 11, 7) -#define TRBSR_EL1_EC_MASK GENMASK(31, 26) -#define TRBSR_EL1_EC_SHIFT 26 -#define TRBSR_EL1_IRQ BIT(22) -#define TRBSR_EL1_TRG BIT(21) -#define TRBSR_EL1_WRAP BIT(20) -#define TRBSR_EL1_EA BIT(18) -#define TRBSR_EL1_S BIT(17) -#define TRBSR_EL1_MSS_MASK GENMASK(15, 0) -#define TRBSR_EL1_MSS_SHIFT 0 #define TRBSR_EL1_BSC_MASK GENMASK(5, 0) #define TRBSR_EL1_BSC_SHIFT 0 -#define TRBSR_EL1_FSC_MASK GENMASK(5, 0) -#define TRBSR_EL1_FSC_SHIFT 0 #define TRBMAR_EL1_SH_MASK GENMASK(9, 8) #define TRBMAR_EL1_SH_SHIFT 8 #define TRBMAR_EL1_Attr_MASK GENMASK(7, 0) diff --git a/arch/arm64/tools/sysreg b/arch/arm64/tools/sysreg index c58731f69467..6d12980f01c7 100644 --- a/arch/arm64/tools/sysreg +++ b/arch/arm64/tools/sysreg @@ -2227,3 +2227,19 @@ Sysreg TRBBASER_EL1 3 0 9 11 2 Field 63:12 BASE Res0 11:0 EndSysreg + +Sysreg TRBSR_EL1 3 0 9 11 3 +Res0 63:56 +Field 55:32 MSS2 +Field 31:26 EC +Res0 25:24 +Field 23 DAT +Field 22 IRQ +Field 21 TRG +Field 20 WRAP +Res0 19 +Field 18 EA +Field 17 S +Res0 16 +Field 15:0 MSS +EndSysreg From patchwork Fri Jun 2 06:25:50 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Anshuman Khandual X-Patchwork-Id: 102325 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a59:994d:0:b0:3d9:f83d:47d9 with SMTP id k13csp832789vqr; Thu, 1 Jun 2023 23:41:02 -0700 (PDT) X-Google-Smtp-Source: ACHHUZ7ODiRmRANV/1ReiQq1O6n8rt3zm+biLc71S3GyUEGp2WDY75sqGmp8L7Y3X1Li+NSTTxGa X-Received: by 2002:a05:6a20:3d85:b0:100:60f3:2975 with SMTP id s5-20020a056a203d8500b0010060f32975mr14098361pzi.4.1685688062404; Thu, 01 Jun 2023 23:41:02 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1685688062; cv=none; d=google.com; s=arc-20160816; b=Zun1Hys9AULezwepNLPTnx+m8GWOQMCQbc+fq2hcAaPVkJfL2YXMDIevL0IGFQlg0u bv3mc31Wijw06CTulEL3DJ/1hXwiYlKs1kcyw27t10mkX72isdZIELoFrfmktgy1Ui3p SvlxuxPBF+trVtg0c000AXp1839WaaLYyqq0BMa74hZLSD+GcAPoxcdmH7yvsp6Jzx+/ BE7erg+7CpV/bVjZxhMTzrtgfFx95WkSNng5ysDI0w1YxnNLRXcGxc7mMYxbSAbsCBXp 4+qQOhLPTNIiQ2lN6TJ8QM5YM1DVYEyut095g7sCq82n3P0ALcYIA+FHZ5bkB202iC6z rWpw== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from; bh=NTaLTpjVOK6IsRhS+RHDlNM35BUJAyM8S21aSoQCJzU=; b=ktk8sBY6BE+0SRq2Jfoh+R/WfQlfabQn+jujJ6Zhr/3lnlC08HRbRqeT81YtFeKXvf ydaw+l8KjVx43dRT+UdgLvt+2H5ah9Z7Hek9G83vGYtF1BZKsJe2msaUJuk+zfSPARb9 Yhmak7YgoNw97ppMfU1Ptiar97edgJXYg5HviymOQbICCTrXM9/zvMaROJtiuk8INB72 eXaHoMwyj3RovbyYNpAbgLZ3d69eGUzg4bNxRYWG+wi06o0/0xZ+c4YGYWP5WiylxLMR 9ltlqDrv8K7K3yNWDtLVxGg66hLYY5/CavwhBGQuIboYnP91SYUQDOmu5GVorvU8oWCe zSAQ== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=arm.com Received: from out1.vger.email (out1.vger.email. [2620:137:e000::1:20]) by mx.google.com with ESMTP id 21-20020a630115000000b0053fb7cd1ac4si486181pgb.519.2023.06.01.23.40.49; Thu, 01 Jun 2023 23:41:02 -0700 (PDT) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) client-ip=2620:137:e000::1:20; Authentication-Results: mx.google.com; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=arm.com Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S233945AbjFBG1l (ORCPT + 99 others); Fri, 2 Jun 2023 02:27:41 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:40652 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S233867AbjFBG1I (ORCPT ); Fri, 2 Jun 2023 02:27:08 -0400 Received: from foss.arm.com (foss.arm.com [217.140.110.172]) by lindbergh.monkeyblade.net (Postfix) with ESMTP id 53C171B3 for ; Thu, 1 Jun 2023 23:26:59 -0700 (PDT) Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id 7DC911063; Thu, 1 Jun 2023 23:27:44 -0700 (PDT) Received: from a077893.blr.arm.com (unknown [10.162.41.6]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPA id 589B63F67D; Thu, 1 Jun 2023 23:26:55 -0700 (PDT) From: Anshuman Khandual To: linux-arm-kernel@lists.infradead.org, broonie@kernel.org Cc: Anshuman Khandual , Catalin Marinas , Will Deacon , Marc Zyngier , Rob Herring , Suzuki K Poulose , James Morse , kvmarm@lists.linux.dev, coresight@lists.linaro.org, linux-kernel@vger.kernel.org Subject: [PATCH V2 12/14] arm64/sysreg: Convert TRBMAR_EL1 register to automatic generation Date: Fri, 2 Jun 2023 11:55:50 +0530 Message-Id: <20230602062552.565992-13-anshuman.khandual@arm.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20230602062552.565992-1-anshuman.khandual@arm.com> References: <20230602062552.565992-1-anshuman.khandual@arm.com> MIME-Version: 1.0 X-Spam-Status: No, score=-4.2 required=5.0 tests=BAYES_00,RCVD_IN_DNSWL_MED, SPF_HELO_NONE,SPF_NONE,T_SCC_BODY_TEXT_LINE autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-getmail-retrieved-from-mailbox: =?utf-8?q?INBOX?= X-GMAIL-THRID: =?utf-8?q?1767572045704730364?= X-GMAIL-MSGID: =?utf-8?q?1767572045704730364?= This converts TRBMAR_EL1 register to automatic generation without causing any functional change. Cc: Catalin Marinas Cc: Will Deacon Cc: Marc Zyngier Cc: Mark Brown Cc: Rob Herring Cc: Suzuki K Poulose Cc: James Morse Cc: linux-arm-kernel@lists.infradead.org Cc: linux-kernel@vger.kernel.org Signed-off-by: Anshuman Khandual Reviewed-by: Mark Brown --- arch/arm64/include/asm/sysreg.h | 5 ----- arch/arm64/tools/sysreg | 7 +++++++ 2 files changed, 7 insertions(+), 5 deletions(-) diff --git a/arch/arm64/include/asm/sysreg.h b/arch/arm64/include/asm/sysreg.h index 768d12fc4834..131442f850dd 100644 --- a/arch/arm64/include/asm/sysreg.h +++ b/arch/arm64/include/asm/sysreg.h @@ -235,16 +235,11 @@ /*** End of Statistical Profiling Extension ***/ -#define SYS_TRBMAR_EL1 sys_reg(3, 0, 9, 11, 4) #define SYS_TRBTRG_EL1 sys_reg(3, 0, 9, 11, 6) #define SYS_TRBIDR_EL1 sys_reg(3, 0, 9, 11, 7) #define TRBSR_EL1_BSC_MASK GENMASK(5, 0) #define TRBSR_EL1_BSC_SHIFT 0 -#define TRBMAR_EL1_SH_MASK GENMASK(9, 8) -#define TRBMAR_EL1_SH_SHIFT 8 -#define TRBMAR_EL1_Attr_MASK GENMASK(7, 0) -#define TRBMAR_EL1_Attr_SHIFT 0 #define TRBTRG_EL1_TRG_MASK GENMASK(31, 0) #define TRBTRG_EL1_TRG_SHIFT 0 #define TRBIDR_EL1_F BIT(5) diff --git a/arch/arm64/tools/sysreg b/arch/arm64/tools/sysreg index 6d12980f01c7..b3f9a545e1e7 100644 --- a/arch/arm64/tools/sysreg +++ b/arch/arm64/tools/sysreg @@ -2243,3 +2243,10 @@ Field 17 S Res0 16 Field 15:0 MSS EndSysreg + +Sysreg TRBMAR_EL1 3 0 9 11 4 +Res0 63:12 +Field 11:10 PAS +Field 9:8 SH +Field 7:0 Attr +EndSysreg From patchwork Fri Jun 2 06:25:51 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Anshuman Khandual X-Patchwork-Id: 102328 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a59:994d:0:b0:3d9:f83d:47d9 with SMTP id k13csp835154vqr; Thu, 1 Jun 2023 23:47:31 -0700 (PDT) X-Google-Smtp-Source: ACHHUZ7sifv4uJeS/f/8+h0M049oc0y/9sNJ27NYPAAPy9DCJbCwab08qyD0rVfWZbQWauT6+Xgs X-Received: by 2002:a05:620a:2715:b0:75b:23a0:d9bf with SMTP id b21-20020a05620a271500b0075b23a0d9bfmr11235248qkp.21.1685688451229; Thu, 01 Jun 2023 23:47:31 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1685688451; cv=none; d=google.com; s=arc-20160816; b=EzgvIYd5Tgy2QCC12xopQw5oaymisXI3bERtrcG5slnCbweuZG7hbPK6yirg5adrZA jyhyJJjaKLm6FtLimQKWRnEFgpeK2L2aNm5yQD0p7W7JE609Ve9tPk3LPwjRZvGjVQYD AIRB+ufnTACJGLPvLhKDO7p3XtkXNs0/72oGmK3bZ8tHBo00GkzR5EcZX3eymSVZFYGI GhI3HqdzLSQA1Xo21y6NLe6Pn7439M/alX1HFFF7OqrANvUNfZmybqKi2HpKgldE1Iqa eFfTpB7UaF1Wjqs2QBU5XyC4kWHflFIjo8A371La7k7zJQCfUJZw5tdWGJPV/GOjxjLj L/YQ== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from; bh=0edRsGZMxT8Eex/gLCeVRZYleW1HSo9qIDrWsE1vblo=; b=hfC8mI8RDSkOcevPhwHNXDMPRahzGYKIr0ZifUHrjuGE/v5ziJEtK+A2+F3OZBAJpm 6xMZ7DxFH4Vf3WaF0zVyFQPIr6XeRqpGbiVcVIpiIouxE6pdq4rGtTIQcXuyS5Fsjcck UwfHLcrZ6zDx/3QYadg5dlsqNM1gHNwYzqgt/i0TReSWvLm2z8oHJiDPsebT4nJROwdw 8zw56VHYalvUdeqsO7YPZrp8YVzWEgindxOFrUb0Ewx59x/1PIT5aWmfTCqorQjGVcPh 8Wqop2qyUyJakB1FKYZzbrCMItyBpllF0VPV6Jhamcp1NToePwbtNr1dU0f7i5rLY2g9 8XWA== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=arm.com Received: from out1.vger.email (out1.vger.email. [2620:137:e000::1:20]) by mx.google.com with ESMTP id 67-20020a630246000000b0054201a3f08csi484219pgc.793.2023.06.01.23.47.17; Thu, 01 Jun 2023 23:47:31 -0700 (PDT) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) client-ip=2620:137:e000::1:20; Authentication-Results: mx.google.com; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=arm.com Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S233964AbjFBG1o (ORCPT + 99 others); Fri, 2 Jun 2023 02:27:44 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:40688 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S233884AbjFBG1J (ORCPT ); Fri, 2 Jun 2023 02:27:09 -0400 Received: from foss.arm.com (foss.arm.com [217.140.110.172]) by lindbergh.monkeyblade.net (Postfix) with ESMTP id E042E1B9 for ; Thu, 1 Jun 2023 23:27:03 -0700 (PDT) Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id EA4261474; Thu, 1 Jun 2023 23:27:48 -0700 (PDT) Received: from a077893.blr.arm.com (unknown [10.162.41.6]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPA id A32BD3F67D; Thu, 1 Jun 2023 23:26:59 -0700 (PDT) From: Anshuman Khandual To: linux-arm-kernel@lists.infradead.org, broonie@kernel.org Cc: Anshuman Khandual , Catalin Marinas , Will Deacon , Marc Zyngier , Rob Herring , Suzuki K Poulose , James Morse , kvmarm@lists.linux.dev, coresight@lists.linaro.org, linux-kernel@vger.kernel.org Subject: [PATCH V2 13/14] arm64/sysreg: Convert TRBTRG_EL1 register to automatic generation Date: Fri, 2 Jun 2023 11:55:51 +0530 Message-Id: <20230602062552.565992-14-anshuman.khandual@arm.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20230602062552.565992-1-anshuman.khandual@arm.com> References: <20230602062552.565992-1-anshuman.khandual@arm.com> MIME-Version: 1.0 X-Spam-Status: No, score=-4.2 required=5.0 tests=BAYES_00,RCVD_IN_DNSWL_MED, SPF_HELO_NONE,SPF_NONE,T_SCC_BODY_TEXT_LINE autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-getmail-retrieved-from-mailbox: =?utf-8?q?INBOX?= X-GMAIL-THRID: =?utf-8?q?1767572453576324525?= X-GMAIL-MSGID: =?utf-8?q?1767572453576324525?= This converts TRBTRG_EL1 register to automatic generation without causing any functional change. Cc: Catalin Marinas Cc: Will Deacon Cc: Marc Zyngier Cc: Mark Brown Cc: Rob Herring Cc: Suzuki K Poulose Cc: James Morse Cc: linux-arm-kernel@lists.infradead.org Cc: linux-kernel@vger.kernel.org Signed-off-by: Anshuman Khandual Reviewed-by: Mark Brown --- arch/arm64/include/asm/sysreg.h | 3 --- arch/arm64/tools/sysreg | 5 +++++ 2 files changed, 5 insertions(+), 3 deletions(-) diff --git a/arch/arm64/include/asm/sysreg.h b/arch/arm64/include/asm/sysreg.h index 131442f850dd..b3a32a67088f 100644 --- a/arch/arm64/include/asm/sysreg.h +++ b/arch/arm64/include/asm/sysreg.h @@ -235,13 +235,10 @@ /*** End of Statistical Profiling Extension ***/ -#define SYS_TRBTRG_EL1 sys_reg(3, 0, 9, 11, 6) #define SYS_TRBIDR_EL1 sys_reg(3, 0, 9, 11, 7) #define TRBSR_EL1_BSC_MASK GENMASK(5, 0) #define TRBSR_EL1_BSC_SHIFT 0 -#define TRBTRG_EL1_TRG_MASK GENMASK(31, 0) -#define TRBTRG_EL1_TRG_SHIFT 0 #define TRBIDR_EL1_F BIT(5) #define TRBIDR_EL1_P BIT(4) #define TRBIDR_EL1_Align_MASK GENMASK(3, 0) diff --git a/arch/arm64/tools/sysreg b/arch/arm64/tools/sysreg index b3f9a545e1e7..98dff7010b86 100644 --- a/arch/arm64/tools/sysreg +++ b/arch/arm64/tools/sysreg @@ -2250,3 +2250,8 @@ Field 11:10 PAS Field 9:8 SH Field 7:0 Attr EndSysreg + +Sysreg TRBTRG_EL1 3 0 9 11 6 +Res0 63:32 +Field 31:0 TRG +EndSysreg From patchwork Fri Jun 2 06:25:52 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Anshuman Khandual X-Patchwork-Id: 102329 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a59:994d:0:b0:3d9:f83d:47d9 with SMTP id k13csp835650vqr; Thu, 1 Jun 2023 23:48:44 -0700 (PDT) X-Google-Smtp-Source: ACHHUZ6RJTA/g2OxBpZpKeSMUOvjt7P0T3LJez8omd9bKw3EMWEWb+2slNLTePZX2aqv8GZbPnUH X-Received: by 2002:ac8:5e11:0:b0:3f7:fe04:bf30 with SMTP id h17-20020ac85e11000000b003f7fe04bf30mr14350887qtx.28.1685688523843; Thu, 01 Jun 2023 23:48:43 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1685688523; cv=none; d=google.com; s=arc-20160816; b=EDKLzmv/oCn+i175mmD1/opWz+xtWVHqdtFOrXQbKXnuX08R0ZN7kaUQmjL94m6+wb 4DTaOG4oWtaTHHHlDI9WDhkuE87WHnRcY1pSES0hlkoW4LgH9Ldaf8F2Cx7SWBaIlPpT d7TtR7hvSPfxrtrCJ1WLiD+tvrVI45V6jHxazlgE2UvMXFW3b8LxrYKEWUG3Zws3CqEt 080jCU20Cyq3V0uDxdu2sHDTnrsJwMErq5gzL1riD4x1L6py8vyKpeDYeNodG7d8ji0Z CUoCCp/hFo7XGzYytdEYrbDDcb78g+re30w9fiYjsT5228iWddz+SqQTxaAwarggNOPg nawQ== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from; bh=glAne+xJJzAY5U4LFZKG69+fiHgRuW4t6mBt4H5xWaY=; b=uesKmPXQ41rZdzxuCTR8zbI9NtOZ1IekPDlil6XMQOsohr9RJJ9c/fRDtEuQ69chdH j4dlrlE+v3bczIrUj/2/T0Fq3m80HEF0sPY0oZ1jYwHz1ZMabip0VZhVmK8NqS6+Wjo8 xhrwMUKrYz/YLNBmnibXbs3wYPOUxhjSTLIFyr/Wo3snGPE6R9ug52HNfq5wTkl1T2KZ 41AQ5RGiluAdyFFA0KjrdJV1TflXhuBuS7S7ZHXrzoB/C8H8RV6BE2OV7Iw02QEOVqv3 vq4cCuSWjAAntS4skYbPgyFGRylSrMJNgtWleVIN4QqI8QKF8ieZ9PtgTcZnmt0hbj1J Yt2Q== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=arm.com Received: from out1.vger.email (out1.vger.email. [2620:137:e000::1:20]) by mx.google.com with ESMTP id m9-20020a654389000000b0053ef0ac79c8si516121pgp.263.2023.06.01.23.48.29; Thu, 01 Jun 2023 23:48:43 -0700 (PDT) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) client-ip=2620:137:e000::1:20; Authentication-Results: mx.google.com; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=arm.com Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S233982AbjFBG1s (ORCPT + 99 others); Fri, 2 Jun 2023 02:27:48 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:40772 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S233916AbjFBG1M (ORCPT ); Fri, 2 Jun 2023 02:27:12 -0400 Received: from foss.arm.com (foss.arm.com [217.140.110.172]) by lindbergh.monkeyblade.net (Postfix) with ESMTP id 1832FE52 for ; Thu, 1 Jun 2023 23:27:07 -0700 (PDT) Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id 055FA1042; Thu, 1 Jun 2023 23:27:53 -0700 (PDT) Received: from a077893.blr.arm.com (unknown [10.162.41.6]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPA id 111DE3F67D; Thu, 1 Jun 2023 23:27:03 -0700 (PDT) From: Anshuman Khandual To: linux-arm-kernel@lists.infradead.org, broonie@kernel.org Cc: Anshuman Khandual , Catalin Marinas , Will Deacon , Marc Zyngier , Rob Herring , Suzuki K Poulose , James Morse , kvmarm@lists.linux.dev, coresight@lists.linaro.org, linux-kernel@vger.kernel.org Subject: [PATCH V2 14/14] arm64/sysreg: Convert TRBIDR_EL1 register to automatic generation Date: Fri, 2 Jun 2023 11:55:52 +0530 Message-Id: <20230602062552.565992-15-anshuman.khandual@arm.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20230602062552.565992-1-anshuman.khandual@arm.com> References: <20230602062552.565992-1-anshuman.khandual@arm.com> MIME-Version: 1.0 X-Spam-Status: No, score=-4.2 required=5.0 tests=BAYES_00,RCVD_IN_DNSWL_MED, SPF_HELO_NONE,SPF_NONE,T_SCC_BODY_TEXT_LINE autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-getmail-retrieved-from-mailbox: =?utf-8?q?INBOX?= X-GMAIL-THRID: =?utf-8?q?1767572529839323707?= X-GMAIL-MSGID: =?utf-8?q?1767572529839323707?= This converts TRBIDR_EL1 register to automatic generation without causing any functional change. Cc: Catalin Marinas Cc: Will Deacon Cc: Marc Zyngier Cc: Mark Brown Cc: Rob Herring Cc: Suzuki K Poulose Cc: James Morse Cc: linux-arm-kernel@lists.infradead.org Cc: linux-kernel@vger.kernel.org Signed-off-by: Anshuman Khandual Reviewed-by: Mark Brown --- arch/arm64/include/asm/sysreg.h | 6 ------ arch/arm64/tools/sysreg | 9 +++++++++ 2 files changed, 9 insertions(+), 6 deletions(-) diff --git a/arch/arm64/include/asm/sysreg.h b/arch/arm64/include/asm/sysreg.h index b3a32a67088f..4f6e60f6c7cf 100644 --- a/arch/arm64/include/asm/sysreg.h +++ b/arch/arm64/include/asm/sysreg.h @@ -235,14 +235,8 @@ /*** End of Statistical Profiling Extension ***/ -#define SYS_TRBIDR_EL1 sys_reg(3, 0, 9, 11, 7) - #define TRBSR_EL1_BSC_MASK GENMASK(5, 0) #define TRBSR_EL1_BSC_SHIFT 0 -#define TRBIDR_EL1_F BIT(5) -#define TRBIDR_EL1_P BIT(4) -#define TRBIDR_EL1_Align_MASK GENMASK(3, 0) -#define TRBIDR_EL1_Align_SHIFT 0 #define SYS_PMINTENSET_EL1 sys_reg(3, 0, 9, 14, 1) #define SYS_PMINTENCLR_EL1 sys_reg(3, 0, 9, 14, 2) diff --git a/arch/arm64/tools/sysreg b/arch/arm64/tools/sysreg index 98dff7010b86..af823803eca2 100644 --- a/arch/arm64/tools/sysreg +++ b/arch/arm64/tools/sysreg @@ -2255,3 +2255,12 @@ Sysreg TRBTRG_EL1 3 0 9 11 6 Res0 63:32 Field 31:0 TRG EndSysreg + +Sysreg TRBIDR_EL1 3 0 9 11 7 +Res0 63:12 +Field 11:8 EA +Res0 7:6 +Field 5 F +Field 4 P +Field 3:0 Align +EndSysreg