From patchwork Thu Jun 1 15:00:55 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Manivannan Sadhasivam X-Patchwork-Id: 102016 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a59:994d:0:b0:3d9:f83d:47d9 with SMTP id k13csp410224vqr; Thu, 1 Jun 2023 08:20:20 -0700 (PDT) X-Google-Smtp-Source: ACHHUZ6566lPl82YimdWDASnRGkGctYg8jb7E/stU1std4ozlk4eElLQYOSadpx+cNY+yJ5V1vMI X-Received: by 2002:a17:903:1105:b0:1ac:8cd4:7404 with SMTP id n5-20020a170903110500b001ac8cd47404mr10249016plh.35.1685632819772; Thu, 01 Jun 2023 08:20:19 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1685632819; cv=none; d=google.com; s=arc-20160816; b=Rw+AEo6aUm1c6MyoawJQSGJTi4XTSlINtwg2pDd3z0MG2DfN//03ozq2xlDHxm7kAm 5uCFYC+SE+dBOLD/0thj2p34zs+grkO20hV2y3P+KPScYAp733o5hvTkQ4hOoIisTPw5 wCRXuCsYSlaboD1ZyAP/VVK0DrZU3y291TV42+ZUxVzCLajZkXF2AUHZCndXzEJbGSyL Di2ZSM1h37Rzxs4Z1b/bBkpGgltSLyjZ8ytCuVV1yQehkfLiOJR+BKLSs8Pdq+sJTUUS UXmqwOeLrF2xcUq+Z6oNDfkbDEoYe0vjxJI0n5PetsAQ12g/gDeoTN3fcFwFVVYdIA+O pgKQ== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from :dkim-signature; bh=sAFeVd+dwK+9T/TQ3aqc3usXxG9M6VjGUKGIkkMeOq4=; b=pSQFpgJGhekzxevk1M4onVDifdDUQBJsL8IhArX8WxfeiDJWX02xR+WHxLG2n5Xweg Mm2dz7mu03Mtx137XsILudNqDfP2bx7O82UtH7ioVDK22Xw1qSr90KkJTyjtoZ5OQkt/ qiSzxR5GEdXc5tU04AXFruZETRfdZkcTIju/or8jP1ZdGVONA/eFVmgRvRUc5ngY2GCa bprcGoHLwMAzDAN866GPhCrsISN99vn3w+MYRuUbaZEou4rpSezPXMp4yMh+GJM4TPzL dDWWk/2fECi9fFiyatkqFZeWN60K61b1bCr0TD3n3C30OEqROwMza2+s569jFiGXG1Ql bBWg== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=SX+BIkng; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: from out1.vger.email (out1.vger.email. [2620:137:e000::1:20]) by mx.google.com with ESMTP id k10-20020a170902c40a00b001a2513b8e14si2310168plk.84.2023.06.01.08.20.04; Thu, 01 Jun 2023 08:20:19 -0700 (PDT) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) client-ip=2620:137:e000::1:20; Authentication-Results: mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=SX+BIkng; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S234657AbjFAPD4 (ORCPT + 99 others); Thu, 1 Jun 2023 11:03:56 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:42698 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S234711AbjFAPDl (ORCPT ); Thu, 1 Jun 2023 11:03:41 -0400 Received: from mail-pl1-x62f.google.com (mail-pl1-x62f.google.com [IPv6:2607:f8b0:4864:20::62f]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 4F245212B for ; Thu, 1 Jun 2023 08:02:34 -0700 (PDT) Received: by mail-pl1-x62f.google.com with SMTP id d9443c01a7336-1b011cffef2so8754825ad.3 for ; Thu, 01 Jun 2023 08:02:34 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; t=1685631683; x=1688223683; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=sAFeVd+dwK+9T/TQ3aqc3usXxG9M6VjGUKGIkkMeOq4=; b=SX+BIkngzKzYRFKhsNp95dh7zWKTA1kb5QAAFgWG2NWebTcfDnznm+pD+ff915iZMO tBOaulh0/a8u4OLG+4/YaTkThYpYmHjmEDAe8hkLkzILwsYDgxlpmGARw1iZO6bwYrqo DgcoO2jriCI2vU6d+KQU0mA0uJ3m/fJzlix3nz4gpST3dIWfOk98xvJT5ipyoSL4XH1m GL3hp6b3f7+To59JkvAJhxc0V5S3BkU4NvfbhxPKon0SfcVB6S1m+qI9+C6/hHCxm0Up tdhC6VMzJ8RgHmZA+pdAJKnsBg6DFFQ7zQNCgvVCVN/jV1RlUNJDNlg1UKHJRVNnOkQb SG+A== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20221208; t=1685631683; x=1688223683; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=sAFeVd+dwK+9T/TQ3aqc3usXxG9M6VjGUKGIkkMeOq4=; b=NQ5cNraBZGBdwFZaAn0nx1BDJE7wumr/CIGDgmZZpF1/oEqMOtsC6x5DdggEY5/FcQ VqpoMN529yPwKDLBxV1xINKm1CpgBlWX16HqWJ57qri5cRekvPiSV2Bqzu1Hpf6HpzLW XDFxhsb8BC+OqZPsjmDqpyP3vegtGg6nWY29kxFBNM9gGhP6xVkJyLCovL7ahTAar3gI Rlo7YOqWmQdZJwhfmmEzSYCSuP3C88N2UHD+0j3ZCGgcFtG+tQpAYGAjd7MdfP20SJKM bVcfvtRSEiFS21F7aanPijebOd9O9vqRiflAv2Zvy2c9hLj4l3J9mRLEebQ7l2RtUePp D0LA== X-Gm-Message-State: AC+VfDzOq9z1F5RpeWYZAIbX787OvKPthJqHc7tWwP04QKP1aIM87p3g vnPNgRbfl6aYrMocUObgX9kk X-Received: by 2002:a17:902:c20d:b0:1b0:4c32:5d6d with SMTP id 13-20020a170902c20d00b001b04c325d6dmr8966653pll.31.1685631683470; Thu, 01 Jun 2023 08:01:23 -0700 (PDT) Received: from localhost.localdomain ([117.217.186.123]) by smtp.gmail.com with ESMTPSA id q7-20020a170902dac700b001b0499bee11sm3595480plx.240.2023.06.01.08.01.20 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 01 Jun 2023 08:01:23 -0700 (PDT) From: Manivannan Sadhasivam To: lpieralisi@kernel.org, kw@linux.com Cc: kishon@kernel.org, bhelgaas@google.com, linux-pci@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-msm@vger.kernel.org, Manivannan Sadhasivam Subject: [RESEND PATCH v5 1/9] PCI: endpoint: Add missing documentation about the MSI/MSI-X range Date: Thu, 1 Jun 2023 20:30:55 +0530 Message-Id: <20230601150103.12755-2-manivannan.sadhasivam@linaro.org> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20230601150103.12755-1-manivannan.sadhasivam@linaro.org> References: <20230601150103.12755-1-manivannan.sadhasivam@linaro.org> MIME-Version: 1.0 X-Spam-Status: No, score=-2.1 required=5.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,RCVD_IN_DNSWL_NONE, SPF_HELO_NONE,SPF_PASS,T_SCC_BODY_TEXT_LINE autolearn=unavailable autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-getmail-retrieved-from-mailbox: =?utf-8?q?INBOX?= X-GMAIL-THRID: =?utf-8?q?1767514119647968701?= X-GMAIL-MSGID: =?utf-8?q?1767514119647968701?= Both pci_epc_raise_irq() and pci_epc_map_msi_irq() APIs expects the MSI/MSI-X vectors to start from 1 but it is not documented. Add the range info to the kdoc of the APIs to make it clear. Fixes: 5e8cb4033807 ("PCI: endpoint: Add EP core layer to enable EP controller and EP functions") Fixes: 87d5972e476f ("PCI: endpoint: Add pci_epc_ops to map MSI IRQ") Signed-off-by: Manivannan Sadhasivam --- drivers/pci/endpoint/pci-epc-core.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/drivers/pci/endpoint/pci-epc-core.c b/drivers/pci/endpoint/pci-epc-core.c index 46c9a5c3ca14..0cf602c83d4a 100644 --- a/drivers/pci/endpoint/pci-epc-core.c +++ b/drivers/pci/endpoint/pci-epc-core.c @@ -213,7 +213,7 @@ EXPORT_SYMBOL_GPL(pci_epc_start); * @func_no: the physical endpoint function number in the EPC device * @vfunc_no: the virtual endpoint function number in the physical function * @type: specify the type of interrupt; legacy, MSI or MSI-X - * @interrupt_num: the MSI or MSI-X interrupt number + * @interrupt_num: the MSI or MSI-X interrupt number with range (1-N) * * Invoke to raise an legacy, MSI or MSI-X interrupt */ @@ -246,7 +246,7 @@ EXPORT_SYMBOL_GPL(pci_epc_raise_irq); * @func_no: the physical endpoint function number in the EPC device * @vfunc_no: the virtual endpoint function number in the physical function * @phys_addr: the physical address of the outbound region - * @interrupt_num: the MSI interrupt number + * @interrupt_num: the MSI interrupt number with range (1-N) * @entry_size: Size of Outbound address region for each interrupt * @msi_data: the data that should be written in order to raise MSI interrupt * with interrupt number as 'interrupt num' From patchwork Thu Jun 1 15:00:56 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Manivannan Sadhasivam X-Patchwork-Id: 102008 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a59:994d:0:b0:3d9:f83d:47d9 with SMTP id k13csp406961vqr; Thu, 1 Jun 2023 08:16:09 -0700 (PDT) X-Google-Smtp-Source: ACHHUZ4LnXS30xWn0CpcLIqNKv32HA4cQnsDsYK+DxxxGfRaHSccqs3J4B1+On2XCzLdwLwqmIIK X-Received: by 2002:a05:6a00:1816:b0:63b:8423:9e31 with SMTP id y22-20020a056a00181600b0063b84239e31mr8055994pfa.11.1685632569603; Thu, 01 Jun 2023 08:16:09 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1685632569; cv=none; d=google.com; s=arc-20160816; b=bxfOQx3E3MRd5qKfU0XE+18jX815KLuE42bNgZNxoD5Zl+05sAqH6q6CMUr5NcOx3m 5tAC0f6gG/txLKUDSBJFbaJ+9tEqKqbBLzdE6uD0WSEZWjEb01AF0+iaARsxl5qprakM Tb2REE953BqdctMW5URRigl9EAdpLy3kzvlnNeEqNbklKk9DnDsXJK0A7iNrjfxSCEUK tUVMpnDWfb+xCG7QmIQ1VXpabisjy77XfNGNewxjd0OW88c7ZbXsvKPUNoTDPBfg361i UWCCavG2bdGDztiFBQR4FJKzCf2ebkmYxbcc9wg3TEK4KMIVK4Mpx6pkt5g4zCbX+f8M oGlQ== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from :dkim-signature; bh=cwXI2MDftw2Rb8IrxQ8Wa3XnLpiqiT4qkX9vMeeuaOg=; b=EMwoh65FlKmSgH7NKcWbYAFPrkf3Ky5eWP47gTMJzXoN0XHCy0y/Zm4mhwhJtVx9f6 0E7QbH0g09wDR5xbNmhbrFmyM8v5OCpfcawRpQQRbGG62Om0Mqt5+uwnblpIyEtdPDH4 U07SzwbNCc/es3m8HC5N1yFDPsxa6Ujge9/zNRhi6gvi9l1iYkYxhGSJy8tOfBmRdfKb ohmCzvtlXfv/M1YpuSlFv6rTirQe8R7BF9H0E46tsFbHsHM5mekXJjmkOc91lcmrtx0N V57U2vXMMCdoF1EOSYAO5p9m6rYe0bBMyJjmMzYKcdsinzx6gRfbUDtiNNLmFv1aLGld N69g== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=VvI1kqae; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: from out1.vger.email (out1.vger.email. [2620:137:e000::1:20]) by mx.google.com with ESMTP id w1-20020a637b01000000b0051f869d7089si1784361pgc.74.2023.06.01.08.15.56; Thu, 01 Jun 2023 08:16:09 -0700 (PDT) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) client-ip=2620:137:e000::1:20; Authentication-Results: mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=VvI1kqae; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S234917AbjFAPEj (ORCPT + 99 others); Thu, 1 Jun 2023 11:04:39 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:42800 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S234244AbjFAPEH (ORCPT ); Thu, 1 Jun 2023 11:04:07 -0400 Received: from mail-pl1-x631.google.com (mail-pl1-x631.google.com [IPv6:2607:f8b0:4864:20::631]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 89B7810F1 for ; Thu, 1 Jun 2023 08:03:04 -0700 (PDT) Received: by mail-pl1-x631.google.com with SMTP id d9443c01a7336-1b024e29657so4263695ad.3 for ; Thu, 01 Jun 2023 08:03:04 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; t=1685631687; x=1688223687; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=cwXI2MDftw2Rb8IrxQ8Wa3XnLpiqiT4qkX9vMeeuaOg=; b=VvI1kqae2QZnufvvPgJXDg6cf7eJl0z5keTy1LamC9RB/+jM1kie76LkszTp4+i7oI OqIKE2r6LEQEVFaN3uhUTTPsop3WOaBoMGfCPtW1p5o+/wd/I6jl8RfNCZlwlIHiERZq Glk+Ee2Wzi7zg3gdgBww2dyDESl4g4ngtQsTi/8sBMQDBg9b/DYEilX9WItSJ0r9YKTy cru5R1ZoNpuTC9PimQTu3S/f5qKfzvjoCuztNGe64RIGiwzfl5ivIQ4OQ9XJxdq7u1kh 62BwrKNfLA8U57Ow+9bsaPfIcnvHhsvL6JJZNRTuFg8ZMjiY2ikn/ImD0NqgJs16KOH7 IBWg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20221208; t=1685631687; x=1688223687; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=cwXI2MDftw2Rb8IrxQ8Wa3XnLpiqiT4qkX9vMeeuaOg=; b=jiziqTex72sZpGe3Rlm/iafemTRvAq8fbXgK8k4JvZh8KsrIXOybZSG5lFZmDtJngc Bb+CAFbhVaL9gtRb1ofzFD/oaD6YeTr9NGx4YTEc2DqJDC/SSKJiNR/uw8YYVm1VWcBx w0Lzeif0LuefP08IALx2Ridr0V3TFxPjpEMSJGOgp5LHRN9Zt1LFZAoka7b7EY8YXODa wJRgAhxdSP87dR8UjHO+UsnUAKQoViz7xXNgKt+iapvjNwWiJ9KchKWq4w0K73AliEdN B7pi2qE93ZjHIEKipEdIyDyVmRS3zdf8My53IHVVjPNCRlKGAv7bgBBqYeP0If0BbMmB +URQ== X-Gm-Message-State: AC+VfDwJi0FxHqdhgPGaWvC174qVKX5+ulFb0O0YsVSvt/kDVQiNpJCG 0+vnSQb1gBxHPRp9s8uQY8Ke X-Received: by 2002:a17:902:d504:b0:1b0:496b:5ae9 with SMTP id b4-20020a170902d50400b001b0496b5ae9mr7091233plg.25.1685631686761; Thu, 01 Jun 2023 08:01:26 -0700 (PDT) Received: from localhost.localdomain ([117.217.186.123]) by smtp.gmail.com with ESMTPSA id q7-20020a170902dac700b001b0499bee11sm3595480plx.240.2023.06.01.08.01.23 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 01 Jun 2023 08:01:26 -0700 (PDT) From: Manivannan Sadhasivam To: lpieralisi@kernel.org, kw@linux.com Cc: kishon@kernel.org, bhelgaas@google.com, linux-pci@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-msm@vger.kernel.org, Manivannan Sadhasivam Subject: [RESEND PATCH v5 2/9] PCI: endpoint: Pass EPF device ID to the probe function Date: Thu, 1 Jun 2023 20:30:56 +0530 Message-Id: <20230601150103.12755-3-manivannan.sadhasivam@linaro.org> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20230601150103.12755-1-manivannan.sadhasivam@linaro.org> References: <20230601150103.12755-1-manivannan.sadhasivam@linaro.org> MIME-Version: 1.0 X-Spam-Status: No, score=-2.1 required=5.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,RCVD_IN_DNSWL_NONE, SPF_HELO_NONE,SPF_PASS,T_SCC_BODY_TEXT_LINE autolearn=unavailable autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-getmail-retrieved-from-mailbox: =?utf-8?q?INBOX?= X-GMAIL-THRID: =?utf-8?q?1767513857135405223?= X-GMAIL-MSGID: =?utf-8?q?1767513857135405223?= Currently, the EPF probe function doesn't get the device ID argument needed to correctly identify the device table ID of the EPF device. When multiple entries are added to the "struct pci_epf_device_id" table, the probe function needs to identify the correct one. This is achieved by modifying the pci_epf_match_id() function to return the match ID pointer and passing it to the driver's probe function. pci_epf_device_match() function can return bool based on the return value of pci_epf_match_id(). Reviewed-by: Kishon Vijay Abraham I Signed-off-by: Manivannan Sadhasivam --- drivers/pci/endpoint/functions/pci-epf-ntb.c | 3 ++- drivers/pci/endpoint/functions/pci-epf-test.c | 2 +- drivers/pci/endpoint/functions/pci-epf-vntb.c | 2 +- drivers/pci/endpoint/pci-epf-core.c | 20 ++++++++++++------- include/linux/pci-epf.h | 4 +++- 5 files changed, 20 insertions(+), 11 deletions(-) diff --git a/drivers/pci/endpoint/functions/pci-epf-ntb.c b/drivers/pci/endpoint/functions/pci-epf-ntb.c index 9a00448c7e61..980b4ecf19a2 100644 --- a/drivers/pci/endpoint/functions/pci-epf-ntb.c +++ b/drivers/pci/endpoint/functions/pci-epf-ntb.c @@ -2075,11 +2075,12 @@ static struct config_group *epf_ntb_add_cfs(struct pci_epf *epf, /** * epf_ntb_probe() - Probe NTB function driver * @epf: NTB endpoint function device + * @id: NTB endpoint function device ID * * Probe NTB function driver when endpoint function bus detects a NTB * endpoint function. */ -static int epf_ntb_probe(struct pci_epf *epf) +static int epf_ntb_probe(struct pci_epf *epf, const struct pci_epf_device_id *id) { struct epf_ntb *ntb; struct device *dev; diff --git a/drivers/pci/endpoint/functions/pci-epf-test.c b/drivers/pci/endpoint/functions/pci-epf-test.c index 0f9d2ec822ac..d5fcc78a5b73 100644 --- a/drivers/pci/endpoint/functions/pci-epf-test.c +++ b/drivers/pci/endpoint/functions/pci-epf-test.c @@ -980,7 +980,7 @@ static const struct pci_epf_device_id pci_epf_test_ids[] = { {}, }; -static int pci_epf_test_probe(struct pci_epf *epf) +static int pci_epf_test_probe(struct pci_epf *epf, const struct pci_epf_device_id *id) { struct pci_epf_test *epf_test; struct device *dev = &epf->dev; diff --git a/drivers/pci/endpoint/functions/pci-epf-vntb.c b/drivers/pci/endpoint/functions/pci-epf-vntb.c index b7c7a8af99f4..122eb7a12028 100644 --- a/drivers/pci/endpoint/functions/pci-epf-vntb.c +++ b/drivers/pci/endpoint/functions/pci-epf-vntb.c @@ -1401,7 +1401,7 @@ static struct pci_epf_ops epf_ntb_ops = { * * Returns: Zero for success, or an error code in case of failure */ -static int epf_ntb_probe(struct pci_epf *epf) +static int epf_ntb_probe(struct pci_epf *epf, const struct pci_epf_device_id *id) { struct epf_ntb *ntb; struct device *dev; diff --git a/drivers/pci/endpoint/pci-epf-core.c b/drivers/pci/endpoint/pci-epf-core.c index 2036e38be093..7307e052136f 100644 --- a/drivers/pci/endpoint/pci-epf-core.c +++ b/drivers/pci/endpoint/pci-epf-core.c @@ -493,16 +493,16 @@ static const struct device_type pci_epf_type = { .release = pci_epf_dev_release, }; -static int -pci_epf_match_id(const struct pci_epf_device_id *id, const struct pci_epf *epf) +static const struct pci_epf_device_id +*pci_epf_match_id(const struct pci_epf_device_id *id, const struct pci_epf *epf) { while (id->name[0]) { if (strcmp(epf->name, id->name) == 0) - return true; + return id; id++; } - return false; + return NULL; } static int pci_epf_device_match(struct device *dev, struct device_driver *drv) @@ -510,8 +510,12 @@ static int pci_epf_device_match(struct device *dev, struct device_driver *drv) struct pci_epf *epf = to_pci_epf(dev); struct pci_epf_driver *driver = to_pci_epf_driver(drv); - if (driver->id_table) - return pci_epf_match_id(driver->id_table, epf); + if (driver->id_table) { + if (pci_epf_match_id(driver->id_table, epf)) + return true; + else + return false; + } return !strcmp(epf->name, drv->name); } @@ -520,13 +524,15 @@ static int pci_epf_device_probe(struct device *dev) { struct pci_epf *epf = to_pci_epf(dev); struct pci_epf_driver *driver = to_pci_epf_driver(dev->driver); + const struct pci_epf_device_id *id; if (!driver->probe) return -ENODEV; epf->driver = driver; + id = pci_epf_match_id(driver->id_table, epf); - return driver->probe(epf); + return driver->probe(epf, id); } static void pci_epf_device_remove(struct device *dev) diff --git a/include/linux/pci-epf.h b/include/linux/pci-epf.h index a215dc8ce693..bc613f0df7e3 100644 --- a/include/linux/pci-epf.h +++ b/include/linux/pci-epf.h @@ -89,7 +89,7 @@ struct pci_epc_event_ops { * @id_table: identifies EPF devices for probing */ struct pci_epf_driver { - int (*probe)(struct pci_epf *epf); + int (*probe)(struct pci_epf *epf, const struct pci_epf_device_id *id); void (*remove)(struct pci_epf *epf); struct device_driver driver; @@ -131,6 +131,7 @@ struct pci_epf_bar { * @epc: the EPC device to which this EPF device is bound * @epf_pf: the physical EPF device to which this virtual EPF device is bound * @driver: the EPF driver to which this EPF device is bound + * @id: Pointer to the EPF device ID * @list: to add pci_epf as a list of PCI endpoint functions to pci_epc * @lock: mutex to protect pci_epf_ops * @sec_epc: the secondary EPC device to which this EPF device is bound @@ -158,6 +159,7 @@ struct pci_epf { struct pci_epc *epc; struct pci_epf *epf_pf; struct pci_epf_driver *driver; + const struct pci_epf_device_id *id; struct list_head list; /* mutex to protect against concurrent access of pci_epf_ops */ struct mutex lock; From patchwork Thu Jun 1 15:00:57 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Manivannan Sadhasivam X-Patchwork-Id: 101999 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a59:994d:0:b0:3d9:f83d:47d9 with SMTP id k13csp399550vqr; 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There is no need to call the EPC start/stop functions in those cases. Reviewed-by: Kishon Vijay Abraham I Signed-off-by: Manivannan Sadhasivam --- drivers/pci/endpoint/pci-ep-cfs.c | 3 +++ 1 file changed, 3 insertions(+) diff --git a/drivers/pci/endpoint/pci-ep-cfs.c b/drivers/pci/endpoint/pci-ep-cfs.c index 4b8ac0ac84d5..62c8e09c59f4 100644 --- a/drivers/pci/endpoint/pci-ep-cfs.c +++ b/drivers/pci/endpoint/pci-ep-cfs.c @@ -178,6 +178,9 @@ static ssize_t pci_epc_start_store(struct config_item *item, const char *page, if (kstrtobool(page, &start) < 0) return -EINVAL; + if (WARN_ON_ONCE(start == epc_group->start)) + return 0; + if (!start) { pci_epc_stop(epc); epc_group->start = 0; From patchwork Thu Jun 1 15:00:58 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Manivannan Sadhasivam X-Patchwork-Id: 102012 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a59:994d:0:b0:3d9:f83d:47d9 with SMTP id k13csp409216vqr; Thu, 1 Jun 2023 08:19:03 -0700 (PDT) X-Google-Smtp-Source: ACHHUZ59Skllp0thFcsV0XsnxkTTcDynntumqmGlpVhOfh5RxNTerwvkpoGdvOf0uQCjmCnZZDz5 X-Received: by 2002:a05:6a00:134e:b0:64f:49ee:1a61 with SMTP id k14-20020a056a00134e00b0064f49ee1a61mr8397674pfu.34.1685632743025; Thu, 01 Jun 2023 08:19:03 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1685632743; cv=none; d=google.com; s=arc-20160816; b=x9N5Al5hqQIK/QgmgDGRGxjF+j3p9A49N3pTwfUCic+dhDAdKdyLRP786bgfHw/704 UbTTtKvV0u/93/HHEY1nLf+8H6bCEFYnHmKaoJLMiBsp0ibg4pXFDj8PscxyLQWyebKp SVSVe547RW3Xls8nTJQfryfaNNLmI1iQuwHpZ93Di4EY4qHu60yBCIK8vIsp4ISnJpQs SY7tpuKUD6a1wWO3RRgvKHeXcozp6OVzFdnTrkk063AW+cE/9n9/yV60Rdz0qVSxDUJO AbBR8uvJlHb8CGnuWCZynOYmY1mwgJ+Q1x34ptvrmZ70ANEbtL+9Tg0NXFuVU0S6fujI 890w== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from :dkim-signature; bh=VhNik2H+uO+Q16HqIS1xj7FIQ3fy5k7mBkKyNDoBImY=; b=mfHds4KOG4oBAiyeTRSmfSpmOmD5chpVI4YUeAsphoZjZUhRN1rRPcB3BLSgSNuyeM wmalrqOcevJezR/4jWW9QSoadc8dTkJPYgEctF0jJb3m3lzrHFrxB7HWkMsAi5lxXZ0N HJ4rh2uyTvsIU387HtH87NoOLK10qsoYSYEFmnxuPYF+2ypHaizDTbcsQvgP3w8jpEk6 VuiLU0K8mjr6E0p90xYrT6Ad2heJGqmKn2jAPRQrLMSrvpWKR4rdqJzQdoViD9j0gc6J nC/T5c1ulbilxgkIAgadWsIGpzsyOJ9PBoGArQdh5fiehtees10Y9SHVMC/JGP3rqhEl I6Jw== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=WKzaDxUt; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: from out1.vger.email (out1.vger.email. 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Reviewed-by: Kishon Vijay Abraham I Signed-off-by: Manivannan Sadhasivam --- drivers/pci/endpoint/pci-epc-core.c | 26 ++++++++++++++++++++++++++ include/linux/pci-epc.h | 1 + include/linux/pci-epf.h | 2 ++ 3 files changed, 29 insertions(+) diff --git a/drivers/pci/endpoint/pci-epc-core.c b/drivers/pci/endpoint/pci-epc-core.c index 0cf602c83d4a..e0570b52698d 100644 --- a/drivers/pci/endpoint/pci-epc-core.c +++ b/drivers/pci/endpoint/pci-epc-core.c @@ -706,6 +706,32 @@ void pci_epc_linkup(struct pci_epc *epc) } EXPORT_SYMBOL_GPL(pci_epc_linkup); +/** + * pci_epc_linkdown() - Notify the EPF device that EPC device has dropped the + * connection with the Root Complex. + * @epc: the EPC device which has dropped the link with the host + * + * Invoke to Notify the EPF device that the EPC device has dropped the + * connection with the Root Complex. + */ +void pci_epc_linkdown(struct pci_epc *epc) +{ + struct pci_epf *epf; + + if (!epc || IS_ERR(epc)) + return; + + mutex_lock(&epc->list_lock); + list_for_each_entry(epf, &epc->pci_epf, list) { + mutex_lock(&epf->lock); + if (epf->event_ops && epf->event_ops->link_down) + epf->event_ops->link_down(epf); + mutex_unlock(&epf->lock); + } + mutex_unlock(&epc->list_lock); +} +EXPORT_SYMBOL_GPL(pci_epc_linkdown); + /** * pci_epc_init_notify() - Notify the EPF device that EPC device's core * initialization is completed. diff --git a/include/linux/pci-epc.h b/include/linux/pci-epc.h index 301bb0e53707..63a6cc5e5282 100644 --- a/include/linux/pci-epc.h +++ b/include/linux/pci-epc.h @@ -203,6 +203,7 @@ void pci_epc_destroy(struct pci_epc *epc); int pci_epc_add_epf(struct pci_epc *epc, struct pci_epf *epf, enum pci_epc_interface_type type); void pci_epc_linkup(struct pci_epc *epc); +void pci_epc_linkdown(struct pci_epc *epc); void pci_epc_init_notify(struct pci_epc *epc); void pci_epc_remove_epf(struct pci_epc *epc, struct pci_epf *epf, enum pci_epc_interface_type type); diff --git a/include/linux/pci-epf.h b/include/linux/pci-epf.h index bc613f0df7e3..f8e5a63d0c83 100644 --- a/include/linux/pci-epf.h +++ b/include/linux/pci-epf.h @@ -71,10 +71,12 @@ struct pci_epf_ops { * struct pci_epf_event_ops - Callbacks for capturing the EPC events * @core_init: Callback for the EPC initialization complete event * @link_up: Callback for the EPC link up event + * @link_down: Callback for the EPC link down event */ struct pci_epc_event_ops { int (*core_init)(struct pci_epf *epf); int (*link_up)(struct pci_epf *epf); + int (*link_down)(struct pci_epf *epf); }; /** From patchwork Thu Jun 1 15:00:59 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Manivannan Sadhasivam X-Patchwork-Id: 102014 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a59:994d:0:b0:3d9:f83d:47d9 with SMTP id k13csp410050vqr; Thu, 1 Jun 2023 08:20:08 -0700 (PDT) X-Google-Smtp-Source: ACHHUZ5FRS7ChpZJEeQ3GLWemWgVU2juhGZE/zp09iQ6vbH5vu8NK2kMZyGv8I2cnoTKyXFfUuQI X-Received: by 2002:a05:6a00:2d84:b0:62d:d045:392 with SMTP id fb4-20020a056a002d8400b0062dd0450392mr12141328pfb.32.1685632808409; Thu, 01 Jun 2023 08:20:08 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1685632808; cv=none; d=google.com; s=arc-20160816; b=DiYrXjmoTjY2FR92rC23R0iMmWW2ZOvDpUCSbf0GW5dpN6ed2MOsYoHQxt2xUA+YYo E1rn1vtgGnZJihGT3BjgQQqCMQjkXxXA6w263v2NPAHXgZ4BKGP30o3F47u817npAlP2 t46v07cHeRefGRxgINwDhlG9uDAWXFOYdLn8DpzlLxdgdF9NS9hj+BfwdfNdCbGRNTBb 3WBIeV/plM8MktYCBUMJAC+PFSXTlLSRFY+hTAqUdvC1iVKyukV/R9P81snrzHEFqfOL Cbc0USh3e8r7mQz9IWTatgm15JluV4alE36Un1362DAd3b+Ip0RDoQEuHraxjME0ICWm /I1Q== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from :dkim-signature; bh=hYZvtGezswvgwNKpdFwjsrVB2tlNlkIcg9dibR8Jyd4=; b=Lcxc2pL/t2NlP/HuttzCVYSB/UuZATB8+fgInXRBc+Ia1VbIHY80oJfNSOodhP9tTe 4IheaXkEtq+JAak8HvBbv7xuLIJ8TElAPwyOSUS3NCWfdDedYp1xjUyo/uBfDQX7Rbio pg9M/q3h/MFn9Fchj/tp5KfrXVn78dPWBJTVqN0xQ/ckgsYh8VLsRXslPGT7e/QeITII u01e+bX2hMZs5CGMQbcrOvmwfkcjJT/vaOUCvauRc1oKMb8Z6SI4Z0QbA3IklvMeeWnk tJ6U+OangBMxxOhT+541xkvoqqVLRj4V/HkRU5Iswx/tqVJdnZBtoLEAw2/qz+65NLBp Zw8Q== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=yWfa1cfs; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: from out1.vger.email (out1.vger.email. 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Reviewed-by: Kishon Vijay Abraham I Signed-off-by: Manivannan Sadhasivam --- drivers/pci/endpoint/pci-epc-core.c | 26 ++++++++++++++++++++++++++ include/linux/pci-epc.h | 1 + include/linux/pci-epf.h | 2 ++ 3 files changed, 29 insertions(+) diff --git a/drivers/pci/endpoint/pci-epc-core.c b/drivers/pci/endpoint/pci-epc-core.c index e0570b52698d..6c54fa5684d2 100644 --- a/drivers/pci/endpoint/pci-epc-core.c +++ b/drivers/pci/endpoint/pci-epc-core.c @@ -758,6 +758,32 @@ void pci_epc_init_notify(struct pci_epc *epc) } EXPORT_SYMBOL_GPL(pci_epc_init_notify); +/** + * pci_epc_bme_notify() - Notify the EPF device that the EPC device has received + * the BME event from the Root complex + * @epc: the EPC device that received the BME event + * + * Invoke to Notify the EPF device that the EPC device has received the Bus + * Master Enable (BME) event from the Root complex + */ +void pci_epc_bme_notify(struct pci_epc *epc) +{ + struct pci_epf *epf; + + if (!epc || IS_ERR(epc)) + return; + + mutex_lock(&epc->list_lock); + list_for_each_entry(epf, &epc->pci_epf, list) { + mutex_lock(&epf->lock); + if (epf->event_ops && epf->event_ops->bme) + epf->event_ops->bme(epf); + mutex_unlock(&epf->lock); + } + mutex_unlock(&epc->list_lock); +} +EXPORT_SYMBOL_GPL(pci_epc_bme_notify); + /** * pci_epc_destroy() - destroy the EPC device * @epc: the EPC device that has to be destroyed diff --git a/include/linux/pci-epc.h b/include/linux/pci-epc.h index 63a6cc5e5282..5cb694031072 100644 --- a/include/linux/pci-epc.h +++ b/include/linux/pci-epc.h @@ -205,6 +205,7 @@ int pci_epc_add_epf(struct pci_epc *epc, struct pci_epf *epf, void pci_epc_linkup(struct pci_epc *epc); void pci_epc_linkdown(struct pci_epc *epc); void pci_epc_init_notify(struct pci_epc *epc); +void pci_epc_bme_notify(struct pci_epc *epc); void pci_epc_remove_epf(struct pci_epc *epc, struct pci_epf *epf, enum pci_epc_interface_type type); int pci_epc_write_header(struct pci_epc *epc, u8 func_no, u8 vfunc_no, diff --git a/include/linux/pci-epf.h b/include/linux/pci-epf.h index f8e5a63d0c83..f34b3b32a0e7 100644 --- a/include/linux/pci-epf.h +++ b/include/linux/pci-epf.h @@ -72,11 +72,13 @@ struct pci_epf_ops { * @core_init: Callback for the EPC initialization complete event * @link_up: Callback for the EPC link up event * @link_down: Callback for the EPC link down event + * @bme: Callback for the EPC BME (Bus Master Enable) event */ struct pci_epc_event_ops { int (*core_init)(struct pci_epf *epf); int (*link_up)(struct pci_epf *epf); int (*link_down)(struct pci_epf *epf); + int (*bme)(struct pci_epf *epf); }; /** From patchwork Thu Jun 1 15:01:00 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Manivannan Sadhasivam X-Patchwork-Id: 102017 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a59:994d:0:b0:3d9:f83d:47d9 with SMTP id k13csp410726vqr; Thu, 1 Jun 2023 08:20:55 -0700 (PDT) X-Google-Smtp-Source: ACHHUZ79O9OO89FCWB25EyaY0ETHegjTGWVdIAF+5R2mDh8OkBug8G8th4/MCXND0F+hf0vM0U4X X-Received: by 2002:a17:902:d485:b0:1ac:8384:a7fb with SMTP id c5-20020a170902d48500b001ac8384a7fbmr7502492plg.66.1685632855576; Thu, 01 Jun 2023 08:20:55 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1685632855; cv=none; d=google.com; s=arc-20160816; b=SMMKbnKkUhZdklCjXMXPZt/mmGd5l80uXB+dCNlhsvFZ050R5dHkMPvjl/zGFzfH0K of4FQI0w2smmOJM37l0Sster5TWXpCnQTKNYZYIvnlo61aCsSmV5hb3SDG5k8sBRmymi hVXaicdSLK2X7IvWAjj8OS/QqWUbqJ1w1l45bhnAVLct51Sp45mj61actGaZsehbLYq7 VC+qPDgzBUoNzV82KhPT1f3TbgTQtfmiUGeHVeSb4jrUcWfmnVl7e72Ydztn+KGf0hjb ObB1ZJuNVK057qa75iA5oaklMG9yNEtLXW1vArIxyMurmUFBLKkMao2nJnOhT9Tr7Zw2 3m0g== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from :dkim-signature; bh=sY5A5rnt2NOAJyTtKsWtQc3JsasD9KssrsfBlXW2O/Q=; b=iT5cJG3OdVLTyq0WdY+p5bqAgI0vy916eswFqEFU+vPA4N8Xn64OScIER3fNRMG8Kh xFGiB5AfIQuZEWA4qGIHU4yfa5HjOPX5ETeehgBU2W7lyWs4utYv1EsC3XSucl+lfMru r6IHv9d86gyIr/tjm2FWWvrxpw+K5Y/4X7wRuOHIYrz+rf5ikMfe0XfRaJRTgKOdC1c7 6+NOEnj5IR/2vdkXVjt0Blzil3En7lW7YdEe2UdZWmuW63xdXcW1XsqLGtsTTkhOAXbG o/yDTiKRaO0Atp8udqdYsI9uMH6cOUSoZOtp67YJ60PY6FBhhw7pGH6Vyw9683fWkSOU vDbQ== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=qkwtr+3c; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: from out1.vger.email (out1.vger.email. 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Reviewed-by: Kishon Vijay Abraham I Signed-off-by: Manivannan Sadhasivam --- drivers/pci/controller/dwc/pcie-qcom-ep.c | 1 + 1 file changed, 1 insertion(+) diff --git a/drivers/pci/controller/dwc/pcie-qcom-ep.c b/drivers/pci/controller/dwc/pcie-qcom-ep.c index 19b32839ea26..4ce01ff7527c 100644 --- a/drivers/pci/controller/dwc/pcie-qcom-ep.c +++ b/drivers/pci/controller/dwc/pcie-qcom-ep.c @@ -569,6 +569,7 @@ static irqreturn_t qcom_pcie_ep_global_irq_thread(int irq, void *data) if (FIELD_GET(PARF_INT_ALL_LINK_DOWN, status)) { dev_dbg(dev, "Received Linkdown event\n"); pcie_ep->link_status = QCOM_PCIE_EP_LINK_DOWN; + pci_epc_linkdown(pci->ep.epc); } else if (FIELD_GET(PARF_INT_ALL_BME, status)) { dev_dbg(dev, "Received BME event. Link is enabled!\n"); pcie_ep->link_status = QCOM_PCIE_EP_LINK_ENABLED; From patchwork Thu Jun 1 15:01:02 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Manivannan Sadhasivam X-Patchwork-Id: 102004 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a59:994d:0:b0:3d9:f83d:47d9 with SMTP id k13csp402909vqr; Thu, 1 Jun 2023 08:11:00 -0700 (PDT) X-Google-Smtp-Source: ACHHUZ6Gz0LTqD+zywT/khTtZgfbWU5D8t6l06oWeAns4L2RScwwg5HhJtk2O9OuXwoUMtC7K2Vd X-Received: by 2002:a05:6a00:1502:b0:63e:6b8a:7975 with SMTP id q2-20020a056a00150200b0063e6b8a7975mr11819406pfu.9.1685632260249; Thu, 01 Jun 2023 08:11:00 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1685632260; cv=none; d=google.com; s=arc-20160816; b=AyG0yMh9ClTd5VNCSB/9rtxwi4UWle8J5a0/44sAZW39rASkFj4H5DlrxiS5vSZzDV Hg7lFhgl8iNfLDDhWW5sXFReLpX5asR2RvpZZE+8FO+vbijYpLhpqmX/BjOtdCfVhwlz TBuNM6J/I+Udj9JYu0FXYt1vb7SXLSIgTqz+tNZOk0vu5IwfzpUyOMfr0nYVmkrDeFHT pHCQEcWjRJmSfZA93IqbtxZLitaLZiFOnXxtYQFW0kMh7P618P2wOTny60/3071yxn8j jma1pajGuK/VU5U83JHN9d0QaSl2Ebfdqmff5oSbspSwsI9lGKdKRWuxuD4CkVpXq/F0 P0RA== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from :dkim-signature; bh=PLxuYHbYfw91BBx8yV4hmx/yLafz6sc0c4fkL2N3kD8=; b=G5Mav+uePBD3s8WZWm4wUQuANgXCcwcRy4J2BVN62liWVhxDMzsGv0XKFAE6T9d8sr v8f2lXTcjPC3XbfzCkFmQVozzx/r9fHLymjJweqzr+SsLHzrbaw6N3t8spX+jqt8t1US hWVf4WkPVyfta9Xm+9csRzxSA50AyD3KDkv0ZoWYJ+XlwJ2zh811QNZPBj68g7lI4tmM IIi5xOzXNWorrl8fWANo2xYkdGt4hF50lp0zREFt5ssO/0hu8Bx9ojNnUQYPLtfCPlh8 nRwL/DcG8omhkIaCoyft+Kd46x+qOOZsQzBUUVmjiV0HNjyaSr105aPzP4ZyYUmMsL0g w6CQ== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=joQ2goJW; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: from out1.vger.email (out1.vger.email. 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The driver implements the MHI function over PCI in the endpoint device such as SDX55 modem. The MHI endpoint function driver acts as a controller driver for the MHI Endpoint stack and carries out all PCI related activities like mapping the host memory using iATU, triggering MSIs etc... Reviewed-by: Kishon Vijay Abraham I Signed-off-by: Manivannan Sadhasivam --- drivers/pci/endpoint/functions/Kconfig | 10 + drivers/pci/endpoint/functions/Makefile | 1 + drivers/pci/endpoint/functions/pci-epf-mhi.c | 462 +++++++++++++++++++ 3 files changed, 473 insertions(+) create mode 100644 drivers/pci/endpoint/functions/pci-epf-mhi.c diff --git a/drivers/pci/endpoint/functions/Kconfig b/drivers/pci/endpoint/functions/Kconfig index 9fd560886871..f5171b4fabbe 100644 --- a/drivers/pci/endpoint/functions/Kconfig +++ b/drivers/pci/endpoint/functions/Kconfig @@ -37,3 +37,13 @@ config PCI_EPF_VNTB between PCI Root Port and PCIe Endpoint. If in doubt, say "N" to disable Endpoint NTB driver. + +config PCI_EPF_MHI + tristate "PCI Endpoint driver for MHI bus" + depends on PCI_ENDPOINT && MHI_BUS_EP + help + Enable this configuration option to enable the PCI Endpoint + driver for Modem Host Interface (MHI) bus in Qualcomm Endpoint + devices such as SDX55. + + If in doubt, say "N" to disable Endpoint driver for MHI bus. diff --git a/drivers/pci/endpoint/functions/Makefile b/drivers/pci/endpoint/functions/Makefile index 5c13001deaba..696473fce50e 100644 --- a/drivers/pci/endpoint/functions/Makefile +++ b/drivers/pci/endpoint/functions/Makefile @@ -6,3 +6,4 @@ obj-$(CONFIG_PCI_EPF_TEST) += pci-epf-test.o obj-$(CONFIG_PCI_EPF_NTB) += pci-epf-ntb.o obj-$(CONFIG_PCI_EPF_VNTB) += pci-epf-vntb.o +obj-$(CONFIG_PCI_EPF_MHI) += pci-epf-mhi.o diff --git a/drivers/pci/endpoint/functions/pci-epf-mhi.c b/drivers/pci/endpoint/functions/pci-epf-mhi.c new file mode 100644 index 000000000000..98f0d96cfd46 --- /dev/null +++ b/drivers/pci/endpoint/functions/pci-epf-mhi.c @@ -0,0 +1,462 @@ +// SPDX-License-Identifier: GPL-2.0 +/* + * PCI EPF driver for MHI Endpoint devices + * + * Copyright (C) 2023 Linaro Ltd. + * Author: Manivannan Sadhasivam + */ + +#include +#include +#include +#include +#include + +#define MHI_VERSION_1_0 0x01000000 + +#define to_epf_mhi(cntrl) container_of(cntrl, struct pci_epf_mhi, cntrl) + +struct pci_epf_mhi_ep_info { + const struct mhi_ep_cntrl_config *config; + struct pci_epf_header *epf_header; + enum pci_barno bar_num; + u32 epf_flags; + u32 msi_count; + u32 mru; +}; + +#define MHI_EP_CHANNEL_CONFIG(ch_num, ch_name, direction) \ + { \ + .num = ch_num, \ + .name = ch_name, \ + .dir = direction, \ + } + +#define MHI_EP_CHANNEL_CONFIG_UL(ch_num, ch_name) \ + MHI_EP_CHANNEL_CONFIG(ch_num, ch_name, DMA_TO_DEVICE) + +#define MHI_EP_CHANNEL_CONFIG_DL(ch_num, ch_name) \ + MHI_EP_CHANNEL_CONFIG(ch_num, ch_name, DMA_FROM_DEVICE) + +static const struct mhi_ep_channel_config mhi_v1_channels[] = { + MHI_EP_CHANNEL_CONFIG_UL(0, "LOOPBACK"), + MHI_EP_CHANNEL_CONFIG_DL(1, "LOOPBACK"), + MHI_EP_CHANNEL_CONFIG_UL(2, "SAHARA"), + MHI_EP_CHANNEL_CONFIG_DL(3, "SAHARA"), + MHI_EP_CHANNEL_CONFIG_UL(4, "DIAG"), + MHI_EP_CHANNEL_CONFIG_DL(5, "DIAG"), + MHI_EP_CHANNEL_CONFIG_UL(6, "SSR"), + MHI_EP_CHANNEL_CONFIG_DL(7, "SSR"), + MHI_EP_CHANNEL_CONFIG_UL(8, "QDSS"), + MHI_EP_CHANNEL_CONFIG_DL(9, "QDSS"), + MHI_EP_CHANNEL_CONFIG_UL(10, "EFS"), + MHI_EP_CHANNEL_CONFIG_DL(11, "EFS"), + MHI_EP_CHANNEL_CONFIG_UL(12, "MBIM"), + MHI_EP_CHANNEL_CONFIG_DL(13, "MBIM"), + MHI_EP_CHANNEL_CONFIG_UL(14, "QMI"), + MHI_EP_CHANNEL_CONFIG_DL(15, "QMI"), + MHI_EP_CHANNEL_CONFIG_UL(16, "QMI"), + MHI_EP_CHANNEL_CONFIG_DL(17, "QMI"), + MHI_EP_CHANNEL_CONFIG_UL(18, "IP-CTRL-1"), + MHI_EP_CHANNEL_CONFIG_DL(19, "IP-CTRL-1"), + MHI_EP_CHANNEL_CONFIG_UL(20, "IPCR"), + MHI_EP_CHANNEL_CONFIG_DL(21, "IPCR"), + MHI_EP_CHANNEL_CONFIG_UL(32, "DUN"), + MHI_EP_CHANNEL_CONFIG_DL(33, "DUN"), + MHI_EP_CHANNEL_CONFIG_UL(46, "IP_SW0"), + MHI_EP_CHANNEL_CONFIG_DL(47, "IP_SW0"), +}; + +static const struct mhi_ep_cntrl_config mhi_v1_config = { + .max_channels = 128, + .num_channels = ARRAY_SIZE(mhi_v1_channels), + .ch_cfg = mhi_v1_channels, + .mhi_version = MHI_VERSION_1_0, +}; + +static struct pci_epf_header sdx55_header = { + .vendorid = PCI_VENDOR_ID_QCOM, + .deviceid = 0x0306, + .baseclass_code = PCI_BASE_CLASS_COMMUNICATION, + .subclass_code = PCI_CLASS_COMMUNICATION_MODEM & 0xff, + .interrupt_pin = PCI_INTERRUPT_INTA, +}; + +static const struct pci_epf_mhi_ep_info sdx55_info = { + .config = &mhi_v1_config, + .epf_header = &sdx55_header, + .bar_num = BAR_0, + .epf_flags = PCI_BASE_ADDRESS_MEM_TYPE_32, + .msi_count = 32, + .mru = 0x8000, +}; + +struct pci_epf_mhi { + const struct pci_epf_mhi_ep_info *info; + struct mhi_ep_cntrl mhi_cntrl; + struct pci_epf *epf; + struct mutex lock; + void __iomem *mmio; + resource_size_t mmio_phys; + u32 mmio_size; + int irq; +}; + +static int pci_epf_mhi_alloc_map(struct mhi_ep_cntrl *mhi_cntrl, u64 pci_addr, + phys_addr_t *paddr, void __iomem **vaddr, + size_t size) +{ + struct pci_epf_mhi *epf_mhi = to_epf_mhi(mhi_cntrl); + struct pci_epf *epf = epf_mhi->epf; + struct pci_epc *epc = epf_mhi->epf->epc; + size_t offset = pci_addr & (epc->mem->window.page_size - 1); + void __iomem *__vaddr; + phys_addr_t __paddr; + int ret; + + __vaddr = pci_epc_mem_alloc_addr(epc, &__paddr, size + offset); + if (!__vaddr) + return -ENOMEM; + + ret = pci_epc_map_addr(epc, epf->func_no, epf->vfunc_no, __paddr, + pci_addr - offset, size + offset); + if (ret) { + pci_epc_mem_free_addr(epc, __paddr, __vaddr, size + offset); + + return ret; + } + + *paddr = __paddr + offset; + *vaddr = __vaddr + offset; + + return 0; +} + +static void pci_epf_mhi_unmap_free(struct mhi_ep_cntrl *mhi_cntrl, u64 pci_addr, + phys_addr_t paddr, void __iomem *vaddr, + size_t size) +{ + struct pci_epf_mhi *epf_mhi = to_epf_mhi(mhi_cntrl); + struct pci_epf *epf = epf_mhi->epf; + struct pci_epc *epc = epf->epc; + size_t offset = pci_addr & (epc->mem->window.page_size - 1); + + pci_epc_unmap_addr(epc, epf->func_no, epf->vfunc_no, paddr - offset); + pci_epc_mem_free_addr(epc, paddr - offset, vaddr - offset, + size + offset); +} + +static void pci_epf_mhi_raise_irq(struct mhi_ep_cntrl *mhi_cntrl, u32 vector) +{ + struct pci_epf_mhi *epf_mhi = to_epf_mhi(mhi_cntrl); + struct pci_epf *epf = epf_mhi->epf; + struct pci_epc *epc = epf->epc; + + /* + * MHI supplies 0 based MSI vector but the API expects the vector to be + * 1 based, so we need to increment the vector by 1. + */ + pci_epc_raise_irq(epc, epf->func_no, epf->vfunc_no, PCI_EPC_IRQ_MSI, + vector + 1); +} + +static int pci_epf_mhi_read_from_host(struct mhi_ep_cntrl *mhi_cntrl, u64 from, + void __iomem *to, size_t size) +{ + struct pci_epf_mhi *epf_mhi = to_epf_mhi(mhi_cntrl); + struct pci_epf *epf = epf_mhi->epf; + struct pci_epc *epc = epf_mhi->epf->epc; + void __iomem *tre_buf; + phys_addr_t tre_phys; + size_t offset = from % SZ_4K; + int ret; + + mutex_lock(&epf_mhi->lock); + + tre_buf = pci_epc_mem_alloc_addr(epc, &tre_phys, size + offset); + if (!tre_buf) { + ret = -ENOMEM; + goto err_unlock; + } + + ret = pci_epc_map_addr(epc, epf->func_no, epf->vfunc_no, tre_phys, + from - offset, size + offset); + if (ret) { + pci_epc_mem_free_addr(epc, tre_phys, tre_buf, size + offset); + goto err_unlock; + } + + memcpy_fromio(to, tre_buf + offset, size); + + pci_epc_unmap_addr(epc, epf->func_no, epf->vfunc_no, tre_phys); + pci_epc_mem_free_addr(epc, tre_phys, tre_buf, size + offset); + +err_unlock: + mutex_unlock(&epf_mhi->lock); + + return ret; +} + +static int pci_epf_mhi_write_to_host(struct mhi_ep_cntrl *mhi_cntrl, + void __iomem *from, u64 to, size_t size) +{ + struct pci_epf_mhi *epf_mhi = to_epf_mhi(mhi_cntrl); + struct pci_epf *epf = epf_mhi->epf; + struct pci_epc *epc = epf_mhi->epf->epc; + void __iomem *tre_buf; + phys_addr_t tre_phys; + size_t offset = to % SZ_4K; + int ret; + + mutex_lock(&epf_mhi->lock); + + tre_buf = pci_epc_mem_alloc_addr(epc, &tre_phys, size + offset); + if (!tre_buf) { + ret = -ENOMEM; + goto err_unlock; + } + + ret = pci_epc_map_addr(epc, epf->func_no, epf->vfunc_no, tre_phys, + to - offset, size + offset); + if (ret) { + pci_epc_mem_free_addr(epc, tre_phys, tre_buf, size + offset); + goto err_unlock; + } + + memcpy_toio(tre_buf + offset, from, size); + + pci_epc_unmap_addr(epc, epf->func_no, epf->vfunc_no, tre_phys); + pci_epc_mem_free_addr(epc, tre_phys, tre_buf, size + offset); + +err_unlock: + mutex_unlock(&epf_mhi->lock); + + return ret; +} + +static int pci_epf_mhi_core_init(struct pci_epf *epf) +{ + struct pci_epf_mhi *epf_mhi = epf_get_drvdata(epf); + const struct pci_epf_mhi_ep_info *info = epf_mhi->info; + struct pci_epf_bar *epf_bar = &epf->bar[info->bar_num]; + struct pci_epc *epc = epf->epc; + struct device *dev = &epf->dev; + int ret; + + epf_bar->phys_addr = epf_mhi->mmio_phys; + epf_bar->size = epf_mhi->mmio_size; + epf_bar->barno = info->bar_num; + epf_bar->flags = info->epf_flags; + ret = pci_epc_set_bar(epc, epf->func_no, epf->vfunc_no, epf_bar); + if (ret) { + dev_err(dev, "Failed to set BAR: %d\n", ret); + return ret; + } + + ret = pci_epc_set_msi(epc, epf->func_no, epf->vfunc_no, + order_base_2(info->msi_count)); + if (ret) { + dev_err(dev, "Failed to set MSI configuration: %d\n", ret); + return ret; + } + + ret = pci_epc_write_header(epc, epf->func_no, epf->vfunc_no, + epf->header); + if (ret) { + dev_err(dev, "Failed to set Configuration header: %d\n", ret); + return ret; + } + + return 0; +} + +static int pci_epf_mhi_link_up(struct pci_epf *epf) +{ + struct pci_epf_mhi *epf_mhi = epf_get_drvdata(epf); + const struct pci_epf_mhi_ep_info *info = epf_mhi->info; + struct mhi_ep_cntrl *mhi_cntrl = &epf_mhi->mhi_cntrl; + struct pci_epc *epc = epf->epc; + struct device *dev = &epf->dev; + int ret; + + mhi_cntrl->mmio = epf_mhi->mmio; + mhi_cntrl->irq = epf_mhi->irq; + mhi_cntrl->mru = info->mru; + + /* Assign the struct dev of PCI EP as MHI controller device */ + mhi_cntrl->cntrl_dev = epc->dev.parent; + mhi_cntrl->raise_irq = pci_epf_mhi_raise_irq; + mhi_cntrl->alloc_map = pci_epf_mhi_alloc_map; + mhi_cntrl->unmap_free = pci_epf_mhi_unmap_free; + mhi_cntrl->read_from_host = pci_epf_mhi_read_from_host; + mhi_cntrl->write_to_host = pci_epf_mhi_write_to_host; + + /* Register the MHI EP controller */ + ret = mhi_ep_register_controller(mhi_cntrl, info->config); + if (ret) { + dev_err(dev, "Failed to register MHI EP controller: %d\n", ret); + return ret; + } + + return 0; +} + +static int pci_epf_mhi_link_down(struct pci_epf *epf) +{ + struct pci_epf_mhi *epf_mhi = epf_get_drvdata(epf); + const struct pci_epf_mhi_ep_info *info = epf_mhi->info; + struct mhi_ep_cntrl *mhi_cntrl = &epf_mhi->mhi_cntrl; + + if (mhi_cntrl->mhi_dev) { + mhi_ep_power_down(mhi_cntrl); + mhi_ep_unregister_controller(mhi_cntrl); + } + + return 0; +} + +static int pci_epf_mhi_bme(struct pci_epf *epf) +{ + struct pci_epf_mhi *epf_mhi = epf_get_drvdata(epf); + const struct pci_epf_mhi_ep_info *info = epf_mhi->info; + struct mhi_ep_cntrl *mhi_cntrl = &epf_mhi->mhi_cntrl; + struct device *dev = &epf->dev; + int ret; + + /* + * Power up the MHI EP stack if link is up and stack is in power down + * state. + */ + if (!mhi_cntrl->enabled && mhi_cntrl->mhi_dev) { + ret = mhi_ep_power_up(mhi_cntrl); + if (ret) { + dev_err(dev, "Failed to power up MHI EP: %d\n", ret); + mhi_ep_unregister_controller(mhi_cntrl); + } + } + + return 0; +} + +static int pci_epf_mhi_bind(struct pci_epf *epf) +{ + struct pci_epf_mhi *epf_mhi = epf_get_drvdata(epf); + struct pci_epc *epc = epf->epc; + struct platform_device *pdev = to_platform_device(epc->dev.parent); + struct device *dev = &epf->dev; + struct resource *res; + int ret; + + if (WARN_ON_ONCE(!epc)) + return -EINVAL; + + /* Get MMIO base address from Endpoint controller */ + res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "mmio"); + epf_mhi->mmio_phys = res->start; + epf_mhi->mmio_size = resource_size(res); + + epf_mhi->mmio = ioremap(epf_mhi->mmio_phys, epf_mhi->mmio_size); + if (IS_ERR(epf_mhi->mmio)) + return PTR_ERR(epf_mhi->mmio); + + ret = platform_get_irq_byname(pdev, "doorbell"); + if (ret < 0) { + dev_err(dev, "Failed to get Doorbell IRQ\n"); + iounmap(epf_mhi->mmio); + return ret; + } + + epf_mhi->irq = ret; + + return 0; +} + +static void pci_epf_mhi_unbind(struct pci_epf *epf) +{ + struct pci_epf_mhi *epf_mhi = epf_get_drvdata(epf); + const struct pci_epf_mhi_ep_info *info = epf_mhi->info; + struct pci_epf_bar *epf_bar = &epf->bar[info->bar_num]; + struct mhi_ep_cntrl *mhi_cntrl = &epf_mhi->mhi_cntrl; + struct pci_epc *epc = epf->epc; + + /* + * Forcefully power down the MHI EP stack. Only way to bring the MHI EP + * stack back to working state after successive bind is by getting BME + * from host. + */ + if (mhi_cntrl->mhi_dev) { + mhi_ep_power_down(mhi_cntrl); + mhi_ep_unregister_controller(mhi_cntrl); + } + + iounmap(epf_mhi->mmio); + pci_epc_clear_bar(epc, epf->func_no, epf->vfunc_no, epf_bar); +} + +static struct pci_epc_event_ops pci_epf_mhi_event_ops = { + .core_init = pci_epf_mhi_core_init, + .link_up = pci_epf_mhi_link_up, + .link_down = pci_epf_mhi_link_down, + .bme = pci_epf_mhi_bme, +}; + +static int pci_epf_mhi_probe(struct pci_epf *epf, + const struct pci_epf_device_id *id) +{ + struct pci_epf_mhi_ep_info *info = + (struct pci_epf_mhi_ep_info *)id->driver_data; + struct pci_epf_mhi *epf_mhi; + struct device *dev = &epf->dev; + + epf_mhi = devm_kzalloc(dev, sizeof(*epf_mhi), GFP_KERNEL); + if (!epf_mhi) + return -ENOMEM; + + epf->header = info->epf_header; + epf_mhi->info = info; + epf_mhi->epf = epf; + + epf->event_ops = &pci_epf_mhi_event_ops; + + mutex_init(&epf_mhi->lock); + + epf_set_drvdata(epf, epf_mhi); + + return 0; +} + +static const struct pci_epf_device_id pci_epf_mhi_ids[] = { + { + .name = "sdx55", .driver_data = (kernel_ulong_t)&sdx55_info, + }, + {}, +}; + +static struct pci_epf_ops pci_epf_mhi_ops = { + .unbind = pci_epf_mhi_unbind, + .bind = pci_epf_mhi_bind, +}; + +static struct pci_epf_driver pci_epf_mhi_driver = { + .driver.name = "pci_epf_mhi", + .probe = pci_epf_mhi_probe, + .id_table = pci_epf_mhi_ids, + .ops = &pci_epf_mhi_ops, + .owner = THIS_MODULE, +}; + +static int __init pci_epf_mhi_init(void) +{ + return pci_epf_register_driver(&pci_epf_mhi_driver); +} +module_init(pci_epf_mhi_init); + +static void __exit pci_epf_mhi_exit(void) +{ + pci_epf_unregister_driver(&pci_epf_mhi_driver); +} +module_exit(pci_epf_mhi_exit); + +MODULE_DESCRIPTION("PCI EPF driver for MHI Endpoint devices"); +MODULE_AUTHOR("Manivannan Sadhasivam "); +MODULE_LICENSE("GPL");