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[83.9.29.77]) by smtp.gmail.com with ESMTPSA id f4-20020a2e9184000000b002adbe01cd69sm3217446ljg.9.2023.05.31.02.01.28 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 31 May 2023 02:01:29 -0700 (PDT) From: Konrad Dybcio Date: Wed, 31 May 2023 11:01:20 +0200 Subject: [PATCH 1/4] arm64: dts: qcom: msm8998: Properly describe MMSS SMMU MIME-Version: 1.0 Message-Id: <20230531-topic-8998_mmssclk-v1-1-2b5a8fc90991@linaro.org> References: <20230531-topic-8998_mmssclk-v1-0-2b5a8fc90991@linaro.org> In-Reply-To: <20230531-topic-8998_mmssclk-v1-0-2b5a8fc90991@linaro.org> To: Andy Gross , Bjorn Andersson , Rob Herring , Krzysztof Kozlowski , Conor Dooley , AngeloGioacchino Del Regno , Michael Turquette , Stephen Boyd , Jeffrey Hugo , Imran Khan , Rajendra Nayak , Joonwoo Park , Jeffrey Hugo Cc: Marijn Suijten , Dmitry Baryshkov , Jami Kettunen , linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-clk@vger.kernel.org, Konrad Dybcio X-Mailer: b4 0.12.2 X-Developer-Signature: v=1; a=ed25519-sha256; t=1685523686; l=1326; i=konrad.dybcio@linaro.org; s=20230215; h=from:subject:message-id; bh=i0NwJMAAnRECp+k7KcPhWAOJXSM4/4ftIM+77PjbY6U=; b=BGyufNvhaW0pxT12xw1LjSk1u+kvz6rfQ1SRXNhMYH3mgey6Icz+rTWlHdTqfAz2wnjT6t3Md MZ5/Y3eyck+A2AoAIcZW/PS3Wr7F3rDncrHYuSykoAPO3FHLjrNNxYF X-Developer-Key: i=konrad.dybcio@linaro.org; a=ed25519; pk=iclgkYvtl2w05SSXO5EjjSYlhFKsJ+5OSZBjOkQuEms= X-Spam-Status: No, score=-2.1 required=5.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,RCVD_IN_DNSWL_NONE, SPF_HELO_NONE,SPF_PASS,T_SCC_BODY_TEXT_LINE,URIBL_BLOCKED autolearn=unavailable autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-getmail-retrieved-from-mailbox: =?utf-8?q?INBOX?= X-GMAIL-THRID: =?utf-8?q?1767400833301086175?= X-GMAIL-MSGID: =?utf-8?q?1767400833301086175?= The MMSS SMMU has been abusingly consuming the exposed RPM interconnect clock and not describing the power domain it needs. Put an end to that. Fixes: 05ce21b54423 ("arm64: dts: qcom: msm8998: Configure the multimedia subsystem iommu") Signed-off-by: Konrad Dybcio --- arch/arm64/boot/dts/qcom/msm8998.dtsi | 8 +++++--- 1 file changed, 5 insertions(+), 3 deletions(-) diff --git a/arch/arm64/boot/dts/qcom/msm8998.dtsi b/arch/arm64/boot/dts/qcom/msm8998.dtsi index f0e943ff0046..a4016085b750 100644 --- a/arch/arm64/boot/dts/qcom/msm8998.dtsi +++ b/arch/arm64/boot/dts/qcom/msm8998.dtsi @@ -2737,10 +2737,10 @@ mmss_smmu: iommu@cd00000 { clocks = <&mmcc MNOC_AHB_CLK>, <&mmcc BIMC_SMMU_AHB_CLK>, - <&rpmcc RPM_SMD_MMAXI_CLK>, <&mmcc BIMC_SMMU_AXI_CLK>; - clock-names = "iface-mm", "iface-smmu", - "bus-mm", "bus-smmu"; + clock-names = "iface-mm", + "iface-smmu", + "bus-smmu"; #global-interrupts = <0>; interrupts = @@ -2764,6 +2764,8 @@ mmss_smmu: iommu@cd00000 { , , ; + + power-domains = <&mmcc BIMC_SMMU_GDSC>; }; remoteproc_adsp: remoteproc@17300000 { From patchwork Wed May 31 09:01:21 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Konrad Dybcio X-Patchwork-Id: 101285 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a59:994d:0:b0:3d9:f83d:47d9 with SMTP id k13csp2736121vqr; Wed, 31 May 2023 02:09:15 -0700 (PDT) X-Google-Smtp-Source: ACHHUZ48ZIivV3Jiitup2flQIe1wiX5IOeebkjIGTzS9VshpUji+tR89tYitOTOj/17YJ7xwRknB X-Received: by 2002:a05:6a20:e486:b0:10b:cdb1:3563 with SMTP id ni6-20020a056a20e48600b0010bcdb13563mr4885481pzb.46.1685524154963; Wed, 31 May 2023 02:09:14 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1685524154; cv=none; d=google.com; s=arc-20160816; b=W1N39j4c+jN4G3oyW8tsQu+5U+8HtZTJf7zzEAWIyJf86E5Yth6nJloJzIJv6YTuAS OmZaD2vXS41PqGNQi9ytxMy3M0vvX4E0LpzBbHWjRM8bDp/eJQ6E+eyhP3l1QXYVQ4Sw rIHAdDhtAuioeZud1dAetxneDebZTlO4N0bqQq0Xt2UiytYbMRiRz9k/HvgZgvo1tMa1 SK8f7FU2gzYNC2j3RKMIm7QM/ywHK4wDCVTr5DxMVEL1iw1L1+Y3trFSsLxdwcxbboJj GVI4x7RPEzjU7wUdwFUMWbn7jJ759kiDkCjg7XB7crwRh+gGzpRZKjs1+A9hsvmGyFb4 du7A== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:cc:to:in-reply-to:references:message-id :content-transfer-encoding:mime-version:subject:date:from :dkim-signature; bh=Yzn4m2H/FTJRfB6bL/ET9uNQCruK8cNknsLXsMEBu2E=; b=FxIYDufVM98mZas+rJVo0gW36kwZ9hjZs+0GL573Y1uOWjj6TW7VWXm/czx+qGM8SS hmdzPhEmkrgkUaP//3dVdj4Aml4Wh1VaEqlL7z8N2icNJYP7Rm28hXtu3mawAyxStXA1 9X0FfkIIzlB4h44vPvI9s6ct6HsxoKXUNPL20qFnzkM42NHgzm/u6NQFWkUJ9M59w2Ph RJhSWZAbC5EoeURWpUwXZLufnCiXNclOzr5QijOWKCdKCNNXElfyK8kOqRJeer7fwgpp V/ulvFwnb5+cO+u0cd6LWhdHPwILr+n5DEuB2gNw79XZp05bVXzuiwdfVtFrIRSst78I ZjOw== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b="ROrn/OQ8"; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: from out1.vger.email (out1.vger.email. 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[83.9.29.77]) by smtp.gmail.com with ESMTPSA id f4-20020a2e9184000000b002adbe01cd69sm3217446ljg.9.2023.05.31.02.01.29 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 31 May 2023 02:01:30 -0700 (PDT) From: Konrad Dybcio Date: Wed, 31 May 2023 11:01:21 +0200 Subject: [PATCH 2/4] clk: qcom: gcc-msm8998: Don't check halt bit on some branch clks MIME-Version: 1.0 Message-Id: <20230531-topic-8998_mmssclk-v1-2-2b5a8fc90991@linaro.org> References: <20230531-topic-8998_mmssclk-v1-0-2b5a8fc90991@linaro.org> In-Reply-To: <20230531-topic-8998_mmssclk-v1-0-2b5a8fc90991@linaro.org> To: Andy Gross , Bjorn Andersson , Rob Herring , Krzysztof Kozlowski , Conor Dooley , AngeloGioacchino Del Regno , Michael Turquette , Stephen Boyd , Jeffrey Hugo , Imran Khan , Rajendra Nayak , Joonwoo Park , Jeffrey Hugo Cc: Marijn Suijten , Dmitry Baryshkov , Jami Kettunen , linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-clk@vger.kernel.org, Konrad Dybcio X-Mailer: b4 0.12.2 X-Developer-Signature: v=1; a=ed25519-sha256; t=1685523686; l=1575; i=konrad.dybcio@linaro.org; s=20230215; h=from:subject:message-id; bh=3hJNNh4/9lwYUqpHcPuPz2a/mPNaOro7+/PxaHyFiI4=; b=D1cKQbxl6Xtd1J+LgAXmgHxu0Ctd1287EHb5ahT81jhB+8oir0bvlwKU/9Yd7q9zlcE9kYHd7 LbEi/VMCfCUA4ssNg9vYIWFjz1hEtBchnbksdUULcaB26XqQFz2Sv07 X-Developer-Key: i=konrad.dybcio@linaro.org; a=ed25519; pk=iclgkYvtl2w05SSXO5EjjSYlhFKsJ+5OSZBjOkQuEms= X-Spam-Status: No, score=-2.1 required=5.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,RCVD_IN_DNSWL_NONE, SPF_HELO_NONE,SPF_PASS,T_SCC_BODY_TEXT_LINE,URIBL_BLOCKED autolearn=unavailable autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-getmail-retrieved-from-mailbox: =?utf-8?q?INBOX?= X-GMAIL-THRID: =?utf-8?q?1767400176579533453?= X-GMAIL-MSGID: =?utf-8?q?1767400176579533453?= Some branch clocks are governed externally and we're only supposed to send a request concerning their shutdown, not actually ensure it happens. Use the BRANCH_HALT_SKIP define to skip checking the halt bit. Fixes: db2c7c0a04b1 ("clk: qcom: Add missing msm8998 gcc_bimc_gfx_clk") Fixes: b5f5f525c547 ("clk: qcom: Add MSM8998 Global Clock Control (GCC) driver") Signed-off-by: Konrad Dybcio Reviewed-by: Jeffrey Hugo --- drivers/clk/qcom/gcc-msm8998.c | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) diff --git a/drivers/clk/qcom/gcc-msm8998.c b/drivers/clk/qcom/gcc-msm8998.c index be024f8093c5..c343bdfc3cc1 100644 --- a/drivers/clk/qcom/gcc-msm8998.c +++ b/drivers/clk/qcom/gcc-msm8998.c @@ -2061,7 +2061,7 @@ static struct clk_branch gcc_gp3_clk = { static struct clk_branch gcc_bimc_gfx_clk = { .halt_reg = 0x46040, - .halt_check = BRANCH_HALT, + .halt_check = BRANCH_HALT_SKIP, .clkr = { .enable_reg = 0x46040, .enable_mask = BIT(0), @@ -2074,7 +2074,7 @@ static struct clk_branch gcc_bimc_gfx_clk = { static struct clk_branch gcc_gpu_bimc_gfx_clk = { .halt_reg = 0x71010, - .halt_check = BRANCH_HALT, + .halt_check = BRANCH_HALT_SKIP, .clkr = { .enable_reg = 0x71010, .enable_mask = BIT(0), @@ -2100,7 +2100,7 @@ static struct clk_branch gcc_gpu_bimc_gfx_src_clk = { static struct clk_branch gcc_gpu_cfg_ahb_clk = { .halt_reg = 0x71004, - .halt_check = BRANCH_HALT, + .halt_check = BRANCH_HALT_SKIP, .clkr = { .enable_reg = 0x71004, .enable_mask = BIT(0), From patchwork Wed May 31 09:01:22 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Konrad Dybcio X-Patchwork-Id: 101283 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a59:994d:0:b0:3d9:f83d:47d9 with SMTP id k13csp2735497vqr; Wed, 31 May 2023 02:07:59 -0700 (PDT) X-Google-Smtp-Source: ACHHUZ7xp/r82gehhABGkkRV9h0wdZm66/6QrP66YsHOtjMLS0R6UQ2DsH6N7jto+cfc/T1z512p X-Received: by 2002:a17:90a:e64d:b0:246:5968:43f0 with SMTP id ep13-20020a17090ae64d00b00246596843f0mr4213937pjb.10.1685524078924; Wed, 31 May 2023 02:07:58 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1685524078; cv=none; d=google.com; s=arc-20160816; b=0W0lQUBD8YQ+t4nbbloS680LCiUUj7Jsq8WifEEg8Ba4R7YJttV5cVveFx+9gKQwuw pEMS+oechwgrCnUfwO7jPi8tRhK0ESWFaxVvbGpc0nysPLcNUkDNGJIvZMPeNNCtKFlP ny5zEQ2czrMZRL7skGZdbygD/IGGbU5UD1Z5SEWRsMCjyLhRmqDphJFGd5BwTCTDfQIw TQzFQIWl9dYK4tbgg5i85KthvZ+bo60MdIOpEkL+w+9lgeCe3P6lbzPUIpF9D2fOfXzA CSFVqdHBCeGOUqXihHcfYPPG+M6ileJBw0JSM+bWELhf5PWhkIa7NOmZsmNexzJIl032 ItmQ== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:cc:to:in-reply-to:references:message-id :content-transfer-encoding:mime-version:subject:date:from :dkim-signature; bh=7aNVVNs8eqPTnK0Wd32QsSw3ccebDUPM7FkJjTlItZ0=; b=oMTm5zGGCx4fAX9Iw5DKFyOGSymWuqlnbIW4UnB9vaahcqGMPOpqzMS9WsHJrnifCr YdvCuQrFtF3nfbfXD8gnbMPrq8KZChE8npI2KwJXXH4Sd2B10BlD1x7schRaoI21hkp9 yQK8UeCoFij3UxuM1zIjCklbjDSK+TZu/cnnNHcTdGuqswLDcueOrs5BU05tuhYTh0sz q+Knr8i7u8VpOgp+5Z6gZlKZo4i8JSrc3S1QufwZE050tKaRGC2XUdjBjcrBiCusA3wM WIHSqhU2S8AgUj3tBWUBrsebVLDAcHmaJ7rOOO9WMQCrf0CgBnT5stJ/3KvfrU0uxM+R pz2g== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=DFpSVbtQ; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: from out1.vger.email (out1.vger.email. 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[83.9.29.77]) by smtp.gmail.com with ESMTPSA id f4-20020a2e9184000000b002adbe01cd69sm3217446ljg.9.2023.05.31.02.01.30 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 31 May 2023 02:01:32 -0700 (PDT) From: Konrad Dybcio Date: Wed, 31 May 2023 11:01:22 +0200 Subject: [PATCH 3/4] clk: qcom: mmcc-msm8998: Don't check halt bit on some branch clks MIME-Version: 1.0 Message-Id: <20230531-topic-8998_mmssclk-v1-3-2b5a8fc90991@linaro.org> References: <20230531-topic-8998_mmssclk-v1-0-2b5a8fc90991@linaro.org> In-Reply-To: <20230531-topic-8998_mmssclk-v1-0-2b5a8fc90991@linaro.org> To: Andy Gross , Bjorn Andersson , Rob Herring , Krzysztof Kozlowski , Conor Dooley , AngeloGioacchino Del Regno , Michael Turquette , Stephen Boyd , Jeffrey Hugo , Imran Khan , Rajendra Nayak , Joonwoo Park , Jeffrey Hugo Cc: Marijn Suijten , Dmitry Baryshkov , Jami Kettunen , linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-clk@vger.kernel.org, Konrad Dybcio X-Mailer: b4 0.12.2 X-Developer-Signature: v=1; a=ed25519-sha256; t=1685523686; l=1355; i=konrad.dybcio@linaro.org; s=20230215; h=from:subject:message-id; bh=bXqrPCtrvBWn269gLXl5t9pRQrXP7UP5yO8wMS9RYTM=; b=25wVDjm0aFKb9J+/7hjzG1PYk8SUins5HpBOIMcmo9kgItzdowE+W0TmGB+9j6TP2q68ZYpA9 hSNCtDfJkB2DBdHtrip8T/GzVMUqVT6C5BxHs3AWbECJ60y0iYexcZc X-Developer-Key: i=konrad.dybcio@linaro.org; a=ed25519; pk=iclgkYvtl2w05SSXO5EjjSYlhFKsJ+5OSZBjOkQuEms= X-Spam-Status: No, score=-2.1 required=5.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,RCVD_IN_DNSWL_NONE, SPF_HELO_NONE,SPF_PASS,T_SCC_BODY_TEXT_LINE,URIBL_BLOCKED autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-getmail-retrieved-from-mailbox: =?utf-8?q?INBOX?= X-GMAIL-THRID: =?utf-8?q?1767400096688172696?= X-GMAIL-MSGID: =?utf-8?q?1767400096688172696?= Some branch clocks are governed externally and we're only supposed to send a request concerning their shutdown, not actually ensure it happens. Use the BRANCH_HALT_SKIP define to skip checking the halt bit. Fixes: d14b15b5931c ("clk: qcom: Add MSM8998 Multimedia Clock Controller (MMCC) driver") Signed-off-by: Konrad Dybcio Reviewed-by: Jeffrey Hugo --- drivers/clk/qcom/mmcc-msm8998.c | 3 +++ 1 file changed, 3 insertions(+) diff --git a/drivers/clk/qcom/mmcc-msm8998.c b/drivers/clk/qcom/mmcc-msm8998.c index 4490594bde69..9b98e0fb8b91 100644 --- a/drivers/clk/qcom/mmcc-msm8998.c +++ b/drivers/clk/qcom/mmcc-msm8998.c @@ -2453,6 +2453,7 @@ static struct clk_branch fd_ahb_clk = { static struct clk_branch mnoc_ahb_clk = { .halt_reg = 0x5024, + .halt_check = BRANCH_HALT_SKIP, .clkr = { .enable_reg = 0x5024, .enable_mask = BIT(0), @@ -2468,6 +2469,7 @@ static struct clk_branch mnoc_ahb_clk = { static struct clk_branch bimc_smmu_ahb_clk = { .halt_reg = 0xe004, + .halt_check = BRANCH_HALT_SKIP, .hwcg_reg = 0xe004, .hwcg_bit = 1, .clkr = { @@ -2485,6 +2487,7 @@ static struct clk_branch bimc_smmu_ahb_clk = { static struct clk_branch bimc_smmu_axi_clk = { .halt_reg = 0xe008, + .halt_check = BRANCH_HALT_SKIP, .hwcg_reg = 0xe008, .hwcg_bit = 1, .clkr = { From patchwork Wed May 31 09:01:23 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Konrad Dybcio X-Patchwork-Id: 101282 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a59:994d:0:b0:3d9:f83d:47d9 with SMTP id k13csp2734409vqr; Wed, 31 May 2023 02:05:45 -0700 (PDT) X-Google-Smtp-Source: ACHHUZ5TkCYELccPqSql68oMBXmZsZUBkD18Pq3LbSuL5zj/5oJheeHmg19S1PHt87Bb5oo4daPL X-Received: by 2002:a05:6358:a083:b0:127:9d90:a1 with SMTP id u3-20020a056358a08300b001279d9000a1mr1491816rwn.16.1685523944426; Wed, 31 May 2023 02:05:44 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1685523944; cv=none; d=google.com; s=arc-20160816; b=W2ctW0+TolBx1sXDD0dEiABnlV6Eqts+h50zo5KBJ3YiNs9MTwEq7218Nh13oFe+9W fWBCqVQABj4oH/Y0D4Yc+loWPQsfr/GbntW0F62XkJByhvG7Uwz4ZdjTblT7jNbe5brg 8j7xRybT4l0ayEZd8/AtDH+/BA9sTUaKnAZwmD6DDI3LElZSQo2SphEqwWpE8wmfYw07 JVu/v8n4T7yue1T5wH2xM+qXvNrO4dfEyDNKAAzDZGR/yeu7+B3Tx88SMFtnrdN+8HhQ IVXZsnJA5UiY6WX6SBqlPpCfL7l3FFqkKiDP30a3g0xPFmOrZ5XXuPTeNMbnO2BT5joU hfdw== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:cc:to:in-reply-to:references:message-id :content-transfer-encoding:mime-version:subject:date:from :dkim-signature; bh=TRDkbjMTdDqIX5txCgAI4qwPmqTuC0wBW6Dd+QET4Vg=; b=SFj3frP4M0kcRWMpsJ21i9iCl6oAMFsrSRoYzBihuI1G/KhKA2enZTXtmxOzSm2H/J 3OvjQpAwBgavHx1FOgsSFriNgvzLe7H7mwKtMxrVV0bcV6PirM8xUc1BaeplkWIlL2/p wc0pyUDB2DAuWvHyBYQdiHLK4qYMc918KVc7r0Li/nQDVW7HSfO5z9oXGo752LVBwZat iVNrPtkAQfDpVqQcNCkf9VG/YDxRgkUVsZUjSQXwU2Xluyr9djqLucbfgHqIgI1QThbp gb6+ZzGb+RzG1vOPh7mxhgDzPSMNGd0VDpVNXLqODsQWvDI+Jl4UUuAHM52648aSwuzR nWRA== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=aJfxubRX; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: from out1.vger.email (out1.vger.email. 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[83.9.29.77]) by smtp.gmail.com with ESMTPSA id f4-20020a2e9184000000b002adbe01cd69sm3217446ljg.9.2023.05.31.02.01.33 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 31 May 2023 02:01:34 -0700 (PDT) From: Konrad Dybcio Date: Wed, 31 May 2023 11:01:23 +0200 Subject: [PATCH 4/4] clk: qcom: mmcc-msm8998: Fix the SMMU GDSC MIME-Version: 1.0 Message-Id: <20230531-topic-8998_mmssclk-v1-4-2b5a8fc90991@linaro.org> References: <20230531-topic-8998_mmssclk-v1-0-2b5a8fc90991@linaro.org> In-Reply-To: <20230531-topic-8998_mmssclk-v1-0-2b5a8fc90991@linaro.org> To: Andy Gross , Bjorn Andersson , Rob Herring , Krzysztof Kozlowski , Conor Dooley , AngeloGioacchino Del Regno , Michael Turquette , Stephen Boyd , Jeffrey Hugo , Imran Khan , Rajendra Nayak , Joonwoo Park , Jeffrey Hugo Cc: Marijn Suijten , Dmitry Baryshkov , Jami Kettunen , linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-clk@vger.kernel.org, Konrad Dybcio X-Mailer: b4 0.12.2 X-Developer-Signature: v=1; a=ed25519-sha256; t=1685523686; l=1105; i=konrad.dybcio@linaro.org; s=20230215; h=from:subject:message-id; bh=U11cPNBCetgr5hd+fDIKoJDD5fDRdvw6Gnlma9DUXKU=; b=N3+OLnogrIsl+g8OU9USSSHaW3r6dF+xQp++9Sdi5dDUtVtkR4Fsz0TOp+XZXk2eA25+y0lcX zb4+VCa6xi+BhsZqQAlHww+t/C/O0XsXx8tNBBbragw5+aSpME8EHtT X-Developer-Key: i=konrad.dybcio@linaro.org; a=ed25519; pk=iclgkYvtl2w05SSXO5EjjSYlhFKsJ+5OSZBjOkQuEms= X-Spam-Status: No, score=-2.1 required=5.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,RCVD_IN_DNSWL_NONE, SPF_HELO_NONE,SPF_PASS,T_SCC_BODY_TEXT_LINE,URIBL_BLOCKED autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-getmail-retrieved-from-mailbox: =?utf-8?q?INBOX?= X-GMAIL-THRID: =?utf-8?q?1767399955127995798?= X-GMAIL-MSGID: =?utf-8?q?1767399955127995798?= The SMMU GDSC doesn't have to be ALWAYS-ON and shouldn't feature the HW_CTRL flag (it's separate from hw_ctrl_addr). In addition to that, it should feature a cxc entry for bimc_smmu_axi_clk and be marked as votable. Fix all of these issues. Fixes: d14b15b5931c ("clk: qcom: Add MSM8998 Multimedia Clock Controller (MMCC) driver") Signed-off-by: Konrad Dybcio --- drivers/clk/qcom/mmcc-msm8998.c | 4 +++- 1 file changed, 3 insertions(+), 1 deletion(-) diff --git a/drivers/clk/qcom/mmcc-msm8998.c b/drivers/clk/qcom/mmcc-msm8998.c index 9b98e0fb8b91..7b1d105afbd8 100644 --- a/drivers/clk/qcom/mmcc-msm8998.c +++ b/drivers/clk/qcom/mmcc-msm8998.c @@ -2628,11 +2628,13 @@ static struct gdsc camss_cpp_gdsc = { static struct gdsc bimc_smmu_gdsc = { .gdscr = 0xe020, .gds_hw_ctrl = 0xe024, + .cxcs = (unsigned int []){ 0xe008 }, + .cxc_count = 1, .pd = { .name = "bimc_smmu", }, .pwrsts = PWRSTS_OFF_ON, - .flags = HW_CTRL | ALWAYS_ON, + .flags = VOTABLE, }; static struct clk_regmap *mmcc_msm8998_clocks[] = {