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[2620:137:e000::1:20]) by mx.google.com with ESMTP id h5-20020a17090a3d0500b0024e12dc1e4csi7968740pjc.86.2023.05.30.15.52.04; Tue, 30 May 2023 15:52:17 -0700 (PDT) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) client-ip=2620:137:e000::1:20; Authentication-Results: mx.google.com; dkim=pass header.i=@ti.com header.s=ti-com-17Q1 header.b=tTURIePU; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=QUARANTINE sp=NONE dis=NONE) header.from=ti.com Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S231537AbjE3WtC (ORCPT + 99 others); Tue, 30 May 2023 18:49:02 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:56482 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S230256AbjE3Wsu (ORCPT ); Tue, 30 May 2023 18:48:50 -0400 Received: from fllv0016.ext.ti.com (fllv0016.ext.ti.com [198.47.19.142]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id F2E92EC; Tue, 30 May 2023 15:48:47 -0700 (PDT) Received: from fllv0034.itg.ti.com ([10.64.40.246]) by fllv0016.ext.ti.com (8.15.2/8.15.2) with ESMTP id 34UMmLwD002590; Tue, 30 May 2023 17:48:21 -0500 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ti.com; s=ti-com-17Q1; t=1685486901; bh=lRjzC1PXGwTxRNrfRpHXIWdTM8CL+XACgMhEM8GBJrQ=; h=From:To:CC:Subject:Date:In-Reply-To:References; b=tTURIePUlPnCFNySKF9H/lJizOlYT8OwW7ENuwmdLqw+W/PGlDzr0mQw9PcQPMiRO pkJBoHmqwSEPn8TQk1g1E1t/5kYWs1fTkpEupQtq7CSPR5/3XQTh5oLUA4TKavvPVV vl8AVeXjFrRMAeo6QIyiuFfnDWDMJRNIE+KTbax0= Received: from DLEE107.ent.ti.com (dlee107.ent.ti.com [157.170.170.37]) by fllv0034.itg.ti.com (8.15.2/8.15.2) with ESMTPS id 34UMmL8B036335 (version=TLSv1.2 cipher=AES256-GCM-SHA384 bits=256 verify=FAIL); Tue, 30 May 2023 17:48:21 -0500 Received: from DLEE100.ent.ti.com (157.170.170.30) by DLEE107.ent.ti.com (157.170.170.37) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.2507.23; Tue, 30 May 2023 17:48:20 -0500 Received: from fllv0039.itg.ti.com (10.64.41.19) by DLEE100.ent.ti.com (157.170.170.30) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.2507.23 via Frontend Transport; Tue, 30 May 2023 17:48:20 -0500 Received: from uda0498204.dhcp.ti.com (ileaxei01-snat.itg.ti.com [10.180.69.5]) by fllv0039.itg.ti.com (8.15.2/8.15.2) with ESMTP id 34UMmKxW112899; Tue, 30 May 2023 17:48:20 -0500 From: Judith Mendez To: Chandrasekar Ramakrishnan , CC: Wolfgang Grandegger , Marc Kleine-Budde , "David S . Miller" , Eric Dumazet , Jakub Kicinski , Paolo Abeni , , , Schuyler Patton , Tero Kristo , Rob Herring , Krzysztof Kozlowski , , Oliver Hartkopp , Simon Horman , Conor Dooley , Tony Lindgren Subject: [PATCH v8 1/2] dt-bindings: net: can: Remove interrupt properties for MCAN Date: Tue, 30 May 2023 17:48:19 -0500 Message-ID: <20230530224820.303619-2-jm@ti.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20230530224820.303619-1-jm@ti.com> References: <20230530224820.303619-1-jm@ti.com> MIME-Version: 1.0 X-EXCLAIMER-MD-CONFIG: e1e8a2fd-e40a-4ac6-ac9b-f7e9cc9ee180 X-Spam-Status: No, score=-4.6 required=5.0 tests=BAYES_00,DKIMWL_WL_HIGH, DKIM_SIGNED,DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,RCVD_IN_DNSWL_MED, SPF_HELO_PASS,SPF_PASS,T_SCC_BODY_TEXT_LINE,URIBL_BLOCKED autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-getmail-retrieved-from-mailbox: =?utf-8?q?INBOX?= X-GMAIL-THRID: =?utf-8?q?1767361361200324919?= X-GMAIL-MSGID: =?utf-8?q?1767361361200324919?= On AM62x SoC, MCANs on MCU domain do not have hardware interrupt routed to A53 Linux, instead they will use software interrupt by timer polling. To enable timer polling method, interrupts should be optional so remove interrupts property from required section and add an example for MCAN node with timer polling enabled. Reviewed-by: Conor Dooley Acked-by: Krzysztof Kozlowski Signed-off-by: Judith Mendez Reviewed-by: Tony Lindgren --- Changelog: v8: 1. No changes v7: 1. No changes v6: 1. No changes v5: 1. Remove poll-interval 2. Remove oneOf that selects interrupts/interrupt-names or poll-interval v3: 1. Update binding poll-interval description 2. Add oneOf to select interrupts/interrupt-names or poll-interval v2: 1. Add poll-interval property to enable timer polling method 2. Add example using poll-interval property --- .../bindings/net/can/bosch,m_can.yaml | 20 +++++++++++++++++-- 1 file changed, 18 insertions(+), 2 deletions(-) diff --git a/Documentation/devicetree/bindings/net/can/bosch,m_can.yaml b/Documentation/devicetree/bindings/net/can/bosch,m_can.yaml index 67879aab623b..bb518c831f7b 100644 --- a/Documentation/devicetree/bindings/net/can/bosch,m_can.yaml +++ b/Documentation/devicetree/bindings/net/can/bosch,m_can.yaml @@ -122,8 +122,6 @@ required: - compatible - reg - reg-names - - interrupts - - interrupt-names - clocks - clock-names - bosch,mram-cfg @@ -132,6 +130,7 @@ additionalProperties: false examples: - | + // Example with interrupts #include can@20e8000 { compatible = "bosch,m_can"; @@ -149,4 +148,21 @@ examples: }; }; + - | + // Example with timer polling + #include + can@20e8000 { + compatible = "bosch,m_can"; + reg = <0x020e8000 0x4000>, <0x02298000 0x4000>; + reg-names = "m_can", "message_ram"; + clocks = <&clks IMX6SX_CLK_CANFD>, + <&clks IMX6SX_CLK_CANFD>; + clock-names = "hclk", "cclk"; + bosch,mram-cfg = <0x0 0 0 32 0 0 0 1>; + + can-transceiver { + max-bitrate = <5000000>; + }; + }; + ... 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Miller" , Eric Dumazet , Jakub Kicinski , Paolo Abeni , , , Schuyler Patton , Tero Kristo , Rob Herring , Krzysztof Kozlowski , , Oliver Hartkopp , Simon Horman , Conor Dooley , Tony Lindgren Subject: [PATCH v8 2/2] can: m_can: Add hrtimer to generate software interrupt Date: Tue, 30 May 2023 17:48:20 -0500 Message-ID: <20230530224820.303619-3-jm@ti.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20230530224820.303619-1-jm@ti.com> References: <20230530224820.303619-1-jm@ti.com> MIME-Version: 1.0 X-EXCLAIMER-MD-CONFIG: e1e8a2fd-e40a-4ac6-ac9b-f7e9cc9ee180 X-Spam-Status: No, score=-4.6 required=5.0 tests=BAYES_00,DKIMWL_WL_HIGH, DKIM_SIGNED,DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,RCVD_IN_DNSWL_MED, SPF_HELO_PASS,SPF_PASS,T_SCC_BODY_TEXT_LINE,URIBL_BLOCKED autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-getmail-retrieved-from-mailbox: =?utf-8?q?INBOX?= X-GMAIL-THRID: =?utf-8?q?1767361356827609212?= X-GMAIL-MSGID: =?utf-8?q?1767361356827609212?= Introduce timer polling method to MCAN since some SoCs may not have M_CAN interrupt routed to A53 Linux and do not have interrupt property in device tree M_CAN node. On AM62x SoC, MCANs on MCU domain do not have hardware interrupt routed to A53 Linux, instead they will use timer polling method. Add an hrtimer to MCAN class device. Each MCAN will have its own hrtimer instantiated if there is no hardware interrupt found in device tree M_CAN node. The timer will generate a software interrupt every 1 ms. In hrtimer callback, we check if there is a transaction pending by reading a register, then process by calling the isr if there is. Signed-off-by: Judith Mendez Reviewed-by: Tony Lindgren Tested-by: Hiago De Franco # Toradex Verdin AM62 --- Changelog: v8: - Cancel hrtimer after interrupts in m_can_stop - Move assignment of hrtimer_callback to m_can_class_register() - Initialize irq = 0 if polling mode is used - Add reson for polling mode in commit msg - Remove unrelated change - Remove polling flag v7: - Clean up m_can_platform.c if/else section after removing poll-interval - Remove poll-interval from patch description v6: - Move hrtimer stop/start function calls to m_can_open and m_can_close to support power suspend/resume v5: - Change dev_dbg to dev_info if hardware interrupt exists and polling is enabled v4: - No changes v3: - Create a define for 1 ms polling interval - Change plarform_get_irq to optional to not print error msg v2: - Add functionality to check for 'poll-interval' property in MCAN node - Add 'polling' flag in driver to check if device is using polling method - Check for timer polling and hardware interrupt cases, default to hardware interrupt method - Change ns_to_ktime() to ms_to_ktime() --- drivers/net/can/m_can/m_can.c | 34 ++++++++++++++++++++++++-- drivers/net/can/m_can/m_can.h | 3 +++ drivers/net/can/m_can/m_can_platform.c | 24 +++++++++++++++--- 3 files changed, 56 insertions(+), 5 deletions(-) diff --git a/drivers/net/can/m_can/m_can.c b/drivers/net/can/m_can/m_can.c index a5003435802b..d1d1de94e590 100644 --- a/drivers/net/can/m_can/m_can.c +++ b/drivers/net/can/m_can/m_can.c @@ -11,6 +11,7 @@ #include #include #include +#include #include #include #include @@ -308,6 +309,9 @@ enum m_can_reg { #define TX_EVENT_MM_MASK GENMASK(31, 24) #define TX_EVENT_TXTS_MASK GENMASK(15, 0) +/* Hrtimer polling interval */ +#define HRTIMER_POLL_INTERVAL 1 + /* The ID and DLC registers are adjacent in M_CAN FIFO memory, * and we can save a (potentially slow) bus round trip by combining * reads and writes to them. @@ -1414,6 +1418,12 @@ static int m_can_start(struct net_device *dev) m_can_enable_all_interrupts(cdev); + if (dev->irq == 0) { + dev_dbg(cdev->dev, "Start hrtimer\n"); + hrtimer_start(&cdev->hrtimer, ms_to_ktime(HRTIMER_POLL_INTERVAL), + HRTIMER_MODE_REL_PINNED); + } + return 0; } @@ -1568,6 +1578,11 @@ static void m_can_stop(struct net_device *dev) { struct m_can_classdev *cdev = netdev_priv(dev); + if (dev->irq == 0) { + dev_dbg(cdev->dev, "Stop hrtimer\n"); + hrtimer_cancel(&cdev->hrtimer); + } + /* disable all interrupts */ m_can_disable_all_interrupts(cdev); @@ -1793,6 +1808,18 @@ static netdev_tx_t m_can_start_xmit(struct sk_buff *skb, return NETDEV_TX_OK; } +static enum hrtimer_restart hrtimer_callback(struct hrtimer *timer) +{ + struct m_can_classdev *cdev = container_of(timer, struct + m_can_classdev, hrtimer); + + m_can_isr(0, cdev->net); + + hrtimer_forward_now(timer, ms_to_ktime(HRTIMER_POLL_INTERVAL)); + + return HRTIMER_RESTART; +} + static int m_can_open(struct net_device *dev) { struct m_can_classdev *cdev = netdev_priv(dev); @@ -1831,10 +1858,10 @@ static int m_can_open(struct net_device *dev) err = request_threaded_irq(dev->irq, NULL, m_can_isr, IRQF_ONESHOT, dev->name, dev); - } else { + } + if (dev->irq > 0) err = request_irq(dev->irq, m_can_isr, IRQF_SHARED, dev->name, dev); - } if (err < 0) { netdev_err(dev, "failed to request interrupt\n"); @@ -2027,6 +2054,9 @@ int m_can_class_register(struct m_can_classdev *cdev) goto clk_disable; } + if (cdev->net->irq == 0) + cdev->hrtimer.function = &hrtimer_callback; + ret = m_can_dev_setup(cdev); if (ret) goto rx_offload_del; diff --git a/drivers/net/can/m_can/m_can.h b/drivers/net/can/m_can/m_can.h index a839dc71dc9b..2ac18ac867a4 100644 --- a/drivers/net/can/m_can/m_can.h +++ b/drivers/net/can/m_can/m_can.h @@ -15,6 +15,7 @@ #include #include #include +#include #include #include #include @@ -93,6 +94,8 @@ struct m_can_classdev { int is_peripheral; struct mram_cfg mcfg[MRAM_CFG_NUM]; + + struct hrtimer hrtimer; }; struct m_can_classdev *m_can_class_allocate_dev(struct device *dev, int sizeof_priv); diff --git a/drivers/net/can/m_can/m_can_platform.c b/drivers/net/can/m_can/m_can_platform.c index 94dc82644113..a7ab2c8b55d1 100644 --- a/drivers/net/can/m_can/m_can_platform.c +++ b/drivers/net/can/m_can/m_can_platform.c @@ -5,6 +5,7 @@ // // Copyright (C) 2018-19 Texas Instruments Incorporated - http://www.ti.com/ +#include #include #include @@ -96,12 +97,29 @@ static int m_can_plat_probe(struct platform_device *pdev) goto probe_fail; addr = devm_platform_ioremap_resource_byname(pdev, "m_can"); - irq = platform_get_irq_byname(pdev, "int0"); - if (IS_ERR(addr) || irq < 0) { - ret = -EINVAL; + if (IS_ERR(addr)) { + ret = PTR_ERR(addr); goto probe_fail; } + if (device_property_present(mcan_class->dev, "interrupts") || + device_property_present(mcan_class->dev, "interrupt-names")) { + irq = platform_get_irq_byname(pdev, "int0"); + if (irq == -EPROBE_DEFER) { + ret = -EPROBE_DEFER; + goto probe_fail; + } + if (irq < 0) { + ret = -EINVAL; + goto probe_fail; + } + } else { + irq = 0; + dev_dbg(mcan_class->dev, "Polling enabled, initialize hrtimer"); + hrtimer_init(&mcan_class->hrtimer, CLOCK_MONOTONIC, + HRTIMER_MODE_REL_PINNED); + } + /* message ram could be shared */ res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "message_ram"); if (!res) {