From patchwork Fri May 26 06:25:27 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: William Qiu X-Patchwork-Id: 99307 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a59:994d:0:b0:3d9:f83d:47d9 with SMTP id k13csp267184vqr; Thu, 25 May 2023 23:38:07 -0700 (PDT) X-Google-Smtp-Source: ACHHUZ5+wNx7lMELvxikuEbvJ7OfhKUJKxRQVFcwyyr8CV1Oe7ylT724phcQh4PrApABl4E/nMf0 X-Received: by 2002:a17:90a:2ecc:b0:250:78d0:f78c with SMTP id h12-20020a17090a2ecc00b0025078d0f78cmr1041497pjs.9.1685083087140; Thu, 25 May 2023 23:38:07 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1685083087; cv=none; d=google.com; s=arc-20160816; b=qT2jaXHgAQzmWnJvOkVgh/GHNp8W9kRxhHnlD5mz+upNsVQd2wG8QOzueU9jI1W6b2 Xeak+AkQgJTcTdMGgnsndQiOWlQBQik2x6Y4KGu6ah4z000n2v2hOBdo2R21OfH83ANp kqR44SNICg2XMuDBAp0aV+/VqLUAYik/lz3UwJb9IcvAVe6WX7YC2bF1J08g6csVzXaW SbWiQB4b9bQrg8iT8PqSigGvR8upNRMzUeg6y/sUgQdxDfd+EtfK43hXHuFzqlVaTVcd 3meqUD1/kKR4dc+Q6eJGLWVSf4phBnEmhFJEaiM8let/BgQt8ktx91c1+Xdh7iwFMQ5+ qZ4w== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from; bh=U7D+8ERkblF12gWD04c9ZmE6LGChCHzJxpEYvLkwKfk=; b=d4qrPeiyRHt2KD3EldBoT8mFojG7aSc6+tlPKpwDc8i8ESaGukgvcm46Rz3eG/0sYS d7CqHUm8wKCpwTgcs3LQIs+jnMn4PEe4hm6dBQO9yXyiCbLYHhBYsv32/QxiWVGMbIN9 qDh0xofTNf4uMtQVLGMhYI69XmwHaDfQJutU7211zPBVBoHtgxSWINbBgpBLLIbhJvsB ucBvCTEWRKoHPRWTkcqYuiMehUmsaT8xX5klKag5ZI5NRaBRMSuu6U7g+xDBVj4HUW97 altUPVBsbeGL43BHqcavqDosO5L3Cp/Hp0X0Ev646zS4eU1qUqQUU/Cw9BL/Bmv8Jo27 iRpg== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: from out1.vger.email (out1.vger.email. [2620:137:e000::1:20]) by mx.google.com with ESMTP id h3-20020a17090aa88300b0024df9b42c22si3339951pjq.67.2023.05.25.23.37.55; Thu, 25 May 2023 23:38:07 -0700 (PDT) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) client-ip=2620:137:e000::1:20; Authentication-Results: mx.google.com; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S242168AbjEZGZr convert rfc822-to-8bit (ORCPT + 99 others); Fri, 26 May 2023 02:25:47 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:59210 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S242145AbjEZGZm (ORCPT ); Fri, 26 May 2023 02:25:42 -0400 Received: from ex01.ufhost.com (ex01.ufhost.com [61.152.239.75]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 143CA1B5; Thu, 25 May 2023 23:25:39 -0700 (PDT) Received: from EXMBX166.cuchost.com (unknown [175.102.18.54]) (using TLSv1 with cipher DHE-RSA-AES256-SHA (256/256 bits)) (Client CN "EXMBX166", Issuer "EXMBX166" (not verified)) by ex01.ufhost.com (Postfix) with ESMTP id 9DA6624DBBE; Fri, 26 May 2023 14:25:31 +0800 (CST) Received: from EXMBX168.cuchost.com (172.16.6.78) by EXMBX166.cuchost.com (172.16.6.76) with Microsoft SMTP Server (TLS) id 15.0.1497.42; Fri, 26 May 2023 14:25:31 +0800 Received: from williamqiu-virtual-machine.starfivetech.com (171.223.208.138) by EXMBX168.cuchost.com (172.16.6.78) with Microsoft SMTP Server (TLS) id 15.0.1497.42; Fri, 26 May 2023 14:25:30 +0800 From: William Qiu To: , , , CC: Mark Brown , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Emil Renner Berthing , Ziv Xu , William Qiu Subject: [PATCH v1 1/3] dt-bindings: qspi: cdns,qspi-nor: Add clocks for StarFive JH7110 SoC Date: Fri, 26 May 2023 14:25:27 +0800 Message-ID: <20230526062529.46747-2-william.qiu@starfivetech.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20230526062529.46747-1-william.qiu@starfivetech.com> References: <20230526062529.46747-1-william.qiu@starfivetech.com> MIME-Version: 1.0 X-Originating-IP: [171.223.208.138] X-ClientProxiedBy: EXCAS062.cuchost.com (172.16.6.22) To EXMBX168.cuchost.com (172.16.6.78) X-YovoleRuleAgent: yovoleflag X-Spam-Status: No, score=-1.9 required=5.0 tests=BAYES_00,SPF_HELO_NONE, SPF_PASS,T_SCC_BODY_TEXT_LINE autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-getmail-retrieved-from-mailbox: =?utf-8?q?INBOX?= X-GMAIL-THRID: =?utf-8?q?1766937683012382946?= X-GMAIL-MSGID: =?utf-8?q?1766937683012382946?= The QSPI controller needs three clock items to work properly on StarFive JH7110 SoC, so there is need to change the maxItems's value to 3. Other platforms do not have this constraint. Signed-off-by: William Qiu Reviewed-by: Hal Feng --- .../devicetree/bindings/spi/cdns,qspi-nor.yaml | 15 ++++++++++++--- 1 file changed, 12 insertions(+), 3 deletions(-) diff --git a/Documentation/devicetree/bindings/spi/cdns,qspi-nor.yaml b/Documentation/devicetree/bindings/spi/cdns,qspi-nor.yaml index b310069762dd..737f1c162e01 100644 --- a/Documentation/devicetree/bindings/spi/cdns,qspi-nor.yaml +++ b/Documentation/devicetree/bindings/spi/cdns,qspi-nor.yaml @@ -26,6 +26,15 @@ allOf: const: starfive,jh7110-qspi then: properties: + clocks: + maxItems: 3 + + clock-names: + items: + - const: qspi-ref + - const: qspi-ahb + - const: qspi-apb + resets: minItems: 2 maxItems: 3 @@ -38,6 +47,9 @@ allOf: else: properties: + clocks: + maxItems: 1 + resets: maxItems: 2 @@ -69,9 +81,6 @@ properties: interrupts: maxItems: 1 - clocks: - maxItems: 1 - cdns,fifo-depth: description: Size of the data FIFO in words. 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[2620:137:e000::1:20]) by mx.google.com with ESMTP id x11-20020a17090a8a8b00b0023def94be5esi3276642pjn.20.2023.05.25.23.32.17; Thu, 25 May 2023 23:32:30 -0700 (PDT) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) client-ip=2620:137:e000::1:20; Authentication-Results: mx.google.com; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S242181AbjEZGZu convert rfc822-to-8bit (ORCPT + 99 others); Fri, 26 May 2023 02:25:50 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:59220 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S242143AbjEZGZm (ORCPT ); Fri, 26 May 2023 02:25:42 -0400 Received: from ex01.ufhost.com (ex01.ufhost.com [61.152.239.75]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 13E9413D; Thu, 25 May 2023 23:25:38 -0700 (PDT) Received: from EXMBX165.cuchost.com (unknown [175.102.18.54]) (using TLSv1 with cipher DHE-RSA-AES256-SHA (256/256 bits)) (Client CN "EXMBX165", Issuer "EXMBX165" (not verified)) by ex01.ufhost.com (Postfix) with ESMTP id 4F5AC24E1BE; Fri, 26 May 2023 14:25:32 +0800 (CST) Received: from EXMBX168.cuchost.com (172.16.6.78) by EXMBX165.cuchost.com (172.16.6.75) with Microsoft SMTP Server (TLS) id 15.0.1497.42; Fri, 26 May 2023 14:25:32 +0800 Received: from williamqiu-virtual-machine.starfivetech.com (171.223.208.138) by EXMBX168.cuchost.com (172.16.6.78) with Microsoft SMTP Server (TLS) id 15.0.1497.42; Fri, 26 May 2023 14:25:31 +0800 From: William Qiu To: , , , CC: Mark Brown , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Emil Renner Berthing , Ziv Xu , William Qiu Subject: [PATCH v1 2/3] spi: cadence-quadspi: Add clock configuration for StarFive JH7110 QSPI Date: Fri, 26 May 2023 14:25:28 +0800 Message-ID: <20230526062529.46747-3-william.qiu@starfivetech.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20230526062529.46747-1-william.qiu@starfivetech.com> References: <20230526062529.46747-1-william.qiu@starfivetech.com> MIME-Version: 1.0 X-Originating-IP: [171.223.208.138] X-ClientProxiedBy: EXCAS062.cuchost.com (172.16.6.22) To EXMBX168.cuchost.com (172.16.6.78) X-YovoleRuleAgent: yovoleflag X-Spam-Status: No, score=-1.9 required=5.0 tests=BAYES_00,SPF_HELO_NONE, SPF_PASS,T_SCC_BODY_TEXT_LINE autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-getmail-retrieved-from-mailbox: =?utf-8?q?INBOX?= X-GMAIL-THRID: =?utf-8?q?1766937329835675460?= X-GMAIL-MSGID: =?utf-8?q?1766937329835675460?= Add QSPI clock operation in device probe. Signed-off-by: William Qiu Reviewed-by: Hal Feng --- drivers/spi/spi-cadence-quadspi.c | 27 +++++++++++++++++++++++++++ 1 file changed, 27 insertions(+) diff --git a/drivers/spi/spi-cadence-quadspi.c b/drivers/spi/spi-cadence-quadspi.c index 6ddb2dfc0f00..c6430fb3a0a4 100644 --- a/drivers/spi/spi-cadence-quadspi.c +++ b/drivers/spi/spi-cadence-quadspi.c @@ -1624,6 +1624,7 @@ static int cqspi_setup_flash(struct cqspi_st *cqspi) static int cqspi_probe(struct platform_device *pdev) { const struct cqspi_driver_platdata *ddata; + struct clk *qspi_ahb, *qspi_apb; struct reset_control *rstc, *rstc_ocp, *rstc_ref; struct device *dev = &pdev->dev; struct spi_master *master; @@ -1715,6 +1716,32 @@ static int cqspi_probe(struct platform_device *pdev) } if (of_device_is_compatible(pdev->dev.of_node, "starfive,jh7110-qspi")) { + qspi_ahb = devm_clk_get(dev, "qspi-ahb"); + if (IS_ERR(qspi_ahb)) { + dev_err(dev, "Cannot claim QSPI_AHB clock.\n"); + ret = PTR_ERR(qspi_ahb); + return ret; + } + + ret = clk_prepare_enable(qspi_ahb); + if (ret) { + dev_err(dev, "Cannot enable QSPI AHB clock.\n"); + goto probe_clk_failed; + } + + qspi_apb = devm_clk_get(dev, "qspi-apb"); + if (IS_ERR(qspi_apb)) { + dev_err(dev, "Cannot claim QSPI_APB clock.\n"); + ret = PTR_ERR(qspi_apb); + return ret; + } + + ret = clk_prepare_enable(qspi_apb); + if (ret) { + dev_err(dev, "Cannot enable QSPI APB clock.\n"); + goto probe_clk_failed; + } + rstc_ref = devm_reset_control_get_optional_exclusive(dev, "rstc_ref"); if (IS_ERR(rstc_ref)) { ret = PTR_ERR(rstc_ref); From patchwork Fri May 26 06:25:29 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: William Qiu X-Patchwork-Id: 99302 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a59:994d:0:b0:3d9:f83d:47d9 with SMTP id k13csp263942vqr; Thu, 25 May 2023 23:29:12 -0700 (PDT) X-Google-Smtp-Source: ACHHUZ5g2MwU3H++99mU051y7lB2lRCACAk+TMpPCWrWPrhcbWQHlKFqltyLa7X2VPjXBaD4PEK4 X-Received: by 2002:a05:6a00:b96:b0:64d:2e8a:4cc1 with SMTP id g22-20020a056a000b9600b0064d2e8a4cc1mr2137026pfj.27.1685082552187; Thu, 25 May 2023 23:29:12 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1685082552; cv=none; d=google.com; s=arc-20160816; b=qshBrNjc9d5xeh8M29wAwsmhzc/3ReotFuv1Jp1jJt0TMGwRBfcViDRSpNsbMxHWeF 1+GzITZPVi0bRvEB6LBozDDHFkrWS6LAg0nJsLa0S3jKz2fVbaP9fYJo+yU99+IMNSsE iNeyqUFtvDZZNlh0la8ki3UClnlVnfMAAeFTL/X/xVyR/2AF/eibvoNumW1rASyyw79j DEvfzUKPZBj6ObDZc6Wy6AjiiE6N3jlSqVLl1JzUYhq6ph6t94Y7pIgq5Rehcr/fzRLf ixU9dmJ2WkunWUX9bnfvh2lJJ3544vGu1oCmcuYZM/dNxaAK4DjkTuO5ndCJyctPD+7U TUIA== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from; bh=8pjDKLgzEcUX9p/6+HqoDkPIzpaahTiv7+EopvlXiuQ=; b=AZcdb4qh1f3OPVZH+RRbmTgN/HmBrFMnV0WqEhKBcosXpQBXC0jeL1SdZMh+GFn6EC wed+3ZwyatmhIYNfQm3ExEVAYdaq7b5M9c4QEkqWzzG8UzkhKzxSR+deXRmp5tuaHYdY LSY5hPuuIYqL9AZy452QReQobVFYvp3DA2XVbBGJD3mIUFo3vS8a3tO0qnfTAOPaBYZJ PQSbUbh/9hVlfMDMFVavrE2RzEfl/sGyuJNmHh0sFiDZz599bTw7eyfi/owItgVna4v8 ZIaIg5pRSxp0A00L+oqV70GVSlBVnbC9sjS6GCflJUPCWF7cCLx8BVZvucICjOJ0PYlM G06g== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: from out1.vger.email (out1.vger.email. [2620:137:e000::1:20]) by mx.google.com with ESMTP id k14-20020aa7972e000000b0063473a51539si3158744pfg.398.2023.05.25.23.28.58; Thu, 25 May 2023 23:29:12 -0700 (PDT) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) client-ip=2620:137:e000::1:20; Authentication-Results: mx.google.com; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S242158AbjEZGZo convert rfc822-to-8bit (ORCPT + 99 others); Fri, 26 May 2023 02:25:44 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:59240 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S242142AbjEZGZm (ORCPT ); Fri, 26 May 2023 02:25:42 -0400 Received: from fd01.gateway.ufhost.com (fd01.gateway.ufhost.com [61.152.239.71]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 8AC0F1B3; Thu, 25 May 2023 23:25:38 -0700 (PDT) Received: from EXMBX166.cuchost.com (unknown [175.102.18.54]) (using TLSv1 with cipher DHE-RSA-AES256-SHA (256/256 bits)) (Client CN "EXMBX166", Issuer "EXMBX166" (not verified)) by fd01.gateway.ufhost.com (Postfix) with ESMTP id F185B807C; Fri, 26 May 2023 14:25:32 +0800 (CST) Received: from EXMBX168.cuchost.com (172.16.6.78) by EXMBX166.cuchost.com (172.16.6.76) with Microsoft SMTP Server (TLS) id 15.0.1497.42; Fri, 26 May 2023 14:25:32 +0800 Received: from williamqiu-virtual-machine.starfivetech.com (171.223.208.138) by EXMBX168.cuchost.com (172.16.6.78) with Microsoft SMTP Server (TLS) id 15.0.1497.42; Fri, 26 May 2023 14:25:32 +0800 From: William Qiu To: , , , CC: Mark Brown , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Emil Renner Berthing , Ziv Xu , William Qiu Subject: [PATCH v1 3/3] riscv: dts: starfive: Add QSPI controller node for StarFive JH7110 SoC Date: Fri, 26 May 2023 14:25:29 +0800 Message-ID: <20230526062529.46747-4-william.qiu@starfivetech.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20230526062529.46747-1-william.qiu@starfivetech.com> References: <20230526062529.46747-1-william.qiu@starfivetech.com> MIME-Version: 1.0 X-Originating-IP: [171.223.208.138] X-ClientProxiedBy: EXCAS062.cuchost.com (172.16.6.22) To EXMBX168.cuchost.com (172.16.6.78) X-YovoleRuleAgent: yovoleflag X-Spam-Status: No, score=-1.9 required=5.0 tests=BAYES_00,SPF_HELO_PASS, SPF_PASS,T_SCC_BODY_TEXT_LINE autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-getmail-retrieved-from-mailbox: =?utf-8?q?INBOX?= X-GMAIL-THRID: =?utf-8?q?1766937121899950471?= X-GMAIL-MSGID: =?utf-8?q?1766937121899950471?= Add the quad spi controller node for the StarFive JH7110 SoC. Co-developed-by: Ziv Xu Signed-off-by: Ziv Xu Signed-off-by: William Qiu Reviewed-by: Hal Feng --- .../jh7110-starfive-visionfive-2.dtsi | 32 +++++++++++++++++++ arch/riscv/boot/dts/starfive/jh7110.dtsi | 18 +++++++++++ 2 files changed, 50 insertions(+) diff --git a/arch/riscv/boot/dts/starfive/jh7110-starfive-visionfive-2.dtsi b/arch/riscv/boot/dts/starfive/jh7110-starfive-visionfive-2.dtsi index 2a6d81609284..22212c1150f9 100644 --- a/arch/riscv/boot/dts/starfive/jh7110-starfive-visionfive-2.dtsi +++ b/arch/riscv/boot/dts/starfive/jh7110-starfive-visionfive-2.dtsi @@ -126,6 +126,38 @@ &i2c6 { status = "okay"; }; +&qspi { + #address-cells = <1>; + #size-cells = <0>; + + nor_flash: flash@0 { + compatible = "jedec,spi-nor"; + reg=<0>; + cdns,read-delay = <5>; + spi-max-frequency = <12000000>; + cdns,tshsl-ns = <1>; + cdns,tsd2d-ns = <1>; + cdns,tchsh-ns = <1>; + cdns,tslch-ns = <1>; + + partitions { + compatible = "fixed-partitions"; + #address-cells = <1>; + #size-cells = <1>; + + spl@0 { + reg = <0x0 0x20000>; + }; + uboot@100000 { + reg = <0x100000 0x300000>; + }; + data@f00000 { + reg = <0xf00000 0x100000>; + }; + }; + }; +}; + &sysgpio { i2c0_pins: i2c0-0 { i2c-pins { diff --git a/arch/riscv/boot/dts/starfive/jh7110.dtsi b/arch/riscv/boot/dts/starfive/jh7110.dtsi index 4c5fdb905da8..6385443d011f 100644 --- a/arch/riscv/boot/dts/starfive/jh7110.dtsi +++ b/arch/riscv/boot/dts/starfive/jh7110.dtsi @@ -440,6 +440,24 @@ i2c6: i2c@12060000 { status = "disabled"; }; + qspi: spi@13010000 { + compatible = "starfive,jh7110-qspi", "cdns,qspi-nor"; + reg = <0x0 0x13010000 0x0 0x10000 + 0x0 0x21000000 0x0 0x400000>; + interrupts = <25>; + clocks = <&syscrg JH7110_SYSCLK_QSPI_REF>, + <&syscrg JH7110_SYSCLK_QSPI_AHB>, + <&syscrg JH7110_SYSCLK_QSPI_APB>; + clock-names = "qspi-ref", "qspi-ahb", "qspi-apb"; + resets = <&syscrg JH7110_SYSRST_QSPI_APB>, + <&syscrg JH7110_SYSRST_QSPI_AHB>, + <&syscrg JH7110_SYSRST_QSPI_REF>; + reset-names = "qspi", "qspi-ocp", "rstc_ref"; + cdns,fifo-depth = <256>; + cdns,fifo-width = <4>; + cdns,trigger-address = <0x0>; + }; + syscrg: clock-controller@13020000 { compatible = "starfive,jh7110-syscrg"; reg = <0x0 0x13020000 0x0 0x10000>;