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[93.5.22.158]) by smtp.googlemail.com with ESMTPSA id o3-20020a5d6843000000b003095a329e90sm945809wrw.97.2023.05.25.01.33.53 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 25 May 2023 01:33:53 -0700 (PDT) From: Alexandre Mergnat Date: Thu, 25 May 2023 10:33:10 +0200 Subject: [PATCH v8 01/10] arm64: defconfig: enable MT6357 regulator MIME-Version: 1.0 Message-Id: <20230203-evk-board-support-v8-1-7019f3fd0adf@baylibre.com> References: <20230203-evk-board-support-v8-0-7019f3fd0adf@baylibre.com> In-Reply-To: <20230203-evk-board-support-v8-0-7019f3fd0adf@baylibre.com> To: Catalin Marinas , Will Deacon , Wim Van Sebroeck , Guenter Roeck , Rob Herring , Krzysztof Kozlowski , Matthias Brugger , AngeloGioacchino Del Regno , Conor Dooley Cc: linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, linux-watchdog@vger.kernel.org, devicetree@vger.kernel.org, linux-mediatek@lists.infradead.org, Alexandre Mergnat , Kevin Hilman X-Mailer: b4 0.12.2 X-Developer-Signature: v=1; a=openpgp-sha256; l=793; i=amergnat@baylibre.com; h=from:subject:message-id; bh=WTUqVHBR4HvQxOd4r/5AfIRd2ez+/KjC4aOa4tZxgIk=; b=owEBbQKS/ZANAwAKAStGSZ1+MdRFAcsmYgBkbx1vfSiKtJv8aAT4IOZB7Xz43lWuQgoRCFuoC3/v 0aNnrHmJAjMEAAEKAB0WIQQjG17X8+qqcA5g/osrRkmdfjHURQUCZG8dbwAKCRArRkmdfjHURRAtEA C+Il5XUr1nBN5757SDW91yT55UdcKbq8nqrRwSxq7ytwJdRUxhm1slyroZBqq48WQQe4D3KIi6mA1p zNpyVVQLjZrZd4xQYncj5GgFQv4S6Tskc41gtVY354CqS5rqqqTYhvyuVeBKol3DFDYWvMPdH7LlLf lSbfVtLyqqwh9z8x48dXNtze3WOzDtgBuKwaICwEmTSIQe76pdU+ByiUJq3YgE04WOLBEQSnrdfUMH PtkE2ocy9gtv0FswLjQyjgWGgwXaC9ROdATOrpEkbnAhFAevGCQbiU30/jYN3N7gWOV7NBWel1xpHD XgOTBHbwYedJuCUxxPjEHNkupqWfbErhjDZzHbKub/pRW+v9+0TxXqbnI/kiuMK6OA3/NHag207Bpf ZWd6Egq0PqDrr2oRuHDv60AATm+t6iYKuUMb3NEXAkYGWMd5vOBTkOdAdZK5HnIMH4oCaNqSHST2q1 cSBE7ZpyNDpvwcA4Qr4CdVgn4eiqbABOjyrVuB0bmqdhCL5AEmI84DeI/QJWMMZ5X1bKLKeEi+vFRa qhXMaDOJ+JhMb2LmOuZUvwf3585zfHNyyVvTrS5xLbIPalOMMqTIZPGHCDlI0frge3McO7DEf4IoaR 3esu0i3iVMlAlNSJ8pv5r791MpK2I/3++4doJNxCsdcefHpy3/XZA9B4q88w== X-Developer-Key: i=amergnat@baylibre.com; a=openpgp; fpr=231B5ED7F3EAAA700E60FE8B2B46499D7E31D445 X-Spam-Status: No, score=-1.9 required=5.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,RCVD_IN_DNSWL_NONE,SPF_HELO_NONE,SPF_PASS, T_SCC_BODY_TEXT_LINE autolearn=unavailable autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-getmail-retrieved-from-mailbox: =?utf-8?q?INBOX?= X-GMAIL-THRID: =?utf-8?q?1766854642193181147?= X-GMAIL-MSGID: =?utf-8?q?1766854642193181147?= Enable the power regulator support of MediaTek MT6357 PMIC. This driver supports the control of different power rails of device through regulator interface. Tested-by: Kevin Hilman Signed-off-by: Alexandre Mergnat --- arch/arm64/configs/defconfig | 1 + 1 file changed, 1 insertion(+) diff --git a/arch/arm64/configs/defconfig b/arch/arm64/configs/defconfig index a24609e14d50..ed3fca298314 100644 --- a/arch/arm64/configs/defconfig +++ b/arch/arm64/configs/defconfig @@ -708,6 +708,7 @@ CONFIG_REGULATOR_MAX77620=y CONFIG_REGULATOR_MAX8973=y CONFIG_REGULATOR_MP8859=y CONFIG_REGULATOR_MT6315=m +CONFIG_REGULATOR_MT6357=y CONFIG_REGULATOR_MT6358=y CONFIG_REGULATOR_MT6359=y CONFIG_REGULATOR_MT6360=y From patchwork Thu May 25 08:33:11 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Alexandre Mergnat X-Patchwork-Id: 98893 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a59:994d:0:b0:3d9:f83d:47d9 with SMTP id k13csp211662vqr; Thu, 25 May 2023 01:47:50 -0700 (PDT) X-Google-Smtp-Source: ACHHUZ6qxbtNdKsDewoRYip6rQOcKiMYuZgjArxM655KAamxePwo/h/uGutQqeDfCFLM23f0FrLB X-Received: by 2002:a17:902:c410:b0:1ac:896f:f655 with SMTP id k16-20020a170902c41000b001ac896ff655mr1131595plk.50.1685004470189; Thu, 25 May 2023 01:47:50 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1685004470; cv=none; d=google.com; s=arc-20160816; b=UQjm1x7RyoFnPenujuV8aEYdGlLVjw+CDZXIEWaJCBYij5KOS0r4Tf3RwjCpc0VSmj RtGAZrA3PCViHWJv/XZyNdDpeJBV479uICzbNyBonvcSDd1QXfUy8tD07ujf89S9UAES Hr2ZCAyCNohHGk0hsiwIcchnb/3uFFKj0KVRs1VPUiH4cpDTT/s1auWVG9l21WPtr/Fx /sFG8wpRFiUtvbz6rzsMiw9ByEWAbHwXD6hB+gV8JZaFqU+O8wb3ISCzEnQwKP58Lgzb TE/M0mlWrQeZDYYkECbqmmnfXMNYtI1R59oPNqfTlRvw1cmZN7gnOE5F37EUTAfmsBzl Swiw== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:cc:to:in-reply-to:references:message-id :content-transfer-encoding:mime-version:subject:date:from :dkim-signature; bh=wkyg3PseRq5i0Folj+GRO/aSoM3TKUeywxLrge822u4=; b=ZJ5IPPy3yQLIAJniTVdp0pagerthsS2L3nckxvG/YrYEmENaWJk7THAB8xFvA84xic wEmnfgVkBe6cxQkrnNZHraNwtPZrskAs3MrioJ/WlB5piqAbc+M4ILSojDYlD6Ywqc61 n14mGLdWp0O1R1SKWYEtdEH5f2PR2KR4PvkUiD3gJBT2kXq8Zm70kbGhW4zOAdu/NhN3 5Io8wIipfwoobEqoDwV3XlSFLLopt2zyrUAKiz8hjupLhxZFyTbmh/k7ftNoW7/bZPjr O3SgPlSb8XMkeZEHfKoHY/x5vHxfWzVeYA39bEPJQt2vBsOJijdLMrJtRZ8CAapK3Ri6 DOOQ== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@baylibre-com.20221208.gappssmtp.com header.s=20221208 header.b=IHRtJBEg; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: from out1.vger.email (out1.vger.email. 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[93.5.22.158]) by smtp.googlemail.com with ESMTPSA id o3-20020a5d6843000000b003095a329e90sm945809wrw.97.2023.05.25.01.33.54 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 25 May 2023 01:33:55 -0700 (PDT) From: Alexandre Mergnat Date: Thu, 25 May 2023 10:33:11 +0200 Subject: [PATCH v8 02/10] arm64: defconfig: enable Mediatek PMIC key MIME-Version: 1.0 Message-Id: <20230203-evk-board-support-v8-2-7019f3fd0adf@baylibre.com> References: <20230203-evk-board-support-v8-0-7019f3fd0adf@baylibre.com> In-Reply-To: <20230203-evk-board-support-v8-0-7019f3fd0adf@baylibre.com> To: Catalin Marinas , Will Deacon , Wim Van Sebroeck , Guenter Roeck , Rob Herring , Krzysztof Kozlowski , Matthias Brugger , AngeloGioacchino Del Regno , Conor Dooley Cc: linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, linux-watchdog@vger.kernel.org, devicetree@vger.kernel.org, linux-mediatek@lists.infradead.org, Alexandre Mergnat , Kevin Hilman X-Mailer: b4 0.12.2 X-Developer-Signature: v=1; a=openpgp-sha256; l=877; i=amergnat@baylibre.com; h=from:subject:message-id; bh=jPn3tggveilK0xTrgDaZ1+RBp85nyEx21PEy7yxORvw=; b=owEBbQKS/ZANAwAKAStGSZ1+MdRFAcsmYgBkbx1v4EJwb5ltY7o9akUPr2vQ/+igut2ra6dXr9OQ qqPxMBiJAjMEAAEKAB0WIQQjG17X8+qqcA5g/osrRkmdfjHURQUCZG8dbwAKCRArRkmdfjHURZTzD/ 4pgUjLhvBw1cyMvt0mnTbbCfkUC3ELYRSKtaczQt1HA0mAJOG0m+S7ULvjZV5e0QfBjIo70eRMXa51 Vt/jJ6cCJnVlgo9hJ3PZ+Xp1/w2qTwRAtBZMhyXUFD6bHGU/VO8T4kTeVfKpZVjqoPqBzGxGuuVdig JIknJzkrmHab7DvupQQ9e63PhuyXGsr3Ckn43clGgIyTEDUy5YlkbFNhhFaB7ssWMhUALSmqtB1j/N Gdf1efeuoJLd2HgnsuAy15QsOHsym/+ejnrpD37IOz58xNYqdno/Edi3c2EHrod4DULrLSYQt2uWxr 5mJntZQbuTGWZuelBgsb7KvVP/XDSnC2tiWf0VvWIgFPSvGq12wWpk0P3ppI2j2S32NLoPjJ5FySIF Dz7fPT2gaIh4kJkWYbbqtzH2BYjmTvxakal3jMi+YQwjFtDCNIG5sUNVA4g3n/5GT9ECrHflNgiJxW r4Ht77qFPUVJChncFt7AScHk1iXlmE0M0mfD4FilWEd1HL5guIJCDnp1SaYA3ss0Bd8MceRzroBknY LphjyR8DzU5oL2cNvKy8SItqu2HZh91DTQVS/lbcME3Ve7L1sBr8+yyTFagS1oUDLiIGLbkcyTq+ub /8JYw1P7Y7WYl3AwlhAeX6yxerr3XUtvC5cen+HixlKOSZWcwre/1DScIu4Q== X-Developer-Key: i=amergnat@baylibre.com; a=openpgp; fpr=231B5ED7F3EAAA700E60FE8B2B46499D7E31D445 X-Spam-Status: No, score=-1.9 required=5.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,RCVD_IN_DNSWL_NONE,SPF_HELO_NONE,SPF_PASS, T_SCC_BODY_TEXT_LINE autolearn=unavailable autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-getmail-retrieved-from-mailbox: =?utf-8?q?INBOX?= X-GMAIL-THRID: =?utf-8?q?1766855246894068717?= X-GMAIL-MSGID: =?utf-8?q?1766855246894068717?= Some Mediatek PMIC devices can manage Power and Home keys (buttons). This patch enable the driver which handle the 2 keys managed by the Mediatek PMIC. Tested-by: Kevin Hilman Reviewed-by: AngeloGioacchino Del Regno Signed-off-by: Alexandre Mergnat --- arch/arm64/configs/defconfig | 1 + 1 file changed, 1 insertion(+) diff --git a/arch/arm64/configs/defconfig b/arch/arm64/configs/defconfig index ed3fca298314..0db8293f477d 100644 --- a/arch/arm64/configs/defconfig +++ b/arch/arm64/configs/defconfig @@ -413,6 +413,7 @@ CONFIG_KEYBOARD_GPIO=y CONFIG_KEYBOARD_SNVS_PWRKEY=m CONFIG_KEYBOARD_IMX_SC_KEY=m CONFIG_KEYBOARD_CROS_EC=y +CONFIG_KEYBOARD_MTK_PMIC=m CONFIG_MOUSE_ELAN_I2C=m CONFIG_INPUT_TOUCHSCREEN=y CONFIG_TOUCHSCREEN_ATMEL_MXT=m From patchwork Thu May 25 08:33:12 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Alexandre Mergnat X-Patchwork-Id: 98892 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a59:994d:0:b0:3d9:f83d:47d9 with SMTP id k13csp211066vqr; Thu, 25 May 2023 01:46:12 -0700 (PDT) X-Google-Smtp-Source: ACHHUZ6WFUWXgAl5EpUidFxFhjVWGWX/aJ61bgzkoaZcPlRnaozASJe028s2bJ5yPIWqh7MyRwKR X-Received: by 2002:a05:6a00:1402:b0:646:9232:df6 with SMTP id l2-20020a056a00140200b0064692320df6mr7163338pfu.33.1685004372426; Thu, 25 May 2023 01:46:12 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1685004372; cv=none; d=google.com; s=arc-20160816; b=fBvuJb/Xl6NA28AgPs/HdnsqNcPknUbOc9mwB14UFeXz6o3jSr0XyXcxwCR0GjXkez q3xUplxfbR3wq+RbGHZn4+NWh6GOGXvDo6DCj5hyzCampNQmXq8W++/j9Pn1cbrp8iQl UELIHpXp9e9iHYh1L0twMQYF2d2+nmDCWfXAdSTYeeoqya+GTysCP3xclWgrN5w3HvAt zGEDSUSkNWY2CmcLPvQb4ayz2CPgoth4p+5SUPYLtNUp2fwtsQNyFNG/4Nx6Wg6b2cNK lqHaxhDEyJyJnbxy7xXjFVPcnL058TvZ/b2iq66v3+FZP0hYDz807QFdWMU+gBQiEvll /x4A== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:cc:to:in-reply-to:references:message-id :content-transfer-encoding:mime-version:subject:date:from :dkim-signature; bh=tDMAZYC6PlfAvsYSrf+M4iyNDJFAF/AM883C7PrISNc=; b=z2SxAMzygE+zes2clWv/P2dL6+3FUnOr3ZLZM9h6D5EOoc3UJCDFilvdY3upYc8naE Hhr0ubc8GzRNa7CPCLsQi7oOjaCFY2LarEMiglGCGXifDUsVyc2c8dt6/7xwCNyVRxBt XGUjTTXQRpCgZryol6PuqCnwFZHZolW0QNNg7zMxIRbFxVDVRDTovZAH+A7WtYEij5Vd /4PILEbVizWb71wroDAAN5zcm34oklp7R/51OaZoRRBIt/KJH4HNiI2D85evOTnheosu oD8WX0dIV0yRNQgOXV5Xs91KFDZNCBrkCn5+zLr1x6ZeXkVuoSO0O7TQaAQ+BN0ouJWq GsEw== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@baylibre-com.20221208.gappssmtp.com header.s=20221208 header.b=ZCGAbdgX; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: from out1.vger.email (out1.vger.email. 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Reviewed-by: AngeloGioacchino Del Regno Tested-by: Kevin Hilman Signed-off-by: Alexandre Mergnat --- arch/arm64/boot/dts/mediatek/mt8365.dtsi | 6 ++++++ 1 file changed, 6 insertions(+) diff --git a/arch/arm64/boot/dts/mediatek/mt8365.dtsi b/arch/arm64/boot/dts/mediatek/mt8365.dtsi index 1f6b48359115..bb45aab2e6a9 100644 --- a/arch/arm64/boot/dts/mediatek/mt8365.dtsi +++ b/arch/arm64/boot/dts/mediatek/mt8365.dtsi @@ -162,6 +162,12 @@ syscfg_pctl: syscfg-pctl@10005000 { reg = <0 0x10005000 0 0x1000>; }; + watchdog: watchdog@10007000 { + compatible = "mediatek,mt8365-wdt", "mediatek,mt6589-wdt"; + reg = <0 0x10007000 0 0x100>; + #reset-cells = <1>; + }; + pio: pinctrl@1000b000 { compatible = "mediatek,mt8365-pinctrl"; reg = <0 0x1000b000 0 0x1000>; From patchwork Thu May 25 08:33:13 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Alexandre Mergnat X-Patchwork-Id: 98886 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a59:994d:0:b0:3d9:f83d:47d9 with SMTP id k13csp208962vqr; Thu, 25 May 2023 01:40:43 -0700 (PDT) X-Google-Smtp-Source: ACHHUZ4Vttb/XK8eTgo9d8jkk8ZB64RspImTJ4EVnhspVcnztWUKDEK/MIEzvdaxYlbMoBGqT9B6 X-Received: by 2002:a17:902:e5c3:b0:1a6:8ed5:428a with SMTP id u3-20020a170902e5c300b001a68ed5428amr1036778plf.22.1685004042796; Thu, 25 May 2023 01:40:42 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1685004042; cv=none; d=google.com; s=arc-20160816; b=rzOsv20tU7sOZi7jRprkXEMJskjVZll/NslKzHvWF7OBy1ZGucsaZDyTN48Hby7oU6 2O9mL9UGjLddF9pT89JSunXhuxESkUZil7jS+5rlgr52v8dRLKn6tXGyduHXWfaMitLA dFZPz/8wYcFUFVhL8W/9MdzlpLUd15VKs8Bx1n97AxDKjnAkrpgHmDYdp9tVgTsdEafi LVnMGssoRwOsuUs8JbJBHSwv2JabKInhn9gWCoeHR08grfoQPaFf0jn9frf7BCol1IPr 2I5finYkr5kEW0uoqzh4ue3JwLvXZM19vTjhgM8BIIgVCASBYHZiNvMU2sid2iPrlmB1 xvXA== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:cc:to:in-reply-to:references:message-id :content-transfer-encoding:mime-version:subject:date:from :dkim-signature; bh=i3sm0sOG8kJdGXppUS7SqrEsY1zLRiuVvK2VuTgB8S8=; b=CZ57T1XLATtGmEGJeDQQN23TKkOzpGK69w0gRH1w3D4NlsgKSJ131EPI58H2qrNgmI UCTXm73xuBSrizSRsw8TCM5Mu1kA7az66UPV4+1Nmw/zgAFKUKUw7F3ei+XAK7oEo+ay nVrgZS5AeV+M160XhWx7k2t9gfWDeMyD8HONOIQnh8S42Sg7fMI9lHTgJtEbvmGcw1Wf MfQqM+utt9owzvmsytinXLuOJs8J1LroPYYMUFpdjfTOeBcb971KXMztORXSrOZc530J ilwNStsnJjjqYrWb9o9rxLy5WVMWeCM45D6kOGW/jXCbOlqheRILrKdaj6Jnp/57VjkJ I3Nw== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@baylibre-com.20221208.gappssmtp.com header.s=20221208 header.b=f9lp641Q; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: from out1.vger.email (out1.vger.email. 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Reviewed-by: AngeloGioacchino Del Regno Tested-by: Kevin Hilman Signed-off-by: Alexandre Mergnat --- arch/arm64/boot/dts/mediatek/mt8365-evk.dts | 7 +++++++ 1 file changed, 7 insertions(+) diff --git a/arch/arm64/boot/dts/mediatek/mt8365-evk.dts b/arch/arm64/boot/dts/mediatek/mt8365-evk.dts index ceb48eb1a6e6..6074aa9c1c3e 100644 --- a/arch/arm64/boot/dts/mediatek/mt8365-evk.dts +++ b/arch/arm64/boot/dts/mediatek/mt8365-evk.dts @@ -12,6 +12,7 @@ #include #include #include "mt8365.dtsi" +#include "mt6357.dtsi" / { model = "MediaTek MT8365 Open Platform EVK"; @@ -94,6 +95,12 @@ &i2c0 { status = "okay"; }; +&mt6357_pmic { + interrupts-extended = <&pio 145 IRQ_TYPE_LEVEL_HIGH>; + interrupt-controller; + #interrupt-cells = <2>; +}; + &pio { gpio_keys: gpio-keys-pins { pins { From patchwork Thu May 25 08:33:14 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Alexandre Mergnat X-Patchwork-Id: 98896 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a59:994d:0:b0:3d9:f83d:47d9 with SMTP id k13csp213794vqr; Thu, 25 May 2023 01:53:30 -0700 (PDT) X-Google-Smtp-Source: ACHHUZ6Y8Ntr1kjy2ho/ts8P6Vv+s6KSjkB4SzFB/VawVLXHu09Nk2jUvjexSFk84mMfX8+WB4rx X-Received: by 2002:a17:90a:9315:b0:24e:3e07:9e27 with SMTP id p21-20020a17090a931500b0024e3e079e27mr843295pjo.10.1685004810404; Thu, 25 May 2023 01:53:30 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1685004810; cv=none; d=google.com; s=arc-20160816; b=snail3WRuqb9lETj0usxqgHj1BPJG1uvl4ek2xxEeEGQ1UODDlzY+phSFnhU/AmJSa F4t0oTyFtGp2ARBacHcLYI79h5etDzo1IxlILdOulofMzbqnaj0hluPek50rnhGNv1Tc Mmlbf2Fnd0na/YFMfrttTkOUMpH943NB5KHacADU3nAhenL324zawfnm/Ls3n9iTkqq3 /lMBmBQRBMHDA5P9Dzm9sLzfVqN42ggQD2xCSuj66PtHrWRA7NWP0op3WlVzR8xeBDZt qA1PVM8qSQKrTSGsc5SOT+nmObmW6ICITDIyBYGQWuHHMkw7Rc0vKPZhtQDaTzeYnTIK Op0Q== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:cc:to:in-reply-to:references:message-id :content-transfer-encoding:mime-version:subject:date:from :dkim-signature; bh=k66rQPOoFRNzRR5aSWWYeBLcZa0SzQjoYuJlxSEKAck=; b=vSFcnCoYMBR4aHfuYs0u1bxi3Z+pn9r57r89HZUeyj7p2SqfVPppwmFBlEckYYc3lF P2CD0qXLuAwrIm/Xg5Sd4R6PL+p+ORqzQgEM8iF9ML1eIgq8pDfAUhl8BOf6ZVoJCbaf Ns+fIqTKM+8qUDk9Thn43oxT4HHrJHYQastcqUGGCO5INoLmiQaot5+wddP84hPy9aNT HZ/N1MAuxQiCTqYDqEGmTcM/co29qCfjubsnHABFOlbg2c3zCtfxwBWMu+bzjKMtD2SR 7Gq/jcWDftYf/ApfbMGUnJIkpLED7+LiC2HXfyN7i/E33WgXOrTRi0hYAWnVAikjqZWt NWrQ== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@baylibre-com.20221208.gappssmtp.com header.s=20221208 header.b=PucTazVr; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: from out1.vger.email (out1.vger.email. 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[93.5.22.158]) by smtp.googlemail.com with ESMTPSA id o3-20020a5d6843000000b003095a329e90sm945809wrw.97.2023.05.25.01.33.58 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 25 May 2023 01:33:58 -0700 (PDT) From: Alexandre Mergnat Date: Thu, 25 May 2023 10:33:14 +0200 Subject: [PATCH v8 05/10] arm64: dts: mediatek: add mmc support for mt8365-evk MIME-Version: 1.0 Message-Id: <20230203-evk-board-support-v8-5-7019f3fd0adf@baylibre.com> References: <20230203-evk-board-support-v8-0-7019f3fd0adf@baylibre.com> In-Reply-To: <20230203-evk-board-support-v8-0-7019f3fd0adf@baylibre.com> To: Catalin Marinas , Will Deacon , Wim Van Sebroeck , Guenter Roeck , Rob Herring , Krzysztof Kozlowski , Matthias Brugger , AngeloGioacchino Del Regno , Conor Dooley Cc: linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, linux-watchdog@vger.kernel.org, devicetree@vger.kernel.org, linux-mediatek@lists.infradead.org, Alexandre Mergnat , Kevin Hilman X-Mailer: b4 0.12.2 X-Developer-Signature: v=1; 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a=openpgp; fpr=231B5ED7F3EAAA700E60FE8B2B46499D7E31D445 X-Spam-Status: No, score=-1.9 required=5.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,RCVD_IN_DNSWL_NONE,SPF_HELO_NONE,SPF_PASS, T_SCC_BODY_TEXT_LINE autolearn=unavailable autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-getmail-retrieved-from-mailbox: =?utf-8?q?INBOX?= X-GMAIL-THRID: =?utf-8?q?1766855604242372338?= X-GMAIL-MSGID: =?utf-8?q?1766855604242372338?= - Add EMMC support on mmc0 (internal memory) - Add SD-UHS support on mmc1 (external memory) Reviewed-by: AngeloGioacchino Del Regno Tested-by: Kevin Hilman Signed-off-by: Alexandre Mergnat --- arch/arm64/boot/dts/mediatek/mt8365-evk.dts | 138 ++++++++++++++++++++++++++++ 1 file changed, 138 insertions(+) diff --git a/arch/arm64/boot/dts/mediatek/mt8365-evk.dts b/arch/arm64/boot/dts/mediatek/mt8365-evk.dts index 6074aa9c1c3e..6e2f3601509e 100644 --- a/arch/arm64/boot/dts/mediatek/mt8365-evk.dts +++ b/arch/arm64/boot/dts/mediatek/mt8365-evk.dts @@ -95,6 +95,42 @@ &i2c0 { status = "okay"; }; +&mmc0 { + assigned-clock-parents = <&topckgen CLK_TOP_MSDCPLL>; + assigned-clocks = <&topckgen CLK_TOP_MSDC50_0_SEL>; + bus-width = <8>; + cap-mmc-highspeed; + cap-mmc-hw-reset; + hs400-ds-delay = <0x12012>; + max-frequency = <200000000>; + mmc-hs200-1_8v; + mmc-hs400-1_8v; + no-sd; + no-sdio; + non-removable; + pinctrl-0 = <&mmc0_default_pins>; + pinctrl-1 = <&mmc0_uhs_pins>; + pinctrl-names = "default", "state_uhs"; + vmmc-supply = <&mt6357_vemc_reg>; + vqmmc-supply = <&mt6357_vio18_reg>; + status = "okay"; +}; + +&mmc1 { + bus-width = <4>; + cap-sd-highspeed; + cd-gpios = <&pio 76 GPIO_ACTIVE_LOW>; + max-frequency = <200000000>; + pinctrl-0 = <&mmc1_default_pins>; + pinctrl-1 = <&mmc1_uhs_pins>; + pinctrl-names = "default", "state_uhs"; + sd-uhs-sdr104; + sd-uhs-sdr50; + vmmc-supply = <&mt6357_vmch_reg>; + vqmmc-supply = <&mt6357_vmc_reg>; + status = "okay"; +}; + &mt6357_pmic { interrupts-extended = <&pio 145 IRQ_TYPE_LEVEL_HIGH>; interrupt-controller; @@ -118,6 +154,108 @@ pins { }; }; + mmc0_default_pins: mmc0-default-pins { + clk-pins { + pinmux = ; + bias-pull-down; + }; + + cmd-dat-pins { + pinmux = , + , + , + , + , + , + , + , + ; + input-enable; + bias-pull-up; + }; + + rst-pins { + pinmux = ; + bias-pull-up; + }; + }; + + mmc0_uhs_pins: mmc0-uhs-pins { + clk-pins { + pinmux = ; + drive-strength = ; + bias-pull-down = ; + }; + + cmd-dat-pins { + pinmux = , + , + , + , + , + , + , + , + ; + input-enable; + drive-strength = ; + bias-pull-up = ; + }; + + ds-pins { + pinmux = ; + drive-strength = ; + bias-pull-down = ; + }; + + rst-pins { + pinmux = ; + drive-strength = ; + bias-pull-up; + }; + }; + + mmc1_default_pins: mmc1-default-pins { + cd-pins { + pinmux = ; + bias-pull-up; + }; + + clk-pins { + pinmux = ; + bias-pull-down = ; + }; + + cmd-dat-pins { + pinmux = , + , + , + , + ; + input-enable; + bias-pull-up = ; + }; + }; + + mmc1_uhs_pins: mmc1-uhs-pins { + clk-pins { + pinmux = ; + drive-strength = ; + bias-pull-down = ; + }; + + cmd-dat-pins { + pinmux = , + , + , + , + ; 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[93.5.22.158]) by smtp.googlemail.com with ESMTPSA id o3-20020a5d6843000000b003095a329e90sm945809wrw.97.2023.05.25.01.33.59 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 25 May 2023 01:34:00 -0700 (PDT) From: Alexandre Mergnat Date: Thu, 25 May 2023 10:33:15 +0200 Subject: [PATCH v8 06/10] arm64: dts: mediatek: add usb controller support for mt8365-evk MIME-Version: 1.0 Message-Id: <20230203-evk-board-support-v8-6-7019f3fd0adf@baylibre.com> References: <20230203-evk-board-support-v8-0-7019f3fd0adf@baylibre.com> In-Reply-To: <20230203-evk-board-support-v8-0-7019f3fd0adf@baylibre.com> To: Catalin Marinas , Will Deacon , Wim Van Sebroeck , Guenter Roeck , Rob Herring , Krzysztof Kozlowski , Matthias Brugger , AngeloGioacchino Del Regno , Conor Dooley Cc: linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, linux-watchdog@vger.kernel.org, devicetree@vger.kernel.org, linux-mediatek@lists.infradead.org, Alexandre Mergnat , Kevin Hilman X-Mailer: b4 0.12.2 X-Developer-Signature: v=1; a=openpgp-sha256; l=1321; i=amergnat@baylibre.com; h=from:subject:message-id; bh=aZ2qXzF7sVxQmHaiJcejpyAZGX7fMTSz7XCiEr1NHZQ=; b=owEBbQKS/ZANAwAKAStGSZ1+MdRFAcsmYgBkbx1v3iOZdwJ03az9WD84/dPhphD2BzdRB0pfrUgc 8ZcfMhKJAjMEAAEKAB0WIQQjG17X8+qqcA5g/osrRkmdfjHURQUCZG8dbwAKCRArRkmdfjHURSOxEA Ce12JAxQtwD8/aTHib8tARj0fpDn2KX4fdW+DbYxesXJC0AXt8cbcAVDQp4vcLQfJeTo02JcEdw2x4 o+NeJj87tKIB0dLhMl6z6M47/izlblgZNi5uK7lZl+Rj+SvlWxcsNGEbNLUaQrfUE4S69Z57VQKA/u 9B4ArZQF9pzI4vp9B6Iy7MsHxT5PoHbFXqrTWgHnXIACCg7OryHHR6pEcpFhAEN4grPbZKWF/TfLpo 77FGwe1GKwEhfLUEd+lznvF1MOULzWm9oCJCGQOcicjUO6xSWSp9m8ZYfvIgjCEXMZbOMxIcROXoAE CqA+JFY5giDb8rmpyxBhY8vxCyLWNAEA8ILXPWBDV3XsKXVlgRHtW7LJ/v064V1vOqhnttACp1UWZy Skj3CXpAUYIe7TRqjtS6i1sJ9iUMF0m7AI8yL21T0AhJENT2kevBuPQ/N4xLtiNEO0DrfwweAtPSfZ cWIDsJhvI9B4jjsLktGpYu2c+fxErGvpbAUUbGsvbk60XSkjvy/hhjM9ovgLsQ4QWNZBkqde7g03Ss MCN5sAHji3tYyBhEd8HoQBgBbZ/w4zbQ1YDWaV0Z9EOkH0AZUgDdICwR3Qqr6J1gxPavi6vuJYL0xe xgal7bfgfbU7e5QYV/ImzgauMpiWJiwp6HVzRUrF42a4fewEVKYeJ5Q2whfQ== X-Developer-Key: i=amergnat@baylibre.com; a=openpgp; fpr=231B5ED7F3EAAA700E60FE8B2B46499D7E31D445 X-Spam-Status: No, score=-1.9 required=5.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,RCVD_IN_DNSWL_NONE,SPF_HELO_NONE,SPF_PASS, T_SCC_BODY_TEXT_LINE autolearn=unavailable autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-getmail-retrieved-from-mailbox: =?utf-8?q?INBOX?= X-GMAIL-THRID: =?utf-8?q?1766854677232116288?= X-GMAIL-MSGID: =?utf-8?q?1766854677232116288?= This patch add support for SuperSpeed USB, in OTG mode, on micro connector. It also add support for the Extensible Host Controller Interface USB. Reviewed-by: AngeloGioacchino Del Regno Tested-by: Kevin Hilman Signed-off-by: Alexandre Mergnat --- arch/arm64/boot/dts/mediatek/mt8365-evk.dts | 22 ++++++++++++++++++++++ 1 file changed, 22 insertions(+) diff --git a/arch/arm64/boot/dts/mediatek/mt8365-evk.dts b/arch/arm64/boot/dts/mediatek/mt8365-evk.dts index 6e2f3601509e..1a5769c397c2 100644 --- a/arch/arm64/boot/dts/mediatek/mt8365-evk.dts +++ b/arch/arm64/boot/dts/mediatek/mt8365-evk.dts @@ -309,6 +309,28 @@ &pwm { status = "okay"; }; +&ssusb { + dr_mode = "otg"; + maximum-speed = "high-speed"; + pinctrl-0 = <&usb_pins>; + pinctrl-names = "default"; + usb-role-switch; + vusb33-supply = <&mt6357_vusb33_reg>; + status = "okay"; + + connector { + compatible = "gpio-usb-b-connector", "usb-b-connector"; + id-gpios = <&pio 17 GPIO_ACTIVE_HIGH>; + type = "micro"; + vbus-supply = <&usb_otg_vbus>; + }; +}; + +&usb_host { + vusb33-supply = <&mt6357_vusb33_reg>; + status = "okay"; +}; + &uart0 { pinctrl-0 = <&uart0_pins>; pinctrl-names = "default"; From patchwork Thu May 25 08:33:16 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Alexandre Mergnat X-Patchwork-Id: 98888 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a59:994d:0:b0:3d9:f83d:47d9 with SMTP id k13csp209446vqr; Thu, 25 May 2023 01:41:58 -0700 (PDT) X-Google-Smtp-Source: ACHHUZ5hbC01nu0nj1t8mKqk2nnq1D9m1fLEhLP+5nnx7G5J5XQcWVS9c2hY43eBp4cBA8rZc2Sc X-Received: by 2002:a05:6a20:9390:b0:10f:1e5d:9045 with SMTP id x16-20020a056a20939000b0010f1e5d9045mr1311963pzh.45.1685004117754; Thu, 25 May 2023 01:41:57 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1685004117; cv=none; d=google.com; s=arc-20160816; b=RUejw78XGv3kSHoGvR8CNc1TIAYjqksuStkPVo1wtv2aih2tgS5mw1Q1+WjgqQ4wyu CT/zYL6Ip9y/KQPqJfQTD2Cf2Sc/+e5d86U3FujvSpXAYrEzAfAHv1aL9rPu7S/WX/DC M3f2povmRyKVIiykd+mBbWvDolwn7VDTkSXw8rPLU05cgs9EnSgXl/VG/JJQ5UyXwY2w pXoFU9WP6iLvK4lTYVi0VVNVtDiAJoXzjVtYXuve1Tla7OcM5NhfI8OHhGYLagIZ7hQj 3OLqCFQZN1kbYUgtgu7ShWi8o8HyTu5/iaKDtLXpBuNlRC+mcSN0brCiefa050AeUBLC Jbnw== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:cc:to:in-reply-to:references:message-id :content-transfer-encoding:mime-version:subject:date:from :dkim-signature; bh=21sgxyywgbmhgk/Ve+LU4uP54gwzQ24rV+EZbQmdloE=; b=l6WBkwljDwZSFYTbRrPK9hSUz3PKxdFL/nrxMPhlOWx5kJEFmFguLVZaggYJ4T4qWU ieEsCJAUDDf6y4ponnieVEL8z3JdoWrFFKYO69q7Bx9+Wtfr9ZY1xgbkcsmTbpCBSqzX zkA9V5FhnJsLCaf6ZWh67X53e/82tnZNaaMiKqThU15g5duiuPV13YXTKa5vtYAlmIRq 5gZtVu5Eaq5rB/l/8OhBLm0CSdlDok49OhRnheCsjGBaOLr1gWcSJUxlefhkCklSKyhi g1mdEK2QoeS3081urwTKmG8Ldp6/gsVbgMDpARKecaPCPjrSTscMWf3Mz7S96rgyd1eQ cwmA== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@baylibre-com.20221208.gappssmtp.com header.s=20221208 header.b=oSbo7Tg1; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: from out1.vger.email (out1.vger.email. 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Tested-by: Kevin Hilman Signed-off-by: Alexandre Mergnat Reviewed-by: AngeloGioacchino Del Regno --- arch/arm64/boot/dts/mediatek/mt8365-evk.dts | 48 +++++++++++++++++++++++++++++ 1 file changed, 48 insertions(+) diff --git a/arch/arm64/boot/dts/mediatek/mt8365-evk.dts b/arch/arm64/boot/dts/mediatek/mt8365-evk.dts index 1a5769c397c2..86524cbf4354 100644 --- a/arch/arm64/boot/dts/mediatek/mt8365-evk.dts +++ b/arch/arm64/boot/dts/mediatek/mt8365-evk.dts @@ -88,6 +88,29 @@ optee_reserved: optee@43200000 { }; }; +ðernet { + pinctrl-0 = <ðernet_pins>; + pinctrl-names = "default"; + phy-handle = <ð_phy>; + phy-mode = "rmii"; + /* + * Ethernet and HDMI (DSI0) are sharing pins. + * Only one can be enabled at a time and require the physical switch + * SW2101 to be set on LAN position + * mt6357_vibr_reg and mt6357_vsim2_reg are needed to supply ethernet + */ + status = "disabled"; + + mdio { + #address-cells = <1>; + #size-cells = <0>; + + eth_phy: ethernet-phy@0 { + reg = <0>; + }; + }; +}; + &i2c0 { clock-frequency = <100000>; pinctrl-0 = <&i2c0_pins>; @@ -138,6 +161,31 @@ &mt6357_pmic { }; &pio { + ethernet_pins: ethernet-pins { + phy_reset_pins { + pinmux = ; + }; + + rmii_pins { + pinmux = , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + ; + }; + }; + gpio_keys: gpio-keys-pins { pins { pinmux = ; From patchwork Thu May 25 08:33:17 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Alexandre Mergnat X-Patchwork-Id: 98898 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a59:994d:0:b0:3d9:f83d:47d9 with SMTP id k13csp214033vqr; Thu, 25 May 2023 01:54:15 -0700 (PDT) X-Google-Smtp-Source: ACHHUZ4NXM2bfD81/WN5zVv/Mdeb3+j5I21JzTkkhibFqqNTxkzk6DDl6ewgqjILmjHJvAa9I6ai X-Received: by 2002:a17:902:bd01:b0:1aa:ef83:34be with SMTP id p1-20020a170902bd0100b001aaef8334bemr910008pls.47.1685004855233; Thu, 25 May 2023 01:54:15 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1685004855; cv=none; d=google.com; s=arc-20160816; b=hYPi1H2GO6xJ54JJIGCZVQ84ZmCLLA3zwZOESLimX4hlD3RCrh0aiPKs0mafEu1mQw 6L+1CMU+ANBb4c4DAJNKH0QhafchK7o0epIhGVoO/nmOB8eAe2L0p0Gz0oThmkJSeE5K BRtPSfetvclPHymXDQj9dTcUqqpcHQpw2VHQCll32cbsFg8P6Gwr5bWPYRJfY0IrmLvT PSEeoWD8VKtD8i9HJ5A8h3Su0y+1bWvnqP3nOFFzd2Rv3Sr2nsqwbMaKe1EuJPE4XSY+ CTg0gXOFPKaFpF+bUWoEP5rRN1itTiAZSgnap68vwXzNFfiJ2frVNUabTS4RtBY9AhQ5 nZNg== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:cc:to:in-reply-to:references:message-id :content-transfer-encoding:mime-version:subject:date:from :dkim-signature; bh=P8BG56Q0+m7b3FaG//0Q095XeVZlwC5hERE//1oBbUU=; b=ZTiErADmSgJQhHdlK5BEUvHggskQtJYIPvxcGpnZ8gzCfAXo+q3I5v1BFkp9TmNBak x4NeoWXG22yZuaH7jYr4MMoXR98HARmz0Ddhx9P1OocGA/EIujRgFypHhVTADp66VwuR TrRMo6/7XNAR1sTtofecxd6ju6jv7v1BF+hy84zdVtJcUAg7e7doz0RdcSyUSGII+VEG k1KqixheDFQepai2GYwq0RjUTDlM32t4/+XUkWdijPcUWlOUFuVGLHjxDL6VtJnGkYOB u6fFT9M7oujHdpBuFgn9lJ4m9FSP0LVyHvNrWt+BETtQHVmGHoZO468f7SjISFn524kg fz3Q== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@baylibre-com.20221208.gappssmtp.com header.s=20221208 header.b=Nr+YXCF7; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: from out1.vger.email (out1.vger.email. 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[93.5.22.158]) by smtp.googlemail.com with ESMTPSA id o3-20020a5d6843000000b003095a329e90sm945809wrw.97.2023.05.25.01.34.01 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 25 May 2023 01:34:02 -0700 (PDT) From: Alexandre Mergnat Date: Thu, 25 May 2023 10:33:17 +0200 Subject: [PATCH v8 08/10] arm64: dts: mediatek: add OPP support for mt8365 SoC MIME-Version: 1.0 Message-Id: <20230203-evk-board-support-v8-8-7019f3fd0adf@baylibre.com> References: <20230203-evk-board-support-v8-0-7019f3fd0adf@baylibre.com> In-Reply-To: <20230203-evk-board-support-v8-0-7019f3fd0adf@baylibre.com> To: Catalin Marinas , Will Deacon , Wim Van Sebroeck , Guenter Roeck , Rob Herring , Krzysztof Kozlowski , Matthias Brugger , AngeloGioacchino Del Regno , Conor Dooley Cc: linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, linux-watchdog@vger.kernel.org, devicetree@vger.kernel.org, linux-mediatek@lists.infradead.org, Alexandre Mergnat , Kevin Hilman X-Mailer: b4 0.12.2 X-Developer-Signature: v=1; a=openpgp-sha256; l=3792; i=amergnat@baylibre.com; h=from:subject:message-id; bh=iQCxmnK+eQfy1aBNVxZAL4gcwl2Oh2buOTNBmT3l0E0=; b=owEBbQKS/ZANAwAKAStGSZ1+MdRFAcsmYgBkbx1v2Yzq2DRngEYVG4rSFQTE2FWufu/fkoiCUkWJ krZYeTaJAjMEAAEKAB0WIQQjG17X8+qqcA5g/osrRkmdfjHURQUCZG8dbwAKCRArRkmdfjHURdZ/EA CQPVys/VGqd7jIPh9AInyGVijaFiERtOfBmuvuqA8Bt20lYHwME4a53+FyYWyITy933qJlFMhhXA3J ce+yaRpo5/+JZdzXepXvleBH8sL7bxzJsHaEzPGp32LAdanMl02n78+VeR5w7qG6Hp1d/uDS7syquc EMyT833oMq1IHuWjMm6UldcieFk3DA3lpmd+PXlq7vsvzZ0EIfWPwdVGuvnQnA9z+UBIdP9+Fg8pOA UMJ8UimvEKyGOGuwL6mMl9P+FO1NP4yiOLq82EpoEF1B+0qNYuEF6bDXAJg50UyetuNJIt8D6qVNnq mnxXUs+hz8UPWxy472I4q8TDcA6EIpy+MtbFY+fAUOOzLJ3svEzTnk/IO6ypfcEGI1yqD5GWoIRc9b jwA8aSplVDx5xKjQy/nWrIt7PBKoxQT+9PW9sBnapr6nJXFQJdv+WcRMNUZNIEc2SX/rDBB5antRWO rk613AApeQk5lf7SRlxP8X5LM7b5q5x6+GcfwJCjuL+aY9KS2iMjzzThYbyhbV3C7H3c+hkosyuL8+ v9HPQy2Z1B9UzbYqgFciBYDg3W202OnV5DpZpgXOh6M0wxEUHWOnZGsHTGkVjurxVRX2WEhXdeTKiH MtJgcvvM4KVXTlH/OquXvLTnXi1cphlxXHtYK6Hj0YqQnHmRVAVKTjD6K1Tg== X-Developer-Key: i=amergnat@baylibre.com; a=openpgp; fpr=231B5ED7F3EAAA700E60FE8B2B46499D7E31D445 X-Spam-Status: No, score=-1.9 required=5.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,RCVD_IN_DNSWL_NONE,SPF_HELO_NONE,SPF_PASS, T_SCC_BODY_TEXT_LINE autolearn=unavailable autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-getmail-retrieved-from-mailbox: =?utf-8?q?INBOX?= X-GMAIL-THRID: =?utf-8?q?1766855650808402798?= X-GMAIL-MSGID: =?utf-8?q?1766855650808402798?= In order to have cpufreq support, this patch adds generic Operating Performance Points support. Reviewed-by: AngeloGioacchino Del Regno Tested-by: Kevin Hilman Signed-off-by: Alexandre Mergnat --- arch/arm64/boot/dts/mediatek/mt8365.dtsi | 101 +++++++++++++++++++++++++++++++ 1 file changed, 101 insertions(+) diff --git a/arch/arm64/boot/dts/mediatek/mt8365.dtsi b/arch/arm64/boot/dts/mediatek/mt8365.dtsi index bb45aab2e6a9..cfe0c67ad61f 100644 --- a/arch/arm64/boot/dts/mediatek/mt8365.dtsi +++ b/arch/arm64/boot/dts/mediatek/mt8365.dtsi @@ -20,6 +20,91 @@ cpus { #address-cells = <1>; #size-cells = <0>; + cluster0_opp: opp-table-0 { + compatible = "operating-points-v2"; + opp-shared; + + opp-850000000 { + opp-hz = /bits/ 64 <850000000>; + opp-microvolt = <650000>; + }; + + opp-918000000 { + opp-hz = /bits/ 64 <918000000>; + opp-microvolt = <668750>; + }; + + opp-987000000 { + opp-hz = /bits/ 64 <987000000>; + opp-microvolt = <687500>; + }; + + opp-1056000000 { + opp-hz = /bits/ 64 <1056000000>; + opp-microvolt = <706250>; + }; + + opp-1125000000 { + opp-hz = /bits/ 64 <1125000000>; + opp-microvolt = <725000>; + }; + + opp-1216000000 { + opp-hz = /bits/ 64 <1216000000>; + opp-microvolt = <750000>; + }; + + opp-1308000000 { + opp-hz = /bits/ 64 <1308000000>; + opp-microvolt = <775000>; + }; + + opp-1400000000 { + opp-hz = /bits/ 64 <1400000000>; + opp-microvolt = <800000>; + }; + + opp-1466000000 { + opp-hz = /bits/ 64 <1466000000>; + opp-microvolt = <825000>; + }; + + opp-1533000000 { + opp-hz = /bits/ 64 <1533000000>; + opp-microvolt = <850000>; + }; + + opp-1633000000 { + opp-hz = /bits/ 64 <1633000000>; + opp-microvolt = <887500>; + }; + + opp-1700000000 { + opp-hz = /bits/ 64 <1700000000>; + opp-microvolt = <912500>; + }; + + opp-1767000000 { + opp-hz = /bits/ 64 <1767000000>; + opp-microvolt = <937500>; + }; + + opp-1834000000 { + opp-hz = /bits/ 64 <1834000000>; + opp-microvolt = <962500>; + }; + + opp-1917000000 { + opp-hz = /bits/ 64 <1917000000>; + opp-microvolt = <993750>; + }; + + opp-2001000000 { + opp-hz = /bits/ 64 <2001000000>; + opp-microvolt = <1025000>; + }; + }; + cpu-map { cluster0 { core0 { @@ -50,6 +135,10 @@ cpu0: cpu@0 { d-cache-line-size = <64>; d-cache-sets = <256>; next-level-cache = <&l2>; + clocks = <&mcucfg CLK_MCU_BUS_SEL>, + <&apmixedsys CLK_APMIXED_MAINPLL>; + clock-names = "cpu", "intermediate"; + operating-points-v2 = <&cluster0_opp>; }; cpu1: cpu@1 { @@ -65,6 +154,10 @@ cpu1: cpu@1 { d-cache-line-size = <64>; d-cache-sets = <256>; next-level-cache = <&l2>; + clocks = <&mcucfg CLK_MCU_BUS_SEL>, + <&apmixedsys CLK_APMIXED_MAINPLL>; + clock-names = "cpu", "intermediate", "armpll"; + operating-points-v2 = <&cluster0_opp>; }; cpu2: cpu@2 { @@ -80,6 +173,10 @@ cpu2: cpu@2 { d-cache-line-size = <64>; d-cache-sets = <256>; next-level-cache = <&l2>; + clocks = <&mcucfg CLK_MCU_BUS_SEL>, + <&apmixedsys CLK_APMIXED_MAINPLL>; + clock-names = "cpu", "intermediate", "armpll"; + operating-points-v2 = <&cluster0_opp>; }; cpu3: cpu@3 { @@ -95,6 +192,10 @@ cpu3: cpu@3 { d-cache-line-size = <64>; d-cache-sets = <256>; next-level-cache = <&l2>; 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[93.5.22.158]) by smtp.googlemail.com with ESMTPSA id o3-20020a5d6843000000b003095a329e90sm945809wrw.97.2023.05.25.01.34.03 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 25 May 2023 01:34:03 -0700 (PDT) From: Alexandre Mergnat Date: Thu, 25 May 2023 10:33:18 +0200 Subject: [PATCH v8 09/10] arm64: dts: mediatek: add cpufreq support for mt8365-evk MIME-Version: 1.0 Message-Id: <20230203-evk-board-support-v8-9-7019f3fd0adf@baylibre.com> References: <20230203-evk-board-support-v8-0-7019f3fd0adf@baylibre.com> In-Reply-To: <20230203-evk-board-support-v8-0-7019f3fd0adf@baylibre.com> To: Catalin Marinas , Will Deacon , Wim Van Sebroeck , Guenter Roeck , Rob Herring , Krzysztof Kozlowski , Matthias Brugger , AngeloGioacchino Del Regno , Conor Dooley Cc: linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, linux-watchdog@vger.kernel.org, devicetree@vger.kernel.org, linux-mediatek@lists.infradead.org, Alexandre Mergnat , Kevin Hilman X-Mailer: b4 0.12.2 X-Developer-Signature: v=1; a=openpgp-sha256; l=1201; i=amergnat@baylibre.com; h=from:subject:message-id; bh=OvTRcKiKU/s8W5BwjdAVnfLSdt2CT87vdN092ipTOos=; b=owEBbQKS/ZANAwAKAStGSZ1+MdRFAcsmYgBkbx1vbvuy1WNJ/1D1BVf3YSRSbsSUx2VB9NcibDld ohDbjtiJAjMEAAEKAB0WIQQjG17X8+qqcA5g/osrRkmdfjHURQUCZG8dbwAKCRArRkmdfjHUReu8D/ oCNtNJ7CLUns6EscpWxF4xi+neHGt2aLVh+oMRVEHPE2Lim6v+HhD7WcsFWuw+DIpg1/6aCwmWinQ5 CAY4/5DkhyAHPcMadY1IqrCOlPC7Y7UVr/8nOtidkboNctUyC1ajVLOj9NWCGpjQl0/aH0OpkSgmhH 30WCSKvl1jcKuCNbfAYUy6oaqNxoZTmy0rYzxVQnBxRXMoZ+eF6yUnrTKSDJcj9i0lg0cnRPfP70Ax F6YAeTfIli3DUu5GGPh7196zn8ZmxwttTWsBbG9MZz1xj7AXxEpiZk7avGMBrfGXNIv32/gmz8kcWX 8KhDD8UbEcYGu0xrrVEuVhlO4bqjdwK88ZSLkE3ZNbx/CCQUd89R9+GLRqUFhdIkASLPuRH5gqqNkB wYb1X11AhUC4ByMwpT4AzZQYEo2wQA7mObrYk8cVtpa9Dc5o112GTEmIlxKozhadu9KtGNLawAwaax Uvo5l3axpnosk0kdZCqksFPGOyMPHVWX9xBr1XHvclM5AgPlBs9MJS0ZGoJtydAcw+TSLdVfnHzzE1 gdpGF0Hojoa8NEIqRAuw2JtlC9uooBZOCWLW+MnRTTwNMgPg1ElALo9f1I9JNKSpjy6mXklPPWVvxB XA6kc03Ss286/8KxS2raxjqAzZCasRjLfCEj7v5SJmfj2vyDcpeqzmx5QYjg== X-Developer-Key: i=amergnat@baylibre.com; a=openpgp; fpr=231B5ED7F3EAAA700E60FE8B2B46499D7E31D445 X-Spam-Status: No, score=-1.9 required=5.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,RCVD_IN_DNSWL_NONE,SPF_HELO_NONE,SPF_PASS, T_SCC_BODY_TEXT_LINE autolearn=unavailable autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-getmail-retrieved-from-mailbox: =?utf-8?q?INBOX?= X-GMAIL-THRID: =?utf-8?q?1766855064272632458?= X-GMAIL-MSGID: =?utf-8?q?1766855064272632458?= In order to have cpufreq support, this patch adds proc-supply and sram-supply for each CPU. Reviewed-by: AngeloGioacchino Del Regno Tested-by: Kevin Hilman Signed-off-by: Alexandre Mergnat --- arch/arm64/boot/dts/mediatek/mt8365-evk.dts | 20 ++++++++++++++++++++ 1 file changed, 20 insertions(+) diff --git a/arch/arm64/boot/dts/mediatek/mt8365-evk.dts b/arch/arm64/boot/dts/mediatek/mt8365-evk.dts index 86524cbf4354..50cbaefa1a99 100644 --- a/arch/arm64/boot/dts/mediatek/mt8365-evk.dts +++ b/arch/arm64/boot/dts/mediatek/mt8365-evk.dts @@ -88,6 +88,26 @@ optee_reserved: optee@43200000 { }; }; +&cpu0 { + proc-supply = <&mt6357_vproc_reg>; + sram-supply = <&mt6357_vsram_proc_reg>; +}; + +&cpu1 { + proc-supply = <&mt6357_vproc_reg>; + sram-supply = <&mt6357_vsram_proc_reg>; +}; + +&cpu2 { + proc-supply = <&mt6357_vproc_reg>; + sram-supply = <&mt6357_vsram_proc_reg>; +}; + +&cpu3 { + proc-supply = <&mt6357_vproc_reg>; + sram-supply = <&mt6357_vsram_proc_reg>; +}; + ðernet { pinctrl-0 = <ðernet_pins>; pinctrl-names = "default"; From patchwork Thu May 25 08:33:19 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Alexandre Mergnat X-Patchwork-Id: 98897 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a59:994d:0:b0:3d9:f83d:47d9 with SMTP id k13csp213909vqr; Thu, 25 May 2023 01:53:57 -0700 (PDT) X-Google-Smtp-Source: ACHHUZ6asFkgHyV79ekb96CZzjXO0pQvk236XIqU1ffG8jKj4qX8J927qIWGYzxjyD5MdbJR4Wdm X-Received: by 2002:a17:902:c94e:b0:1af:b5af:367b with SMTP id i14-20020a170902c94e00b001afb5af367bmr1028348pla.29.1685004837396; Thu, 25 May 2023 01:53:57 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1685004837; cv=none; d=google.com; s=arc-20160816; b=rfFdhs6eFDjZMVjbBXUz2tA5C4ss73+q1AtrBXkp1jgfdCytkuMqKRyFg8XNs3y0p1 MRr+R7h/iBmb4n4slJMyOo1fQb1+cWWBG32/Xyp/20I/iTE1jDqRiUksfUZQaNNwKeNM ooCjr9I6UeeYZjHkH42YkguQQok9rMIJyY86jvtlGQWFEPWES7Iol+6ykOxsqEtpM5US pHvyEx8bw4XARmpMDIyMOyxXDbXGPG44ibdDAepzuux6yKUwiPjSUTVwnPfDL2eG+Dkl wAtllrnEAn7jLDqhHC1HPiXBY74Z+V5sr5/7gBAGQRUcdkxF3eCalPoBljmw/cLGedFs ocIg== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:cc:to:in-reply-to:references:message-id :content-transfer-encoding:mime-version:subject:date:from :dkim-signature; bh=RRBwEvfGQIrh+pVMdhdSvf8KI6OxPqchD4EYbezjkwM=; b=P3izAGsnbtcELmGAzlD5Gm35wa2dW25j9mNAwcZlOmtu0LreG/1OAzeyfP90tVp5Qr 2aPsKeXBQoi/VHTmqLkkUASPIAMroRHpYkkZ6sOnwGd5M7EGqYlTSpyBDOSJaoUY/NjN 7r8jTjURZOcXWZBwDvLIdW1vKWasBGEruW+HDVTHpBYU7mUNAJsnTcUW9GNAam3KPJQx pFWeITy+E+icV/2l+7qaBwj/xTdxyTp0bviRL1ArEpYsIye2c054ooVaueiEEfNrFSPg GfuZs3dDIH7cxlWw0CmIfsbYcoAGljxDqZTV+SczrAauTyEPQ3peuGJceLfALFiSCnvp ACEA== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@baylibre-com.20221208.gappssmtp.com header.s=20221208 header.b=LlvJ9cdb; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: from out1.vger.email (out1.vger.email. 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[93.5.22.158]) by smtp.googlemail.com with ESMTPSA id o3-20020a5d6843000000b003095a329e90sm945809wrw.97.2023.05.25.01.34.04 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 25 May 2023 01:34:05 -0700 (PDT) From: amergnat@baylibre.com Date: Thu, 25 May 2023 10:33:19 +0200 Subject: [PATCH v8 10/10] arm64: dts: mediatek: Add CPU Idle support MIME-Version: 1.0 Message-Id: <20230203-evk-board-support-v8-10-7019f3fd0adf@baylibre.com> References: <20230203-evk-board-support-v8-0-7019f3fd0adf@baylibre.com> In-Reply-To: <20230203-evk-board-support-v8-0-7019f3fd0adf@baylibre.com> To: Catalin Marinas , Will Deacon , Wim Van Sebroeck , Guenter Roeck , Rob Herring , Krzysztof Kozlowski , Matthias Brugger , AngeloGioacchino Del Regno , Conor Dooley Cc: linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, linux-watchdog@vger.kernel.org, devicetree@vger.kernel.org, linux-mediatek@lists.infradead.org, Alexandre Mergnat , Amjad Ouled-Ameur , Kevin Hilman X-Mailer: b4 0.12.2 X-Developer-Signature: v=1; a=openpgp-sha256; l=2737; i=amergnat@baylibre.com; h=from:subject:message-id; bh=vYzOQ2oc5j6ZLGT/M6bLKTIS/chNEplrOLaJKWbM7ds=; b=owEBbQKS/ZANAwAKAStGSZ1+MdRFAcsmYgBkbx1vwwfm1FE2tPgSwzNRmNwwkLok2bisOz/1j0Ht xM5kYK2JAjMEAAEKAB0WIQQjG17X8+qqcA5g/osrRkmdfjHURQUCZG8dbwAKCRArRkmdfjHURe6hEA CtgM2LWXjgPP5/TBAZ/A8Jg3uvPT49uwSr9+u5wdaLwvCpQcJDlemVP91cnOgJk0yEdYZaaU3TlWiC EX1+LeulD9lSiUFaxAdUf1Qrzq6D0rKDJt+9x1uBQ+2JtNRXbHh30eed7kKhXwGcK1jaszwqAY17FP LyC+bCmz9eL0Nc8LCMe8yB0zdVio/buNBKl33CRRC8uuTvnL2sUaBWTSwlB0Wsbxh1oTrfs2jaUN/C OK1cnqEmduCuFVrqzzxIy5DmWegN1lk6GrgVwcgdYYwb1VNrEIppclJ1+QBV5txM0sZKVRkO2dQRWG l+Y/BzsztEFNmgGj06H/2FX2ZWKpT+HEiZd/qZuETguOYQU4Ot1+Z3ybwEe6byMooYgDISpleqy0Kp ggiNz5KChGAkv+U4Z5C+mllOzr4QCXtnSQDP6wjMDJqVQdG2sn6H1rxOaAuDK76IRNRWKAMEtxuZ0d ofjZ8GA/1lNQIyRKM/Nou6cCQonCwUyCc9DGcFon1u+JAgyUdp4R5xidFjLKryztcbtLDoVwAB4hhj jzfwzhn3+ryEwoICdjNgF5tSojag6QuyHGVnQd9njGabSWQwTOEQa35a15FzyuGddZu0t5HbX6ierO B8STaKWzGY9v+88nceQrS/WZITiPlzzotX21Hylm0PCQc1jZ4uXUtd1deg1g== X-Developer-Key: i=amergnat@baylibre.com; a=openpgp; fpr=231B5ED7F3EAAA700E60FE8B2B46499D7E31D445 X-Spam-Status: No, score=-1.9 required=5.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,RCVD_IN_DNSWL_NONE,SPF_HELO_NONE,SPF_PASS, T_SCC_BODY_TEXT_LINE autolearn=unavailable autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-getmail-retrieved-from-mailbox: =?utf-8?q?INBOX?= X-GMAIL-THRID: =?utf-8?q?1766855632787880775?= X-GMAIL-MSGID: =?utf-8?q?1766855632787880775?= From: Amjad Ouled-Ameur MT8365 has 3 CPU Idle states: - MCDI_CPU. (Multi-Core-Deep-Idle) - MCDI_CLUSTER. - DPIDLE. (Deep-Idle) Signed-off-by: Amjad Ouled-Ameur Reviewed-by: AngeloGioacchino Del Regno Tested-by: Kevin Hilman Signed-off-by: Alexandre Mergnat --- arch/arm64/boot/dts/mediatek/mt8365.dtsi | 35 ++++++++++++++++++++++++++++++++ 1 file changed, 35 insertions(+) diff --git a/arch/arm64/boot/dts/mediatek/mt8365.dtsi b/arch/arm64/boot/dts/mediatek/mt8365.dtsi index cfe0c67ad61f..413496c92069 100644 --- a/arch/arm64/boot/dts/mediatek/mt8365.dtsi +++ b/arch/arm64/boot/dts/mediatek/mt8365.dtsi @@ -128,6 +128,7 @@ cpu0: cpu@0 { reg = <0x0>; #cooling-cells = <2>; enable-method = "psci"; + cpu-idle-states = <&CPU_MCDI &CLUSTER_MCDI &CLUSTER_DPIDLE>; i-cache-size = <0x8000>; i-cache-line-size = <64>; i-cache-sets = <256>; @@ -147,6 +148,7 @@ cpu1: cpu@1 { reg = <0x1>; #cooling-cells = <2>; enable-method = "psci"; + cpu-idle-states = <&CPU_MCDI &CLUSTER_MCDI &CLUSTER_DPIDLE>; i-cache-size = <0x8000>; i-cache-line-size = <64>; i-cache-sets = <256>; @@ -166,6 +168,7 @@ cpu2: cpu@2 { reg = <0x2>; #cooling-cells = <2>; enable-method = "psci"; + cpu-idle-states = <&CPU_MCDI &CLUSTER_MCDI &CLUSTER_DPIDLE>; i-cache-size = <0x8000>; i-cache-line-size = <64>; i-cache-sets = <256>; @@ -185,6 +188,7 @@ cpu3: cpu@3 { reg = <0x3>; #cooling-cells = <2>; enable-method = "psci"; + cpu-idle-states = <&CPU_MCDI &CLUSTER_MCDI &CLUSTER_DPIDLE>; i-cache-size = <0x8000>; i-cache-line-size = <64>; i-cache-sets = <256>; @@ -198,6 +202,37 @@ cpu3: cpu@3 { operating-points-v2 = <&cluster0_opp>; }; + idle-states { + entry-method = "psci"; + + CPU_MCDI: cpu-mcdi { + compatible = "arm,idle-state"; + local-timer-stop; + arm,psci-suspend-param = <0x00010001>; + entry-latency-us = <300>; + exit-latency-us = <200>; + min-residency-us = <1000>; + }; + + CLUSTER_MCDI: cluster-mcdi { + compatible = "arm,idle-state"; + local-timer-stop; + arm,psci-suspend-param = <0x01010001>; + entry-latency-us = <350>; + exit-latency-us = <250>; + min-residency-us = <1200>; + }; + + CLUSTER_DPIDLE: cluster-dpidle { + compatible = "arm,idle-state"; + local-timer-stop; + arm,psci-suspend-param = <0x01010004>; + entry-latency-us = <300>; + exit-latency-us = <800>; + min-residency-us = <3300>; + }; + }; + l2: l2-cache { compatible = "cache"; cache-level = <2>;