From patchwork Thu May 25 00:31:52 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Chris Packham X-Patchwork-Id: 98730 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a59:994d:0:b0:3d9:f83d:47d9 with SMTP id k13csp22158vqr; Wed, 24 May 2023 17:48:36 -0700 (PDT) X-Google-Smtp-Source: ACHHUZ66WTwwbpmrrHgEcXxPTGG3BD9fiow5GKUe+19KjrSdX354/rS0PdsBwZOJ3mnqp+W9KL2n X-Received: by 2002:a05:6a21:7891:b0:103:b0f9:7110 with SMTP id bf17-20020a056a21789100b00103b0f97110mr23985592pzc.11.1684975715456; Wed, 24 May 2023 17:48:35 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1684975715; cv=none; d=google.com; s=arc-20160816; b=AqJjXkZP1ugHcxW3ZhdJVsIMngklrRFvrdyDq++HcZ9jTNvGLx8my+AcA/tg9qzxWm KbatrVc1gyzT0NPnm3J5xfe6NHq/afQmrmaL4Hh+4o0C7VTowhaTUzsr0xloX6rZULgs eBUFhrf3iaB2N8Fm0kJd4ZnJXkayDvdF/1S2MXf4Bgj86j4yagpsLoZbXn8hMStMy01y fJj5w1Iyx/3cPX+puvwlpUNR7AfpZ6hyrEUgvXtX+CHBs3p1y1Q/vCuthzLe20M6NILR rbqEYBNlpy623081LAi8mZHGTUCI0osTEZPzPBj125zOmqC01HsmP+8la8cTeJUVkI9u MNWQ== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:content-transfer-encoding:mime-version :message-id:date:subject:cc:to:from:dkim-signature; bh=Lvr1PvxyEMKfKUGJolqQlJ6+ld4nzaPBzJ+1S/SPA/0=; b=nSRPBBSdU1MeapavPoMygwqd/CQmIqh1kNS1ds1r4RXyeS3/8RGS091cyvQbWNUS++ Uxsh7IXnqD7ZMyBz83z+nE7Ch1l98R0gqWdyhtyVNMG7BQZ+P9OqPRsNN6ThScOGg/3N to4BJ3VYfdctWkuFDAppsDvmweLjfoaJPsOhFUVQMfA3Y6dEuaXj6eXOeDTwiZsl8N47 VuBDRWdrVi1ErzV7eIkT5jX+O4oVSU093lexEVq9db2+Cb6nYoLJAdTA97WKzL9dAbdq qvSrr+baHHuMeFlg3+kOUvW0jrbt9h0aY0n3RaFM3Nkr/NeWa8vPVvsgPLt33kk1K+yU g6MQ== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@alliedtelesis.co.nz header.s=mail181024 header.b=sNaiXdW9; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=QUARANTINE sp=REJECT dis=NONE) header.from=alliedtelesis.co.nz Received: from out1.vger.email (out1.vger.email. [2620:137:e000::1:20]) by mx.google.com with ESMTP id k136-20020a636f8e000000b0052c575f1d8dsi1609671pgc.260.2023.05.24.17.48.07; Wed, 24 May 2023 17:48:35 -0700 (PDT) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) client-ip=2620:137:e000::1:20; Authentication-Results: mx.google.com; dkim=pass header.i=@alliedtelesis.co.nz header.s=mail181024 header.b=sNaiXdW9; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=QUARANTINE sp=REJECT dis=NONE) header.from=alliedtelesis.co.nz Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S234798AbjEYAcN (ORCPT + 99 others); Wed, 24 May 2023 20:32:13 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:40650 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229652AbjEYAcI (ORCPT ); Wed, 24 May 2023 20:32:08 -0400 Received: from gate2.alliedtelesis.co.nz (gate2.alliedtelesis.co.nz [IPv6:2001:df5:b000:5::4]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 84967AA for ; Wed, 24 May 2023 17:32:06 -0700 (PDT) Received: from svr-chch-seg1.atlnz.lc (mmarshal3.atlnz.lc [10.32.18.43]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (4096 bits) server-digest SHA256) (Client did not present a certificate) by gate2.alliedtelesis.co.nz (Postfix) with ESMTPS id C401C2C0288; Thu, 25 May 2023 12:31:57 +1200 (NZST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=alliedtelesis.co.nz; s=mail181024; t=1684974717; bh=Lvr1PvxyEMKfKUGJolqQlJ6+ld4nzaPBzJ+1S/SPA/0=; h=From:To:Cc:Subject:Date:From; b=sNaiXdW98mQypYzw+clMx7vlTcQeyVcQVkVPHoLe6qmSidvGHc7/1NtlxJHC/hOf+ /rrhkl+DZC3Z5MhS2nnmwAOyUHRSyjLzIcIcdSV2Yu00qOVzTH6sB0X2p55Rc+IkHq Xr5ZbVi2pUxq5P2vFv9VGxvmGDwEeyehXJlsQntfP1aMoF9NGiVomTcek93lEv05Qf uAQGiYsKDn6D04RifJP6y9SLSNlLCSBuZrvnKgdBX9bJE15tDWuw8IsoWBNWwH5sD0 yb8KlJtlFYak7j7MtQAsTiw5LGJjOop0cfi/DnFzEefGfrlxh3y37Bxt7MW/ijq9PC cJE0lS3at4wOg== Received: from pat.atlnz.lc (Not Verified[10.32.16.33]) by svr-chch-seg1.atlnz.lc with Trustwave SEG (v8,2,6,11305) id ; Thu, 25 May 2023 12:31:57 +1200 Received: from chrisp-dl.ws.atlnz.lc (chrisp-dl.ws.atlnz.lc [10.33.22.30]) by pat.atlnz.lc (Postfix) with ESMTP id 929A913EDE9; Thu, 25 May 2023 12:31:57 +1200 (NZST) Received: by chrisp-dl.ws.atlnz.lc (Postfix, from userid 1030) id 8E441281CC2; Thu, 25 May 2023 12:31:57 +1200 (NZST) From: Chris Packham To: miquel.raynal@bootlin.com, richard@nod.at, vigneshr@ti.com, bbrezillon@kernel.org Cc: linux-mtd@lists.infradead.org, linux-kernel@vger.kernel.org, Chris Packham Subject: [PATCH v3 1/2] mtd: rawnand: marvell: ensure timing values are written Date: Thu, 25 May 2023 12:31:52 +1200 Message-Id: <20230525003154.2303012-1-chris.packham@alliedtelesis.co.nz> X-Mailer: git-send-email 2.40.1 MIME-Version: 1.0 X-SEG-SpamProfiler-Analysis: v=2.3 cv=cLieTWWN c=1 sm=1 tr=0 a=KLBiSEs5mFS1a/PbTCJxuA==:117 a=P0xRbXHiH_UA:10 a=P-IC7800AAAA:8 a=txcOHvV6KX-ElXq2eNMA:9 a=d3PnA9EDa4IxuAV0gXij:22 X-SEG-SpamProfiler-Score: 0 x-atlnz-ls: pat X-Spam-Status: No, score=-2.1 required=5.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,SPF_HELO_PASS,SPF_PASS, T_SCC_BODY_TEXT_LINE,URIBL_BLOCKED autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-getmail-retrieved-from-mailbox: =?utf-8?q?INBOX?= X-GMAIL-THRID: =?utf-8?q?1766653634975160121?= X-GMAIL-MSGID: =?utf-8?q?1766825096201635837?= When new timing values are calculated in marvell_nfc_setup_interface() ensure that they will be applied in marvell_nfc_select_target() by clearing the selected_chip pointer. Fixes: b25251414f6e ("mtd: rawnand: marvell: Stop implementing ->select_chip()") Suggested-by: Miquel Raynal Signed-off-by: Chris Packham --- Notes: This at least gets me to a point where I can illustrated the problem reported to me. It appears that despite the chip correctly reporting support for SDR timing modes up to 4 the observed tWC is 20ns. I've not seen any actual problem running in this state the only complaint is that the datasheet says the minimum tWC is 25ns. If I make a change to my bootloader such that the NAND Clock Frequency Select bit (0xF2440700:0) to 1 before booting the kernel _and_ I remove the extra factor of 2 from the period_ns calculation I observe tWC of about 60ns. If I don't remove the factor of 2 the NAND interface doesn't work (can't write BBT). Changes in v3: - none Changes in v2: - reword comment per suggestion from Miquel, add fixes tag drivers/mtd/nand/raw/marvell_nand.c | 6 ++++++ 1 file changed, 6 insertions(+) diff --git a/drivers/mtd/nand/raw/marvell_nand.c b/drivers/mtd/nand/raw/marvell_nand.c index afb424579f0b..f1fcf136ad03 100644 --- a/drivers/mtd/nand/raw/marvell_nand.c +++ b/drivers/mtd/nand/raw/marvell_nand.c @@ -2457,6 +2457,12 @@ static int marvell_nfc_setup_interface(struct nand_chip *chip, int chipnr, NDTR1_WAIT_MODE; } + /* + * Reset nfc->selected_chip so the next command will cause the timing + * registers to be updated in marvell_nfc_select_target(). + */ + nfc->selected_chip = NULL; + return 0; } From patchwork Thu May 25 00:31:53 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Chris Packham X-Patchwork-Id: 98735 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a59:994d:0:b0:3d9:f83d:47d9 with SMTP id k13csp37636vqr; Wed, 24 May 2023 18:24:40 -0700 (PDT) X-Google-Smtp-Source: ACHHUZ4E8zlQ/dWBbM4kkuiStmOuIUGip+5TsQwUBROuamYcx9K9F2bQ9QnzafU70MP9h9gj5Eox X-Received: by 2002:a17:90b:438d:b0:24d:e929:56cf with SMTP id in13-20020a17090b438d00b0024de92956cfmr17765892pjb.39.1684977880530; Wed, 24 May 2023 18:24:40 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1684977880; cv=none; d=google.com; s=arc-20160816; b=NZ5mKvtsH3PkMbYLDoDi6G0ij86JfvGWEQbNZkBIFkKOAFXGY3tnQZlLPBPz7/KbJH RGwMAok9QefX3QbD71btyMbTipOKq1sJ8IkJxUZH7icaESd5ON/4eQnoy1zg2KBSZFrR E73lGYLp4sYiJw/Z0HuP2ACZDC4IaAEqWIxRYUEbMbRxT7QNFR8Yjl1SinsVcuolnEfq fCae1Dqd1nUaP0cA4dG85yzgZW9cvzaxXcSPH7ZgGTRtDF5w5DYVsxtV+Rcad7nXSwy2 Cxp2cav8N+n4yuRzSN5aPZujQPcNNjaE96SbiORvOFY6IGRQRuoqQxVJtJFb0+aGdK1u m2RQ== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from :dkim-signature; bh=7T+puFU3hojItCezGhGdpSM/kFMnpHzOFNeluLJHh3g=; b=ZntmYfl9p49G+Sdzr+8pd3uDOII2C4AqnRDNnFV3xxNLy97Q1vtGSA0uTuf6yjcaO6 3C4g1xJ89eDAYO0nkuA+3whcPt2tDbXslc9QcYt65VEixMBwE/FXx5cgriRU02O3f1XK jcRzOV5Dhc2E1Gd1V0sB697hzX0ydu87g5bwLm3jE+oh8aQZPJCR3nUMCP4cE5P18Blf 1jiifMZm7kWUpc9jvIkqLQMWncVp5haNTWi2ohvImI+ZC/7fu7t0IKO/qC3HfYcZAzlw qkIYNnCh2wbnjePSAfv5tp/hzwuHVeb/s3FTcrWYBzQg/4Tco8joX71KT+TLHiQFhrnQ 8IHQ== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@alliedtelesis.co.nz header.s=mail181024 header.b="pdYh/THs"; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=QUARANTINE sp=REJECT dis=NONE) header.from=alliedtelesis.co.nz Received: from out1.vger.email (out1.vger.email. [2620:137:e000::1:20]) by mx.google.com with ESMTP id v10-20020a17090a4eca00b00255b7adb2d8si299892pjl.90.2023.05.24.18.24.25; Wed, 24 May 2023 18:24:40 -0700 (PDT) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) client-ip=2620:137:e000::1:20; Authentication-Results: mx.google.com; dkim=pass header.i=@alliedtelesis.co.nz header.s=mail181024 header.b="pdYh/THs"; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=QUARANTINE sp=REJECT dis=NONE) header.from=alliedtelesis.co.nz Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S231633AbjEYAcK (ORCPT + 99 others); Wed, 24 May 2023 20:32:10 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:40648 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229680AbjEYAcI (ORCPT ); Wed, 24 May 2023 20:32:08 -0400 Received: from gate2.alliedtelesis.co.nz (gate2.alliedtelesis.co.nz [IPv6:2001:df5:b000:5::4]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 848E3A7 for ; Wed, 24 May 2023 17:32:06 -0700 (PDT) Received: from svr-chch-seg1.atlnz.lc (mmarshal3.atlnz.lc [10.32.18.43]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (4096 bits) server-digest SHA256) (Client did not present a certificate) by gate2.alliedtelesis.co.nz (Postfix) with ESMTPS id D03252C02E0; Thu, 25 May 2023 12:31:57 +1200 (NZST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=alliedtelesis.co.nz; s=mail181024; t=1684974717; bh=7T+puFU3hojItCezGhGdpSM/kFMnpHzOFNeluLJHh3g=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=pdYh/THsedCo1aXPzD0qB0J0YhFhlHOo/+1qq/nRiA/HI9y5gcD/kYhTkecp/cTAO jUZ4vGkWoXHuLhOSwqdCgF0gO1wRyK5GEG0tIZ3tg/YJ2sd/8NTvY2dskh7h52YIXC eBCuHS2ki3F0c9SqHC6rO48ZYyeKIiV8PHcx8DDgwd7EuEJ8kkWINI2TA4mbW++cRi EXYcxV91huo4hRMgfzMwwG+py/ibGsWyr855RL+Dpq57BiV9y+/fPbcZHosj+zY2Wx 3y4v80GbEGwYWWu8vgixta/XuUyMkTbavzIyNbUogp2RFLI8tHrq83vQubtGZNu3DX FXsoSZLgjtp0w== Received: from pat.atlnz.lc (Not Verified[10.32.16.33]) by svr-chch-seg1.atlnz.lc with Trustwave SEG (v8,2,6,11305) id ; Thu, 25 May 2023 12:31:57 +1200 Received: from chrisp-dl.ws.atlnz.lc (chrisp-dl.ws.atlnz.lc [10.33.22.30]) by pat.atlnz.lc (Postfix) with ESMTP id 93CF613EE63; Thu, 25 May 2023 12:31:57 +1200 (NZST) Received: by chrisp-dl.ws.atlnz.lc (Postfix, from userid 1030) id 902C3281CC0; Thu, 25 May 2023 12:31:57 +1200 (NZST) From: Chris Packham To: miquel.raynal@bootlin.com, richard@nod.at, vigneshr@ti.com, bbrezillon@kernel.org Cc: linux-mtd@lists.infradead.org, linux-kernel@vger.kernel.org, Chris Packham Subject: [PATCH v3 2/2] mtd: rawnand: marvell: don't set the NAND frequency select Date: Thu, 25 May 2023 12:31:53 +1200 Message-Id: <20230525003154.2303012-2-chris.packham@alliedtelesis.co.nz> X-Mailer: git-send-email 2.40.1 In-Reply-To: <20230525003154.2303012-1-chris.packham@alliedtelesis.co.nz> References: <20230525003154.2303012-1-chris.packham@alliedtelesis.co.nz> MIME-Version: 1.0 X-SEG-SpamProfiler-Analysis: v=2.3 cv=cLieTWWN c=1 sm=1 tr=0 a=KLBiSEs5mFS1a/PbTCJxuA==:117 a=P0xRbXHiH_UA:10 a=RTQhOw_aHlkS9OJicTUA:9 X-SEG-SpamProfiler-Score: 0 x-atlnz-ls: pat X-Spam-Status: No, score=-2.1 required=5.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,SPF_HELO_PASS,SPF_PASS, T_SCC_BODY_TEXT_LINE,URIBL_BLOCKED autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-getmail-retrieved-from-mailbox: =?utf-8?q?INBOX?= X-GMAIL-THRID: =?utf-8?q?1766827365941368962?= X-GMAIL-MSGID: =?utf-8?q?1766827365941368962?= marvell_nfc_setup_interface() uses the frequency retrieved from the clock associated with the nand interface to determine the timings that will be used. By changing the NAND frequency select without reflecting this in the clock configuration this means that the timings calculated don't correctly meet the requirements of the NAND chip. This hasn't been an issue up to now because of a different bug that was stopping the timings being updated after they were initially set. Fixes: b25251414f6e ("mtd: rawnand: marvell: Stop implementing ->select_chip()") Signed-off-by: Chris Packham --- Notes: I've set the fixes tag to b25251414f6e. The problem probably existed prior to that but without the other fix in this series it wouldn't be noticeable. With the two fixes from this series in place I get a tWC of 32ns which seems just about ideal. Changes in v3: - new drivers/mtd/nand/raw/marvell_nand.c | 4 ---- 1 file changed, 4 deletions(-) diff --git a/drivers/mtd/nand/raw/marvell_nand.c b/drivers/mtd/nand/raw/marvell_nand.c index f1fcf136ad03..30c15e4e1cc0 100644 --- a/drivers/mtd/nand/raw/marvell_nand.c +++ b/drivers/mtd/nand/raw/marvell_nand.c @@ -2900,10 +2900,6 @@ static int marvell_nfc_init(struct marvell_nfc *nfc) regmap_update_bits(sysctrl_base, GENCONF_CLK_GATING_CTRL, GENCONF_CLK_GATING_CTRL_ND_GATE, GENCONF_CLK_GATING_CTRL_ND_GATE); - - regmap_update_bits(sysctrl_base, GENCONF_ND_CLK_CTRL, - GENCONF_ND_CLK_CTRL_EN, - GENCONF_ND_CLK_CTRL_EN); } /* Configure the DMA if appropriate */