From patchwork Wed May 24 13:34:38 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Runyang Chen X-Patchwork-Id: 98516 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a59:b0ea:0:b0:3b6:4342:cba0 with SMTP id b10csp2879524vqo; Wed, 24 May 2023 07:13:01 -0700 (PDT) X-Google-Smtp-Source: ACHHUZ5pkl9uleC5+eGevqvjMPuhL1sevR1eCL+ANkme2jM4gkbxdOz1vAjTDPwln0b33N4K1F74 X-Received: by 2002:a05:6a00:1250:b0:646:c56c:f0e0 with SMTP id u16-20020a056a00125000b00646c56cf0e0mr2451166pfi.15.1684937581111; Wed, 24 May 2023 07:13:01 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1684937581; cv=none; d=google.com; s=arc-20160816; b=dIG6eCp7am6eJ3jTXdJ/xku4fR6xeC+6BOSzMY+7wmh3HjsvBjlSFoDlAmsT4baw4V wniMjSL9/CYLIbwbulBMBAK6AVE5Z0Df2TErePhmmhHt4cbae5VIelpy5wijUFxa6Zf6 sirLfnOOPizBQhrXS5sH+SgW2qEbC3Y5LvdJK7cFQC/nLapWn48TqMfUPWMpMe3ELxX9 PA/McfYnOL7i4JVbzC5/J/4asYa3qe7yuNXrgbnskkQwJj/mQVIIwmCxr07/etQOvY/n OO4HMyACqdfrsjvjl5yY0kkMP7iZdFiVrq4Cwv7j1LhczJEGYgcx7DfPD1qKB24XRu8I a6TA== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:mime-version:references:in-reply-to:message-id :date:subject:cc:to:from:dkim-signature; bh=fR5zPRr6mGaPjBEV+8bAJ+j1tXb4IEd8qsOXLOLPyjY=; b=AusGIzgLXBiivHiHyhE8hMVhmmAG/Z5/3cqKsMtIiknWMyBARflr0K9t0ubZNFNVOt 5Ga1KlFBoqcNWQuXKgTRZFYkDtFajqE+Pn9QyHrRSAzUrsPZrSyY2q9JVqdlqLC+1H9l OgBnqCRjbaAfRMkpWkCi94aHfRj3ONfJYNqfgOtiTyzcMvS4dRmfx9Hd7mrogud3/gMr TXKeGNkldVhitcPCb2m0FHQ1/BxSawMF5cm5yXzCKmGcMiYmzFiURySxUAB1xgTpt8U2 i0SeMGzMtpYSbrC1QgvwW9YB4gkrRMVbgKlsIkHHCUURjCiqGXiumyHuHtGEzziSq0Ep McXA== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@mediatek.com header.s=dk header.b=t14xnmyJ; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=QUARANTINE sp=QUARANTINE dis=NONE) header.from=mediatek.com Received: from out1.vger.email (out1.vger.email. [2620:137:e000::1:20]) by mx.google.com with ESMTP id v30-20020aa799de000000b0063b85b18764si3855100pfi.219.2023.05.24.07.12.48; Wed, 24 May 2023 07:13:01 -0700 (PDT) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) client-ip=2620:137:e000::1:20; Authentication-Results: mx.google.com; dkim=pass header.i=@mediatek.com header.s=dk header.b=t14xnmyJ; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=QUARANTINE sp=QUARANTINE dis=NONE) header.from=mediatek.com Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S234870AbjEXNfA (ORCPT + 99 others); Wed, 24 May 2023 09:35:00 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:60250 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S234734AbjEXNe4 (ORCPT ); Wed, 24 May 2023 09:34:56 -0400 Received: from mailgw01.mediatek.com (unknown [60.244.123.138]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 4F837A7; Wed, 24 May 2023 06:34:54 -0700 (PDT) X-UUID: c02dceaefa3711ed9cb5633481061a41-20230524 DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=mediatek.com; s=dk; h=Content-Type:MIME-Version:References:In-Reply-To:Message-ID:Date:Subject:CC:To:From; bh=fR5zPRr6mGaPjBEV+8bAJ+j1tXb4IEd8qsOXLOLPyjY=; b=t14xnmyJBfXUcJ2Bn8YDV08Xtm/wnbQIZT2/tq3OTW3tf09QYb8IfKAImyc0U2XZVJ2DIXV8wnHt6tKkOM23YMSoSlHku6vz2228I9oV0PE2X7zqiye20MQCxVsisRaamZ2QjJBjyytXWQE0Dm91see3P5RBdrHluDj2uZp9b9U=; X-CID-P-RULE: Release_Ham X-CID-O-INFO: VERSION:1.1.25,REQID:aabe1478-dc68-42c2-978a-0beeccb32eba,IP:0,U RL:0,TC:0,Content:0,EDM:0,RT:0,SF:100,FILE:0,BULK:0,RULE:Release_Ham,ACTIO N:release,TS:100 X-CID-INFO: VERSION:1.1.25,REQID:aabe1478-dc68-42c2-978a-0beeccb32eba,IP:0,URL :0,TC:0,Content:0,EDM:0,RT:0,SF:100,FILE:0,BULK:0,RULE:Spam_GS981B3D,ACTIO N:quarantine,TS:100 X-CID-META: VersionHash:d5b0ae3,CLOUDID:dec43a3c-de1e-4348-bc35-c96f92f1dcbb,B ulkID:2305242134504IWJZQOY,BulkQuantity:0,Recheck:0,SF:28|17|19|48|38|29,T C:nil,Content:0,EDM:-3,IP:nil,URL:0,File:nil,Bulk:nil,QS:nil,BEC:nil,COL:0 ,OSI:0,OSA:0,AV:0 X-CID-BVR: 0,NGT X-CID-BAS: 0,NGT,0,_ X-UUID: c02dceaefa3711ed9cb5633481061a41-20230524 Received: from mtkmbs13n1.mediatek.inc [(172.21.101.193)] by mailgw01.mediatek.com (envelope-from ) (Generic MTA with TLSv1.2 ECDHE-RSA-AES256-GCM-SHA384 256/256) with ESMTP id 899007656; Wed, 24 May 2023 21:34:47 +0800 Received: from mtkmbs11n1.mediatek.inc (172.21.101.185) by mtkmbs11n1.mediatek.inc (172.21.101.185) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.1118.26; Wed, 24 May 2023 21:34:46 +0800 Received: from mhfsdcap04.gcn.mediatek.inc (10.17.3.154) by mtkmbs11n1.mediatek.inc (172.21.101.73) with Microsoft SMTP Server id 15.2.1118.26 via Frontend Transport; Wed, 24 May 2023 21:34:45 +0800 From: Runyang Chen To: Michael Turquette , Stephen Boyd , Matthias Brugger , AngeloGioacchino Del Regno , Philipp Zabel , Rob Herring , Krzysztof Kozlowski CC: , , , , , Runyang Chen Subject: [PATCH v3 1/2] dt-bindings: reset: mt8188: add thermal reset control bit Date: Wed, 24 May 2023 21:34:38 +0800 Message-ID: <20230524133439.20659-2-runyang.chen@mediatek.com> X-Mailer: git-send-email 2.9.2 In-Reply-To: <20230524133439.20659-1-runyang.chen@mediatek.com> References: <20230524133439.20659-1-runyang.chen@mediatek.com> MIME-Version: 1.0 X-Spam-Status: No, score=-2.1 required=5.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,RCVD_IN_MSPIKE_H2,SPF_HELO_PASS, SPF_PASS,T_SCC_BODY_TEXT_LINE,UNPARSEABLE_RELAY autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-getmail-retrieved-from-mailbox: =?utf-8?q?INBOX?= X-GMAIL-THRID: =?utf-8?q?1766785109087185846?= X-GMAIL-MSGID: =?utf-8?q?1766785109087185846?= To support reset of infra_ao, add the index of infra_ao reset of thermal for MT8188. Signed-off-by: Runyang Chen Acked-by: Conor Dooley --- include/dt-bindings/reset/mt8188-resets.h | 5 +++++ 1 file changed, 5 insertions(+) diff --git a/include/dt-bindings/reset/mt8188-resets.h b/include/dt-bindings/reset/mt8188-resets.h index 377cdfda82a9..ba9a5e9b8899 100644 --- a/include/dt-bindings/reset/mt8188-resets.h +++ b/include/dt-bindings/reset/mt8188-resets.h @@ -33,4 +33,9 @@ #define MT8188_TOPRGU_SW_RST_NUM 24 +/* INFRA resets */ +#define MT8188_INFRA_RST1_THERMAL_MCU_RST 0 +#define MT8188_INFRA_RST1_THERMAL_CTRL_RST 1 +#define MT8188_INFRA_RST3_PTP_CTRL_RST 2 + #endif /* _DT_BINDINGS_RESET_CONTROLLER_MT8188 */ From patchwork Wed May 24 13:34:39 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Runyang Chen X-Patchwork-Id: 98511 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a59:b0ea:0:b0:3b6:4342:cba0 with SMTP id b10csp2877904vqo; Wed, 24 May 2023 07:11:01 -0700 (PDT) X-Google-Smtp-Source: ACHHUZ72wBJrrUwvHOyy2o2XKMKqzsJB7YSD4md7eSoS6yM1MM+90j/cPRRF05bWis24R49cthl6 X-Received: by 2002:a05:6a20:7d9a:b0:10c:7a20:6dd6 with SMTP id v26-20020a056a207d9a00b0010c7a206dd6mr6774149pzj.42.1684937461009; Wed, 24 May 2023 07:11:01 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1684937460; cv=none; d=google.com; s=arc-20160816; b=AovbFdUNGRqS+YAAm5SH5fFASyZZsAi9tWoT1OmhO3SLKqTFxmCTJFAzgF1wMYTXNM dZdiN9NllpR60nP/ra9OryJO2xDoFnAwIvKmioJODaCk8Tyynu6ogHM23cVOrASEfVVN CeESCaJYmOXwAsstD/Koy6Z/R9pCpeWOC6hR7tt1FgXj/K57MOw97wKo2jY7LxkK/HqJ FIcqN5CHJe56UqjJylknoIBJVOIax2/tsdZsHAlOSFBAe4OaCLB3iPSKZ96RbOrqFtUS XqUFv7mpWEfv7SRt+nKnqkX+c/GjvfquBk/FYYL8ovh0mxuqmcLBMYYB3kCiEVlzX5/7 EY6w== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:mime-version:references:in-reply-to:message-id :date:subject:cc:to:from:dkim-signature; bh=M2a6rGpawYtAjbZDZaYZUA6WdMNG+Ygqo1pPcfyzz00=; b=UAD34RGN7bevBiOMowMsI/24hRdZG2Yod2pm26NGrTHBhq8DRx4HAozMtKlJ6KMIYO +xo8WtTDk+VCVdZ/MS4YDW9PtIowKQy558CCsD2GWI4936n11zhEClFYlvGFpF5p2/bl BjBEXXvM5M1vXKv8nyL0XYQ+6cVIDCxLsrY2WXqU1EpS8eCs0LBd6gkWFbG4QHvT7deu LVNAwB9bQ1LZF+hSZlhyGsPCTS/T2pNrdfvzW1u2tpLj3kRhVGiBnVpsXW8QUbXPfk0W L3hvOCgFbR+QC2sq7Ks64l/aDIFj/Bj9pYZ3kmwBV/3BTyhN2r4SaxYFDO/UysuYB1a1 AD4w== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@mediatek.com header.s=dk header.b=PSf+wVWe; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=QUARANTINE sp=QUARANTINE dis=NONE) header.from=mediatek.com Received: from out1.vger.email (out1.vger.email. [2620:137:e000::1:20]) by mx.google.com with ESMTP id a13-20020a63704d000000b0052c6e736acbsi4420063pgn.333.2023.05.24.07.10.47; Wed, 24 May 2023 07:11:00 -0700 (PDT) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) client-ip=2620:137:e000::1:20; Authentication-Results: mx.google.com; dkim=pass header.i=@mediatek.com header.s=dk header.b=PSf+wVWe; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=QUARANTINE sp=QUARANTINE dis=NONE) header.from=mediatek.com Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S234734AbjEXNfC (ORCPT + 99 others); Wed, 24 May 2023 09:35:02 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:60248 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S234687AbjEXNe4 (ORCPT ); Wed, 24 May 2023 09:34:56 -0400 Received: from mailgw02.mediatek.com (unknown [210.61.82.184]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id DD711A9; Wed, 24 May 2023 06:34:53 -0700 (PDT) X-UUID: c1642426fa3711edb20a276fd37b9834-20230524 DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=mediatek.com; s=dk; h=Content-Type:MIME-Version:References:In-Reply-To:Message-ID:Date:Subject:CC:To:From; bh=M2a6rGpawYtAjbZDZaYZUA6WdMNG+Ygqo1pPcfyzz00=; b=PSf+wVWeL56hZv0l9Co/Bof7OZN/mXd5xwNPkjJLpJUFWGMXRlPmn1wEEH/pieIzd3PMhGndUe7ht1R+0VyKoHIaYCJdor7XdImZSRmlpmpLJoCJRJjhbMVSyPb1+GSz4aDpGKchRD6Wf972Fywk4FqAgLPKcSK0tQbTowduYU4=; X-CID-P-RULE: Release_Ham X-CID-O-INFO: VERSION:1.1.25,REQID:9fdd8688-ef9f-4a5b-bfc5-3f4abd4a81e3,IP:0,U RL:0,TC:0,Content:-5,EDM:-30,RT:0,SF:0,FILE:0,BULK:0,RULE:Release_Ham,ACTI ON:release,TS:-35 X-CID-META: VersionHash:d5b0ae3,CLOUDID:fa1ce7c1-e32c-4c97-918d-fbb3fc224d4e,B ulkID:nil,BulkQuantity:0,Recheck:0,SF:102,TC:nil,Content:0,EDM:2,IP:nil,UR L:0,File:nil,Bulk:nil,QS:nil,BEC:nil,COL:0,OSI:0,OSA:0,AV:0 X-CID-BVR: 0 X-CID-BAS: 0,_,0,_ X-UUID: c1642426fa3711edb20a276fd37b9834-20230524 Received: from mtkmbs11n1.mediatek.inc [(172.21.101.185)] by mailgw02.mediatek.com (envelope-from ) (Generic MTA with TLSv1.2 ECDHE-RSA-AES256-GCM-SHA384 256/256) with ESMTP id 915258689; Wed, 24 May 2023 21:34:49 +0800 Received: from mtkmbs11n1.mediatek.inc (172.21.101.185) by mtkmbs11n1.mediatek.inc (172.21.101.185) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.1118.26; Wed, 24 May 2023 21:34:48 +0800 Received: from mhfsdcap04.gcn.mediatek.inc (10.17.3.154) by mtkmbs11n1.mediatek.inc (172.21.101.73) with Microsoft SMTP Server id 15.2.1118.26 via Frontend Transport; Wed, 24 May 2023 21:34:47 +0800 From: Runyang Chen To: Michael Turquette , Stephen Boyd , Matthias Brugger , AngeloGioacchino Del Regno , Philipp Zabel , Rob Herring , Krzysztof Kozlowski CC: , , , , , Runyang Chen Subject: [PATCH v3 2/2] clk: mediatek: reset: add infra_ao reset support for MT8188 Date: Wed, 24 May 2023 21:34:39 +0800 Message-ID: <20230524133439.20659-3-runyang.chen@mediatek.com> X-Mailer: git-send-email 2.9.2 In-Reply-To: <20230524133439.20659-1-runyang.chen@mediatek.com> References: <20230524133439.20659-1-runyang.chen@mediatek.com> MIME-Version: 1.0 X-Spam-Status: No, score=-2.1 required=5.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,RCVD_IN_MSPIKE_H2,SPF_HELO_PASS, SPF_PASS,T_SCC_BODY_TEXT_LINE,UNPARSEABLE_RELAY autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-getmail-retrieved-from-mailbox: =?utf-8?q?INBOX?= X-GMAIL-THRID: =?utf-8?q?1766784982977522275?= X-GMAIL-MSGID: =?utf-8?q?1766784982977522275?= The infra_ao reset is needed for MT8188. - Add mtk_clk_rst_desc for MT8188. - Add register reset controller function for MT8188 infra_ao. - Add infra_ao_idx_map for MT8188. Signed-off-by: Runyang Chen --- drivers/clk/mediatek/clk-mt8188-infra_ao.c | 24 ++++++++++++++++++++++ 1 file changed, 24 insertions(+) diff --git a/drivers/clk/mediatek/clk-mt8188-infra_ao.c b/drivers/clk/mediatek/clk-mt8188-infra_ao.c index a38ddc7b6a88..bb53e92144c2 100644 --- a/drivers/clk/mediatek/clk-mt8188-infra_ao.c +++ b/drivers/clk/mediatek/clk-mt8188-infra_ao.c @@ -5,6 +5,7 @@ */ #include +#include #include #include @@ -176,9 +177,32 @@ static const struct mtk_gate infra_ao_clks[] = { "infra_ao_aes_msdcfde_0p", "top_aes_msdcfde", 18), }; +static const u16 infra_ao_rst_ofs[] = { + INFRA_RST0_SET_OFFSET, + INFRA_RST1_SET_OFFSET, + INFRA_RST2_SET_OFFSET, + INFRA_RST3_SET_OFFSET, + INFRA_RST4_SET_OFFSET, +}; + +static const u16 infra_ao_idx_map[] = { + [MT8188_INFRA_RST1_THERMAL_MCU_RST] = 1 * RST_NR_PER_BANK + 2, + [MT8188_INFRA_RST1_THERMAL_CTRL_RST] = 1 * RST_NR_PER_BANK + 4, + [MT8188_INFRA_RST3_PTP_CTRL_RST] = 3 * RST_NR_PER_BANK + 5, +}; + +static const struct mtk_clk_rst_desc infra_ao_rst_desc = { + .version = MTK_RST_SET_CLR, + .rst_bank_ofs = infra_ao_rst_ofs, + .rst_bank_nr = ARRAY_SIZE(infra_ao_rst_ofs), + .rst_idx_map = infra_ao_idx_map, + .rst_idx_map_nr = ARRAY_SIZE(infra_ao_idx_map), +}; + static const struct mtk_clk_desc infra_ao_desc = { .clks = infra_ao_clks, .num_clks = ARRAY_SIZE(infra_ao_clks), + .rst_desc = &infra_ao_rst_desc, }; static const struct of_device_id of_match_clk_mt8188_infra_ao[] = {