From patchwork Mon May 22 19:50:17 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Carl Love X-Patchwork-Id: 97572 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a59:b0ea:0:b0:3b6:4342:cba0 with SMTP id b10csp1681339vqo; Mon, 22 May 2023 12:52:01 -0700 (PDT) X-Google-Smtp-Source: ACHHUZ4uE1zSjQ6zitoLouKW/0Eqz+0WJU4PgdjXp8V1rbV/vynw+jRlsoTeISElSmywV22h8MpK X-Received: by 2002:a05:6402:12cd:b0:510:ed22:db43 with SMTP id k13-20020a05640212cd00b00510ed22db43mr9898990edx.24.1684785121069; Mon, 22 May 2023 12:52:01 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1684785121; cv=none; d=google.com; s=arc-20160816; b=DliLUM3eOAbaQozItiMBcEOHKFLG0npTUn2hub+nD0Z80rJ5nZyt/MSaWh3BaBojfV 3u+dVkPb5ryPB8aNL8MdlzI2FqOUIsKdu+UwP+WnrIuY+42kFugezVoxqTdTBWi50M1T iunB+cbHwEHXzS5na7jsxNLTKbP7QHtnk8TV7890lQ6WG8E6W9M8PCui9QToFAs5hQeL akdD7IDXxHyiVrQ5x6+lFan5YZjNWX2GR3PNX8CVTToSTn31NjXrZua2idGSAz3SOBAx UKD4Unnfusuyh/lNlo5lopPKicoJeayGvLPsHGqQuNy6ENQpiZhIB2p1HuPtdOWXf4jj gZPQ== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:reply-to:from:list-subscribe:list-help:list-post :list-archive:list-unsubscribe:list-id:precedence :content-transfer-encoding:mime-version:references:in-reply-to:date :cc:to:subject:message-id:dmarc-filter:delivered-to:dkim-signature :dkim-filter; bh=DQmcO4dTNbXbeqq2qIr5+LwsqnxK/z/ztjnVWXGP3I8=; b=hVN7KGobGXuPT0Dy9kKJpVHriTEfrA32GCcRvIERRkSHXYiof3/eLJMh8JH4k6Ij5b 4HTN1CT/dqso8AmUstdZimvhw1Fcc/uooFmob4UIKVJG4zQcRJTtaMK+7mbR6QdzTRHm 1chdA8CpCElmp6zSAdyXXhWx7JFfP11wznwJ4/iJabL/KQMJIRgFliXjzeVuyVR0VNx/ LeqrIABacG+TUNqxF9gLhv85Q17epnx42LwwhxUV9dMTvj2KaStcDji8d9HwvOc2hewN 4CoQcNW0OkVQxbIZWL2OQxbobRk32Jh5Bd6RHABXG/8j9tkYFwKwBwfuRNW0lwxr/kcM anlw== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@gcc.gnu.org header.s=default header.b=Cf10s0VK; spf=pass (google.com: domain of gcc-patches-bounces+ouuuleilei=gmail.com@gcc.gnu.org designates 8.43.85.97 as permitted sender) smtp.mailfrom="gcc-patches-bounces+ouuuleilei=gmail.com@gcc.gnu.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=gnu.org Received: from sourceware.org (server2.sourceware.org. [8.43.85.97]) by mx.google.com with ESMTPS id bf23-20020a0564021a5700b0050bc4b80bbesi5138736edb.640.2023.05.22.12.52.00 for (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 22 May 2023 12:52:01 -0700 (PDT) Received-SPF: pass (google.com: domain of gcc-patches-bounces+ouuuleilei=gmail.com@gcc.gnu.org designates 8.43.85.97 as permitted sender) client-ip=8.43.85.97; Authentication-Results: mx.google.com; dkim=pass header.i=@gcc.gnu.org header.s=default header.b=Cf10s0VK; spf=pass (google.com: domain of gcc-patches-bounces+ouuuleilei=gmail.com@gcc.gnu.org designates 8.43.85.97 as permitted sender) smtp.mailfrom="gcc-patches-bounces+ouuuleilei=gmail.com@gcc.gnu.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=gnu.org Received: from server2.sourceware.org (localhost [IPv6:::1]) by sourceware.org (Postfix) with ESMTP id DCAB6385842B for ; Mon, 22 May 2023 19:51:59 +0000 (GMT) DKIM-Filter: OpenDKIM Filter v2.11.0 sourceware.org DCAB6385842B DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gcc.gnu.org; s=default; t=1684785119; bh=DQmcO4dTNbXbeqq2qIr5+LwsqnxK/z/ztjnVWXGP3I8=; h=Subject:To:Cc:Date:In-Reply-To:References:List-Id: List-Unsubscribe:List-Archive:List-Post:List-Help:List-Subscribe: From:Reply-To:From; b=Cf10s0VKH2owjvN+PrTxYryiyhBEqf7cqdKNzvVAEgCBDnWyXt5P/9Gs2bv0lG24B lwqPxJjQ+3A7FjGn/96GcMAGA4mstKpDHqVP8kMXJ3QiRSPN9UxK82c5f01XcWljyv uWTYBYlV+fveg6A2TNTxMNp3HIa9/MbfsbH9BUEw= X-Original-To: gcc-patches@gcc.gnu.org Delivered-To: gcc-patches@gcc.gnu.org Received: from mx0a-001b2d01.pphosted.com (mx0a-001b2d01.pphosted.com [148.163.156.1]) by sourceware.org (Postfix) with ESMTPS id B48DD3858D35 for ; Mon, 22 May 2023 19:50:23 +0000 (GMT) DMARC-Filter: OpenDMARC Filter v1.4.2 sourceware.org B48DD3858D35 Received: from pps.filterd (m0353727.ppops.net [127.0.0.1]) by mx0a-001b2d01.pphosted.com (8.17.1.19/8.17.1.19) with ESMTP id 34MJMhnX000776; Mon, 22 May 2023 19:50:22 GMT Received: from ppma02wdc.us.ibm.com (aa.5b.37a9.ip4.static.sl-reverse.com [169.55.91.170]) by mx0a-001b2d01.pphosted.com (PPS) with ESMTPS id 3qre6q9cc1-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Mon, 22 May 2023 19:50:22 +0000 Received: from pps.filterd (ppma02wdc.us.ibm.com [127.0.0.1]) by ppma02wdc.us.ibm.com (8.17.1.19/8.17.1.19) with ESMTP id 34MHvFQG010752; Mon, 22 May 2023 19:50:21 GMT Received: from smtprelay03.wdc07v.mail.ibm.com ([9.208.129.113]) by ppma02wdc.us.ibm.com (PPS) with ESMTPS id 3qppdrutsm-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Mon, 22 May 2023 19:50:21 +0000 Received: from smtpav02.wdc07v.mail.ibm.com (smtpav02.wdc07v.mail.ibm.com [10.39.53.229]) by smtprelay03.wdc07v.mail.ibm.com (8.14.9/8.14.9/NCO v10.0) with ESMTP id 34MJoJRb57016630 (version=TLSv1/SSLv3 cipher=DHE-RSA-AES256-GCM-SHA384 bits=256 verify=OK); Mon, 22 May 2023 19:50:19 GMT Received: from smtpav02.wdc07v.mail.ibm.com (unknown [127.0.0.1]) by IMSVA (Postfix) with ESMTP id 161CD5805E; Mon, 22 May 2023 19:50:19 +0000 (GMT) Received: from smtpav02.wdc07v.mail.ibm.com (unknown [127.0.0.1]) by IMSVA (Postfix) with ESMTP id 736965805D; Mon, 22 May 2023 19:50:18 +0000 (GMT) Received: from li-e362e14c-2378-11b2-a85c-87d605f3c641.ibm.com (unknown [9.163.31.184]) by smtpav02.wdc07v.mail.ibm.com (Postfix) with ESMTP; Mon, 22 May 2023 19:50:18 +0000 (GMT) Message-ID: <366d7f05139e9556321ef24861d1f51cdf8227c1.camel@us.ibm.com> Subject: [PATCH ver 2] rs6000: Fix __builtin_vec_xst_trunc definition To: "Kewen.Lin" Cc: Peter Bergner , Segher Boessenkool , gcc-patches@gcc.gnu.org, cel@us.ibm.com Date: Mon, 22 May 2023 12:50:17 -0700 In-Reply-To: References: X-Mailer: Evolution 3.28.5 (3.28.5-18.el8) Mime-Version: 1.0 X-TM-AS-GCONF: 00 X-Proofpoint-GUID: v6Q5sraJdOyXJAFfnqbDQp4ZsyE9oaBR X-Proofpoint-ORIG-GUID: v6Q5sraJdOyXJAFfnqbDQp4ZsyE9oaBR X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.254,Aquarius:18.0.957,Hydra:6.0.573,FMLib:17.11.176.26 definitions=2023-05-22_14,2023-05-22_03,2023-05-22_02 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 clxscore=1015 phishscore=0 spamscore=0 priorityscore=1501 suspectscore=0 impostorscore=0 lowpriorityscore=0 malwarescore=0 mlxscore=0 adultscore=0 bulkscore=0 mlxlogscore=999 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.12.0-2304280000 definitions=main-2305220165 X-Spam-Status: No, score=-11.2 required=5.0 tests=BAYES_00, DKIM_SIGNED, DKIM_VALID, DKIM_VALID_EF, GIT_PATCH_0, KAM_SHORT, RCVD_IN_MSPIKE_H2, SPF_HELO_NONE, SPF_NONE, TXREP, T_SCC_BODY_TEXT_LINE autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on server2.sourceware.org X-BeenThere: gcc-patches@gcc.gnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Gcc-patches mailing list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-Patchwork-Original-From: Carl Love via Gcc-patches From: Carl Love Reply-To: Carl Love Errors-To: gcc-patches-bounces+ouuuleilei=gmail.com@gcc.gnu.org Sender: "Gcc-patches" X-getmail-retrieved-from-mailbox: =?utf-8?q?INBOX?= X-GMAIL-THRID: =?utf-8?q?1765531693584598225?= X-GMAIL-MSGID: =?utf-8?q?1766625242913879139?= Kewen, GCC maintainers: Version 2, addressed comments from Kewen. Added an additional overloaded builtin: void __builtin_vec_xst_trunc (vuq, signed long long, long *); The following patch fixes errors in the arguments in the __builtin_altivec_tr_stxvrhx, __builtin_altivec_tr_stxvrwx builtin definitions. Note, these builtins are used by the overloaded __builtin_vec_xst_trunc builtin. The patch adds a new overloaded builtin definition for __builtin_vec_xst_trunc for the third argument to be unsigned and signed long int. A new testcase is added for the various overloaded versions of __builtin_vec_xst_trunc. The patch has been tested on Power 10 with no new regressions. Please let me know if the patch is acceptable for mainline. Thanks. Carl ----------------------------------------------------------------- rs6000: Fix __builtin_vec_xst_trunc definition Built-in __builtin_vec_xst_trunc calls __builtin_altivec_tr_stxvrhx and __builtin_altivec_tr_stxvrwx to handle the short and word cases. The arguments for these two builtins are wrong. This patch fixes the wrong arguments for the builtins. Additionally, the patch adds a new __builtin_vec_xst_trunc overloaded version for the destination being signed or unsigned long int. A runnable test case is added to test each of the overloaded definitions of __builtin_vec_xst_tru gcc/ * config/rs6000/builtins.def (__builtin_altivec_tr_stxvrhx, __builtin_altivec_tr_stxvrwx): Fix type of second argument. Add, definition for send argument to be signed long. * config/rs6000/rs6000-overload.def (__builtin_vec_xst_trunc): add definition with thrird arument signed and unsigned long. * doc/extend.texi (__builtin_vec_xst_trunc): Add documentation for new unsinged long and signed long versions. gcc/testsuite/ * gcc.target/powerpc/vsx-builtin-vec_xst_trunc.c: New test case for __builtin_vec_xst_trunc builtin. --- gcc/config/rs6000/rs6000-builtins.def | 7 +- gcc/config/rs6000/rs6000-overload.def | 6 + gcc/doc/extend.texi | 2 + .../powerpc/vsx-builtin-vec_xst_trunc.c | 241 ++++++++++++++++++ 4 files changed, 254 insertions(+), 2 deletions(-) create mode 100644 gcc/testsuite/gcc.target/powerpc/vsx-builtin-vec_xst_trunc.c diff --git a/gcc/config/rs6000/rs6000-builtins.def b/gcc/config/rs6000/rs6000-builtins.def index 638d0bc72ca..a378491b358 100644 --- a/gcc/config/rs6000/rs6000-builtins.def +++ b/gcc/config/rs6000/rs6000-builtins.def @@ -3161,12 +3161,15 @@ void __builtin_altivec_tr_stxvrbx (vsq, signed long, signed char *); TR_STXVRBX vsx_stxvrbx {stvec} - void __builtin_altivec_tr_stxvrhx (vsq, signed long, signed int *); + void __builtin_altivec_tr_stxvrhx (vsq, signed long, signed short *); TR_STXVRHX vsx_stxvrhx {stvec} - void __builtin_altivec_tr_stxvrwx (vsq, signed long, signed short *); + void __builtin_altivec_tr_stxvrwx (vsq, signed long, signed int *); TR_STXVRWX vsx_stxvrwx {stvec} + void __builtin_altivec_tr_stxvrlx (vsq, signed long, signed long *); + TR_STXVRLX vsx_stxvrdx {stvec} + void __builtin_altivec_tr_stxvrdx (vsq, signed long, signed long long *); TR_STXVRDX vsx_stxvrdx {stvec} diff --git a/gcc/config/rs6000/rs6000-overload.def b/gcc/config/rs6000/rs6000-overload.def index c582490c084..fd47f5b24e8 100644 --- a/gcc/config/rs6000/rs6000-overload.def +++ b/gcc/config/rs6000/rs6000-overload.def @@ -4872,6 +4872,12 @@ TR_STXVRWX TR_STXVRWX_S void __builtin_vec_xst_trunc (vuq, signed long long, unsigned int *); TR_STXVRWX TR_STXVRWX_U + void __builtin_vec_xst_trunc (vsq, signed long long, signed long *); + TR_STXVRLX TR_STXVRLX_S + void __builtin_vec_xst_trunc (vuq, signed long long, unsigned long *); + TR_STXVRLX TR_STXVRLX_U + void __builtin_vec_xst_trunc (vuq, signed long long, long *); + TR_STXVRLX TR_STXVRLX_I void __builtin_vec_xst_trunc (vsq, signed long long, signed long long *); TR_STXVRDX TR_STXVRDX_S void __builtin_vec_xst_trunc (vuq, signed long long, unsigned long long *); diff --git a/gcc/doc/extend.texi b/gcc/doc/extend.texi index e426a2eb7d8..7e2ae790ab3 100644 --- a/gcc/doc/extend.texi +++ b/gcc/doc/extend.texi @@ -18570,10 +18570,12 @@ instructions. @defbuiltin{{void} vec_xst_trunc (vector signed __int128, signed long long, signed char *)} @defbuiltinx{{void} vec_xst_trunc (vector signed __int128, signed long long, signed short *)} @defbuiltinx{{void} vec_xst_trunc (vector signed __int128, signed long long, signed int *)} +@defbuiltinx{{void} vec_xst_trunc (vector signed __int128, signed long long, signed long *)} @defbuiltinx{{void} vec_xst_trunc (vector signed __int128, signed long long, signed long long *)} @defbuiltinx{{void} vec_xst_trunc (vector unsigned __int128, signed long long, unsigned char *)} @defbuiltinx{{void} vec_xst_trunc (vector unsigned __int128, signed long long, unsigned short *)} @defbuiltinx{{void} vec_xst_trunc (vector unsigned __int128, signed long long, unsigned int *)} +@defbuiltinx{{void} vec_xst_trunc (vector unsigned __int128, signed long long, unsigned long *)} @defbuiltinx{{void} vec_xst_trunc (vector unsigned __int128, signed long long, unsigned long long *)} Truncate and store the rightmost element of a vector, as if implemented by the diff --git a/gcc/testsuite/gcc.target/powerpc/vsx-builtin-vec_xst_trunc.c b/gcc/testsuite/gcc.target/powerpc/vsx-builtin-vec_xst_trunc.c new file mode 100644 index 00000000000..99bd0dbd61b --- /dev/null +++ b/gcc/testsuite/gcc.target/powerpc/vsx-builtin-vec_xst_trunc.c @@ -0,0 +1,241 @@ +/* Test of __builtin_vec_xst_trunc */ + +/* { dg-do run { target power10_hw } } */ +/* { dg-require-effective-target int128 } */ +/* { dg-options "-mdejagnu-cpu=power10 -save-temps" } */ + +#include +#include +#include +#include +#include + +#define DEBUG 0 +#define TRUE 1 +#define FALSE 0 +#define SIZE 4 + +vector signed __int128 zero_vsint128 = {0x0}; + +vector signed __int128 store_data[SIZE] = { +{ (__int128) 0x79BD000000000000 << 64 | (__int128) 0x123456789abcdef8ULL}, +{ (__int128) 0x8ACE000000000000 << 64 | (__int128) 0xfedcba9876543217ULL}, +{ (__int128) 0x1357000000000000 << 64 | (__int128) 0xccccccccccccccccULL}, +{ (__int128) 0xf000000000000000 << 64 | (__int128) 0xaaaaaaaaaaaaaaaaULL} +}; + +signed char signed_char_expected[SIZE] = {0xF8ULL, 0x17, 0xCC, 0xAA}; +signed short signed_short_expected[SIZE] = {0xDEF8, 0x3217, 0xcccc, 0xaaaa, }; +signed int signed_int_expected[SIZE] = {0x9ABCDEF8, 0x76543217, 0xCCCCCCCC, + 0xAAAAAAAA}; +signed long int signed_long_expected[SIZE] = {0x123456789ABCDEF8, + 0xFEDCBA9876543217ULL, + 0xCCCCCCCCCCCCCCCCULL, + 0xAAAAAAAAAAAAAAAAULL}; +signed long long int signed_long_long_expected[SIZE] = {0x123456789ABCDEF8ULL, + 0xFEDCBA9876543217ULL, + 0xCCCCCCCCCCCCCCCCULL, + 0xAAAAAAAAAAAAAAAAULL}; + +union conv_t { + vector signed __int128 vsi128; + unsigned long long ull[2]; + signed char schar[16]; + signed __int128 s128; +} conv; + +int check_expected_byte (signed char expected, + signed char actual) +{ + /* Return TRUE if expected and actual values all match. */ + if (expected != actual) + { +#if DEBUG + printf ("ERROR: Expected half values don't match. \n"); + printf (" Expected 0x%x & 0xFFFF, actual 0x%x & 0xFFFF\n", + expected & 0xFF, actual & 0xFF); +#endif + return FALSE; + } + return TRUE; +} + +int check_expected_half (signed short int expected, + signed short int actual) +{ + /* Return TRUE if expected and actual values all match. */ + if (expected != actual) + { +#if DEBUG + printf ("ERROR: Expected short values don't match. \n"); + printf (" Expected 0x%x, actual 0x%x\n", + expected & 0xFFFF, actual & 0xFFFF); +#endif + return FALSE; + } + return TRUE; +} + +int check_expected_int (signed int expected, + signed int actual) +{ + /* Return TRUE if expected and actual values all match. */ + if (expected != actual) + { +#if DEBUG + printf ("ERROR: Expected int values don't match. \n"); + printf (" Expected 0x%x, actual 0x%x\n", + expected, actual); +#endif + return FALSE; + } + return TRUE; +} + +int check_expected_long (signed long int expected, + signed long int actual) +{ + /* Return TRUE if expected and actual values all match. */ + if (expected != actual) + { +#if DEBUG + printf ("ERROR: Expected long values don't match. \n"); + printf (" Expected 0x%x, actual 0x%x\n", + expected, actual); +#endif + return FALSE; + } + return TRUE; +} + +int check_expected_long_long (signed long long int expected, + signed long long int actual) +{ + /* Return TRUE if expected and actual values all match. */ + if (expected != actual) + { +#if DEBUG + printf ("ERROR: Expected long long values don't match. \n"); + printf (" Expected 0x%x, actual 0x%x\n", + expected, actual); +#endif + return FALSE; + } + return TRUE; +} + +int check_expected_long_int (signed long long int expected, + long int actual) +{ + /* Return TRUE if expected and actual values all match. */ + if (expected != actual) + { +#if DEBUG + printf ("ERROR: Expected long int values don't match. \n"); + printf (" Expected 0x%x, actual 0x%x\n", + expected, actual); +#endif + return FALSE; + } + return TRUE; +} + +void print_store_data (vector signed __int128 *store_data, int size) +{ +#if DEBUG + union conv_t val; + int i; + + for (i = 0; i < size; i++) + { + val.vsi128 = store_data[i]; + printf("Data to store [%d] = 0x%llx %llx\n", i, val.ull[1], val.ull[0]); + } +#endif +} + + +void print_raw_buffer (vector signed __int128 *rawbuffer, int size) +{ +#if DEBUG + union conv_t val; + int i; + + for (i = 0; i < size; i++) + { + val.vsi128 = rawbuffer[i]; + printf ("rawbuffer[%d] = 0x%llx %llx\n", i, val.ull[1], val.ull[0]); + } +#endif +} + +int +main () { + int i; + + vector signed __int128 rawbuffer[SIZE]; + signed char * vsbuffer_char = (signed char *)rawbuffer; + signed short int * vsbuffer_short = (signed short int *)rawbuffer; + signed int * vsbuffer_int = (signed int *)rawbuffer; + signed long int * vsbuffer_long = (signed long *)rawbuffer; + signed long long int * vsbuffer_long_long = (signed long long *)rawbuffer; + long int * vsbuffer_long_int = (long int*)rawbuffer; + + for (i = 0; i < SIZE; i++) + rawbuffer[i] = zero_vsint128; + + print_store_data (store_data, SIZE); + + for (i = 0; i < SIZE; i++) + { + __builtin_vec_xst_trunc (store_data[i], i*sizeof(char), + vsbuffer_char); + check_expected_byte (signed_char_expected[i], vsbuffer_char[i]); + } + + for (i = 0; i < SIZE; i++) + { + __builtin_vec_xst_trunc (store_data[i], i*sizeof(short int), + vsbuffer_short); + check_expected_half (signed_short_expected[i], vsbuffer_short[i]); + } + + for (i = 0; i < SIZE; i++) + { + __builtin_vec_xst_trunc (store_data[i], i*sizeof(int), + vsbuffer_int); + check_expected_int (signed_int_expected[i], vsbuffer_int[i]); + } + + for (i = 0; i < SIZE; i++) + { + __builtin_vec_xst_trunc (store_data[i], i*sizeof(long int), + vsbuffer_long); + check_expected_long (signed_long_long_expected[i], + vsbuffer_long[i]); + } + + for (i = 0; i < SIZE; i++) + { + __builtin_vec_xst_trunc (store_data[i], i*sizeof(long long int), + vsbuffer_long_long); + check_expected_long_long (signed_long_long_expected[i], + vsbuffer_long_long[i]); + } + + for (i = 0; i < SIZE; i++) + { + __builtin_vec_xst_trunc (store_data[i], i*sizeof(long long int), + vsbuffer_long_long); + check_expected_long_int (signed_long_long_expected[i], + vsbuffer_long_int[i]); + } + + print_raw_buffer (rawbuffer, SIZE); + return 0; +} + +/* { dg-final { scan-assembler-times {\mstxvrbx\M} 1 } } */ +/* { dg-final { scan-assembler-times {\mstxvrhx\M} 1 } } */ +/* { dg-final { scan-assembler-times {\mstxvrwx\M} 1 } } */ +/* { dg-final { scan-assembler-times {\mstxvrdx\M} 3 } } */