From patchwork Fri May 19 13:49:00 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Shanker Donthineni X-Patchwork-Id: 96439 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a59:b0ea:0:b0:3b6:4342:cba0 with SMTP id b10csp1253665vqo; Fri, 19 May 2023 06:56:42 -0700 (PDT) X-Google-Smtp-Source: ACHHUZ7gD1mo2cSf9ZdJObkcl2SZPNP+zAN7r1oYx8gwVSYV0i6rlT/FXPGmGrJXP1P5XdqpBZfB X-Received: by 2002:a17:90a:ca16:b0:24d:ecf7:cabb with SMTP id x22-20020a17090aca1600b0024decf7cabbmr2058706pjt.22.1684504602145; Fri, 19 May 2023 06:56:42 -0700 (PDT) ARC-Seal: i=2; a=rsa-sha256; t=1684504602; cv=pass; d=google.com; s=arc-20160816; b=fNfLB5YOBgSuejLGhU9b/fdMomuuZTX+nBi6p0bdU7bJgfUe0SVwcrkStpysPabTzm XBXfTWmgPhdFGvczUNbvLL+UTzbRCZwhztEuypaXmOcf4ts1z9W9GjhkNYsFkUfpaHN8 Ge4vg/F8ly4L9TG7Y1tnR0toPM8yffU65AwMVurqVzxPOlZJo5mc6YHZhhaX2wuCGXc/ udD2dfUIKwOFBYrB6Xm7KpUaejGUeUVSt0FtHOScANIuzSUdaF0wEubfYPCum90Bw6IN ZkuN4aASaN30/sQ64tdUtc6PXvgDh+LgtN2iVQIpOedUQ+rLiOVzLNhBVKAdGLx/zOqM UnOA== ARC-Message-Signature: i=2; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from :dkim-signature; bh=PH2FJ3ygWRVmXHPyWjnyKBW3RGtReAKw2JojLX8VxJo=; b=qfrqNmrF4QIOTgNzaGuoWwJ6vHgevevzm2Fy3EIYoLeSCmSxcESqIPthnNrJ/7KrL7 NfNJIvgk8BynPsnv9HrZDxl8OILWatDakiYZ3r97HHGPepd/uBZOrvSP+DIARQsWjWba YzZiDIDG2e7W8bf5in7AJGIEhJFW4p3mpOjaNtV58zwrnPyBU2gPXLXtcojhOihaQEqz patwiSW0YiECRqzZKVA6BdRTb6HrBQeVVnYS5Oo+RkhgBFZP6lG1TOzxlvHKnLjDD8pX a4gmr3NL9O2qIsZnicX3rWRuj7PHrdCsqI1Kw9XDCAg6TlBgu1fP38dYLSRmIcaohD93 B7Lg== ARC-Authentication-Results: i=2; mx.google.com; dkim=pass header.i=@Nvidia.com header.s=selector2 header.b=rlVCLz7s; arc=pass (i=1 spf=pass spfdomain=nvidia.com dmarc=pass fromdomain=nvidia.com); spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=REJECT sp=REJECT dis=NONE) header.from=nvidia.com Received: from out1.vger.email (out1.vger.email. [2620:137:e000::1:20]) by mx.google.com with ESMTP id h3-20020a17090a648300b002528f697d12si1732900pjj.160.2023.05.19.06.56.10; Fri, 19 May 2023 06:56:42 -0700 (PDT) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) client-ip=2620:137:e000::1:20; Authentication-Results: mx.google.com; dkim=pass header.i=@Nvidia.com header.s=selector2 header.b=rlVCLz7s; arc=pass (i=1 spf=pass spfdomain=nvidia.com dmarc=pass fromdomain=nvidia.com); spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=REJECT sp=REJECT dis=NONE) header.from=nvidia.com Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S231867AbjESNte (ORCPT + 99 others); Fri, 19 May 2023 09:49:34 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:60528 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S231738AbjESNta (ORCPT ); Fri, 19 May 2023 09:49:30 -0400 Received: from NAM10-BN7-obe.outbound.protection.outlook.com (mail-bn7nam10on2057.outbound.protection.outlook.com [40.107.92.57]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 1491AB7 for ; Fri, 19 May 2023 06:49:29 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; s=arcselector9901; d=microsoft.com; cv=none; b=mepquQpfFl3mAgX4wZTxvIlBAd6k45JSz5S30EJoZJRl8UGSxT1LMribJq7oPSkswwPPqxWMdRrRghp4wC8GjxTBvoRdf7zt9EDJg7C12CHjgyDuCj5kr+MFruaLiP0I2f6ZrUYENUipWswyISjo/NH1+V6cY2VE8RFkWjXH7TimbKzyilCUrpF9775bNs6iafhV7nXQbijZ7n/PlemUt69Vw+gd03EYfBt4524DzKDgv/df6Tleq5O+I/EUY/VGe1/oQbW6hEQOT7h7bft2dXmQApWx/ZfhVEsqyXKlLe9p5KStmLgUaoktYuEmwDotYGphd+8X8uNdE2rGQu8LNA== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=microsoft.com; s=arcselector9901; h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-AntiSpam-MessageData-ChunkCount:X-MS-Exchange-AntiSpam-MessageData-0:X-MS-Exchange-AntiSpam-MessageData-1; bh=PH2FJ3ygWRVmXHPyWjnyKBW3RGtReAKw2JojLX8VxJo=; b=cJW0eRs8FFWOfgY2gndrabHTAFAAoDSvX6nQZKepHBgUbw+mAI58c4+2EyGXTtxlSN+rQM7N9zsMywpICCiWO4dryNQQjVArvVmv0Ir5XXkcAn+22FRkYV8pbPhsOMAh3WO9SYVhtYOohut0crCzJ1eVHNkkSkXvZ8IXgVfE5EKSZEEa0+o70Q1m3o2SRSxOIkNI3d8Idmewv6iNE+IlaR0KKgymzcSg0AX8EkOoOICeCUYQT043zMNF8YPBeN/hXgWwzik9EUN1Fh/HrQv26i75VE3Mp/8rOLVvgcXXl9vCE+XC8XQdXp6Vrz8vTOFcUxIZ19S3RHE/YDQ3RiGujg== ARC-Authentication-Results: i=1; mx.microsoft.com 1; spf=pass (sender ip is 216.228.117.161) smtp.rcpttodomain=linutronix.de smtp.mailfrom=nvidia.com; dmarc=pass (p=reject sp=reject pct=100) action=none header.from=nvidia.com; dkim=none (message not signed); arc=none DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=Nvidia.com; s=selector2; h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-SenderADCheck; bh=PH2FJ3ygWRVmXHPyWjnyKBW3RGtReAKw2JojLX8VxJo=; b=rlVCLz7siUiQ4udS6Vr6M+BOXUc4wsE3ejXfL3oIZ9jXlZS16nVz9zMEb9Pio4gv/oVMoXycOgAyoYpbQtg5GWG/HIZ4az+S6bS35poh2Bna1LFz+vAnaSUZK2VhWnm5f1JetgYBjMq6pF4fwKamR56UoHUAGt5yeeSLK+QnySzeQ0PER64ukYHY+y6C02Cy1026uK9a1OT6GHw/jBYBzPjXnXkN0tQ+mMhIU8ATUo3Q07waI1lqT8FQBQ/hk2sdEuK99AqU3UmUac/zJ9wAzcj7hNokPgqy5N/13pIVoSXH5rVHY1aTIgXAsaDr+vE52ku2y8zdZSZEJ9Z+RqK8Gg== Received: from BN9PR03CA0526.namprd03.prod.outlook.com (2603:10b6:408:131::21) by PH7PR12MB9104.namprd12.prod.outlook.com (2603:10b6:510:2f3::7) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.6411.21; Fri, 19 May 2023 13:49:27 +0000 Received: from BN8NAM11FT102.eop-nam11.prod.protection.outlook.com (2603:10b6:408:131:cafe::b8) by BN9PR03CA0526.outlook.office365.com (2603:10b6:408:131::21) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.6411.21 via Frontend Transport; Fri, 19 May 2023 13:49:26 +0000 X-MS-Exchange-Authentication-Results: spf=pass (sender IP is 216.228.117.161) smtp.mailfrom=nvidia.com; dkim=none (message not signed) header.d=none;dmarc=pass action=none header.from=nvidia.com; Received-SPF: Pass (protection.outlook.com: domain of nvidia.com designates 216.228.117.161 as permitted sender) receiver=protection.outlook.com; client-ip=216.228.117.161; helo=mail.nvidia.com; pr=C Received: from mail.nvidia.com (216.228.117.161) by BN8NAM11FT102.mail.protection.outlook.com (10.13.177.27) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.6411.21 via Frontend Transport; Fri, 19 May 2023 13:49:26 +0000 Received: from rnnvmail205.nvidia.com (10.129.68.10) by mail.nvidia.com (10.129.200.67) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.986.5; Fri, 19 May 2023 06:49:13 -0700 Received: from rnnvmail204.nvidia.com (10.129.68.6) by rnnvmail205.nvidia.com (10.129.68.10) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.986.37; Fri, 19 May 2023 06:49:13 -0700 Received: from SDONTHINENI-DESKTOP.nvidia.com (10.127.8.9) by mail.nvidia.com (10.129.68.6) with Microsoft SMTP Server id 15.2.986.37 via Frontend Transport; Fri, 19 May 2023 06:49:12 -0700 From: Shanker Donthineni To: Thomas Gleixner , Marc Zyngier CC: Sebastian Andrzej Siewior , Michael Walle , Shanker Donthineni , , Vikram Sethi , "Jason Sequeira" Subject: [PATCH v5 1/3] genirq: Use hlist for managing resend handlers Date: Fri, 19 May 2023 08:49:00 -0500 Message-ID: <20230519134902.1495562-2-sdonthineni@nvidia.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20230519134902.1495562-1-sdonthineni@nvidia.com> References: <20230519134902.1495562-1-sdonthineni@nvidia.com> MIME-Version: 1.0 X-NVConfidentiality: public X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: BN8NAM11FT102:EE_|PH7PR12MB9104:EE_ X-MS-Office365-Filtering-Correlation-Id: 1ef4fca2-9b71-48e6-f7a7-08db586fdc69 X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0; X-Microsoft-Antispam-Message-Info: ddJjIXlGormTXTxPBTbEKBMUA4+bOdO6tEXrQWIw7ADnAGXd4FKII0YHpWcoOGZpoZhVdNOe1c9XCQ1K3EFr27Ggs2+ULeVdWuziIaF3IKJVGHfIVXOnuJddxINlKB/mIrCqcqkXShZgTFKVVuaBit/uJCEk5G3DRpG9TcQQRtYxD7OYNQ2OpRgApTC5I/k9d5HWWp8jGfrGMJ+8sWo31l/1mM3OXNsEm1z58iMAwUvhi2/opI3gOy+XhYZoU93OxdT9uFES1uwMlNsZTxBhd2DdF3Z4j3xw+yT5SqupzcYyRVH7UwwweyekI3hqe0CJ53dF9Y0XiUWWGISEaDzDZ/AF11ft5gr/ccXYxw9ySaSdQk4KHaN7dmWWni6gmDWx9Hr5LQ4NM1bMmEIQjIMZN1STPpjV4O3kXQIXBF5jFz1ul3Tudc8FxjNadOPhE/nWuDtP9YNo7HMVeZ8kHlkJY5tnm0IgMvEc91LpwWloB067jmDrWFRC6mqLPE8Grzin6jwhekoI7rCnOLO83qeq/Dp1XIPYt/mvrh/n0PQdaeylmuTkrV5YKvQD/DOzn7jJvBhLxyRy1dSIR8hh3K2kwcAV1okdWv+BYpMysPe9W7M/XoXFILamDD0wpGG2ZN2dOESpiSlu321aGyb1gHGlzoVNLAwxC+ncwbcZYA//grQo0uUkWmuOzL2XMP5J10boRIVsvQWIzejl1Ly5kezdt5ZiFt2/md5vojRUKRnURcMtbv1k85moJRSy3nV1ELjR X-Forefront-Antispam-Report: CIP:216.228.117.161;CTRY:US;LANG:en;SCL:1;SRV:;IPV:NLI;SFV:NSPM;H:mail.nvidia.com;PTR:dc6edge2.nvidia.com;CAT:NONE;SFS:(13230028)(4636009)(376002)(396003)(39860400002)(136003)(346002)(451199021)(36840700001)(46966006)(40470700004)(478600001)(316002)(5660300002)(8936002)(8676002)(41300700001)(4326008)(66899021)(110136005)(2906002)(40460700003)(70206006)(70586007)(36860700001)(54906003)(36756003)(40480700001)(6666004)(7696005)(1076003)(186003)(107886003)(26005)(82740400003)(47076005)(2616005)(86362001)(356005)(7636003)(336012)(426003)(82310400005)(83380400001);DIR:OUT;SFP:1101; X-OriginatorOrg: Nvidia.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 19 May 2023 13:49:26.3728 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 1ef4fca2-9b71-48e6-f7a7-08db586fdc69 X-MS-Exchange-CrossTenant-Id: 43083d15-7273-40c1-b7db-39efd9ccc17a X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=43083d15-7273-40c1-b7db-39efd9ccc17a;Ip=[216.228.117.161];Helo=[mail.nvidia.com] X-MS-Exchange-CrossTenant-AuthSource: BN8NAM11FT102.eop-nam11.prod.protection.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: PH7PR12MB9104 X-Spam-Status: No, score=-1.1 required=5.0 tests=BAYES_00,DKIMWL_WL_HIGH, DKIM_SIGNED,DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,FORGED_SPF_HELO, RCVD_IN_DNSWL_NONE,RCVD_IN_MSPIKE_H2,SPF_HELO_PASS,SPF_NONE, T_SCC_BODY_TEXT_LINE,URIBL_BLOCKED autolearn=no autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-getmail-retrieved-from-mailbox: =?utf-8?q?INBOX?= X-GMAIL-THRID: =?utf-8?q?1766331097942763833?= X-GMAIL-MSGID: =?utf-8?q?1766331097942763833?= The current implementation utilizes a bitmap for managing IRQ resend handlers, which is allocated based on the SPARSE_IRQ/NR_IRQS macros. However, this method may not efficiently utilize memory during runtime, particularly when IRQ_BITMAP_BITS is large. Address this issue by using the hlist to manage IRQ resend handlers instead of relying on a static bitmap memory allocation. Additionally, a new function, clear_irq_resend(), is introduced and called from irq_shutdown to ensure a graceful teardown of the interrupt. Signed-off-by: Shanker Donthineni --- include/linux/irqdesc.h | 3 +++ kernel/irq/chip.c | 1 + kernel/irq/internals.h | 2 ++ kernel/irq/irqdesc.c | 2 ++ kernel/irq/resend.c | 47 ++++++++++++++++++++++++++--------------- 5 files changed, 38 insertions(+), 17 deletions(-) diff --git a/include/linux/irqdesc.h b/include/linux/irqdesc.h index 844a8e30e6de..d9451d456a73 100644 --- a/include/linux/irqdesc.h +++ b/include/linux/irqdesc.h @@ -102,6 +102,9 @@ struct irq_desc { int parent_irq; struct module *owner; const char *name; +#ifdef CONFIG_HARDIRQS_SW_RESEND + struct hlist_node resend_node; +#endif } ____cacheline_internodealigned_in_smp; #ifdef CONFIG_SPARSE_IRQ diff --git a/kernel/irq/chip.c b/kernel/irq/chip.c index 49e7bc871fec..2eac5532c3c8 100644 --- a/kernel/irq/chip.c +++ b/kernel/irq/chip.c @@ -306,6 +306,7 @@ static void __irq_disable(struct irq_desc *desc, bool mask); void irq_shutdown(struct irq_desc *desc) { if (irqd_is_started(&desc->irq_data)) { + clear_irq_resend(desc); desc->depth = 1; if (desc->irq_data.chip->irq_shutdown) { desc->irq_data.chip->irq_shutdown(&desc->irq_data); diff --git a/kernel/irq/internals.h b/kernel/irq/internals.h index 5fdc0b557579..51fc8c497c22 100644 --- a/kernel/irq/internals.h +++ b/kernel/irq/internals.h @@ -113,6 +113,8 @@ irqreturn_t handle_irq_event(struct irq_desc *desc); /* Resending of interrupts :*/ int check_irq_resend(struct irq_desc *desc, bool inject); +void clear_irq_resend(struct irq_desc *desc); +void irq_resend_init(struct irq_desc *desc); bool irq_wait_for_poll(struct irq_desc *desc); void __irq_wake_thread(struct irq_desc *desc, struct irqaction *action); diff --git a/kernel/irq/irqdesc.c b/kernel/irq/irqdesc.c index 240e145e969f..b401b89b226a 100644 --- a/kernel/irq/irqdesc.c +++ b/kernel/irq/irqdesc.c @@ -415,6 +415,7 @@ static struct irq_desc *alloc_desc(int irq, int node, unsigned int flags, desc_set_defaults(irq, desc, node, affinity, owner); irqd_set(&desc->irq_data, flags); kobject_init(&desc->kobj, &irq_kobj_type); + irq_resend_init(desc); return desc; @@ -581,6 +582,7 @@ int __init early_irq_init(void) mutex_init(&desc[i].request_mutex); init_waitqueue_head(&desc[i].wait_for_threads); desc_set_defaults(i, &desc[i], node, NULL, NULL); + irq_resend_init(desc); } return arch_early_irq_init(); } diff --git a/kernel/irq/resend.c b/kernel/irq/resend.c index 0c46e9fe3a89..edec335c0a7a 100644 --- a/kernel/irq/resend.c +++ b/kernel/irq/resend.c @@ -21,8 +21,9 @@ #ifdef CONFIG_HARDIRQS_SW_RESEND -/* Bitmap to handle software resend of interrupts: */ -static DECLARE_BITMAP(irqs_resend, IRQ_BITMAP_BITS); +/* hlist_head to handle software resend of interrupts: */ +static HLIST_HEAD(irq_resend_list); +static DEFINE_RAW_SPINLOCK(irq_resend_lock); /* * Run software resends of IRQ's @@ -30,18 +31,17 @@ static DECLARE_BITMAP(irqs_resend, IRQ_BITMAP_BITS); static void resend_irqs(struct tasklet_struct *unused) { struct irq_desc *desc; - int irq; - - while (!bitmap_empty(irqs_resend, nr_irqs)) { - irq = find_first_bit(irqs_resend, nr_irqs); - clear_bit(irq, irqs_resend); - desc = irq_to_desc(irq); - if (!desc) - continue; - local_irq_disable(); + + raw_spin_lock_irq(&irq_resend_lock); + while (!hlist_empty(&irq_resend_list)) { + desc = hlist_entry(irq_resend_list.first, struct irq_desc, + resend_node); + hlist_del_init(&desc->resend_node); + raw_spin_unlock(&irq_resend_lock); desc->handle_irq(desc); - local_irq_enable(); + raw_spin_lock(&irq_resend_lock); } + raw_spin_unlock_irq(&irq_resend_lock); } /* Tasklet to handle resend: */ @@ -49,8 +49,6 @@ static DECLARE_TASKLET(resend_tasklet, resend_irqs); static int irq_sw_resend(struct irq_desc *desc) { - unsigned int irq = irq_desc_get_irq(desc); - /* * Validate whether this interrupt can be safely injected from * non interrupt context @@ -70,16 +68,31 @@ static int irq_sw_resend(struct irq_desc *desc) */ if (!desc->parent_irq) return -EINVAL; - irq = desc->parent_irq; } - /* Set it pending and activate the softirq: */ - set_bit(irq, irqs_resend); + /* Add to resend_list and activate the softirq: */ + raw_spin_lock(&irq_resend_lock); + hlist_add_head(&desc->resend_node, &irq_resend_list); + raw_spin_unlock(&irq_resend_lock); tasklet_schedule(&resend_tasklet); return 0; } +void clear_irq_resend(struct irq_desc *desc) +{ + raw_spin_lock(&irq_resend_lock); + hlist_del_init(&desc->resend_node); + raw_spin_unlock(&irq_resend_lock); +} + +void irq_resend_init(struct irq_desc *desc) +{ + INIT_HLIST_NODE(&desc->resend_node); +} #else +void clear_irq_resend(struct irq_desc *desc) {} +void irq_resend_init(struct irq_desc *desc) {} + static int irq_sw_resend(struct irq_desc *desc) { return -EINVAL; From patchwork Fri May 19 13:49:01 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Shanker Donthineni X-Patchwork-Id: 96436 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a59:b0ea:0:b0:3b6:4342:cba0 with SMTP id b10csp1252232vqo; Fri, 19 May 2023 06:54:10 -0700 (PDT) X-Google-Smtp-Source: ACHHUZ7rn7FL7F0819lYlvhy769Gf5SAGvyQmXQA1qecwmEZFN3XngBbCABoDjRgFSbD2sbZm+d0 X-Received: by 2002:a05:6a20:1585:b0:104:50ce:297d with SMTP id h5-20020a056a20158500b0010450ce297dmr2622936pzj.40.1684504449938; Fri, 19 May 2023 06:54:09 -0700 (PDT) ARC-Seal: i=2; a=rsa-sha256; t=1684504449; cv=pass; d=google.com; s=arc-20160816; b=P/RLbMingA8jlW9YAODgJygq8ixz0cMEyLaDA8IcnAvkOtVOteXEtfFfOyBXzODyzA e+UjkTc+FYw6cOfBE+i8XT1ONUi+zIIgFNeBsePZyk8FRwxoJvV6Oa9RS+FF+AC11Klb mR7P1PVqO83Wm9FC99WEtL+C75HwtLInMafgz77GEwL8e7H7AiEgzExpG7ROBhgZ48qr 3SH64T9cyOalkpB6mZokQ6YWVGUK/OGJy6nYsc90QLM28IlL7lZqcdU1CuEcmFBuSGKq /7Fi3xYsccnj/vUR22eC9WSSN1pRRiC3wZKcpQl6p7lPHD5Cev4Qym8BorI69w2mrY8W GoiA== ARC-Message-Signature: i=2; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from :dkim-signature; bh=N5gs11ceX1GI883NckqZh28QCneok6LeDTCI8QwL4JU=; b=cFNy5SkjP7pZ1Dn67QFVwxHAghsk5yrsZsFSYxZ6NMqQXEmqMxt/+ijiKUID7+kbuE vd+6vPssHYIOkSANrfkJ+w0EqqcwCokBhcbjzrUIkz+PuO0TeyB2jkoEGOWaFnT1h9hs bs+pYLOlDrdgle1dwBKmFy9T08lIQYdngXJpnMSVx2Anu0QP4KIIv3wuDlfAmSyYAtFM 8qJqVZyEmoKx18DC5VrGb+EF20l8TJiE10Lqyp7YhtQxz3l6/AwT+3Q5jRRNW6XPpU4Y ToyNPn/lLKFOeVXgBW3ddkekr/P6CncU7g6l39T0Qg6kF5K5yKglJTxzkr5ZdpGdbJs0 keLQ== ARC-Authentication-Results: i=2; mx.google.com; dkim=pass header.i=@Nvidia.com header.s=selector2 header.b=An8gstgn; arc=pass (i=1 spf=pass spfdomain=nvidia.com dmarc=pass fromdomain=nvidia.com); spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=REJECT sp=REJECT dis=NONE) header.from=nvidia.com Received: from out1.vger.email (out1.vger.email. [2620:137:e000::1:20]) by mx.google.com with ESMTP id o9-20020a17090a420900b002507107f730si1743680pjg.30.2023.05.19.06.53.54; Fri, 19 May 2023 06:54:09 -0700 (PDT) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) client-ip=2620:137:e000::1:20; Authentication-Results: mx.google.com; dkim=pass header.i=@Nvidia.com header.s=selector2 header.b=An8gstgn; arc=pass (i=1 spf=pass spfdomain=nvidia.com dmarc=pass fromdomain=nvidia.com); spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=REJECT sp=REJECT dis=NONE) header.from=nvidia.com Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S230443AbjESNtm (ORCPT + 99 others); Fri, 19 May 2023 09:49:42 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:60548 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S231835AbjESNtd (ORCPT ); Fri, 19 May 2023 09:49:33 -0400 Received: from NAM04-DM6-obe.outbound.protection.outlook.com (mail-dm6nam04on2074.outbound.protection.outlook.com [40.107.102.74]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 7E203B7 for ; Fri, 19 May 2023 06:49:31 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; s=arcselector9901; d=microsoft.com; cv=none; b=Qmwk2J7UtRcmB7ZuhAhL92GJ8+4U+mxuJ4V2EMC7Qqwcy6qsNZrMpGG3ELJZKXhfDdgIc6i8BdMCMe7QuV1B+eC4tTnHiuQrv7B4jf+mB/SPCrwMq1o7eKjMSB6Gm+EThskWHUyqjkuWQykdzi2cDNeHPNB/MPYbnP+LJ4O/05shqxszfae1pXWpqOo5RMExLPDnPFRVinZSjJKhdTvGvJt04G1i+4Vt07T9kUEddgP1K4RVwDOfh/z94/r5NFPvlljAjne7ehO6H1Krs5O+ENWlfhAR4Tr2ZTKg0Zpyg+AnDZWDfHvdBy7/xkV8q7qCxJ+K6eXDQjWMQN9ORkwRqw== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=microsoft.com; s=arcselector9901; h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-AntiSpam-MessageData-ChunkCount:X-MS-Exchange-AntiSpam-MessageData-0:X-MS-Exchange-AntiSpam-MessageData-1; bh=N5gs11ceX1GI883NckqZh28QCneok6LeDTCI8QwL4JU=; b=Q38CJ4ZRGTWZXj1k2j6i9FqzlKcyd2uoC/GpQVQeo4uVDc44u+xfMG4Sw/8Tm6p2pXpSkT40JM0xdKAtf/fDLNpDc4iWSqqRolbU2Kt4Kodol0gzv5NslVxQvDYzq4MhHiX0waQT9bwpE73P1Ip3vlRhAc1LbUmi/+LBHVf2s9EiBXCpzk786a4gHpwp38uGmPkDqpikm3ZcvtjIhyDyJPKvu5yyTfypdz/kmt6wLt/Vutm/vGdX4Zz36RbM/FK1+v9hbCR4jfoxFkes+SHHY6gAMQXLnI96i7Z+eMigBijOPY6MzwMLzZMra51tWFk0XqSwOqyjMIVWNDrhFjXl8A== ARC-Authentication-Results: i=1; mx.microsoft.com 1; spf=pass (sender ip is 216.228.117.161) smtp.rcpttodomain=linutronix.de smtp.mailfrom=nvidia.com; dmarc=pass (p=reject sp=reject pct=100) action=none header.from=nvidia.com; dkim=none (message not signed); arc=none DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=Nvidia.com; s=selector2; h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-SenderADCheck; bh=N5gs11ceX1GI883NckqZh28QCneok6LeDTCI8QwL4JU=; b=An8gstgnE2mTJXRtrAmXFVcTI0gLeo3hPF5rrceHwfH/T91QT5s7CS5ruBUcOS9jSSkRuujqOiHAbhRznD0dlmwu1DqXaTLF3ymkUqnh0Rn1OvGUQmRkvkT98xEWoY5xc2nYmgAaQFUXiuGoR4TuTWW2SUAnuq/IBiRBGUVUN2/ctejPUpbMEoB67IkdduRpTwROnQmz8ii5RJuEmEsIuyzLpzG4674imv8l5pkDreXoAdXkPjNOUcYOn44Svxe2MgbewHNN1uoOq7glBv/DkWa32vuwmytqnDlDLX1xYaNpeof4waFnhCJ1Dp227jZtaT7XTWZ4INXv0kxkHpeZuw== Received: from BN9PR03CA0531.namprd03.prod.outlook.com (2603:10b6:408:131::26) by SA1PR12MB8119.namprd12.prod.outlook.com (2603:10b6:806:337::19) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.6411.19; Fri, 19 May 2023 13:49:29 +0000 Received: from BN8NAM11FT102.eop-nam11.prod.protection.outlook.com (2603:10b6:408:131:cafe::58) by BN9PR03CA0531.outlook.office365.com (2603:10b6:408:131::26) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.6411.20 via Frontend Transport; Fri, 19 May 2023 13:49:29 +0000 X-MS-Exchange-Authentication-Results: spf=pass (sender IP is 216.228.117.161) smtp.mailfrom=nvidia.com; dkim=none (message not signed) header.d=none;dmarc=pass action=none header.from=nvidia.com; Received-SPF: Pass (protection.outlook.com: domain of nvidia.com designates 216.228.117.161 as permitted sender) receiver=protection.outlook.com; client-ip=216.228.117.161; helo=mail.nvidia.com; pr=C Received: from mail.nvidia.com (216.228.117.161) by BN8NAM11FT102.mail.protection.outlook.com (10.13.177.27) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.6411.21 via Frontend Transport; Fri, 19 May 2023 13:49:29 +0000 Received: from rnnvmail205.nvidia.com (10.129.68.10) by mail.nvidia.com (10.129.200.67) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.986.5; Fri, 19 May 2023 06:49:14 -0700 Received: from rnnvmail204.nvidia.com (10.129.68.6) by rnnvmail205.nvidia.com (10.129.68.10) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.986.37; Fri, 19 May 2023 06:49:14 -0700 Received: from SDONTHINENI-DESKTOP.nvidia.com (10.127.8.9) by mail.nvidia.com (10.129.68.6) with Microsoft SMTP Server id 15.2.986.37 via Frontend Transport; Fri, 19 May 2023 06:49:13 -0700 From: Shanker Donthineni To: Thomas Gleixner , Marc Zyngier CC: Sebastian Andrzej Siewior , Michael Walle , Shanker Donthineni , , Vikram Sethi , "Jason Sequeira" Subject: [PATCH v5 2/3] genirq: Encapsulate sparse bitmap handling Date: Fri, 19 May 2023 08:49:01 -0500 Message-ID: <20230519134902.1495562-3-sdonthineni@nvidia.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20230519134902.1495562-1-sdonthineni@nvidia.com> References: <20230519134902.1495562-1-sdonthineni@nvidia.com> MIME-Version: 1.0 X-NVConfidentiality: public X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: BN8NAM11FT102:EE_|SA1PR12MB8119:EE_ X-MS-Office365-Filtering-Correlation-Id: 6da37b83-3f7a-48c3-01ba-08db586fde23 X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0; X-Microsoft-Antispam-Message-Info: 56cdGMzU1L+P9TbCduGIBgUFeqFDTzqz0jHeqkTffABuJlsmHQiqS/3PaXLs/Gnb5tmg+EdOhfcH6QxmWnz4X0Uq96Rd+R0hftZ+tJGeYa/Gh5ooVXDtfLBLtEVXJRLKWWq+QQ8TI13vfvyjeVeVAuhst5kOSJ72bniLyuzyw7gjDXu5LzTclWZAdibhE29umRQD1Ciy947hN+DoLwUVbAaLl4bXh+03ZIH2jJwUlhHVteVy7hl9jvpN4HRXKFXkWfe5ECCzvJfe3g1Z1QNt+38e4mMMspCDSlf1Y1Zw1rueFyneKtlWJXx6ybfVxI7/teuAzXXDsx7jOCVTgfmtRhs3e66PEJnzOtbnJ2Va1a9zUKEOrGkskCj6GwmHdrlDGUQ2Tl3mrEutPLuV0CbOYFiKqzcGpj8mcsXZ/93NkG19imXtvqmjJta+QSucLTQ8OCEzOaOaiiG7v9Mv0J/Sx+UEZcYaTDacda9kXRPCxvaVdbhKLuwMa+oQYSnirIhVAONT1gsAvMJmU63myWKoSFqmINHey2xEbCi5MbhOMoyVd/5XWIgmOudLATJy8HlJ/OKe844fUz8AkzbCCaMD+BD7ysWdXv3snhCwmOBavyD9wXMu/oMHR+ZqtqeiLyrxOyy96vpvHBw9C7N+fN3L40qzkWdBDsV32ftm+pFBdw3PRvv/w5EdKS+YtIugM+DxoYQA4pRw1eOMqPnqhW0ph//Md46mhEyUY9F+JdhTAgEVLI7vVxoAx95mMYqRV0vH X-Forefront-Antispam-Report: CIP:216.228.117.161;CTRY:US;LANG:en;SCL:1;SRV:;IPV:NLI;SFV:NSPM;H:mail.nvidia.com;PTR:dc6edge2.nvidia.com;CAT:NONE;SFS:(13230028)(4636009)(346002)(376002)(396003)(136003)(39860400002)(451199021)(36840700001)(46966006)(40470700004)(26005)(1076003)(40460700003)(107886003)(36860700001)(47076005)(83380400001)(336012)(426003)(36756003)(40480700001)(2616005)(82310400005)(7636003)(86362001)(186003)(82740400003)(356005)(478600001)(8676002)(8936002)(110136005)(54906003)(316002)(2906002)(5660300002)(70206006)(70586007)(41300700001)(4326008)(7696005)(6666004);DIR:OUT;SFP:1101; X-OriginatorOrg: Nvidia.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 19 May 2023 13:49:29.2632 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 6da37b83-3f7a-48c3-01ba-08db586fde23 X-MS-Exchange-CrossTenant-Id: 43083d15-7273-40c1-b7db-39efd9ccc17a X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=43083d15-7273-40c1-b7db-39efd9ccc17a;Ip=[216.228.117.161];Helo=[mail.nvidia.com] X-MS-Exchange-CrossTenant-AuthSource: BN8NAM11FT102.eop-nam11.prod.protection.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: SA1PR12MB8119 X-Spam-Status: No, score=-1.1 required=5.0 tests=BAYES_00,DKIMWL_WL_HIGH, DKIM_SIGNED,DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,FORGED_SPF_HELO, RCVD_IN_DNSWL_NONE,RCVD_IN_MSPIKE_H2,SPF_HELO_PASS,SPF_NONE, T_SCC_BODY_TEXT_LINE,URIBL_BLOCKED autolearn=no autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-getmail-retrieved-from-mailbox: =?utf-8?q?INBOX?= X-GMAIL-THRID: =?utf-8?q?1766330937847424961?= X-GMAIL-MSGID: =?utf-8?q?1766330937847424961?= Move the open coded sparse bitmap handling into helper functions as a preparatory step for converting the sparse interrupt management to a maple tree. No functional change. Signed-off-by: Shanker Donthineni --- kernel/irq/internals.h | 4 ++-- kernel/irq/irqdesc.c | 30 ++++++++++++++++++++---------- 2 files changed, 22 insertions(+), 12 deletions(-) diff --git a/kernel/irq/internals.h b/kernel/irq/internals.h index 51fc8c497c22..f3f2090dd2de 100644 --- a/kernel/irq/internals.h +++ b/kernel/irq/internals.h @@ -12,9 +12,9 @@ #include #ifdef CONFIG_SPARSE_IRQ -# define IRQ_BITMAP_BITS (NR_IRQS + 8196) +# define MAX_SPARSE_IRQS (NR_IRQS + 8196) #else -# define IRQ_BITMAP_BITS NR_IRQS +# define MAX_SPARSE_IRQS NR_IRQS #endif #define istate core_internal_state__do_not_mess_with_it diff --git a/kernel/irq/irqdesc.c b/kernel/irq/irqdesc.c index b401b89b226a..e0d9dd9b36f9 100644 --- a/kernel/irq/irqdesc.c +++ b/kernel/irq/irqdesc.c @@ -131,7 +131,18 @@ int nr_irqs = NR_IRQS; EXPORT_SYMBOL_GPL(nr_irqs); static DEFINE_MUTEX(sparse_irq_lock); -static DECLARE_BITMAP(allocated_irqs, IRQ_BITMAP_BITS); +static DECLARE_BITMAP(allocated_irqs, MAX_SPARSE_IRQS); + +static int irq_find_free_area(unsigned int from, unsigned int cnt) +{ + return bitmap_find_next_zero_area(allocated_irqs, MAX_SPARSE_IRQS, + from, cnt, 0); +} + +static unsigned int irq_find_at_or_after(unsigned int offset) +{ + return find_next_bit(allocated_irqs, nr_irqs, offset); +} #ifdef CONFIG_SPARSE_IRQ @@ -517,7 +528,7 @@ static int alloc_descs(unsigned int start, unsigned int cnt, int node, static int irq_expand_nr_irqs(unsigned int nr) { - if (nr > IRQ_BITMAP_BITS) + if (nr > MAX_SPARSE_IRQS) return -ENOMEM; nr_irqs = nr; return 0; @@ -535,11 +546,11 @@ int __init early_irq_init(void) printk(KERN_INFO "NR_IRQS: %d, nr_irqs: %d, preallocated irqs: %d\n", NR_IRQS, nr_irqs, initcnt); - if (WARN_ON(nr_irqs > IRQ_BITMAP_BITS)) - nr_irqs = IRQ_BITMAP_BITS; + if (WARN_ON(nr_irqs > MAX_SPARSE_IRQS)) + nr_irqs = MAX_SPARSE_IRQS; - if (WARN_ON(initcnt > IRQ_BITMAP_BITS)) - initcnt = IRQ_BITMAP_BITS; + if (WARN_ON(initcnt > MAX_SPARSE_IRQS)) + initcnt = MAX_SPARSE_IRQS; if (initcnt > nr_irqs) nr_irqs = initcnt; @@ -812,8 +823,7 @@ __irq_alloc_descs(int irq, unsigned int from, unsigned int cnt, int node, mutex_lock(&sparse_irq_lock); - start = bitmap_find_next_zero_area(allocated_irqs, IRQ_BITMAP_BITS, - from, cnt, 0); + start = irq_find_free_area(from, cnt); ret = -EEXIST; if (irq >=0 && start != irq) goto unlock; @@ -834,11 +844,11 @@ EXPORT_SYMBOL_GPL(__irq_alloc_descs); * irq_get_next_irq - get next allocated irq number * @offset: where to start the search * - * Returns next irq number after offset or nr_irqs if none is found. + * Returns next irq number at or after offset or nr_irqs if none is found. */ unsigned int irq_get_next_irq(unsigned int offset) { - return find_next_bit(allocated_irqs, nr_irqs, offset); + return irq_find_at_or_after(offset); } struct irq_desc * From patchwork Fri May 19 13:49:02 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Shanker Donthineni X-Patchwork-Id: 96437 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a59:b0ea:0:b0:3b6:4342:cba0 with SMTP id b10csp1252509vqo; Fri, 19 May 2023 06:54:37 -0700 (PDT) X-Google-Smtp-Source: ACHHUZ45vkfESfMnhHkg1R9PeylkNZXUtKUBCdtNMCTqvboQ7lln4pNoSUUBP1YgXV5tK8Fgmfms X-Received: by 2002:a05:6a00:194d:b0:643:bb16:7ca6 with SMTP id s13-20020a056a00194d00b00643bb167ca6mr3479211pfk.21.1684504476931; Fri, 19 May 2023 06:54:36 -0700 (PDT) ARC-Seal: i=2; a=rsa-sha256; t=1684504476; cv=pass; d=google.com; s=arc-20160816; b=p6QrKs7RU/5WU85Ks5GNgq+w3gRpTGt046jCXrUo3NTPiV0yxfk9XMRN3YPVBhnx+d dNp3D5XkPqU3ZO+nWdjb5z6c3pQZdbkqpQ6s1lqgnX/lbG1LbJYhMOWaEkuqjr6Ebvtr vSjhiDWlfV1HnPe+wxdISy+TZ9BRxyLlKqQIBgCXK+0z8UbuKytDlGDVZS8PqIpVcnkJ yDs3mRDPSQ4f2ELkvTTHrsrQXtPyAVmVAYsYTmpw4xSo5cP9yXS8SpVZ2Xtzsz/TfA8+ zZ4J16BuFmjjxhb6rEuziSpwU/SVlRViudNZ8hny1bqOUv4VjTxlPjPnxRGdUz7AXlaG 3q7g== ARC-Message-Signature: i=2; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from :dkim-signature; bh=de6G/yYKlDcG5Llc/8vFOzpCkyOlrDMdqhJBg50LCeo=; b=GH1dcngNURN8DbWgEZCyYVoIsXf8ll9cZTAV7SVDTaJG/FOfgZ8hqhn3vFgjUALOhQ c2IBcG1oQvY/8Jvx+akZLmtZRxANCbY5yyUzzd9OT1nfTLn+y9vhPUP6iHFAdpG8ycQs Pfot2TDyge/mepSoMDMv3XNfy1+CZUIxaM1XFIZWD+plwQczR2qPq5CFItxNMerSl6tu jsQbXoid3KSvHqhaiPYzuVRQiflfS3wTVB7uIQ0EFjUFkoNVUDHFptnZmMBucpQnPj9i oHbMFxVIhNbcIaWq+bskzc0mihLFhj/sWsapL6m3gm6OL9kyIshww8Z79sfYPY/1eOle HddQ== ARC-Authentication-Results: i=2; mx.google.com; dkim=pass header.i=@Nvidia.com header.s=selector2 header.b=bJp2DXGU; arc=pass (i=1 spf=pass spfdomain=nvidia.com dmarc=pass fromdomain=nvidia.com); spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=REJECT sp=REJECT dis=NONE) header.from=nvidia.com Received: from out1.vger.email (out1.vger.email. [2620:137:e000::1:20]) by mx.google.com with ESMTP id e18-20020a637452000000b00530b3b245b8si3740486pgn.418.2023.05.19.06.54.21; Fri, 19 May 2023 06:54:36 -0700 (PDT) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) client-ip=2620:137:e000::1:20; Authentication-Results: mx.google.com; dkim=pass header.i=@Nvidia.com header.s=selector2 header.b=bJp2DXGU; arc=pass (i=1 spf=pass spfdomain=nvidia.com dmarc=pass fromdomain=nvidia.com); spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=REJECT sp=REJECT dis=NONE) header.from=nvidia.com Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S231939AbjESNtk (ORCPT + 99 others); Fri, 19 May 2023 09:49:40 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:60546 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S231823AbjESNtc (ORCPT ); Fri, 19 May 2023 09:49:32 -0400 Received: from NAM11-BN8-obe.outbound.protection.outlook.com (mail-bn8nam11on2041.outbound.protection.outlook.com [40.107.236.41]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 0CEF6B3 for ; Fri, 19 May 2023 06:49:31 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; s=arcselector9901; d=microsoft.com; cv=none; b=EyZxTYAv3BPILFJ5r/0PqmttOG/hnlUBFGFm+Vxw6GthCD69ry9yJw0+5AZ58/3sl7ciIAHBc7yD5HbqVmk0EjOUnOm4+IJ2FWzo+G49IgXm27Ygg851NY/jBkeHQ2KeGNEghoLopbD6GGtSKydFqDzwhQB5+EU3LxaVay0ImQZ7EXfW2ZL3y7PxrZpAgRUD+aHhAgNj/M12z/TWY8drci7O9/hRBSiO2JnVUZhxPuEXAb9HU/NcFwKPxshyTvIntYtO6YUxrdyk82pEobLg/F8zPD5JNiH9Sl5W9t/Yt0dIlBKH/nm8SzBjwjENlNCdLNU3FcUCUog94EmBE2UQZw== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=microsoft.com; s=arcselector9901; h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-AntiSpam-MessageData-ChunkCount:X-MS-Exchange-AntiSpam-MessageData-0:X-MS-Exchange-AntiSpam-MessageData-1; bh=de6G/yYKlDcG5Llc/8vFOzpCkyOlrDMdqhJBg50LCeo=; b=DsWfE82YHKoHC3rmIAREd8Z0dpEYH8nE+NNFnFqTf5u+MweO/9irtKjw34SsKgtVw5SocvS+p6FV1BYaf1cbry6+uk4LLxKOxCTcZgT4f0x8WOZsuJcCIdvhPk5IIRb7cx24UmiLcWc1iCynuiFJ0TBr8yA/IvhHf3ET4rm6akwdmt4Azy/G3T4zkRegANdpAgtUF8m1lrPhx0PTviezaUkVxq10s4jvA9CLHqUd1Z0mAZlPNPi84aKZCXMVjBMHbUb5Y8Eg0sA7o7Ke862ZGt2NZPANXmvIjbuQou0IrVBsZtpmI6feHN7s6zEVlxK+g1tKV3wriRk6tezqEeQR6Q== ARC-Authentication-Results: i=1; mx.microsoft.com 1; spf=pass (sender ip is 216.228.117.160) smtp.rcpttodomain=linutronix.de smtp.mailfrom=nvidia.com; dmarc=pass (p=reject sp=reject pct=100) action=none header.from=nvidia.com; dkim=none (message not signed); arc=none DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=Nvidia.com; s=selector2; h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-SenderADCheck; bh=de6G/yYKlDcG5Llc/8vFOzpCkyOlrDMdqhJBg50LCeo=; b=bJp2DXGU+cLOIeAaWcgchxztSlHfqlDohq2dlI0MN/G7PAQfL/s8oeefh43ufpwyAi6gqG20xRuz0kRyAExD8DRUxE2Npd/ig0B+Vv1TAtZC+Q57lLPvLwiQuB4vYpAKwyMh1DYIGaEx2y12gdB41wulO7oCpSfA02R63yhku0ZjCpDchkqbeQBWv3mFeVxxzyNSioypWXHlukLyz+4jqbg86pXK4rt64Z3Q3qZz2ilUWjge3DIHzP6eWxKtyMP0enCPU53wiSc/1rewrn7c1TsYX1SfTE4/6Bn9Bm9ia9y4Jlzbo2ICjg9+otHBG5c+QeRE8hImGesZipRVQqoOOg== Received: from MW4PR04CA0076.namprd04.prod.outlook.com (2603:10b6:303:6b::21) by DS0PR12MB9038.namprd12.prod.outlook.com (2603:10b6:8:f2::20) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.6411.19; Fri, 19 May 2023 13:49:28 +0000 Received: from CO1NAM11FT082.eop-nam11.prod.protection.outlook.com (2603:10b6:303:6b:cafe::cd) by MW4PR04CA0076.outlook.office365.com (2603:10b6:303:6b::21) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.6411.21 via Frontend Transport; Fri, 19 May 2023 13:49:27 +0000 X-MS-Exchange-Authentication-Results: spf=pass (sender IP is 216.228.117.160) smtp.mailfrom=nvidia.com; dkim=none (message not signed) header.d=none;dmarc=pass action=none header.from=nvidia.com; Received-SPF: Pass (protection.outlook.com: domain of nvidia.com designates 216.228.117.160 as permitted sender) receiver=protection.outlook.com; client-ip=216.228.117.160; helo=mail.nvidia.com; pr=C Received: from mail.nvidia.com (216.228.117.160) by CO1NAM11FT082.mail.protection.outlook.com (10.13.175.224) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.6411.22 via Frontend Transport; Fri, 19 May 2023 13:49:27 +0000 Received: from rnnvmail205.nvidia.com (10.129.68.10) by mail.nvidia.com (10.129.200.66) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.986.5; Fri, 19 May 2023 06:49:15 -0700 Received: from rnnvmail204.nvidia.com (10.129.68.6) by rnnvmail205.nvidia.com (10.129.68.10) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.986.37; Fri, 19 May 2023 06:49:14 -0700 Received: from SDONTHINENI-DESKTOP.nvidia.com (10.127.8.9) by mail.nvidia.com (10.129.68.6) with Microsoft SMTP Server id 15.2.986.37 via Frontend Transport; Fri, 19 May 2023 06:49:14 -0700 From: Shanker Donthineni To: Thomas Gleixner , Marc Zyngier CC: Sebastian Andrzej Siewior , Michael Walle , Shanker Donthineni , , Vikram Sethi , "Jason Sequeira" Subject: [PATCH v5 3/3] genirq: Use the maple tree for IRQ descriptors management Date: Fri, 19 May 2023 08:49:02 -0500 Message-ID: <20230519134902.1495562-4-sdonthineni@nvidia.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20230519134902.1495562-1-sdonthineni@nvidia.com> References: <20230519134902.1495562-1-sdonthineni@nvidia.com> MIME-Version: 1.0 X-NVConfidentiality: public X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: CO1NAM11FT082:EE_|DS0PR12MB9038:EE_ X-MS-Office365-Filtering-Correlation-Id: d633fc48-963e-47b9-606f-08db586fdd28 X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0; X-Microsoft-Antispam-Message-Info: fY1FQpFe5izY+aylyb0Hb66QC2+lu0XPR8mRFkXdTKSS/cYZm8s6imm/D66hkRBE7yH6pSO2No953GAl4bpn+Vz5EEVRFbBBWXdFD0oLqAYAz7M+1vRtKHGqJTl9EffEAFNLHZnasCKqufr7YUlJRLXrjPYlL0mCg63wccZ5Z0ndRXbmDx+f7WC00R+Z45+Fuf5YtOpTo76enP2nrZY1AfQFS4M8Ut/NuRLi1qooAqEpGETbh1C39p/yhOWupVzv6sXizBde/mJyU1foezfSFiRCLFiGW9/ar7/TjmO4eFmewxlFQ9k1YVZkltsB2BKSWUxZQQTurUd0l7tdnkjKAdGAgzyIQ6QpANfqgtarJaAXVytGVAKZokK+nwUWWpFOB75YZeZ9yMF9LWn42lzMQA8Jn/Q51uPhz/vqtiSlr1vq4ld9hE4rYAB5psJ57pN/dBKGLtemViIgYLO5OK5FLmv5EsPWmT/qGVLL8IxhiV3MRFrkBXS5IqzsVUtjK/NUqJuNcRBtFCK03KjqatRLZJwisqwRR8ywhuxH2qMVM4ZWRgQlbQeynYnsJdSYMJF7gYQuDj83UJOjsDjT8jcfreL00slCcRd2NAYiNAtBO0slwDqVs7pZdQb4kNF7fJp2cjPm70LmM4iTwugV6pNyl48sqv5l0vx4ED36HlV5jySpfTm42B+FTPUPTci6rlWyw4jgYWWZb4NxFvMHJ3V/jVeyEnAabmSwjlo2zOScv5EWP0b0udAZDh0NtJFWlFRt X-Forefront-Antispam-Report: CIP:216.228.117.160;CTRY:US;LANG:en;SCL:1;SRV:;IPV:NLI;SFV:NSPM;H:mail.nvidia.com;PTR:dc6edge1.nvidia.com;CAT:NONE;SFS:(13230028)(4636009)(136003)(376002)(396003)(346002)(39860400002)(451199021)(46966006)(36840700001)(40470700004)(26005)(40460700003)(1076003)(107886003)(7696005)(36756003)(426003)(36860700001)(83380400001)(47076005)(40480700001)(86362001)(336012)(82310400005)(2616005)(7636003)(82740400003)(186003)(356005)(110136005)(54906003)(5660300002)(478600001)(316002)(2906002)(4326008)(8676002)(8936002)(41300700001)(70206006)(70586007)(66899021)(6666004);DIR:OUT;SFP:1101; X-OriginatorOrg: Nvidia.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 19 May 2023 13:49:27.6988 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: d633fc48-963e-47b9-606f-08db586fdd28 X-MS-Exchange-CrossTenant-Id: 43083d15-7273-40c1-b7db-39efd9ccc17a X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=43083d15-7273-40c1-b7db-39efd9ccc17a;Ip=[216.228.117.160];Helo=[mail.nvidia.com] X-MS-Exchange-CrossTenant-AuthSource: CO1NAM11FT082.eop-nam11.prod.protection.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: DS0PR12MB9038 X-Spam-Status: No, score=-1.1 required=5.0 tests=BAYES_00,DKIMWL_WL_HIGH, DKIM_SIGNED,DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,FORGED_SPF_HELO, RCVD_IN_DNSWL_NONE,RCVD_IN_MSPIKE_H2,SPF_HELO_PASS,SPF_NONE, T_SCC_BODY_TEXT_LINE,URIBL_BLOCKED autolearn=no autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-getmail-retrieved-from-mailbox: =?utf-8?q?INBOX?= X-GMAIL-THRID: =?utf-8?q?1766330966567408986?= X-GMAIL-MSGID: =?utf-8?q?1766330966567408986?= The current implementation uses a static bitmap and a radix tree to manage IRQ allocation and irq_desc pointer store respectively. However, the size of the bitmap is constrained by the build time macro MAX_SPARSE_IRQS, which may not be sufficient to support the high-end servers, particularly those with GICv4.1 hardware, which require a large interrupt space to cover LPIs and vSGIs. The maple tree is a highly efficient data structure for storing non-overlapping ranges and can handle a large number of entries, up to ULONG_MAX. It can be utilized for both storing interrupt descriptors and identifying available free spaces. The interrupt descriptors management can be simplified by switching to a maple tree data structure, which offers greater flexibility and scalability. To support modern servers, the maximum number of IRQs has been increased to INT_MAX, which provides a more adequate value than the previous limit of NR_IRQS+8192. Signed-off-by: Shanker Donthineni --- kernel/irq/internals.h | 2 +- kernel/irq/irqdesc.c | 57 ++++++++++++++++++++++++------------------ 2 files changed, 33 insertions(+), 26 deletions(-) diff --git a/kernel/irq/internals.h b/kernel/irq/internals.h index f3f2090dd2de..7bdb7507efb0 100644 --- a/kernel/irq/internals.h +++ b/kernel/irq/internals.h @@ -12,7 +12,7 @@ #include #ifdef CONFIG_SPARSE_IRQ -# define MAX_SPARSE_IRQS (NR_IRQS + 8196) +# define MAX_SPARSE_IRQS INT_MAX #else # define MAX_SPARSE_IRQS NR_IRQS #endif diff --git a/kernel/irq/irqdesc.c b/kernel/irq/irqdesc.c index e0d9dd9b36f9..27ca1c866f29 100644 --- a/kernel/irq/irqdesc.c +++ b/kernel/irq/irqdesc.c @@ -12,8 +12,7 @@ #include #include #include -#include -#include +#include #include #include @@ -131,17 +130,39 @@ int nr_irqs = NR_IRQS; EXPORT_SYMBOL_GPL(nr_irqs); static DEFINE_MUTEX(sparse_irq_lock); -static DECLARE_BITMAP(allocated_irqs, MAX_SPARSE_IRQS); +static struct maple_tree sparse_irqs = MTREE_INIT_EXT(sparse_irqs, + MT_FLAGS_ALLOC_RANGE | + MT_FLAGS_LOCK_EXTERN | + MT_FLAGS_USE_RCU, + sparse_irq_lock); static int irq_find_free_area(unsigned int from, unsigned int cnt) { - return bitmap_find_next_zero_area(allocated_irqs, MAX_SPARSE_IRQS, - from, cnt, 0); + MA_STATE(mas, &sparse_irqs, 0, 0); + + if (mas_empty_area(&mas, from, MAX_SPARSE_IRQS, cnt)) + return -ENOSPC; + return mas.index; } static unsigned int irq_find_at_or_after(unsigned int offset) { - return find_next_bit(allocated_irqs, nr_irqs, offset); + unsigned long index = offset; + struct irq_desc *desc = mt_find(&sparse_irqs, &index, nr_irqs); + + return desc ? irq_desc_get_irq(desc) : nr_irqs; +} + +static void irq_insert_desc(unsigned int irq, struct irq_desc *desc) +{ + MA_STATE(mas, &sparse_irqs, irq, irq); + WARN_ON(mas_store_gfp(&mas, desc, GFP_KERNEL) != 0); +} + +static void delete_irq_desc(unsigned int irq) +{ + MA_STATE(mas, &sparse_irqs, irq, irq); + mas_erase(&mas); } #ifdef CONFIG_SPARSE_IRQ @@ -355,26 +376,14 @@ static void irq_sysfs_del(struct irq_desc *desc) {} #endif /* CONFIG_SYSFS */ -static RADIX_TREE(irq_desc_tree, GFP_KERNEL); - -static void irq_insert_desc(unsigned int irq, struct irq_desc *desc) -{ - radix_tree_insert(&irq_desc_tree, irq, desc); -} - struct irq_desc *irq_to_desc(unsigned int irq) { - return radix_tree_lookup(&irq_desc_tree, irq); + return mtree_load(&sparse_irqs, irq); } #ifdef CONFIG_KVM_BOOK3S_64_HV_MODULE EXPORT_SYMBOL_GPL(irq_to_desc); #endif -static void delete_irq_desc(unsigned int irq) -{ - radix_tree_delete(&irq_desc_tree, irq); -} - #ifdef CONFIG_SMP static void free_masks(struct irq_desc *desc) { @@ -517,7 +526,6 @@ static int alloc_descs(unsigned int start, unsigned int cnt, int node, irq_sysfs_add(start + i, desc); irq_add_debugfs_entry(start + i, desc); } - bitmap_set(allocated_irqs, start, cnt); return start; err: @@ -557,7 +565,6 @@ int __init early_irq_init(void) for (i = 0; i < initcnt; i++) { desc = alloc_desc(i, node, 0, NULL, NULL); - set_bit(i, allocated_irqs); irq_insert_desc(i, desc); } return arch_early_irq_init(); @@ -612,6 +619,7 @@ static void free_desc(unsigned int irq) raw_spin_lock_irqsave(&desc->lock, flags); desc_set_defaults(irq, desc, irq_desc_get_node(desc), NULL, NULL); raw_spin_unlock_irqrestore(&desc->lock, flags); + delete_irq_desc(irq); } static inline int alloc_descs(unsigned int start, unsigned int cnt, int node, @@ -624,8 +632,8 @@ static inline int alloc_descs(unsigned int start, unsigned int cnt, int node, struct irq_desc *desc = irq_to_desc(start + i); desc->owner = owner; + irq_insert_desc(start + i, desc); } - bitmap_set(allocated_irqs, start, cnt); return start; } @@ -637,7 +645,7 @@ static int irq_expand_nr_irqs(unsigned int nr) void irq_mark_irq(unsigned int irq) { mutex_lock(&sparse_irq_lock); - bitmap_set(allocated_irqs, irq, 1); + irq_insert_desc(irq, irq_desc + irq); mutex_unlock(&sparse_irq_lock); } @@ -781,7 +789,6 @@ void irq_free_descs(unsigned int from, unsigned int cnt) for (i = 0; i < cnt; i++) free_desc(from + i); - bitmap_clear(allocated_irqs, from, cnt); mutex_unlock(&sparse_irq_lock); } EXPORT_SYMBOL_GPL(irq_free_descs); @@ -844,7 +851,7 @@ EXPORT_SYMBOL_GPL(__irq_alloc_descs); * irq_get_next_irq - get next allocated irq number * @offset: where to start the search * - * Returns next irq number at or after offset or nr_irqs if none is found. + * Returns next irq number after offset or nr_irqs if none is found. */ unsigned int irq_get_next_irq(unsigned int offset) {