From patchwork Fri May 19 05:21:44 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Anshuman Khandual X-Patchwork-Id: 96191 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a59:b0ea:0:b0:3b6:4342:cba0 with SMTP id b10csp998431vqo; Thu, 18 May 2023 22:24:03 -0700 (PDT) X-Google-Smtp-Source: ACHHUZ7qqRJ4bHSNHnFD2cHsYtDJCu4i3wLRET8vO6+bnOzZFh5vNqr4HOmNnYt5ii9jkP+z/okj X-Received: by 2002:a05:6a21:3949:b0:104:3c82:38c0 with SMTP id ac9-20020a056a21394900b001043c8238c0mr790172pzc.41.1684473843476; Thu, 18 May 2023 22:24:03 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1684473843; cv=none; d=google.com; s=arc-20160816; b=u+5J/QedPPZl0w6p6IA3mGm5RW1E5uf1bHJx1KdKIwSSZjrK/hAJ7+xjRHAPcCG0CM RsKS8fd159HUR28hiUZcWMdIhcAs8U0tZiHXmYtu9aoTk6w5LjxnT9MiUKCFbIsjdtFi RJB6QmRfDyibNI0wwE6Ae7tQJGeUxe6GjFlD0k7czjN/FuxR8lJdDfAL0GpLqCQ2Vdfq 0zHDOyOAtAJzaG/PGJuz1mJNheh/JdVRkwpGe2UBSysdVZ36s0GU/WF4RUlWDPdCe7b2 VM5cW9ybg9Xze64671i8wwyqLahgUbrjwDZZjnJyDOjK73rTof63j6QNuvzOqAZIuJz2 AqMw== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from; bh=m+e1imscgxxfdaZ4eyi90ayYqSxq81Un1Qj+za5xbdU=; b=RdcdPb1/VWB7taGjpIz16LOoF8svucjatUwzRAp6P7eYeVO40X7q6eU4hKZV39L2sP EINqpD76F0gv9k9Aqb+PDtckUysTcDy/QFprb3bI3oMMquqzAsIVPTuqvmA9t7VoIuvj FL6sGSzvx2i9vc0ukVpz/t0HcNXfD/oeBNlWFts4ZBDXOuxobD+5+k1tB9cO3+ChuMJN JmvOSGwgiwuaihh8HbAsvcZxZpw+oxe94pFapkxwlOq4ZEJBK0vUXmgQS60txs86c5PR /DlQ1Fj78IRPzyO9DzagXE+CsbTz1KjjTxfmIDEdBwfwR6RHB8ngrb7qCMUrzmO5Jouv 4Xzg== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=arm.com Received: from out1.vger.email (out1.vger.email. [2620:137:e000::1:20]) by mx.google.com with ESMTP id c20-20020a6566d4000000b00528b5b28439si2858717pgw.124.2023.05.18.22.23.48; Thu, 18 May 2023 22:24:03 -0700 (PDT) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) client-ip=2620:137:e000::1:20; Authentication-Results: mx.google.com; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=arm.com Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S230303AbjESFWU (ORCPT + 99 others); Fri, 19 May 2023 01:22:20 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:58398 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S230161AbjESFWM (ORCPT ); Fri, 19 May 2023 01:22:12 -0400 Received: from foss.arm.com (foss.arm.com [217.140.110.172]) by lindbergh.monkeyblade.net (Postfix) with ESMTP id 810C1E6B; Thu, 18 May 2023 22:22:11 -0700 (PDT) Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id 1174E2F4; Thu, 18 May 2023 22:22:56 -0700 (PDT) Received: from a077893.arm.com (unknown [10.163.71.125]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPA id 956773F762; Thu, 18 May 2023 22:22:04 -0700 (PDT) From: Anshuman Khandual To: linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, coresight@lists.linaro.org, suzuki.poulose@arm.com Cc: Anshuman Khandual , Ganapatrao Kulkarni , Steve Clevenger , Rob Herring , Frank Rowand , Russell King , Greg Kroah-Hartman , "Rafael J. Wysocki" , Len Brown , Sudeep Holla , Lorenzo Pieralisi , Mathieu Poirier , Mike Leach , Leo Yan , devicetree@vger.kernel.org, linux-acpi@vger.kernel.org Subject: [PATCH V3 1/6] coresight: etm4x: Allocate and device assign 'struct etmv4_drvdata' earlier Date: Fri, 19 May 2023 10:51:44 +0530 Message-Id: <20230519052149.1367814-2-anshuman.khandual@arm.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20230519052149.1367814-1-anshuman.khandual@arm.com> References: <20230519052149.1367814-1-anshuman.khandual@arm.com> MIME-Version: 1.0 X-Spam-Status: No, score=-4.2 required=5.0 tests=BAYES_00,RCVD_IN_DNSWL_MED, SPF_HELO_NONE,SPF_NONE,T_SCC_BODY_TEXT_LINE autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-getmail-retrieved-from-mailbox: =?utf-8?q?INBOX?= X-GMAIL-THRID: =?utf-8?q?1766298845115172827?= X-GMAIL-MSGID: =?utf-8?q?1766298845115172827?= Allocate and device assign 'struct etmv4_drvdata' earlier during the driver probe, ensuring that it can be retrieved in power management based runtime callbacks if required. This will also help in dropping iomem base address argument from the function etm4_probe() later. Cc: Mathieu Poirier Cc: Suzuki K Poulose Cc: Mike Leach Cc: Leo Yan Cc: coresight@lists.linaro.org Cc: linux-arm-kernel@lists.infradead.org Cc: linux-kernel@vger.kernel.org Signed-off-by: Anshuman Khandual --- .../coresight/coresight-etm4x-core.c | 19 ++++++++++++++----- 1 file changed, 14 insertions(+), 5 deletions(-) diff --git a/drivers/hwtracing/coresight/coresight-etm4x-core.c b/drivers/hwtracing/coresight/coresight-etm4x-core.c index 4c15fae534f3..7e96293c638f 100644 --- a/drivers/hwtracing/coresight/coresight-etm4x-core.c +++ b/drivers/hwtracing/coresight/coresight-etm4x-core.c @@ -2046,17 +2046,14 @@ static int etm4_add_coresight_dev(struct etm4_init_arg *init_arg) static int etm4_probe(struct device *dev, void __iomem *base, u32 etm_pid) { - struct etmv4_drvdata *drvdata; + struct etmv4_drvdata *drvdata = dev_get_drvdata(dev); struct csdev_access access = { 0 }; struct etm4_init_arg init_arg = { 0 }; struct etm4_init_arg *delayed; - drvdata = devm_kzalloc(dev, sizeof(*drvdata), GFP_KERNEL); - if (!drvdata) + if (WARN_ON(!drvdata)) return -ENOMEM; - dev_set_drvdata(dev, drvdata); - if (pm_save_enable == PARAM_PM_SAVE_FIRMWARE) pm_save_enable = coresight_loses_context_with_cpu(dev) ? PARAM_PM_SAVE_SELF_HOSTED : PARAM_PM_SAVE_NEVER; @@ -2108,6 +2105,7 @@ static int etm4_probe(struct device *dev, void __iomem *base, u32 etm_pid) static int etm4_probe_amba(struct amba_device *adev, const struct amba_id *id) { + struct etmv4_drvdata *drvdata; void __iomem *base; struct device *dev = &adev->dev; struct resource *res = &adev->res; @@ -2118,6 +2116,11 @@ static int etm4_probe_amba(struct amba_device *adev, const struct amba_id *id) if (IS_ERR(base)) return PTR_ERR(base); + drvdata = devm_kzalloc(dev, sizeof(*drvdata), GFP_KERNEL); + if (!drvdata) + return -ENOMEM; + + dev_set_drvdata(dev, drvdata); ret = etm4_probe(dev, base, id->id); if (!ret) pm_runtime_put(&adev->dev); @@ -2127,8 +2130,14 @@ static int etm4_probe_amba(struct amba_device *adev, const struct amba_id *id) static int etm4_probe_platform_dev(struct platform_device *pdev) { + struct etmv4_drvdata *drvdata; int ret; + drvdata = devm_kzalloc(&pdev->dev, sizeof(*drvdata), GFP_KERNEL); + if (!drvdata) + return -ENOMEM; + + dev_set_drvdata(&pdev->dev, drvdata); pm_runtime_get_noresume(&pdev->dev); pm_runtime_set_active(&pdev->dev); pm_runtime_enable(&pdev->dev); From patchwork Fri May 19 05:21:45 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Anshuman Khandual X-Patchwork-Id: 96192 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a59:b0ea:0:b0:3b6:4342:cba0 with SMTP id b10csp998515vqo; Thu, 18 May 2023 22:24:15 -0700 (PDT) X-Google-Smtp-Source: ACHHUZ74CDJnPgae2oZ3x1Nd6me+ASbZM6rZ/8phOKjvtdb1P+oYxUNuTFRS6dRknf8lf+/hFBGH X-Received: by 2002:a17:90a:3043:b0:253:5c1b:104d with SMTP id q3-20020a17090a304300b002535c1b104dmr945843pjl.33.1684473855210; Thu, 18 May 2023 22:24:15 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1684473855; cv=none; d=google.com; s=arc-20160816; b=HhXGHBkQYupMpglObKgE/C4pmCzkR0zTBbQWjskzMV0A0icCp+d/5g191Z8pW1gz0m hIRQIJwnb12okh5aEmc+SoIVylJ1J8Y6nDZNzeLKwis/xNSvETA19oHunUJxq2vRRPlT VGqa7WATyPiLa6touwsU+/tM2d4FHTJ3m80mb1C0NvO/5rRWboXUOPb1FRNncL4FX7XN Sox4iUqbKZq+Fuvgh1D13p7K/pgiO58aNAn9OZp8NDlTMbS9xW1ARbEnJY7aaOzHfmyy 5PkgCJ704stsyofaFtRZsmQuZ2p+SBdf4RzuSmiYTMOB/ED8Y5f37KTUOKgranD6PLVL z3Uw== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from; bh=I6wrXTLtk+T+M0+0vot1sHidxwRMTZ+UBL8LgnHHU1Y=; b=fBrGafLJGRjzy1/LAkWPxvqeQeQYqsiInHIFaRwsayae23tOMrW8hVbp0/QCcky1D9 iaeANR2Kxj0P7LsfieZYYSYZRJcA5RmfLNpcgwg8unXw9uGJ6TkEk+MJV6pja+gm2306 hRA0oBYGpzJWw7svCurry/BDKHt0aCeP2f7LCX1Jd5VItNHXzE8d1D3pU/S57tAvXasp 0lLOIZxmrUGkQpj9isq0yCnCJN+z/64AdmpNmWsDvelT8lFCJ/6YbTGZptVmHGnwxxiN 9sbbF5u5ZWe2pIEb9U+5De0IifMHtdSLSH6lg0ZTSH2wl5OEmihu7TGiznK7uy0+C5FI ZD4A== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=arm.com Received: from out1.vger.email (out1.vger.email. [2620:137:e000::1:20]) by mx.google.com with ESMTP id q19-20020a17090aa01300b00250bbca6fdfsi1118484pjp.105.2023.05.18.22.24.00; Thu, 18 May 2023 22:24:15 -0700 (PDT) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) client-ip=2620:137:e000::1:20; Authentication-Results: mx.google.com; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=arm.com Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S230494AbjESFWe (ORCPT + 99 others); Fri, 19 May 2023 01:22:34 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:58644 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S230338AbjESFW2 (ORCPT ); Fri, 19 May 2023 01:22:28 -0400 Received: from foss.arm.com (foss.arm.com [217.140.110.172]) by lindbergh.monkeyblade.net (Postfix) with ESMTP id 645561702; Thu, 18 May 2023 22:22:19 -0700 (PDT) Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id E8E3A1FB; Thu, 18 May 2023 22:23:03 -0700 (PDT) Received: from a077893.arm.com (unknown [10.163.71.125]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPA id E45743F762; Thu, 18 May 2023 22:22:11 -0700 (PDT) From: Anshuman Khandual To: linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, coresight@lists.linaro.org, suzuki.poulose@arm.com Cc: Anshuman Khandual , Ganapatrao Kulkarni , Steve Clevenger , Rob Herring , Frank Rowand , Russell King , Greg Kroah-Hartman , "Rafael J. Wysocki" , Len Brown , Sudeep Holla , Lorenzo Pieralisi , Mathieu Poirier , Mike Leach , Leo Yan , devicetree@vger.kernel.org, linux-acpi@vger.kernel.org, James Clark Subject: [PATCH V3 2/6] coresight: etm4x: Drop iomem 'base' argument from etm4_probe() Date: Fri, 19 May 2023 10:51:45 +0530 Message-Id: <20230519052149.1367814-3-anshuman.khandual@arm.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20230519052149.1367814-1-anshuman.khandual@arm.com> References: <20230519052149.1367814-1-anshuman.khandual@arm.com> MIME-Version: 1.0 X-Spam-Status: No, score=-4.2 required=5.0 tests=BAYES_00,RCVD_IN_DNSWL_MED, SPF_HELO_NONE,SPF_NONE,T_SCC_BODY_TEXT_LINE autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-getmail-retrieved-from-mailbox: =?utf-8?q?INBOX?= X-GMAIL-THRID: =?utf-8?q?1766298857097362730?= X-GMAIL-MSGID: =?utf-8?q?1766298857097362730?= 'struct etm4_drvdata' itself can carry the base address before etm4_probe() gets called. Just drop that redundant argument from etm4_probe(). Cc: Mathieu Poirier Cc: Suzuki K Poulose Cc: Mike Leach Cc: Leo Yan Cc: coresight@lists.linaro.org Cc: linux-arm-kernel@lists.infradead.org Cc: linux-kernel@vger.kernel.org Reviewed-by: James Clark Signed-off-by: Anshuman Khandual --- drivers/hwtracing/coresight/coresight-etm4x-core.c | 10 +++++----- 1 file changed, 5 insertions(+), 5 deletions(-) diff --git a/drivers/hwtracing/coresight/coresight-etm4x-core.c b/drivers/hwtracing/coresight/coresight-etm4x-core.c index 7e96293c638f..748d2ef53cb0 100644 --- a/drivers/hwtracing/coresight/coresight-etm4x-core.c +++ b/drivers/hwtracing/coresight/coresight-etm4x-core.c @@ -2044,7 +2044,7 @@ static int etm4_add_coresight_dev(struct etm4_init_arg *init_arg) return 0; } -static int etm4_probe(struct device *dev, void __iomem *base, u32 etm_pid) +static int etm4_probe(struct device *dev, u32 etm_pid) { struct etmv4_drvdata *drvdata = dev_get_drvdata(dev); struct csdev_access access = { 0 }; @@ -2065,8 +2065,6 @@ static int etm4_probe(struct device *dev, void __iomem *base, u32 etm_pid) return -ENOMEM; } - drvdata->base = base; - spin_lock_init(&drvdata->spinlock); drvdata->cpu = coresight_get_cpu(dev); @@ -2120,8 +2118,9 @@ static int etm4_probe_amba(struct amba_device *adev, const struct amba_id *id) if (!drvdata) return -ENOMEM; + drvdata->base = base; dev_set_drvdata(dev, drvdata); - ret = etm4_probe(dev, base, id->id); + ret = etm4_probe(dev, id->id); if (!ret) pm_runtime_put(&adev->dev); @@ -2137,6 +2136,7 @@ static int etm4_probe_platform_dev(struct platform_device *pdev) if (!drvdata) return -ENOMEM; + drvdata->base = NULL; dev_set_drvdata(&pdev->dev, drvdata); pm_runtime_get_noresume(&pdev->dev); pm_runtime_set_active(&pdev->dev); @@ -2147,7 +2147,7 @@ static int etm4_probe_platform_dev(struct platform_device *pdev) * HW by reading appropriate registers on the HW * and thus we could skip the PID. */ - ret = etm4_probe(&pdev->dev, NULL, 0); + ret = etm4_probe(&pdev->dev, 0); pm_runtime_put(&pdev->dev); return ret; From patchwork Fri May 19 05:21:46 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Anshuman Khandual X-Patchwork-Id: 96194 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a59:b0ea:0:b0:3b6:4342:cba0 with SMTP id b10csp998565vqo; Thu, 18 May 2023 22:24:24 -0700 (PDT) X-Google-Smtp-Source: ACHHUZ4939ha5fnkVi9tPKMWWydp8bSup3bTJx+kwck9Pkj9qFYt6ncdaF44rnThQcr04m2NpSuV X-Received: by 2002:a05:6a20:2594:b0:101:6a2f:2a0e with SMTP id k20-20020a056a20259400b001016a2f2a0emr889021pzd.18.1684473863786; Thu, 18 May 2023 22:24:23 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1684473863; cv=none; d=google.com; s=arc-20160816; b=Kc24LNtgSD5RuqOrGm6gFiFUlZxgJWgZmRo9dQcrae6wqn7uCp/yaE9n/rpwlpyp2s iL5xO5uwmnlofkQazjq8KmY4+6UbPn7TDlULHR+Wspil8IvkmrskyHfd9/UcCpFGi0w2 oL9zPwYEgIok0t4IExmqNEkgPRmchkKvW62KaqDTm6vhvTiHerqfNnmPsDcLOZbWs90q FIRWpzNM34Eq51I29PVVmlY3mX3MgGu2xB3yfkzPTb3dMeQKM+V+2HDveLtKHDsObEXx GSPY/NFfgqrefCd1jImP9lh0cybtNdZMfBc+FCaFqBIW+w6ae3brX5LWEG5YMhGNLdzq Bm8Q== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from; bh=7qQ8OXqJc9mLZocq10U4gtyr7BwD1dGlUHXltemwGC4=; b=wWsZbmaYv6riEbakWYJ0/+GQuKSMz9+EDWnc0mR6IHwcTXgmB9cQaPp2LEqLGw70Kc ptIU+7LERkdYwe/bgLoTzsOPr7UZeZmsB5xYu126BY/V8QkBh7RUAQedLmr0c8LVn9AZ iH+FxN67pv22nc4nmMayCiPXZc5rITXxlcjnUn1OqYjhMvt0GwHMqz29suEk0C9JbDCu XSWRx+TWrrdcfU4bN5hgFWBGWXRuqtCJ/ldDExK+ScsCHDQGhieNvJn2wv4xp0kd5BPW EkuyoYl9WUc7lEpIPk8Os9Lk5Frk0buqPMW965EeOx8w/gtInjuKLXzSRisevPvGLGT2 oD0g== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=arm.com Received: from out1.vger.email (out1.vger.email. [2620:137:e000::1:20]) by mx.google.com with ESMTP id o3-20020a637e43000000b0050be7b93e73si3062209pgn.694.2023.05.18.22.24.09; Thu, 18 May 2023 22:24:23 -0700 (PDT) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) client-ip=2620:137:e000::1:20; Authentication-Results: mx.google.com; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=arm.com Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S230159AbjESFXB (ORCPT + 99 others); Fri, 19 May 2023 01:23:01 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:58666 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S230369AbjESFWe (ORCPT ); Fri, 19 May 2023 01:22:34 -0400 Received: from foss.arm.com (foss.arm.com [217.140.110.172]) by lindbergh.monkeyblade.net (Postfix) with ESMTP id F1C0E198A; Thu, 18 May 2023 22:22:26 -0700 (PDT) Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id 694D01FB; Thu, 18 May 2023 22:23:11 -0700 (PDT) Received: from a077893.arm.com (unknown [10.163.71.125]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPA id C83BB3F762; Thu, 18 May 2023 22:22:19 -0700 (PDT) From: Anshuman Khandual To: linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, coresight@lists.linaro.org, suzuki.poulose@arm.com Cc: Anshuman Khandual , Ganapatrao Kulkarni , Steve Clevenger , Rob Herring , Frank Rowand , Russell King , Greg Kroah-Hartman , "Rafael J. Wysocki" , Len Brown , Sudeep Holla , Lorenzo Pieralisi , Mathieu Poirier , Mike Leach , Leo Yan , devicetree@vger.kernel.org, linux-acpi@vger.kernel.org Subject: [PATCH V3 3/6] coresight: etm4x: Drop pid argument from etm4_probe() Date: Fri, 19 May 2023 10:51:46 +0530 Message-Id: <20230519052149.1367814-4-anshuman.khandual@arm.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20230519052149.1367814-1-anshuman.khandual@arm.com> References: <20230519052149.1367814-1-anshuman.khandual@arm.com> MIME-Version: 1.0 X-Spam-Status: No, score=-4.2 required=5.0 tests=BAYES_00,RCVD_IN_DNSWL_MED, SPF_HELO_NONE,SPF_NONE,T_SCC_BODY_TEXT_LINE autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-getmail-retrieved-from-mailbox: =?utf-8?q?INBOX?= X-GMAIL-THRID: =?utf-8?q?1766298866412074582?= X-GMAIL-MSGID: =?utf-8?q?1766298866412074582?= Coresight device pid can be retrieved from its iomem base address, which is stored in 'struct etm4x_drvdata'. This drops pid argument from etm4_probe() and 'struct etm4_init_arg'. Instead etm4_check_arch_features() derives the coresight device pid with a new helper coresight_get_pid(), right before it is consumed in etm4_hisi_match_pid(). Cc: Mathieu Poirier Cc: Suzuki K Poulose Cc: Mike Leach Cc: Leo Yan Cc: coresight@lists.linaro.org Cc: linux-arm-kernel@lists.infradead.org Cc: linux-kernel@vger.kernel.org Signed-off-by: Anshuman Khandual --- .../coresight/coresight-etm4x-core.c | 29 ++++++++++--------- include/linux/coresight.h | 12 ++++++++ 2 files changed, 27 insertions(+), 14 deletions(-) diff --git a/drivers/hwtracing/coresight/coresight-etm4x-core.c b/drivers/hwtracing/coresight/coresight-etm4x-core.c index 748d2ef53cb0..914ef6eb85d1 100644 --- a/drivers/hwtracing/coresight/coresight-etm4x-core.c +++ b/drivers/hwtracing/coresight/coresight-etm4x-core.c @@ -66,7 +66,6 @@ static u64 etm4_get_access_type(struct etmv4_config *config); static enum cpuhp_state hp_online; struct etm4_init_arg { - unsigned int pid; struct device *dev; struct csdev_access *csa; }; @@ -370,9 +369,17 @@ static void etm4_disable_arch_specific(struct etmv4_drvdata *drvdata) } static void etm4_check_arch_features(struct etmv4_drvdata *drvdata, - unsigned int id) + struct csdev_access *csa) { - if (etm4_hisi_match_pid(id)) + /* + * coresight_get_pid() fetches device PID from the iomem + * register based accesses, which cannot be performed on + * system instruction based devices. + */ + if (!csa->io_mem) + return; + + if (etm4_hisi_match_pid(coresight_get_pid(csa))) set_bit(ETM4_IMPDEF_HISI_CORE_COMMIT, drvdata->arch_features); } #else @@ -385,7 +392,7 @@ static void etm4_disable_arch_specific(struct etmv4_drvdata *drvdata) } static void etm4_check_arch_features(struct etmv4_drvdata *drvdata, - unsigned int id) + struct csdev_access *csa) { } #endif /* CONFIG_ETM4X_IMPDEF_FEATURE */ @@ -1161,7 +1168,7 @@ static void etm4_init_arch_data(void *info) etm4_os_unlock_csa(drvdata, csa); etm4_cs_unlock(drvdata, csa); - etm4_check_arch_features(drvdata, init_arg->pid); + etm4_check_arch_features(drvdata, csa); /* find all capabilities of the tracing unit */ etmidr0 = etm4x_relaxed_read32(csa, TRCIDR0); @@ -2044,7 +2051,7 @@ static int etm4_add_coresight_dev(struct etm4_init_arg *init_arg) return 0; } -static int etm4_probe(struct device *dev, u32 etm_pid) +static int etm4_probe(struct device *dev) { struct etmv4_drvdata *drvdata = dev_get_drvdata(dev); struct csdev_access access = { 0 }; @@ -2073,7 +2080,6 @@ static int etm4_probe(struct device *dev, u32 etm_pid) init_arg.dev = dev; init_arg.csa = &access; - init_arg.pid = etm_pid; /* * Serialize against CPUHP callbacks to avoid race condition @@ -2120,7 +2126,7 @@ static int etm4_probe_amba(struct amba_device *adev, const struct amba_id *id) drvdata->base = base; dev_set_drvdata(dev, drvdata); - ret = etm4_probe(dev, id->id); + ret = etm4_probe(dev); if (!ret) pm_runtime_put(&adev->dev); @@ -2142,12 +2148,7 @@ static int etm4_probe_platform_dev(struct platform_device *pdev) pm_runtime_set_active(&pdev->dev); pm_runtime_enable(&pdev->dev); - /* - * System register based devices could match the - * HW by reading appropriate registers on the HW - * and thus we could skip the PID. - */ - ret = etm4_probe(&pdev->dev, 0); + ret = etm4_probe(&pdev->dev); pm_runtime_put(&pdev->dev); return ret; diff --git a/include/linux/coresight.h b/include/linux/coresight.h index f19a47b9bb5a..f85b041ea475 100644 --- a/include/linux/coresight.h +++ b/include/linux/coresight.h @@ -370,6 +370,18 @@ static inline u32 csdev_access_relaxed_read32(struct csdev_access *csa, return csa->read(offset, true, false); } +#define CORESIGHT_PIDRn(i) (0xFE0 + ((i) * 4)) + +static inline u32 coresight_get_pid(struct csdev_access *csa) +{ + u32 i, pid = 0; + + for (i = 0; i < 4; i++) + pid |= csdev_access_relaxed_read32(csa, CORESIGHT_PIDRn(i)) << (i * 8); + + return pid; +} + static inline u64 csdev_access_relaxed_read_pair(struct csdev_access *csa, u32 lo_offset, u32 hi_offset) { From patchwork Fri May 19 05:21:47 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Anshuman Khandual X-Patchwork-Id: 96196 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a59:b0ea:0:b0:3b6:4342:cba0 with SMTP id b10csp1001994vqo; Thu, 18 May 2023 22:33:45 -0700 (PDT) X-Google-Smtp-Source: ACHHUZ4Iv1fXyqQ5qsrctTEru1ycqt/Mv/rW4PKVRa+CnyXKqMJjagt5ILWHe5dunH88B0cptXxP X-Received: by 2002:a05:6a00:1a12:b0:643:aa2:4dd9 with SMTP id g18-20020a056a001a1200b006430aa24dd9mr1881693pfv.7.1684474425412; Thu, 18 May 2023 22:33:45 -0700 (PDT) ARC-Seal: i=1; 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[2620:137:e000::1:20]) by mx.google.com with ESMTP id z26-20020aa7991a000000b0064d2c624630si1696623pff.23.2023.05.18.22.33.31; Thu, 18 May 2023 22:33:45 -0700 (PDT) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) client-ip=2620:137:e000::1:20; Authentication-Results: mx.google.com; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=arm.com Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S231251AbjESFXM (ORCPT + 99 others); Fri, 19 May 2023 01:23:12 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:58944 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229480AbjESFWp (ORCPT ); Fri, 19 May 2023 01:22:45 -0400 Received: from foss.arm.com (foss.arm.com [217.140.110.172]) by lindbergh.monkeyblade.net (Postfix) with ESMTP id 7F80CE73; Thu, 18 May 2023 22:22:34 -0700 (PDT) Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id DD3231FB; Thu, 18 May 2023 22:23:18 -0700 (PDT) Received: from a077893.arm.com (unknown [10.163.71.125]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPA id 4877E3F762; Thu, 18 May 2023 22:22:26 -0700 (PDT) From: Anshuman Khandual To: linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, coresight@lists.linaro.org, suzuki.poulose@arm.com Cc: Anshuman Khandual , Ganapatrao Kulkarni , Steve Clevenger , Rob Herring , Frank Rowand , Russell King , Greg Kroah-Hartman , "Rafael J. Wysocki" , Len Brown , Sudeep Holla , Lorenzo Pieralisi , Mathieu Poirier , Mike Leach , Leo Yan , devicetree@vger.kernel.org, linux-acpi@vger.kernel.org Subject: [PATCH V3 4/6] coresight: etm4x: Change etm4_platform_driver driver for MMIO devices Date: Fri, 19 May 2023 10:51:47 +0530 Message-Id: <20230519052149.1367814-5-anshuman.khandual@arm.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20230519052149.1367814-1-anshuman.khandual@arm.com> References: <20230519052149.1367814-1-anshuman.khandual@arm.com> MIME-Version: 1.0 X-Spam-Status: No, score=-4.2 required=5.0 tests=BAYES_00,RCVD_IN_DNSWL_MED, SPF_HELO_NONE,SPF_NONE,T_SCC_BODY_TEXT_LINE autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-getmail-retrieved-from-mailbox: =?utf-8?q?INBOX?= X-GMAIL-THRID: =?utf-8?q?1766299455297344508?= X-GMAIL-MSGID: =?utf-8?q?1766299455297344508?= Add support for handling MMIO based devices via platform driver. We need to make sure that : 1) The APB clock, if present is enabled at probe and via runtime_pm ops 2) Use the ETM4x architecture or CoreSight architecture registers to identify a device as CoreSight ETM4x, instead of relying a white list of "Peripheral IDs" The driver doesn't get to handle the devices yet, until we wire the ACPI changes to move the devices to be handled via platform driver than the etm4_amba driver. Cc: Mathieu Poirier Cc: Suzuki K Poulose Cc: Mike Leach Cc: Leo Yan Cc: coresight@lists.linaro.org Cc: linux-arm-kernel@lists.infradead.org Cc: linux-kernel@vger.kernel.org Signed-off-by: Anshuman Khandual --- .../coresight/coresight-etm4x-core.c | 62 +++++++++++++++++-- drivers/hwtracing/coresight/coresight-etm4x.h | 4 ++ include/linux/coresight.h | 47 ++++++++++++++ 3 files changed, 109 insertions(+), 4 deletions(-) diff --git a/drivers/hwtracing/coresight/coresight-etm4x-core.c b/drivers/hwtracing/coresight/coresight-etm4x-core.c index 914ef6eb85d1..807b3a5a0eda 100644 --- a/drivers/hwtracing/coresight/coresight-etm4x-core.c +++ b/drivers/hwtracing/coresight/coresight-etm4x-core.c @@ -30,6 +30,7 @@ #include #include #include +#include #include #include @@ -1073,11 +1074,21 @@ static bool etm4_init_sysreg_access(struct etmv4_drvdata *drvdata, return true; } +static bool is_devtype_cpu_trace(void __iomem *base) +{ + u32 devtype = readl(base + TRCDEVTYPE); + + return (devtype == CS_DEVTYPE_PE_TRACE); +} + static bool etm4_init_iomem_access(struct etmv4_drvdata *drvdata, struct csdev_access *csa) { u32 devarch = readl_relaxed(drvdata->base + TRCDEVARCH); + if (!is_coresight_device(drvdata->base) || !is_devtype_cpu_trace(drvdata->base)) + return false; + /* * All ETMs must implement TRCDEVARCH to indicate that * the component is an ETMv4. Even though TRCIDR1 also @@ -2135,6 +2146,7 @@ static int etm4_probe_amba(struct amba_device *adev, const struct amba_id *id) static int etm4_probe_platform_dev(struct platform_device *pdev) { + struct resource *res = platform_get_resource(pdev, IORESOURCE_MEM, 0); struct etmv4_drvdata *drvdata; int ret; @@ -2142,7 +2154,18 @@ static int etm4_probe_platform_dev(struct platform_device *pdev) if (!drvdata) return -ENOMEM; - drvdata->base = NULL; + drvdata->pclk = coresight_get_enable_apb_pclk(&pdev->dev); + if (IS_ERR(drvdata->pclk)) + return -ENODEV; + + if (res) { + drvdata->base = devm_ioremap_resource(&pdev->dev, res); + if (IS_ERR(drvdata->base)) { + clk_put(drvdata->pclk); + return PTR_ERR(drvdata->base); + } + } + dev_set_drvdata(&pdev->dev, drvdata); pm_runtime_get_noresume(&pdev->dev); pm_runtime_set_active(&pdev->dev); @@ -2188,7 +2211,7 @@ static struct amba_cs_uci_id uci_id_etm4[] = { /* ETMv4 UCI data */ .devarch = ETM_DEVARCH_ETMv4x_ARCH, .devarch_mask = ETM_DEVARCH_ID_MASK, - .devtype = 0x00000013, + .devtype = CS_DEVTYPE_PE_TRACE, } }; @@ -2246,6 +2269,10 @@ static int __exit etm4_remove_platform_dev(struct platform_device *pdev) if (drvdata) ret = etm4_remove_dev(drvdata); + + if (drvdata->pclk) + clk_put(drvdata->pclk); + pm_runtime_disable(&pdev->dev); return ret; } @@ -2286,7 +2313,33 @@ static struct amba_driver etm4x_amba_driver = { .id_table = etm4_ids, }; -static const struct of_device_id etm4_sysreg_match[] = { +#ifdef CONFIG_PM +static int etm4_runtime_suspend(struct device *dev) +{ + struct etmv4_drvdata *drvdata = dev_get_drvdata(dev); + + if (!IS_ERR(drvdata->pclk)) + clk_disable_unprepare(drvdata->pclk); + + return 0; +} + +static int etm4_runtime_resume(struct device *dev) +{ + struct etmv4_drvdata *drvdata = dev_get_drvdata(dev); + + if (!IS_ERR(drvdata->pclk)) + clk_prepare_enable(drvdata->pclk); + + return 0; +} +#endif + +static const struct dev_pm_ops etm4_dev_pm_ops = { + SET_RUNTIME_PM_OPS(etm4_runtime_suspend, etm4_runtime_resume, NULL) +}; + +static const struct of_device_id etm4_match[] = { { .compatible = "arm,coresight-etm4x-sysreg" }, { .compatible = "arm,embedded-trace-extension" }, {} @@ -2297,8 +2350,9 @@ static struct platform_driver etm4_platform_driver = { .remove = etm4_remove_platform_dev, .driver = { .name = "coresight-etm4x", - .of_match_table = etm4_sysreg_match, + .of_match_table = etm4_match, .suppress_bind_attrs = true, + .pm = &etm4_dev_pm_ops, }, }; diff --git a/drivers/hwtracing/coresight/coresight-etm4x.h b/drivers/hwtracing/coresight/coresight-etm4x.h index 27c8a9901868..0ff0bd2cd504 100644 --- a/drivers/hwtracing/coresight/coresight-etm4x.h +++ b/drivers/hwtracing/coresight/coresight-etm4x.h @@ -701,6 +701,8 @@ #define ETM_DEVARCH_ETE_ARCH \ (ETM_DEVARCH_ARCHITECT_ARM | ETM_DEVARCH_ARCHID_ETE | ETM_DEVARCH_PRESENT) +#define CS_DEVTYPE_PE_TRACE 0x00000013 + #define TRCSTATR_IDLE_BIT 0 #define TRCSTATR_PMSTABLE_BIT 1 #define ETM_DEFAULT_ADDR_COMP 0 @@ -944,6 +946,7 @@ struct etmv4_save_state { /** * struct etm4_drvdata - specifics associated to an ETM component + * @pclk APB clock for this component * @base: Memory mapped base address for this component. * @csdev: Component vitals needed by the framework. * @spinlock: Only one at a time pls. @@ -1009,6 +1012,7 @@ struct etmv4_save_state { * @arch_features: Bitmap of arch features of etmv4 devices. */ struct etmv4_drvdata { + struct clk *pclk; void __iomem *base; struct coresight_device *csdev; spinlock_t spinlock; diff --git a/include/linux/coresight.h b/include/linux/coresight.h index f85b041ea475..be60a8b84c49 100644 --- a/include/linux/coresight.h +++ b/include/linux/coresight.h @@ -6,6 +6,8 @@ #ifndef _LINUX_CORESIGHT_H #define _LINUX_CORESIGHT_H +#include +#include #include #include #include @@ -370,6 +372,51 @@ static inline u32 csdev_access_relaxed_read32(struct csdev_access *csa, return csa->read(offset, true, false); } +#define CORESIGHT_CIDRn(i) (0xFF0 + ((i) * 4)) + +static inline u32 coresight_get_cid(void __iomem *base) +{ + u32 i, cid = 0; + + for (i = 0; i < 4; i++) + cid |= readl(base + CORESIGHT_CIDRn(i)) << (i * 8); + + return cid; +} + +static inline bool is_coresight_device(void __iomem *base) +{ + u32 cid = coresight_get_cid(base); + + return cid == CORESIGHT_CID; +} + +/* + * Attempt to find and enable "APB clock" for the given device + * + * Returns: + * + * clk - Clock is found and enabled + * NULL - clock is not found + * ERROR - Clock is found but failed to enable + */ +static inline struct clk *coresight_get_enable_apb_pclk(struct device *dev) +{ + struct clk *pclk; + int ret; + + pclk = clk_get(dev, "apb_pclk"); + if (IS_ERR(pclk)) + return NULL; + + ret = clk_prepare_enable(pclk); + if (ret) { + clk_put(pclk); + return ERR_PTR(ret); + } + return pclk; +} + #define CORESIGHT_PIDRn(i) (0xFE0 + ((i) * 4)) static inline u32 coresight_get_pid(struct csdev_access *csa) From patchwork Fri May 19 05:21:48 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Anshuman Khandual X-Patchwork-Id: 96198 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a59:b0ea:0:b0:3b6:4342:cba0 with SMTP id b10csp1003713vqo; Thu, 18 May 2023 22:38:31 -0700 (PDT) X-Google-Smtp-Source: ACHHUZ64mpewVkMpA07fgJs0zpBjQ76uiYhPybJYENafJOJMKo1VwkPdajMOyxiLQevK5SZZup3h X-Received: by 2002:a17:902:bf06:b0:1ae:2e0f:1cf6 with SMTP id bi6-20020a170902bf0600b001ae2e0f1cf6mr1720373plb.36.1684474710955; Thu, 18 May 2023 22:38:30 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1684474710; cv=none; d=google.com; s=arc-20160816; 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[2620:137:e000::1:20]) by mx.google.com with ESMTP id x19-20020a170902ea9300b001adbfba9c29si2765792plb.409.2023.05.18.22.38.15; Thu, 18 May 2023 22:38:30 -0700 (PDT) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) client-ip=2620:137:e000::1:20; Authentication-Results: mx.google.com; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=arm.com Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S231260AbjESFX2 (ORCPT + 99 others); Fri, 19 May 2023 01:23:28 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:59136 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S230448AbjESFW6 (ORCPT ); Fri, 19 May 2023 01:22:58 -0400 Received: from foss.arm.com (foss.arm.com [217.140.110.172]) by lindbergh.monkeyblade.net (Postfix) with ESMTP id 1E10919B7; Thu, 18 May 2023 22:22:42 -0700 (PDT) Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id 437082F4; Thu, 18 May 2023 22:23:26 -0700 (PDT) Received: from a077893.arm.com (unknown [10.163.71.125]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPA id A35EC3F762; Thu, 18 May 2023 22:22:34 -0700 (PDT) From: Anshuman Khandual To: linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, coresight@lists.linaro.org, suzuki.poulose@arm.com Cc: Anshuman Khandual , Ganapatrao Kulkarni , Steve Clevenger , Rob Herring , Frank Rowand , Russell King , Greg Kroah-Hartman , "Rafael J. Wysocki" , Len Brown , Sudeep Holla , Lorenzo Pieralisi , Mathieu Poirier , Mike Leach , Leo Yan , devicetree@vger.kernel.org, linux-acpi@vger.kernel.org Subject: [PATCH V3 5/6] coresight: etm4x: Add ACPI support in platform driver Date: Fri, 19 May 2023 10:51:48 +0530 Message-Id: <20230519052149.1367814-6-anshuman.khandual@arm.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20230519052149.1367814-1-anshuman.khandual@arm.com> References: <20230519052149.1367814-1-anshuman.khandual@arm.com> MIME-Version: 1.0 X-Spam-Status: No, score=-4.2 required=5.0 tests=BAYES_00,RCVD_IN_DNSWL_MED, SPF_HELO_NONE,SPF_NONE,T_SCC_BODY_TEXT_LINE autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-getmail-retrieved-from-mailbox: =?utf-8?q?INBOX?= X-GMAIL-THRID: =?utf-8?q?1766299754555016694?= X-GMAIL-MSGID: =?utf-8?q?1766299754555016694?= From: Suzuki K Poulose Drop ETM4X ACPI ID from the AMBA ACPI device list, and instead just move it inside the new ACPI devices list detected and used via platform driver. Cc: "Rafael J. Wysocki" Cc: Len Brown Cc: Mathieu Poirier Cc: Suzuki K Poulose Cc: Mike Leach Cc: Leo Yan Cc: Sudeep Holla Cc: Lorenzo Pieralisi Cc: linux-acpi@vger.kernel.org Cc: coresight@lists.linaro.org Cc: linux-arm-kernel@lists.infradead.org Cc: linux-kernel@vger.kernel.org Reviewed-by: Sudeep Holla (for ACPI specific changes) Signed-off-by: Suzuki K Poulose Signed-off-by: Anshuman Khandual --- drivers/acpi/acpi_amba.c | 1 - drivers/hwtracing/coresight/coresight-etm4x-core.c | 10 ++++++++++ 2 files changed, 10 insertions(+), 1 deletion(-) diff --git a/drivers/acpi/acpi_amba.c b/drivers/acpi/acpi_amba.c index f5b443ab01c2..099966cbac5a 100644 --- a/drivers/acpi/acpi_amba.c +++ b/drivers/acpi/acpi_amba.c @@ -22,7 +22,6 @@ static const struct acpi_device_id amba_id_list[] = { {"ARMH0061", 0}, /* PL061 GPIO Device */ {"ARMH0330", 0}, /* ARM DMA Controller DMA-330 */ - {"ARMHC500", 0}, /* ARM CoreSight ETM4x */ {"ARMHC501", 0}, /* ARM CoreSight ETR */ {"ARMHC502", 0}, /* ARM CoreSight STM */ {"ARMHC503", 0}, /* ARM CoreSight Debug */ diff --git a/drivers/hwtracing/coresight/coresight-etm4x-core.c b/drivers/hwtracing/coresight/coresight-etm4x-core.c index 807b3a5a0eda..9649a4c885e4 100644 --- a/drivers/hwtracing/coresight/coresight-etm4x-core.c +++ b/drivers/hwtracing/coresight/coresight-etm4x-core.c @@ -3,6 +3,7 @@ * Copyright (c) 2014, The Linux Foundation. All rights reserved. */ +#include #include #include #include @@ -2345,12 +2346,21 @@ static const struct of_device_id etm4_match[] = { {} }; +#ifdef CONFIG_ACPI +static const struct acpi_device_id etm4x_acpi_ids[] = { + {"ARMHC500", 0}, /* ARM CoreSight ETM4x */ + {} +}; +MODULE_DEVICE_TABLE(acpi, etm4x_acpi_ids); +#endif + static struct platform_driver etm4_platform_driver = { .probe = etm4_probe_platform_dev, .remove = etm4_remove_platform_dev, .driver = { .name = "coresight-etm4x", .of_match_table = etm4_match, + .acpi_match_table = ACPI_PTR(etm4x_acpi_ids), .suppress_bind_attrs = true, .pm = &etm4_dev_pm_ops, }, From patchwork Fri May 19 05:21:49 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Anshuman Khandual X-Patchwork-Id: 96195 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a59:b0ea:0:b0:3b6:4342:cba0 with SMTP id b10csp1001862vqo; Thu, 18 May 2023 22:33:25 -0700 (PDT) X-Google-Smtp-Source: ACHHUZ74/V5N6HEuFk1QKE8ZOY6XhiGXYuZzTyUhIJ9enEgJ6DlMIH5HuTYXWmKywNj+1zqf++pD X-Received: by 2002:a17:90a:bf13:b0:252:aac9:8748 with SMTP id c19-20020a17090abf1300b00252aac98748mr1049002pjs.25.1684474405179; Thu, 18 May 2023 22:33:25 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1684474405; cv=none; d=google.com; s=arc-20160816; b=VPrUuzhiflM8+Sk0BADPvEBHRGs6s0smEAJb/cZiRiMAafjT991DCvrNt7HsiJ06+1 vHIyMKMIMkP2RUH0+Tp7Mw6pn8pHG39BBupAQOHelLIDVzUEFKCsNl0lCAmn4yYbuYvc uwaXcr4evkAX9UCUyXZLdXcahyGYiNUnsYU5woO0BhwIW4NoJSYyEMb+dDmZYoqvWp9V jVWNHaBF2kMQAETyr/XZmyxMjns+4cJNPVHxs83Nj4Db4Vnd/QptddkPpF3H6MhBX5eD nHXvc9VphZiSjfdFAbewZmOX8uKvy+xabjpLUsYciEWZ62Sd+mmC8aIvOxTMSPFmttfM Gh3g== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from; bh=SS8eFXdUUvA8OCPxf5Syhx2f4mz+ypgKZ9P0aUNsBxE=; b=DsLUsI+wjQpz67gKzi3IYf4FfgNj3guuab+f22lnjLrdBgmaFimN4fb7RkVHHDPXA9 bKH2Wz05mbPaclYcgDuenfklG/ZVANqci0wjMqkhJih4cvSIEcxANwuFoOPrFRoyMl/B I3xwSunZWaZqbbNi3jL0J5dE8Knka5Dv8kGocRSecQDzmVeTftO7fgoLv1oXWS/aOlXZ 3e35UbWXd7MTJeQr0+3oI/uaQMeIrgVeKs/GqMa1G+RnDcS3yWb2euYYivJkVifJ4e05 XURYDTBcUeOuVBmZhubptXZQae1ThJn0CB9yaFTKFEcKJJFr3PQ4gKlhVr8g7QLeMcmV aAMg== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=arm.com Received: from out1.vger.email (out1.vger.email. [2620:137:e000::1:20]) by mx.google.com with ESMTP id f10-20020a17090aa78a00b002475696c010si1017112pjq.129.2023.05.18.22.33.09; Thu, 18 May 2023 22:33:25 -0700 (PDT) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) client-ip=2620:137:e000::1:20; Authentication-Results: mx.google.com; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=arm.com Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S231279AbjESFXy (ORCPT + 99 others); Fri, 19 May 2023 01:23:54 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:58812 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S231232AbjESFXF (ORCPT ); Fri, 19 May 2023 01:23:05 -0400 Received: from foss.arm.com (foss.arm.com [217.140.110.172]) by lindbergh.monkeyblade.net (Postfix) with ESMTP id 3C3C11BD5; Thu, 18 May 2023 22:22:49 -0700 (PDT) Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id B8E031FB; Thu, 18 May 2023 22:23:33 -0700 (PDT) Received: from a077893.arm.com (unknown [10.163.71.125]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPA id 2349C3F762; Thu, 18 May 2023 22:22:41 -0700 (PDT) From: Anshuman Khandual To: linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, coresight@lists.linaro.org, suzuki.poulose@arm.com Cc: Anshuman Khandual , Ganapatrao Kulkarni , Steve Clevenger , Rob Herring , Frank Rowand , Russell King , Greg Kroah-Hartman , "Rafael J. Wysocki" , Len Brown , Sudeep Holla , Lorenzo Pieralisi , Mathieu Poirier , Mike Leach , Leo Yan , devicetree@vger.kernel.org, linux-acpi@vger.kernel.org Subject: [PATCH V3 6/6] coresight: platform: acpi: Ignore the absence of graph Date: Fri, 19 May 2023 10:51:49 +0530 Message-Id: <20230519052149.1367814-7-anshuman.khandual@arm.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20230519052149.1367814-1-anshuman.khandual@arm.com> References: <20230519052149.1367814-1-anshuman.khandual@arm.com> MIME-Version: 1.0 X-Spam-Status: No, score=-4.2 required=5.0 tests=BAYES_00,RCVD_IN_DNSWL_MED, SPF_HELO_NONE,SPF_NONE,T_SCC_BODY_TEXT_LINE autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-getmail-retrieved-from-mailbox: =?utf-8?q?INBOX?= X-GMAIL-THRID: =?utf-8?q?1766299433746289522?= X-GMAIL-MSGID: =?utf-8?q?1766299433746289522?= From: Suzuki K Poulose Some components may not have graph connections for describing the trace path. e.g., ETE, where it could directly use the per CPU TRBE. Ignore the absence of graph connections Signed-off-by: Suzuki K Poulose Signed-off-by: Anshuman Khandual --- drivers/hwtracing/coresight/coresight-platform.c | 6 +++++- 1 file changed, 5 insertions(+), 1 deletion(-) diff --git a/drivers/hwtracing/coresight/coresight-platform.c b/drivers/hwtracing/coresight/coresight-platform.c index 475899714104..c4b4fbde8550 100644 --- a/drivers/hwtracing/coresight/coresight-platform.c +++ b/drivers/hwtracing/coresight/coresight-platform.c @@ -692,8 +692,12 @@ static int acpi_coresight_parse_graph(struct acpi_device *adev, pdata->nr_inport = pdata->nr_outport = 0; graph = acpi_get_coresight_graph(adev); + /* + * There are no graph connections, which is fine for some components. + * e.g., ETE + */ if (!graph) - return -ENOENT; + return 0; nlinks = graph->package.elements[2].integer.value; if (!nlinks)