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[83.9.2.58]) by smtp.gmail.com with ESMTPSA id g6-20020a2e9cc6000000b002af0e9abaf6sm159224ljj.131.2023.05.17.09.50.14 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 17 May 2023 09:50:15 -0700 (PDT) From: Konrad Dybcio Date: Wed, 17 May 2023 18:50:08 +0200 Subject: [PATCH 1/6] drm/msm/a6xx: Explain CP_PROTECT_CNTL writes in a6xx_set_cp_protect MIME-Version: 1.0 Message-Id: <20230517-topic-a7xx_prep-v1-1-7a964f2e99c2@linaro.org> References: <20230517-topic-a7xx_prep-v1-0-7a964f2e99c2@linaro.org> In-Reply-To: <20230517-topic-a7xx_prep-v1-0-7a964f2e99c2@linaro.org> To: Rob Clark , Abhinav Kumar , Dmitry Baryshkov , Sean Paul , David Airlie , Daniel Vetter Cc: Marijn Suijten , linux-arm-msm@vger.kernel.org, dri-devel@lists.freedesktop.org, freedreno@lists.freedesktop.org, linux-kernel@vger.kernel.org, Konrad Dybcio X-Mailer: b4 0.12.2 X-Developer-Signature: v=1; a=ed25519-sha256; t=1684342212; l=1118; i=konrad.dybcio@linaro.org; s=20230215; h=from:subject:message-id; bh=aeaKOCz5rng2fUAGM03IzdiKTh6ymb1woS+RnpEksJ8=; b=kDW/wsHgJ4Xp1eVrDnOZAzxAODW5ws6Zqm/96IDWguKJ8oITdolvZOvBjyGjQEJPILzMHfobA T5r2ncZOohjCdxOLtmFco0HTV27E/+hyiab/rQ4ovzpEwkkpSRj6m5y X-Developer-Key: i=konrad.dybcio@linaro.org; a=ed25519; pk=iclgkYvtl2w05SSXO5EjjSYlhFKsJ+5OSZBjOkQuEms= X-Spam-Status: No, score=-2.1 required=5.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,RCVD_IN_DNSWL_NONE, SPF_HELO_NONE,SPF_PASS,T_SCC_BODY_TEXT_LINE,URIBL_BLOCKED autolearn=unavailable autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-getmail-retrieved-from-mailbox: =?utf-8?q?INBOX?= X-GMAIL-THRID: =?utf-8?q?1766160900113107943?= X-GMAIL-MSGID: =?utf-8?q?1766160900113107943?= We have the necessary information, so explain which bit does what. Signed-off-by: Konrad Dybcio --- drivers/gpu/drm/msm/adreno/a6xx_gpu.c | 7 ++++--- 1 file changed, 4 insertions(+), 3 deletions(-) diff --git a/drivers/gpu/drm/msm/adreno/a6xx_gpu.c b/drivers/gpu/drm/msm/adreno/a6xx_gpu.c index 9fb214f150dd..deed42675fe2 100644 --- a/drivers/gpu/drm/msm/adreno/a6xx_gpu.c +++ b/drivers/gpu/drm/msm/adreno/a6xx_gpu.c @@ -771,9 +771,10 @@ static void a6xx_set_cp_protect(struct msm_gpu *gpu) } /* - * Enable access protection to privileged registers, fault on an access - * protect violation and select the last span to protect from the start - * address all the way to the end of the register address space + * BIT(0) - Enable access protection to privileged registers + * BIT(1) - Enable fault on an access protect violation + * BIT(3) - Select the last span to protect from the start + * address all the way to the end of the register address space */ gpu_write(gpu, REG_A6XX_CP_PROTECT_CNTL, BIT(0) | BIT(1) | BIT(3)); From patchwork Wed May 17 16:50:09 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Konrad Dybcio X-Patchwork-Id: 95434 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a59:b0ea:0:b0:3b6:4342:cba0 with SMTP id b10csp1280678vqo; Wed, 17 May 2023 09:54:25 -0700 (PDT) X-Google-Smtp-Source: ACHHUZ5Oz0Kpei9KBuhI6AwEPKHMmpR9vQYFZCjrbtczZgOCGnwX73NVXjm8X8xMjFsfVn57c9H6 X-Received: by 2002:a05:6a20:3947:b0:104:70cf:eeb8 with SMTP id r7-20020a056a20394700b0010470cfeeb8mr25641191pzg.33.1684342464841; Wed, 17 May 2023 09:54:24 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1684342464; cv=none; d=google.com; s=arc-20160816; b=iPvFq8wzp0tFyRx+JBrZiFnZZAxWsvPjCEybvjS0hrRLujX2mwcJQ7RnrLkBMWHGkQ lQBNzv09HacugT2IAFDfTIVRkf21Zc7fHRS3oh1c1KNSeOqQOYXSrqIzV+H4Pq+Aueu8 2k2qCzQk+UujDq+6pm8dE75fZLXca0Xydos4TMqpjNFU5ju69NIcU1/x7uO5O6V5ogJZ HZ41nqxmptisKzwyK2sA/9hxT84KFSkncc1UWwzZP2BRCN3HtVe8JFyJMM4qI3ByUCUt qXHGBfVQFz5sOcUomuOscJ869fEKAM2/Dxv6HHLQRP/DdEh8WGuxyZjZj4OGshsLnnIe C6nA== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:cc:to:in-reply-to:references:message-id :content-transfer-encoding:mime-version:subject:date:from :dkim-signature; bh=doFIHuCbi1YVLGjN4vxnw9b75i10GnebCx9q/QOL15k=; b=fLSjELgERE2Pswxo6tlJknCQ3PGFnZZerPSw2eoAhrtTH4wCytB0qF0xht6QvzpR4b hwWP0P+LFhqFcyGYDsth8+nBjvVWifyCUJZ1/6NXt6mAhQ1IMeLCaH34ySy+Kky/yZGs xMk77rbfzx2cBLQAJsVA+KOTbzZ1qpnxdgaTLsbq+q1sFmLpCMTyUhfKwY/t68M+mVP3 GEG6KWqmhf6OUZfBMbDVj2C8s3BKV7Ku1mHI+E1ZT0JduTMj8ThvxQjT9iFHvR4WgG/0 Mg0MJs00ZllX0e22CrT7DY01TcvRwriSRhynQ2K1pJhN6tPhQNHIs9Ro6BxSbFTGRaFu aTmw== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b="q84ua9/u"; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: from out1.vger.email (out1.vger.email. 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[83.9.2.58]) by smtp.gmail.com with ESMTPSA id g6-20020a2e9cc6000000b002af0e9abaf6sm159224ljj.131.2023.05.17.09.50.15 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 17 May 2023 09:50:16 -0700 (PDT) From: Konrad Dybcio Date: Wed, 17 May 2023 18:50:09 +0200 Subject: [PATCH 2/6] drm/msm/a6xx: Skip empty protection ranges entries MIME-Version: 1.0 Message-Id: <20230517-topic-a7xx_prep-v1-2-7a964f2e99c2@linaro.org> References: <20230517-topic-a7xx_prep-v1-0-7a964f2e99c2@linaro.org> In-Reply-To: <20230517-topic-a7xx_prep-v1-0-7a964f2e99c2@linaro.org> To: Rob Clark , Abhinav Kumar , Dmitry Baryshkov , Sean Paul , David Airlie , Daniel Vetter Cc: Marijn Suijten , linux-arm-msm@vger.kernel.org, dri-devel@lists.freedesktop.org, freedreno@lists.freedesktop.org, linux-kernel@vger.kernel.org, Konrad Dybcio X-Mailer: b4 0.12.2 X-Developer-Signature: v=1; a=ed25519-sha256; t=1684342212; l=1049; i=konrad.dybcio@linaro.org; s=20230215; h=from:subject:message-id; bh=3GlljK/1BVjiAo5f22OuFyyc96OvFEAFjCCjuTjlQ3o=; b=JDAk6fXSs/PfJosLcj5uyuRhiKpGLFyoGp8A7FuUirGZ0Z6GNIin23Zlc9OKACT9KDP3GHh55 fa1FCvSNzO3CwCD12p1MakhpVpfc+wIbLCFNIwFpMakrwwqxNaXyaMm X-Developer-Key: i=konrad.dybcio@linaro.org; a=ed25519; pk=iclgkYvtl2w05SSXO5EjjSYlhFKsJ+5OSZBjOkQuEms= X-Spam-Status: No, score=-2.1 required=5.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,RCVD_IN_DNSWL_NONE, SPF_HELO_NONE,SPF_PASS,T_SCC_BODY_TEXT_LINE,URIBL_BLOCKED autolearn=unavailable autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-getmail-retrieved-from-mailbox: =?utf-8?q?INBOX?= X-GMAIL-THRID: =?utf-8?q?1766161084488875955?= X-GMAIL-MSGID: =?utf-8?q?1766161084488875955?= Some specific SKUs leave certain protection range registers empty. Allow for that behavior. Signed-off-by: Konrad Dybcio --- drivers/gpu/drm/msm/adreno/a6xx_gpu.c | 7 +++++-- 1 file changed, 5 insertions(+), 2 deletions(-) diff --git a/drivers/gpu/drm/msm/adreno/a6xx_gpu.c b/drivers/gpu/drm/msm/adreno/a6xx_gpu.c index deed42675fe2..8707e8b6ac7e 100644 --- a/drivers/gpu/drm/msm/adreno/a6xx_gpu.c +++ b/drivers/gpu/drm/msm/adreno/a6xx_gpu.c @@ -778,8 +778,11 @@ static void a6xx_set_cp_protect(struct msm_gpu *gpu) */ gpu_write(gpu, REG_A6XX_CP_PROTECT_CNTL, BIT(0) | BIT(1) | BIT(3)); - for (i = 0; i < count - 1; i++) - gpu_write(gpu, REG_A6XX_CP_PROTECT(i), regs[i]); + for (i = 0; i < count - 1; i++) { + /* Intentionally skip writing to some registers */ + if (regs[i]) + gpu_write(gpu, REG_A6XX_CP_PROTECT(i), regs[i]); + } /* last CP_PROTECT to have "infinite" length on the last entry */ gpu_write(gpu, REG_A6XX_CP_PROTECT(count_max - 1), regs[i]); } From patchwork Wed May 17 16:50:10 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Konrad Dybcio X-Patchwork-Id: 95435 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a59:b0ea:0:b0:3b6:4342:cba0 with SMTP id b10csp1281514vqo; Wed, 17 May 2023 09:55:55 -0700 (PDT) X-Google-Smtp-Source: ACHHUZ62sdcc+NisL5YBzDNPxZK7E2ZMANagALTg7S3rcdY0CKgvsHHol08CDvr6xodYBc9uciOY X-Received: by 2002:a05:6a21:788f:b0:101:37b2:62f3 with SMTP id bf15-20020a056a21788f00b0010137b262f3mr39414418pzc.61.1684342555110; Wed, 17 May 2023 09:55:55 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1684342555; cv=none; d=google.com; s=arc-20160816; b=vYa9nIN05yw9iGvcg3b7/84E6XN/TOf01ZqPo+7VD+7KF5QO0bmDEpN53mrH3z0UUa nRiubqYKedwCWTJApgE3hmVfTTUxmSbckT50kGQz6J1W3Q0agV0gtEUT36ktvZoBDtQR J+ocyFQB0DdbpfQqJa8hBuBQGb0bhiUvU28uTAxxnguyUpPkABD2huMRgHSZ34tScbiA e8luKjZtZwleW5SMfdh2Fra3G3G/zketvcwr/62DTyWb7xrIWbG5xe+FXVNuDaPAnJEz 5jhW3JPvkLYIcRJANvt3w9tfAM2II7UfSaRQraImtXCWee9XGT6USQYuuMdjj9C/Y9Rd 8EPQ== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:cc:to:in-reply-to:references:message-id :content-transfer-encoding:mime-version:subject:date:from :dkim-signature; bh=aSc4FWFPOC7I3VWo73gY6L/30rahECGBPz2uIJ+lIl8=; b=CMfn9j3+bI5p0GoNPB8qx+DOA/Dr8AfwSpxOoVtUO4ghWfvkK0PCVDHSA7+6oxnBGt suq9bKh/JBH9td6Grt+djlB+dp/owhwDPrVZ3PMQPTFoToymBXK54Fpxt39gP4UYaKkq 1fZ/4zYRa6HRYXbA+fKjaO5aiXGXGcVIY3L21oKJ4C+9dAM0d/7tiNKiQ86sdBSUZise sXBaskrUUIDCtZ8gYXS6uacXQI/dQTYk6fwRGYIu/VWehEW+lR1vAM9+NZVOMIRwozT/ EuLOU7tx5empg5gLgNO3xSbFRFzooEkufhl352qeua1BXSfQPrgseux899lHt8AhcIsw I67A== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=BD8AfYiB; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: from out1.vger.email (out1.vger.email. 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[83.9.2.58]) by smtp.gmail.com with ESMTPSA id g6-20020a2e9cc6000000b002af0e9abaf6sm159224ljj.131.2023.05.17.09.50.17 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 17 May 2023 09:50:18 -0700 (PDT) From: Konrad Dybcio Date: Wed, 17 May 2023 18:50:10 +0200 Subject: [PATCH 3/6] drm/msm/a6xx: Ensure clean GMU state in a6xx_gmu_fw_start MIME-Version: 1.0 Message-Id: <20230517-topic-a7xx_prep-v1-3-7a964f2e99c2@linaro.org> References: <20230517-topic-a7xx_prep-v1-0-7a964f2e99c2@linaro.org> In-Reply-To: <20230517-topic-a7xx_prep-v1-0-7a964f2e99c2@linaro.org> To: Rob Clark , Abhinav Kumar , Dmitry Baryshkov , Sean Paul , David Airlie , Daniel Vetter Cc: Marijn Suijten , linux-arm-msm@vger.kernel.org, dri-devel@lists.freedesktop.org, freedreno@lists.freedesktop.org, linux-kernel@vger.kernel.org, Konrad Dybcio X-Mailer: b4 0.12.2 X-Developer-Signature: v=1; a=ed25519-sha256; t=1684342212; l=1213; i=konrad.dybcio@linaro.org; s=20230215; h=from:subject:message-id; bh=AafR4gmpdLdCW49giEqj+iQDIXWZqQQlcHizyhfpHRg=; b=BhCdzTabSPUF9ByKOuuSnx0F7aPAwFydWOHefDYIo9iawEJ0RnTP/Cui8OHVcudCT+qo1U893 IYCczZPwG9FAeeywaBmx4XWmqx/x1vTG5047BD/4b/JOC20BN7uYaX6 X-Developer-Key: i=konrad.dybcio@linaro.org; a=ed25519; pk=iclgkYvtl2w05SSXO5EjjSYlhFKsJ+5OSZBjOkQuEms= X-Spam-Status: No, score=-2.1 required=5.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,RCVD_IN_DNSWL_NONE, SPF_HELO_NONE,SPF_PASS,T_SCC_BODY_TEXT_LINE,URIBL_BLOCKED autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-getmail-retrieved-from-mailbox: =?utf-8?q?INBOX?= X-GMAIL-THRID: =?utf-8?q?1766161178797794214?= X-GMAIL-MSGID: =?utf-8?q?1766161178797794214?= While it's not very well understood, there is some sort of a fault handler implemented in the GMU firmware which triggers when a certain bit is set, resulting in the M3 core not booting up the way we expect it to. Write a magic value to a magic register to hopefully prevent that from happening. Signed-off-by: Konrad Dybcio --- drivers/gpu/drm/msm/adreno/a6xx_gmu.c | 6 ++++++ 1 file changed, 6 insertions(+) diff --git a/drivers/gpu/drm/msm/adreno/a6xx_gmu.c b/drivers/gpu/drm/msm/adreno/a6xx_gmu.c index e16b4b3f8535..ea6d671e7c6c 100644 --- a/drivers/gpu/drm/msm/adreno/a6xx_gmu.c +++ b/drivers/gpu/drm/msm/adreno/a6xx_gmu.c @@ -796,6 +796,12 @@ static int a6xx_gmu_fw_start(struct a6xx_gmu *gmu, unsigned int state) gmu_write(gmu, REG_A6XX_GMU_AHB_FENCE_RANGE_0, (1 << 31) | (0xa << 18) | (0xa0)); + /* + * Snapshots toggle the NMI bit which will result in a jump to the NMI + * handler instead of __main. Set the M3 config value to avoid that. + */ + gmu_write(gmu, REG_A6XX_GMU_CM3_CFG, 0x4052); + chipid = adreno_gpu->rev.core << 24; chipid |= adreno_gpu->rev.major << 16; chipid |= adreno_gpu->rev.minor << 12; From patchwork Wed May 17 16:50:11 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Konrad Dybcio X-Patchwork-Id: 95432 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a59:b0ea:0:b0:3b6:4342:cba0 with SMTP id b10csp1279280vqo; Wed, 17 May 2023 09:52:01 -0700 (PDT) X-Google-Smtp-Source: ACHHUZ4hvirYBjyGE/2eukYlr/45fwInPwKfuhkkKgK4hC1Ee6h7IzVXsxaiEgmQKyRRjCuEXf/A X-Received: by 2002:a17:902:7295:b0:1a2:6257:36b9 with SMTP id d21-20020a170902729500b001a2625736b9mr40351654pll.31.1684342321729; Wed, 17 May 2023 09:52:01 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1684342321; cv=none; d=google.com; s=arc-20160816; b=qxrK/zUdR8hw924gCE4BIRnSonmne5zS10LooSrUeo1UeqUynaxoiRItsYYTSvUVVJ ykIltxDVgJmUdf2JZYVEuLLYNHvjzkkEsN62Io3XJTxOK4Bt0+KU3e4fUB6f17FhiQCo 2HRbNkyR8yluUhZSYLebKLGJRfYgCHtVLPjUUJnjtS3sjUgG9gHTOm7oFZMPtWt4h9US eEdeMujIjtBhZawON6TSQE7cpVJu2cqiXlHaV8y8svtT+7g4X5a6EHbG9sZiK5IwoQ5T P9/xJvhM9DfWuDLaEVhgSTA1pDmKXD0Q1G0DH2qOBg6igUmXKtu3/lyUpR4FtobVfqPS vzCg== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:cc:to:in-reply-to:references:message-id :content-transfer-encoding:mime-version:subject:date:from :dkim-signature; bh=Xbg/GarYLH0aFj2Z0GcGyUdxXKd4AWIEjgCUU5KwNKM=; b=ipfD9gJ4vDov6dqEfAqUWhDL2jaVO3UG7GlI7B+3vWYrs98PWKA5mlSPa7xEGGTRMT KyHW4x/t3Pi3//aDY5s5JQiVjB8IafUIueReC+2lb/fIYD27ZyHT2RtqY41AxZrZTw9v 2h5qGBhDU57VCI0udtjKelwkbDIewkjzK3upw1QVXgKza3o3TrpgXxDF2EADgR4zDUrs UzLHLSI5BJk2JQjxeReMHy4augrd3L4lbiSVrRnYOzbzRvJXP/pBvJu5PfJXvd8X2JlI +o85UB4NkHlRv/eHQyjGBaHx5PYhdt0TvGQwtc5nIvZjM5jkFiUhGQFcb3RE3RXNcG4I 7nWA== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=zMaSSOs9; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: from out1.vger.email (out1.vger.email. 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[83.9.2.58]) by smtp.gmail.com with ESMTPSA id g6-20020a2e9cc6000000b002af0e9abaf6sm159224ljj.131.2023.05.17.09.50.18 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 17 May 2023 09:50:20 -0700 (PDT) From: Konrad Dybcio Date: Wed, 17 May 2023 18:50:11 +0200 Subject: [PATCH 4/6] drm/msm/a6xx: Improve GMU force shutdown sequence MIME-Version: 1.0 Message-Id: <20230517-topic-a7xx_prep-v1-4-7a964f2e99c2@linaro.org> References: <20230517-topic-a7xx_prep-v1-0-7a964f2e99c2@linaro.org> In-Reply-To: <20230517-topic-a7xx_prep-v1-0-7a964f2e99c2@linaro.org> To: Rob Clark , Abhinav Kumar , Dmitry Baryshkov , Sean Paul , David Airlie , Daniel Vetter Cc: Marijn Suijten , linux-arm-msm@vger.kernel.org, dri-devel@lists.freedesktop.org, freedreno@lists.freedesktop.org, linux-kernel@vger.kernel.org, Konrad Dybcio X-Mailer: b4 0.12.2 X-Developer-Signature: v=1; a=ed25519-sha256; t=1684342212; l=999; i=konrad.dybcio@linaro.org; s=20230215; h=from:subject:message-id; bh=tIqOHRwnY5c8M0EJh8c6iF51VO5nfDTSDxvclL4zDow=; b=ippU5bfqmqMFyeRemvIfdDfB/dEI0Dag1wtnOk8dtad5ZqSn5m9G/Fn+WuYt4/235ZmGWag1a ysNfvVb+q/HCrjjoG85N3/1nkGUPR6jMjj0y9YHWyEaawakOzT8zf10 X-Developer-Key: i=konrad.dybcio@linaro.org; a=ed25519; pk=iclgkYvtl2w05SSXO5EjjSYlhFKsJ+5OSZBjOkQuEms= X-Spam-Status: No, score=-2.1 required=5.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,RCVD_IN_DNSWL_NONE, SPF_HELO_NONE,SPF_PASS,T_SCC_BODY_TEXT_LINE,URIBL_BLOCKED autolearn=unavailable autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-getmail-retrieved-from-mailbox: =?utf-8?q?INBOX?= X-GMAIL-THRID: =?utf-8?q?1766160934343759474?= X-GMAIL-MSGID: =?utf-8?q?1766160934343759474?= The GMU force shutdown sequence involves some additional register cleanup which was not implemented previously. Do so. Signed-off-by: Konrad Dybcio --- drivers/gpu/drm/msm/adreno/a6xx_gmu.c | 7 +++++++ 1 file changed, 7 insertions(+) diff --git a/drivers/gpu/drm/msm/adreno/a6xx_gmu.c b/drivers/gpu/drm/msm/adreno/a6xx_gmu.c index ea6d671e7c6c..8004b582e45f 100644 --- a/drivers/gpu/drm/msm/adreno/a6xx_gmu.c +++ b/drivers/gpu/drm/msm/adreno/a6xx_gmu.c @@ -930,6 +930,13 @@ static void a6xx_gmu_force_off(struct a6xx_gmu *gmu) /* Make sure there are no outstanding RPMh votes */ a6xx_gmu_rpmh_off(gmu); + /* Clear the WRITEDROPPED fields and put fence into allow mode */ + gmu_write(gmu, REG_A6XX_GMU_AHB_FENCE_STATUS_CLR, 0x7); + gmu_write(gmu, REG_A6XX_GMU_AO_AHB_FENCE_CTRL, 0); + + /* Make sure the above writes go through */ + wmb(); + /* Halt the gmu cm3 core */ gmu_write(gmu, REG_A6XX_GMU_CM3_SYSRESET, 1); From patchwork Wed May 17 16:50:12 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Konrad Dybcio X-Patchwork-Id: 95433 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a59:b0ea:0:b0:3b6:4342:cba0 with SMTP id b10csp1279621vqo; Wed, 17 May 2023 09:52:36 -0700 (PDT) X-Google-Smtp-Source: ACHHUZ7PjioelBs1OcqzsTiKvtu15IwKuC60UZ7o/Sc/H4V+8Jd/AsQKDCVmtJrgvo4FOqtFP2mp X-Received: by 2002:a17:902:868e:b0:1a6:f755:a4a0 with SMTP id g14-20020a170902868e00b001a6f755a4a0mr5063459plo.58.1684342356594; Wed, 17 May 2023 09:52:36 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1684342356; cv=none; d=google.com; s=arc-20160816; b=Il20Xvnh+qhPuLn9tKfgqUHGrSf6YzDAGslxUrzj38fO+QfWhockjG8AzbSWrltY+f m9jZMXkFciFgDhMcVxlWbIgw66bQWjn82qanAa297oBBkoy9+9gtMIBBymSjWUbdrdC0 P/7mB2cXGQ9zVX1T+WFkK/X65dQlAr4Yw8Xr8NlWer6M82ZNDPm+yzrTaUTcZ72Sr/R0 igMHqDOeEUNIg58j2zkeglsd7q1oF5kfSPic9XwzNOiAdaSrFNbgzVVGL1NKuW/jdfYk cqpwotUu4x5W7h5DYIg/bboQWtW8ucNPEM4k2V2yNsyUCixE1yW5TF9NbN6t2Il8l5cA ePeg== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:cc:to:in-reply-to:references:message-id :content-transfer-encoding:mime-version:subject:date:from :dkim-signature; bh=jKJzh3VBdMQOrvlfJ6ldWhmoYbX6WSR7/WgTonW/aWQ=; b=flvqMFbuYdPbaG47aCg0IjkA1czdm5vbCdvVpNBSjGhj8Npbm1oYKZhX/pHRmv4xUD 7Q6gPtxhJAJ1WVkpHRku20t1WWpLzKqXHtQUKX40xdQZrneZJkXJkYY/Ep+bbRWryhLH Oh2vnpuOE37OLFK6/fN/OGHHDdAB7TtCrRED/4XDZVwKy/5gbeTAZvWk1jw5JJzXiNec JtmSmzgle5vn4jQgGHGzlralv7CJ4fI+DtRzQMhCVo0UAR0tS73KB5pW1QCPWsZ9PPyy YRYwnrTBkXbltY2i/4dkLUEFF1YHJ0eCHqEEfoXWb3yGlFQ4RWO2HZaL1JXuFqnfM7zZ +Hrg== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=YmiF+k1D; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: from out1.vger.email (out1.vger.email. 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[83.9.2.58]) by smtp.gmail.com with ESMTPSA id g6-20020a2e9cc6000000b002af0e9abaf6sm159224ljj.131.2023.05.17.09.50.20 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 17 May 2023 09:50:21 -0700 (PDT) From: Konrad Dybcio Date: Wed, 17 May 2023 18:50:12 +0200 Subject: [PATCH 5/6] drm/msm/a6xx: Use GMU_ALWAYS_ON_COUNTER for GMU-equipped GPUs in timestamp MIME-Version: 1.0 Message-Id: <20230517-topic-a7xx_prep-v1-5-7a964f2e99c2@linaro.org> References: <20230517-topic-a7xx_prep-v1-0-7a964f2e99c2@linaro.org> In-Reply-To: <20230517-topic-a7xx_prep-v1-0-7a964f2e99c2@linaro.org> To: Rob Clark , Abhinav Kumar , Dmitry Baryshkov , Sean Paul , David Airlie , Daniel Vetter Cc: Marijn Suijten , linux-arm-msm@vger.kernel.org, dri-devel@lists.freedesktop.org, freedreno@lists.freedesktop.org, linux-kernel@vger.kernel.org, Konrad Dybcio X-Mailer: b4 0.12.2 X-Developer-Signature: v=1; a=ed25519-sha256; t=1684342212; l=1052; i=konrad.dybcio@linaro.org; s=20230215; h=from:subject:message-id; bh=yXq/EvspiDM4WLys1dNWbAg7dVVScVQhvkOnD1ANMBI=; b=r6jwsVtQ4nvBF0AJY4c2o98RWESzy2qTp1iwGXmihRYAaw/Lb3C3Gds/eT2qIOq5DsqpEtp6u 156ORD/lpIhDMiWaQkypMLl/VUZdMdWCtf9EjO5p0/D/H2C4QjxlzCj X-Developer-Key: i=konrad.dybcio@linaro.org; a=ed25519; pk=iclgkYvtl2w05SSXO5EjjSYlhFKsJ+5OSZBjOkQuEms= X-Spam-Status: No, score=-2.1 required=5.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,RCVD_IN_DNSWL_NONE, SPF_HELO_NONE,SPF_PASS,T_SCC_BODY_TEXT_LINE,URIBL_BLOCKED autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-getmail-retrieved-from-mailbox: =?utf-8?q?INBOX?= X-GMAIL-THRID: =?utf-8?q?1766160971081166749?= X-GMAIL-MSGID: =?utf-8?q?1766160971081166749?= Use the always-on counter provided by the GMU to skip having to keep the GPU online. Signed-off-by: Konrad Dybcio --- drivers/gpu/drm/msm/adreno/a6xx_gpu.c | 9 +++------ 1 file changed, 3 insertions(+), 6 deletions(-) diff --git a/drivers/gpu/drm/msm/adreno/a6xx_gpu.c b/drivers/gpu/drm/msm/adreno/a6xx_gpu.c index 8707e8b6ac7e..d2a999b90589 100644 --- a/drivers/gpu/drm/msm/adreno/a6xx_gpu.c +++ b/drivers/gpu/drm/msm/adreno/a6xx_gpu.c @@ -1664,12 +1664,9 @@ static int a6xx_get_timestamp(struct msm_gpu *gpu, uint64_t *value) mutex_lock(&a6xx_gpu->gmu.lock); - /* Force the GPU power on so we can read this register */ - a6xx_gmu_set_oob(&a6xx_gpu->gmu, GMU_OOB_PERFCOUNTER_SET); - - *value = gpu_read64(gpu, REG_A6XX_CP_ALWAYS_ON_COUNTER); - - a6xx_gmu_clear_oob(&a6xx_gpu->gmu, GMU_OOB_PERFCOUNTER_SET); + *value = gmu_read64(&a6xx_gpu->gmu, + REG_A6XX_GMU_ALWAYS_ON_COUNTER_L, + REG_A6XX_GMU_ALWAYS_ON_COUNTER_H); mutex_unlock(&a6xx_gpu->gmu.lock); From patchwork Wed May 17 16:50:13 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Konrad Dybcio X-Patchwork-Id: 95438 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a59:b0ea:0:b0:3b6:4342:cba0 with SMTP id b10csp1284096vqo; Wed, 17 May 2023 10:00:29 -0700 (PDT) X-Google-Smtp-Source: ACHHUZ7QURp6TRb1ATPwzrJ5UliiT73+9I1lKptQB2V67uGAQnVmjs/kQmXj0a+MLP5G+IsPf2wB X-Received: by 2002:a17:903:64c:b0:1a5:22f3:220d with SMTP id kh12-20020a170903064c00b001a522f3220dmr42403318plb.49.1684342829360; Wed, 17 May 2023 10:00:29 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1684342829; cv=none; d=google.com; s=arc-20160816; b=l+vXFkhX/nt7byq6M5UnKSAYoqdnQhceYJXcnSPiFAuQa4lGJMNVlbjAVzBivDzlTk WVRCrLbriXuZxeYrjdI1tmbwazWJHmj9tcYtm3+y1zzWKznoldUsA2eY0/2GUWIdE/op 8D5UDHOz5nWFzZKjCN8IKUJuO9aWtnVzdV+BtWAvBxvlElnbyJUqV/IMjRksoABja2QZ bmlBMQJmbo1QioUO6KerTPzycw0gpQ4ykn0R+LyAP0tqa8wTGsxZwPLxN/5yoIjZPYBL QBIywM5VKFVwd/+TA/sC+xtTeRN1onQhkw6rlGfE1T80sg4F0K6jzONA2LOCPjUZGfkS EzIQ== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:cc:to:in-reply-to:references:message-id :content-transfer-encoding:mime-version:subject:date:from :dkim-signature; bh=CoLKDA4nls3CGbrXvxh61SjvP4v8d9SGkB682PI8Y9w=; b=uqgssSIUgSK0BNLMyXuopStA/mbU8A5D0zPQ2S+jhI+GHhqMhYfEAWIQ/xefxE1CPN GitOvvR1Npzkf74f+AUAu5Afs0x/JvaVAE1FLKjP3MOCOgpHh+ND+a+iO5lb6Epvck0c U31bAmEzYpodI95ElFLZIuxsATT6kHzLzoTioJm8bPQ4uujYi/JMjjruaMAZvGiLWT6Y ub+zxybBBa1X8iorFirsWobAsAH+fHC1afdkTV4IQa3GwTQowNVrJrflJ+gSay7zRum+ n7OVDtpoIiKsXw/OBmrwOdKNbNPTzFE3mBklU+eqrim6U1p69Q9Y2p4784M1JJbL4N3W O8JQ== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=i1dbxqi1; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: from out1.vger.email (out1.vger.email. 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[83.9.2.58]) by smtp.gmail.com with ESMTPSA id g6-20020a2e9cc6000000b002af0e9abaf6sm159224ljj.131.2023.05.17.09.50.21 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 17 May 2023 09:50:22 -0700 (PDT) From: Konrad Dybcio Date: Wed, 17 May 2023 18:50:13 +0200 Subject: [PATCH 6/6] drm/msm/a6xx: Fix up GMU region reservations MIME-Version: 1.0 Message-Id: <20230517-topic-a7xx_prep-v1-6-7a964f2e99c2@linaro.org> References: <20230517-topic-a7xx_prep-v1-0-7a964f2e99c2@linaro.org> In-Reply-To: <20230517-topic-a7xx_prep-v1-0-7a964f2e99c2@linaro.org> To: Rob Clark , Abhinav Kumar , Dmitry Baryshkov , Sean Paul , David Airlie , Daniel Vetter Cc: Marijn Suijten , linux-arm-msm@vger.kernel.org, dri-devel@lists.freedesktop.org, freedreno@lists.freedesktop.org, linux-kernel@vger.kernel.org, Konrad Dybcio X-Mailer: b4 0.12.2 X-Developer-Signature: v=1; a=ed25519-sha256; t=1684342212; l=1342; i=konrad.dybcio@linaro.org; s=20230215; h=from:subject:message-id; bh=btUFgb1HmX4JzaeMKMcU2R1/tETWRJTF/5M21P54ufE=; b=2iOzY8M2I2x7twxabI/OJXdaVxfB9SkZvzqmhiZsOvaZVWXV/x0sZHjUtqXXsmMTWRk4wRQQM 64+sM1IyjWSAs6uhXWBqPJWO2gwmSn1SumxzfMpgnd2I0KV4SOOH3kn X-Developer-Key: i=konrad.dybcio@linaro.org; a=ed25519; pk=iclgkYvtl2w05SSXO5EjjSYlhFKsJ+5OSZBjOkQuEms= X-Spam-Status: No, score=-2.1 required=5.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,RCVD_IN_DNSWL_NONE, SPF_HELO_NONE,SPF_PASS,T_SCC_BODY_TEXT_LINE,URIBL_BLOCKED autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-getmail-retrieved-from-mailbox: =?utf-8?q?INBOX?= X-GMAIL-THRID: =?utf-8?q?1766161466648958592?= X-GMAIL-MSGID: =?utf-8?q?1766161466648958592?= Change the order of region allocations to make the addresses match downstream. This shouldn't matter very much, but helps eliminate one more difference when comparing register accesses. Also, make the log region 16K long. That's what it is, unconditionally on A6xx and A7xx. Signed-off-by: Konrad Dybcio --- drivers/gpu/drm/msm/adreno/a6xx_gmu.c | 8 ++++---- 1 file changed, 4 insertions(+), 4 deletions(-) diff --git a/drivers/gpu/drm/msm/adreno/a6xx_gmu.c b/drivers/gpu/drm/msm/adreno/a6xx_gmu.c index 8004b582e45f..386c81e1a2f3 100644 --- a/drivers/gpu/drm/msm/adreno/a6xx_gmu.c +++ b/drivers/gpu/drm/msm/adreno/a6xx_gmu.c @@ -1614,13 +1614,13 @@ int a6xx_gmu_init(struct a6xx_gpu *a6xx_gpu, struct device_node *node) goto err_memory; } - /* Allocate memory for for the HFI queues */ - ret = a6xx_gmu_memory_alloc(gmu, &gmu->hfi, SZ_16K, 0, "hfi"); + /* Allocate memory for the GMU log region */ + ret = a6xx_gmu_memory_alloc(gmu, &gmu->log, SZ_16K, 0, "log"); if (ret) goto err_memory; - /* Allocate memory for the GMU log region */ - ret = a6xx_gmu_memory_alloc(gmu, &gmu->log, SZ_4K, 0, "log"); + /* Allocate memory for for the HFI queues */ + ret = a6xx_gmu_memory_alloc(gmu, &gmu->hfi, SZ_16K, 0, "hfi"); if (ret) goto err_memory;