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[2620:137:e000::1:20]) by mx.google.com with ESMTP id q23-20020a638c57000000b0051b54dccffbsi20803173pgn.859.2023.05.17.05.43.04; Wed, 17 May 2023 05:43:18 -0700 (PDT) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) client-ip=2620:137:e000::1:20; Authentication-Results: mx.google.com; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S231410AbjEQMLP (ORCPT + 99 others); Wed, 17 May 2023 08:11:15 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:54914 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S230492AbjEQMLI (ORCPT ); Wed, 17 May 2023 08:11:08 -0400 Received: from metis.ext.pengutronix.de (metis.ext.pengutronix.de [IPv6:2001:67c:670:201:290:27ff:fe1d:cc33]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 113795588 for ; Wed, 17 May 2023 05:10:48 -0700 (PDT) Received: from drehscheibe.grey.stw.pengutronix.de ([2a0a:edc0:0:c01:1d::a2]) by metis.ext.pengutronix.de with esmtps (TLS1.3:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.92) (envelope-from ) id 1pzFzK-0001I0-R4; Wed, 17 May 2023 14:10:38 +0200 Received: from [2a0a:edc0:0:1101:1d::ac] (helo=dude04.red.stw.pengutronix.de) by drehscheibe.grey.stw.pengutronix.de with esmtp (Exim 4.94.2) (envelope-from ) id 1pzFzI-000q05-Oi; Wed, 17 May 2023 14:10:36 +0200 Received: from ore by dude04.red.stw.pengutronix.de with local (Exim 4.94.2) (envelope-from ) id 1pzFzH-00FxCr-Ss; Wed, 17 May 2023 14:10:35 +0200 From: Oleksij Rempel To: "David S. Miller" , Andrew Lunn , Eric Dumazet , Florian Fainelli , Jakub Kicinski , Paolo Abeni , Vladimir Oltean , Woojung Huh , Arun Ramadoss , "Russell King (Oracle)" Cc: Oleksij Rempel , kernel@pengutronix.de, linux-kernel@vger.kernel.org, netdev@vger.kernel.org, UNGLinuxDriver@microchip.com Subject: [PATCH net-next v2 1/2] net: dsa: microchip: ksz8: Make flow control, speed, and duplex on CPU port configurable Date: Wed, 17 May 2023 14:10:33 +0200 Message-Id: <20230517121034.3801640-2-o.rempel@pengutronix.de> X-Mailer: git-send-email 2.39.2 In-Reply-To: <20230517121034.3801640-1-o.rempel@pengutronix.de> References: <20230517121034.3801640-1-o.rempel@pengutronix.de> MIME-Version: 1.0 X-SA-Exim-Connect-IP: 2a0a:edc0:0:c01:1d::a2 X-SA-Exim-Mail-From: ore@pengutronix.de X-SA-Exim-Scanned: No (on metis.ext.pengutronix.de); SAEximRunCond expanded to false X-PTX-Original-Recipient: linux-kernel@vger.kernel.org X-Spam-Status: No, score=-4.2 required=5.0 tests=BAYES_00,RCVD_IN_DNSWL_MED, SPF_HELO_NONE,SPF_PASS,T_SCC_BODY_TEXT_LINE autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-getmail-retrieved-from-mailbox: =?utf-8?q?INBOX?= X-GMAIL-THRID: =?utf-8?q?1766145285697047630?= X-GMAIL-MSGID: =?utf-8?q?1766145285697047630?= Allow flow control, speed, and duplex settings on the CPU port to be configurable. Previously, the speed and duplex relied on default switch values, which limited flexibility. Additionally, flow control was hardcoded and only functional in duplex mode. This update enhances the configurability of these parameters. Signed-off-by: Oleksij Rempel --- drivers/net/dsa/microchip/ksz8.h | 4 +++ drivers/net/dsa/microchip/ksz8795.c | 47 ++++++++++++++++++++++++-- drivers/net/dsa/microchip/ksz_common.c | 1 + 3 files changed, 50 insertions(+), 2 deletions(-) diff --git a/drivers/net/dsa/microchip/ksz8.h b/drivers/net/dsa/microchip/ksz8.h index e68465fdf6b9..ec02baca726f 100644 --- a/drivers/net/dsa/microchip/ksz8.h +++ b/drivers/net/dsa/microchip/ksz8.h @@ -58,5 +58,9 @@ int ksz8_switch_detect(struct ksz_device *dev); int ksz8_switch_init(struct ksz_device *dev); void ksz8_switch_exit(struct ksz_device *dev); int ksz8_change_mtu(struct ksz_device *dev, int port, int mtu); +void ksz8_phylink_mac_link_up(struct ksz_device *dev, int port, + unsigned int mode, phy_interface_t interface, + struct phy_device *phydev, int speed, int duplex, + bool tx_pause, bool rx_pause); #endif diff --git a/drivers/net/dsa/microchip/ksz8795.c b/drivers/net/dsa/microchip/ksz8795.c index f56fca1b1a22..75b98a5d53af 100644 --- a/drivers/net/dsa/microchip/ksz8795.c +++ b/drivers/net/dsa/microchip/ksz8795.c @@ -1371,6 +1371,51 @@ void ksz8_config_cpu_port(struct dsa_switch *ds) } } +/** + * ksz8_upstram_link_up - Configures the CPU/upstream port of the switch. + * @dev: The KSZ device instance. + * @port: The port number to configure. + * @speed: The desired link speed. + * @duplex: The desired duplex mode. + * @tx_pause: If true, enables transmit pause. + * @rx_pause: If true, enables receive pause. + * + * Description: + * The function configures flow control and speed settings for the CPU/upstream + * port of the switch based on the desired settings, current duplex mode, and + * speed. + */ +static void ksz8_upstram_link_up(struct ksz_device *dev, int port, int speed, + int duplex, bool tx_pause, bool rx_pause) +{ + u8 ctrl = 0; + + if (duplex) { + if (tx_pause || rx_pause) + ctrl |= SW_FLOW_CTRL; + } else { + ctrl |= SW_HALF_DUPLEX; + if (tx_pause || rx_pause) + ctrl |= SW_HALF_DUPLEX_FLOW_CTRL; + } + + if (speed == SPEED_10) + ctrl |= SW_10_MBIT; + + ksz_rmw8(dev, REG_SW_CTRL_4, SW_HALF_DUPLEX_FLOW_CTRL | SW_HALF_DUPLEX | + SW_FLOW_CTRL | SW_10_MBIT, ctrl); +} + +void ksz8_phylink_mac_link_up(struct ksz_device *dev, int port, + unsigned int mode, phy_interface_t interface, + struct phy_device *phydev, int speed, int duplex, + bool tx_pause, bool rx_pause) +{ + if (dsa_is_upstream_port(dev->ds, port)) + ksz8_upstram_link_up(dev, port, speed, duplex, tx_pause, + rx_pause); +} + static int ksz8_handle_global_errata(struct dsa_switch *ds) { struct ksz_device *dev = ds->priv; @@ -1419,8 +1464,6 @@ int ksz8_setup(struct dsa_switch *ds) */ ds->vlan_filtering_is_global = true; - ksz_cfg(dev, S_REPLACE_VID_CTRL, SW_FLOW_CTRL, true); - /* Enable automatic fast aging when link changed detected. */ ksz_cfg(dev, S_LINK_AGING_CTRL, SW_LINK_AUTO_AGING, true); diff --git a/drivers/net/dsa/microchip/ksz_common.c b/drivers/net/dsa/microchip/ksz_common.c index a4428be5f483..6e19ad70c671 100644 --- a/drivers/net/dsa/microchip/ksz_common.c +++ b/drivers/net/dsa/microchip/ksz_common.c @@ -210,6 +210,7 @@ static const struct ksz_dev_ops ksz8_dev_ops = { .mirror_add = ksz8_port_mirror_add, .mirror_del = ksz8_port_mirror_del, .get_caps = ksz8_get_caps, + .phylink_mac_link_up = ksz8_phylink_mac_link_up, .config_cpu_port = ksz8_config_cpu_port, .enable_stp_addr = ksz8_enable_stp_addr, .reset = ksz8_reset_switch, From patchwork Wed May 17 12:10:34 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Oleksij Rempel X-Patchwork-Id: 95215 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a59:b0ea:0:b0:3b6:4342:cba0 with SMTP id b10csp1095486vqo; Wed, 17 May 2023 05:28:16 -0700 (PDT) X-Google-Smtp-Source: ACHHUZ4fDqXwqGsNuuKVMUN+26NckAks5kxTFV8aU6Rep9YZIVTwibHNwfN4FTQss+YILoUZ0icY X-Received: by 2002:a05:6a00:882:b0:643:4d69:efb8 with SMTP id q2-20020a056a00088200b006434d69efb8mr855920pfj.6.1684326496183; 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Miller" , Andrew Lunn , Eric Dumazet , Florian Fainelli , Jakub Kicinski , Paolo Abeni , Vladimir Oltean , Woojung Huh , Arun Ramadoss , "Russell King (Oracle)" Cc: Oleksij Rempel , kernel@pengutronix.de, linux-kernel@vger.kernel.org, netdev@vger.kernel.org, UNGLinuxDriver@microchip.com Subject: [PATCH net-next v2 2/2] net: dsa: microchip: ksz8: Add function to configure downstream ports for KSZ8xxx Date: Wed, 17 May 2023 14:10:34 +0200 Message-Id: <20230517121034.3801640-3-o.rempel@pengutronix.de> X-Mailer: git-send-email 2.39.2 In-Reply-To: <20230517121034.3801640-1-o.rempel@pengutronix.de> References: <20230517121034.3801640-1-o.rempel@pengutronix.de> MIME-Version: 1.0 X-SA-Exim-Connect-IP: 2a0a:edc0:0:c01:1d::a2 X-SA-Exim-Mail-From: ore@pengutronix.de X-SA-Exim-Scanned: No (on metis.ext.pengutronix.de); SAEximRunCond expanded to false X-PTX-Original-Recipient: linux-kernel@vger.kernel.org X-Spam-Status: No, score=-4.2 required=5.0 tests=BAYES_00,RCVD_IN_DNSWL_MED, SPF_HELO_NONE,SPF_PASS,T_SCC_BODY_TEXT_LINE autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-getmail-retrieved-from-mailbox: =?utf-8?q?INBOX?= X-GMAIL-THRID: =?utf-8?q?1766144339619501166?= X-GMAIL-MSGID: =?utf-8?q?1766144339619501166?= This patch introduces the function 'ksz8_downstram_link_up' to the Microchip KSZ8xxx driver. This function configures the flow control settings for the downstream ports of the switch based on desired settings and the current duplex mode. The KSZ8795 switch, unlike the KSZ8873, supports asynchronous pause control. However, a single bit controls both RX and TX pause, so we can't enforce asynchronous pause control. The flow control can be set based on the auto-negotiation process, depending on the capabilities of both link partners. For the KSZ8873, the PORT_FORCE_FLOW_CTRL bit can be set by the hardware bootstrap, ignoring the auto-negotiation result. Therefore, even in auto-negotiation mode, we need to ensure that the PORT_FORCE_FLOW_CTRL bit is correctly set. In the absence of auto-negotiation, we will enforce synchronous pause control for the KSZ8795 switch. Note: It is currently not possible to force disable flow control on a port if we still advertise pause support. This configuration is not currently supported by Linux, and it may not make practical sense. However, it's essential to understand this limitation when working with the KSZ8873 and similar devices. Signed-off-by: Oleksij Rempel --- drivers/net/dsa/microchip/ksz8795.c | 84 +++++++++++++++++++++++++++++ 1 file changed, 84 insertions(+) diff --git a/drivers/net/dsa/microchip/ksz8795.c b/drivers/net/dsa/microchip/ksz8795.c index 75b98a5d53af..a6cacf273991 100644 --- a/drivers/net/dsa/microchip/ksz8795.c +++ b/drivers/net/dsa/microchip/ksz8795.c @@ -1371,6 +1371,88 @@ void ksz8_config_cpu_port(struct dsa_switch *ds) } } +/** + * ksz8_downstram_link_up - Configures the downstream port of the switch. + * @dev: The KSZ device instance. + * @port: The port number to configure. + * @duplex: The desired duplex mode. + * @tx_pause: If true, enables transmit pause. + * @rx_pause: If true, enables receive pause. + * + * Description: + * The function configures flow control settings for a given port based on the + * desired settings and current duplex mode. + * + * According to the KSZ8873 datasheet, the PORT_FORCE_FLOW_CTRL bit in the + * Port Control 2 register (0x1A for Port 1, 0x22 for Port 2, 0x32 for Port 3) + * determines how flow control is handled on the port: + * "1 = will always enable full-duplex flow control on the port, regardless + * of AN result. + * 0 = full-duplex flow control is enabled based on AN result." + * + * This means that the flow control behavior depends on the state of this bit: + * - If PORT_FORCE_FLOW_CTRL is set to 1, the switch will ignore AN results and + * force flow control on the port. + * - If PORT_FORCE_FLOW_CTRL is set to 0, the switch will enable or disable + * flow control based on the AN results. + * + * However, there is a potential limitation in this configuration. It is + * currently not possible to force disable flow control on a port if we still + * advertise pause support. While such a configuration is not currently + * supported by Linux, and may not make practical sense, it's important to be + * aware of this limitation when working with the KSZ8873 and similar devices. + */ +static void ksz8_downstram_link_up(struct ksz_device *dev, int port, + int duplex, bool tx_pause, bool rx_pause) +{ + const u16 *regs = dev->info->regs; + u8 ctrl = 0; + int ret; + + /* + * The KSZ8795 switch differs from the KSZ8873 by supporting + * asynchronous pause control. However, since a single bit is used to + * control both RX and TX pause, we can't enforce asynchronous pause + * control - both TX and RX pause will be either enabled or disabled + * together. + * + * If auto-negotiation is enabled, we usually allow the flow control to + * be determined by the auto-negotiation process based on the + * capabilities of both link partners. However, for KSZ8873, the + * PORT_FORCE_FLOW_CTRL bit may be set by the hardware bootstrap, + * ignoring the auto-negotiation result. Thus, even in auto-negotiatio + * mode, we need to ensure that the PORT_FORCE_FLOW_CTRL bit is + * properly cleared. + * + * In the absence of auto-negotiation, we will enforce synchronous + * pause control for the KSZ8795 switch. + */ + if (duplex) { + bool aneg_en = false; + + ret = ksz_pread8(dev, port, regs[P_FORCE_CTRL], &ctrl); + if (ret) + return; + + if (ksz_is_ksz88x3(dev)) { + if ((ctrl & PORT_AUTO_NEG_ENABLE)) + aneg_en = true; + } else { + if (!(ctrl & PORT_AUTO_NEG_DISABLE)) + aneg_en = true; + } + + if (!aneg_en && (tx_pause || rx_pause)) + ctrl |= PORT_FORCE_FLOW_CTRL; + } else { + if (tx_pause || rx_pause) + ctrl |= PORT_BACK_PRESSURE; + } + + ksz_prmw8(dev, port, regs[P_STP_CTRL], PORT_FORCE_FLOW_CTRL | + PORT_BACK_PRESSURE, ctrl); +} + /** * ksz8_upstram_link_up - Configures the CPU/upstream port of the switch. * @dev: The KSZ device instance. @@ -1414,6 +1496,8 @@ void ksz8_phylink_mac_link_up(struct ksz_device *dev, int port, if (dsa_is_upstream_port(dev->ds, port)) ksz8_upstram_link_up(dev, port, speed, duplex, tx_pause, rx_pause); + else + ksz8_downstram_link_up(dev, port, duplex, tx_pause, rx_pause); } static int ksz8_handle_global_errata(struct dsa_switch *ds)