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[2620:52:3:1:0:246e:9693:128c]) by mx.google.com with ESMTPS id kk15-20020a170907766f00b0094f440a1852si15047277ejc.12.2023.05.16.23.59.50 for (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 16 May 2023 23:59:51 -0700 (PDT) Received-SPF: pass (google.com: domain of gcc-patches-bounces+ouuuleilei=gmail.com@gcc.gnu.org designates 2620:52:3:1:0:246e:9693:128c as permitted sender) client-ip=2620:52:3:1:0:246e:9693:128c; Authentication-Results: mx.google.com; dkim=pass header.i=@gcc.gnu.org header.s=default header.b=KIzgvzhr; spf=pass (google.com: domain of gcc-patches-bounces+ouuuleilei=gmail.com@gcc.gnu.org designates 2620:52:3:1:0:246e:9693:128c as permitted sender) smtp.mailfrom="gcc-patches-bounces+ouuuleilei=gmail.com@gcc.gnu.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=gnu.org Received: from server2.sourceware.org (localhost [IPv6:::1]) by sourceware.org (Postfix) with ESMTP id C00423857347 for ; Wed, 17 May 2023 06:59:49 +0000 (GMT) DKIM-Filter: OpenDKIM Filter v2.11.0 sourceware.org C00423857347 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gcc.gnu.org; s=default; t=1684306789; bh=FjmW9CGct8Yom+luHGPrEdvEvrdyzN/QYwOw8vgVtCQ=; h=To:Cc:Subject:Date:List-Id:List-Unsubscribe:List-Archive: List-Post:List-Help:List-Subscribe:From:Reply-To:From; b=KIzgvzhr971A3uInj6fNxX5Ci2PF7J28D9SwgMnFAEzIP0GBx509I61oihRRMPYqC zdV+aq4tChOllyhpGyNTVFkCE/xPANStgaHZai4pe9BKPVh9Pfa3AGWcw7hX7dNhbB tJL9XATmolJzmVNDy4TMW5rAf9H0XDtJZjJYoWMs= X-Original-To: gcc-patches@gcc.gnu.org Delivered-To: gcc-patches@gcc.gnu.org Received: from mga09.intel.com (mga09.intel.com [134.134.136.24]) by sourceware.org (Postfix) with ESMTPS id 923173858D1E; Wed, 17 May 2023 06:59:05 +0000 (GMT) DMARC-Filter: OpenDMARC Filter v1.4.2 sourceware.org 923173858D1E X-IronPort-AV: E=McAfee;i="6600,9927,10712"; a="353974283" X-IronPort-AV: E=Sophos;i="5.99,281,1677571200"; d="scan'208";a="353974283" Received: from orsmga008.jf.intel.com ([10.7.209.65]) by orsmga102.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 16 May 2023 23:59:04 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=McAfee;i="6600,9927,10712"; a="732283339" X-IronPort-AV: E=Sophos;i="5.99,281,1677571200"; d="scan'208";a="732283339" Received: from shvmail03.sh.intel.com ([10.239.245.20]) by orsmga008.jf.intel.com with ESMTP; 16 May 2023 23:59:02 -0700 Received: from shliclel4217.sh.intel.com (shliclel4217.sh.intel.com [10.239.240.127]) by shvmail03.sh.intel.com (Postfix) with ESMTP id 454C71007BC4; Wed, 17 May 2023 14:59:02 +0800 (CST) To: gcc-patches@gcc.gnu.org Cc: vmakarov@redhat.com, linkw@gcc.gnu.org, segher@kernel.crashing.org Subject: [PATCH] Only use NO_REGS in cost calculation when !hard_regno_mode_ok for GENERAL_REGS and mode. Date: Wed, 17 May 2023 14:57:02 +0800 Message-Id: <20230517065702.2935000-1-hongtao.liu@intel.com> X-Mailer: git-send-email 2.39.1.388.g2fc9e9ca3c MIME-Version: 1.0 X-Spam-Status: No, score=-12.0 required=5.0 tests=BAYES_00, DKIMWL_WL_HIGH, DKIM_SIGNED, DKIM_VALID, DKIM_VALID_AU, DKIM_VALID_EF, GIT_PATCH_0, RCVD_IN_MSPIKE_H3, RCVD_IN_MSPIKE_WL, SPF_HELO_NONE, SPF_NONE, TXREP, T_SCC_BODY_TEXT_LINE autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on server2.sourceware.org X-BeenThere: gcc-patches@gcc.gnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Gcc-patches mailing list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-Patchwork-Original-From: liuhongt via Gcc-patches From: liuhongt Reply-To: liuhongt Errors-To: gcc-patches-bounces+ouuuleilei=gmail.com@gcc.gnu.org Sender: "Gcc-patches" X-getmail-retrieved-from-mailbox: =?utf-8?q?INBOX?= X-GMAIL-THRID: =?utf-8?q?1766123677685883175?= X-GMAIL-MSGID: =?utf-8?q?1766123677685883175?= r14-172-g0368d169492017 replaces GENERAL_REGS with NO_REGS in cost calculation when the preferred register class are not known yet. It regressed powerpc PR109610 and PR109858, it looks too aggressive to use NO_REGS when mode can be allocated with GENERAL_REGS. The patch takes a step back, still use GENERAL_REGS when hard_regno_mode_ok for mode and GENERAL_REGS, otherwise uses NO_REGS. Kewen confirmed the patch fixed PR109858, I vefiried it also fixed PR109610. Bootstrapped and regtested on x86_64-pc-linux-gnu{-m32,}. No big performance impact for SPEC2017 on icelake server. Ok for trunk? gcc/ChangeLog: * ira-costs.cc (scan_one_insn): Only use NO_REGS in cost calculation when !hard_regno_mode_ok for GENERAL_REGS and mode, otherwise still use GENERAL_REGS. --- gcc/ira-costs.cc | 12 ++++++++---- 1 file changed, 8 insertions(+), 4 deletions(-) diff --git a/gcc/ira-costs.cc b/gcc/ira-costs.cc index d2a801ab9b0..ae8304ff938 100644 --- a/gcc/ira-costs.cc +++ b/gcc/ira-costs.cc @@ -1572,12 +1572,16 @@ scan_one_insn (rtx_insn *insn) && (! ira_use_lra_p || ! pic_offset_table_rtx || ! contains_symbol_ref_p (XEXP (note, 0)))) { - /* Costs for NO_REGS are used in cost calculation on the - 1st pass when the preferred register classes are not - known yet. In this case we take the best scenario. */ - enum reg_class cl = NO_REGS; + enum reg_class cl = GENERAL_REGS; rtx reg = SET_DEST (set); int num = COST_INDEX (REGNO (reg)); + /* Costs for NO_REGS are used in cost calculation on the + 1st pass when the preferred register classes are not + known yet. In this case we take the best scenario when + mode can't be put into GENERAL_REGS. */ + if (!targetm.hard_regno_mode_ok (ira_class_hard_regs[cl][0], + GET_MODE (reg))) + cl = NO_REGS; COSTS (costs, num)->mem_cost -= ira_memory_move_cost[GET_MODE (reg)][cl][1] * frequency;