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[2620:137:e000::1:20]) by mx.google.com with ESMTP id b9-20020a637149000000b004c259db61fdsi19305881pgn.561.2023.05.16.07.02.55; Tue, 16 May 2023 07:03:10 -0700 (PDT) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) client-ip=2620:137:e000::1:20; Authentication-Results: mx.google.com; dkim=pass header.i=@quicinc.com header.s=qcppdkim1 header.b=QHE8qReA; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=quicinc.com Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S232119AbjEPNuz (ORCPT + 99 others); Tue, 16 May 2023 09:50:55 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:60922 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S232940AbjEPNux (ORCPT ); Tue, 16 May 2023 09:50:53 -0400 Received: from mx0a-0031df01.pphosted.com (mx0a-0031df01.pphosted.com [205.220.168.131]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 5CE407D81; Tue, 16 May 2023 06:50:52 -0700 (PDT) Received: from pps.filterd (m0279865.ppops.net [127.0.0.1]) by mx0a-0031df01.pphosted.com (8.17.1.19/8.17.1.19) with ESMTP id 34GDN3ZT023654; Tue, 16 May 2023 13:50:47 GMT DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=quicinc.com; h=from : to : cc : subject : date : message-id : in-reply-to : references : mime-version : content-type; s=qcppdkim1; bh=CNNdjFYhJ5OOgdyksiZx2kXXzLI8m/crTfuMj+tjaoc=; b=QHE8qReACneqUgBPS6rvRgfBDYY31NG9Nv9HgC5KL6PLyBNcXTImU5WN5i8dMAsGrAd4 6s+7OIu4Myq/cn5Hl+Ecq+njr7X0cSYjuJkSdLs5nQYwB5BisVvTm/paLqM5QLgFX+IQ mc3PaNngDOB5FmXpeeh55h0g9aku4M8vWZtW/u1HL6Bdo5bUA8g+ufg/b3HsDsHabv9x fyYUQRYnnN0msmDyQssl/OKt08R5Yu2H71OpFJKgr1XkgP3rjO2mPCF/Tla1GULYY7AL uQNwM0qi1S6ch6kFNAIOkuIm45of9rQOQY+i3IbugykbZe89eNzdwRknzVwUzEMqrRtV tA== Received: from nalasppmta01.qualcomm.com (Global_NAT1.qualcomm.com [129.46.96.20]) by mx0a-0031df01.pphosted.com (PPS) with ESMTPS id 3qkkde35j0-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Tue, 16 May 2023 13:50:46 +0000 Received: from nalasex01a.na.qualcomm.com (nalasex01a.na.qualcomm.com [10.47.209.196]) by NALASPPMTA01.qualcomm.com (8.17.1.5/8.17.1.5) with ESMTPS id 34GDojgJ018751 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Tue, 16 May 2023 13:50:45 GMT Received: from devipriy-linux.qualcomm.com (10.80.80.8) by nalasex01a.na.qualcomm.com (10.47.209.196) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.986.42; Tue, 16 May 2023 06:50:41 -0700 From: Devi Priya To: , , , , , , , , CC: , , , , Subject: [PATCH 1/2] dt-bindings: arm: qcom: document AL02-C6 board based on IPQ9574 family Date: Tue, 16 May 2023 19:20:12 +0530 Message-ID: <20230516135013.3547-2-quic_devipriy@quicinc.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20230516135013.3547-1-quic_devipriy@quicinc.com> References: <20230516135013.3547-1-quic_devipriy@quicinc.com> MIME-Version: 1.0 X-Originating-IP: [10.80.80.8] X-ClientProxiedBy: nasanex01a.na.qualcomm.com (10.52.223.231) To nalasex01a.na.qualcomm.com (10.47.209.196) X-QCInternal: smtphost X-Proofpoint-Virus-Version: vendor=nai engine=6200 definitions=5800 signatures=585085 X-Proofpoint-GUID: BhI-fxAC8VLiSFCzq7hGM61IMwhRbcmL X-Proofpoint-ORIG-GUID: BhI-fxAC8VLiSFCzq7hGM61IMwhRbcmL X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.254,Aquarius:18.0.957,Hydra:6.0.573,FMLib:17.11.170.22 definitions=2023-05-16_06,2023-05-16_01,2023-02-09_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 priorityscore=1501 phishscore=0 suspectscore=0 bulkscore=0 clxscore=1015 impostorscore=0 mlxscore=0 mlxlogscore=977 malwarescore=0 spamscore=0 adultscore=0 lowpriorityscore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.12.0-2304280000 definitions=main-2305160116 X-Spam-Status: No, score=-2.8 required=5.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,RCVD_IN_DNSWL_LOW,SPF_HELO_NONE, SPF_PASS,T_SCC_BODY_TEXT_LINE,URIBL_BLOCKED autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-getmail-retrieved-from-mailbox: =?utf-8?q?INBOX?= X-GMAIL-THRID: =?utf-8?q?1766059713410825077?= X-GMAIL-MSGID: =?utf-8?q?1766059713410825077?= Document AL02-C6 (Reference Design Platform 449) board based on IPQ9574 family of SoCs. Signed-off-by: Devi Priya Acked-by: Krzysztof Kozlowski --- Documentation/devicetree/bindings/arm/qcom.yaml | 2 ++ 1 file changed, 2 insertions(+) diff --git a/Documentation/devicetree/bindings/arm/qcom.yaml b/Documentation/devicetree/bindings/arm/qcom.yaml index 7e6a128fe1db..37ac3ae77536 100644 --- a/Documentation/devicetree/bindings/arm/qcom.yaml +++ b/Documentation/devicetree/bindings/arm/qcom.yaml @@ -86,6 +86,7 @@ description: | adp ap-al02-c2 + ap-al02-c6 ap-al02-c7 ap-mi01.2 ap-mi01.6 @@ -353,6 +354,7 @@ properties: - items: - enum: - qcom,ipq9574-ap-al02-c2 + - qcom,ipq9574-ap-al02-c6 - qcom,ipq9574-ap-al02-c7 - const: qcom,ipq9574 From patchwork Tue May 16 13:50:13 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Devi Priya X-Patchwork-Id: 94723 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a59:b0ea:0:b0:3b6:4342:cba0 with SMTP id b10csp449307vqo; Tue, 16 May 2023 07:01:55 -0700 (PDT) X-Google-Smtp-Source: ACHHUZ5/T9S1YpTGTJ39/QiikhfJoyMg6nOC4kxGa+UfKAH0eKjYEJA4p9SSR0uNrOowcM7ZzFIV X-Received: by 2002:a17:90a:cc0e:b0:24e:180a:e1e5 with SMTP id b14-20020a17090acc0e00b0024e180ae1e5mr37440200pju.26.1684245714403; Tue, 16 May 2023 07:01:54 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1684245714; cv=none; d=google.com; s=arc-20160816; b=jx8pAqtykUKuD5PfTEDedxyomah0j4oorSmTwYN/zoRM+4x8A/8W/SD/0/MWgKol+1 T3bEJIKasKslLUlF4LC/NMEyITsXN+0jjjPaEzyuzSD07APOY1NbKtsxgIHGI9QyAIpk iK0bUioXHGDVpR1BPk0zUIfGNkyucfwKTqD6ESIvCPRTCRTL0hP3nM2HB5j92oo+ePb5 5s2gRZ7XMcGfmb2p4f/AcK8flcMFkHqkA1+LmLq3DPpwtf63Pn3d/S+Efkt70WzpH4th 7ZbZdVmhSnhOIMTA7D6M7Od1BIRH8TJzg9sdTfTHQbvUXoKDfsYiLYGGVbrCBRT3/LnK MqhA== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:mime-version:references:in-reply-to:message-id :date:subject:cc:to:from:dkim-signature; bh=AIugtW4VK/J1RGmXbnM6sJfnRhuMh6u7qjOb6np0/A0=; b=Tz17g6dbxrKxXadP+MNloGI93PTFluro9WGFvkdl7dmGxLP0ruostxWVWx5tt0NDUX 7tHLpTLk+tVmWmyTHeuyft00Kaf4tcKtsNj1AKDrwCvB4niXY1K2e1DTpBSoy/B4WPN1 X+wHSS1cKNG76L2hxEo21wRZT9jd8ncrpjuTBpWPBCWU+cL31ewdOBxVI9eMiO0Q64Cl 9YnjluMSPDdVJgBciwfPxMYJIiZwAj0oCKa/+hmushpPfdSnpJy+GSakW+rbiKd/84mw i+pVNgdYILDJyOEjUoocvsLugR/HkqUPYrIsdkcZgoTUXeSR6kVJUq+hvPqU5MXQyrkf Hlhg== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@quicinc.com header.s=qcppdkim1 header.b=ijwAlJPb; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=quicinc.com Received: from out1.vger.email (out1.vger.email. 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This patch adds support for Console UART, SPI NOR and SMPA1 regulator node. Signed-off-by: Devi Priya Reviewed-by: Krzysztof Kozlowski --- arch/arm64/boot/dts/qcom/Makefile | 1 + arch/arm64/boot/dts/qcom/ipq9574-rdp449.dts | 80 +++++++++++++++++++++ 2 files changed, 81 insertions(+) create mode 100644 arch/arm64/boot/dts/qcom/ipq9574-rdp449.dts diff --git a/arch/arm64/boot/dts/qcom/Makefile b/arch/arm64/boot/dts/qcom/Makefile index 29c862035861..9851e2681edf 100644 --- a/arch/arm64/boot/dts/qcom/Makefile +++ b/arch/arm64/boot/dts/qcom/Makefile @@ -11,6 +11,7 @@ dtb-$(CONFIG_ARCH_QCOM) += ipq8074-hk10-c1.dtb dtb-$(CONFIG_ARCH_QCOM) += ipq8074-hk10-c2.dtb dtb-$(CONFIG_ARCH_QCOM) += ipq9574-rdp418.dtb dtb-$(CONFIG_ARCH_QCOM) += ipq9574-rdp433.dtb +dtb-$(CONFIG_ARCH_QCOM) += ipq9574-rdp449.dtb dtb-$(CONFIG_ARCH_QCOM) += msm8916-acer-a1-724.dtb dtb-$(CONFIG_ARCH_QCOM) += msm8916-alcatel-idol347.dtb dtb-$(CONFIG_ARCH_QCOM) += msm8916-asus-z00l.dtb diff --git a/arch/arm64/boot/dts/qcom/ipq9574-rdp449.dts b/arch/arm64/boot/dts/qcom/ipq9574-rdp449.dts new file mode 100644 index 000000000000..c8fa54e1a62c --- /dev/null +++ b/arch/arm64/boot/dts/qcom/ipq9574-rdp449.dts @@ -0,0 +1,80 @@ +// SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause) +/* + * IPQ9574 RDP449 board device tree source + * + * Copyright (c) 2020-2021 The Linux Foundation. All rights reserved. + * Copyright (c) 2022-2023 Qualcomm Innovation Center, Inc. All rights reserved. + */ + +/dts-v1/; + +#include "ipq9574.dtsi" + +/ { + model = "Qualcomm Technologies, Inc. IPQ9574/AP-AL02-C6"; + compatible = "qcom,ipq9574-ap-al02-c6", "qcom,ipq9574"; + + aliases { + serial0 = &blsp1_uart2; + }; + + chosen { + stdout-path = "serial0:115200n8"; + }; +}; + +&blsp1_spi0 { + pinctrl-0 = <&spi_0_pins>; + pinctrl-names = "default"; + status = "okay"; + + flash@0 { + compatible = "micron,n25q128a11", "jedec,spi-nor"; + reg = <0>; + #address-cells = <1>; + #size-cells = <1>; + spi-max-frequency = <50000000>; + }; +}; + +&blsp1_uart2 { + pinctrl-0 = <&uart2_pins>; + pinctrl-names = "default"; + status = "okay"; +}; + +&rpm_requests { + regulators { + compatible = "qcom,rpm-mp5496-regulators"; + + ipq9574_s1: s1 { + /* + * During kernel bootup, the SoC runs at 800MHz with 875mV set by the bootloaders. + * During regulator registration, kernel not knowing the initial voltage, + * considers it as zero and brings up the regulators with minimum supported voltage. + * Update the regulator-min-microvolt with SVS voltage of 725mV so that + * the regulators are brought up with 725mV which is sufficient for all the + * corner parts to operate at 800MHz + */ + regulator-min-microvolt = <725000>; + regulator-max-microvolt = <1075000>; + }; + }; +}; + +&sleep_clk { + clock-frequency = <32000>; +}; + +&tlmm { + spi_0_pins: spi-0-state { + pins = "gpio11", "gpio12", "gpio13", "gpio14"; + function = "blsp0_spi"; + drive-strength = <8>; + bias-disable; + }; +}; + +&xo_board_clk { + clock-frequency = <24000000>; +};