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Tue, 16 May 2023 15:22:45 +0200 From: Sean Nyekjaer To: robh+dt@kernel.org, Lee Jones Cc: devicetree@vger.kernel.org, Sean Nyekjaer , linux-kernel@vger.kernel.org Subject: [PATCH v2 1/3] mfd: stpmic1: fixup main control register and bits naming Date: Tue, 16 May 2023 15:22:22 +0200 Message-Id: <20230516132225.3012541-1-sean@geanix.com> X-Mailer: git-send-email 2.40.0 MIME-Version: 1.0 X-Authenticated-Sender: sean@geanix.com X-Virus-Scanned: Clear (ClamAV 0.103.8/26908/Tue May 16 09:24:20 2023) X-Spam-Status: No, score=-2.1 required=5.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,SPF_HELO_NONE,SPF_PASS, T_SCC_BODY_TEXT_LINE,URIBL_BLOCKED autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-getmail-retrieved-from-mailbox: =?utf-8?q?INBOX?= X-GMAIL-THRID: =?utf-8?q?1764422281641183722?= X-GMAIL-MSGID: =?utf-8?q?1766059090294192613?= Fixup main control register and bits naming so the match the naming from the datasheet. https://www.st.com/resource/en/datasheet/stpmic1.pdf Signed-off-by: Sean Nyekjaer Reviewed-by: Lee Jones --- Changes since v1: - None drivers/mfd/stpmic1.c | 4 ++-- include/linux/mfd/stpmic1.h | 12 ++++++------ 2 files changed, 8 insertions(+), 8 deletions(-) diff --git a/drivers/mfd/stpmic1.c b/drivers/mfd/stpmic1.c index 8db1530d9bac..4c9b18d9dec8 100644 --- a/drivers/mfd/stpmic1.c +++ b/drivers/mfd/stpmic1.c @@ -19,7 +19,7 @@ static const struct regmap_range stpmic1_readable_ranges[] = { regmap_reg_range(TURN_ON_SR, VERSION_SR), - regmap_reg_range(SWOFF_PWRCTRL_CR, LDO6_STDBY_CR), + regmap_reg_range(MAIN_CR, LDO6_STDBY_CR), regmap_reg_range(BST_SW_CR, BST_SW_CR), regmap_reg_range(INT_PENDING_R1, INT_PENDING_R4), regmap_reg_range(INT_CLEAR_R1, INT_CLEAR_R4), @@ -30,7 +30,7 @@ static const struct regmap_range stpmic1_readable_ranges[] = { }; static const struct regmap_range stpmic1_writeable_ranges[] = { - regmap_reg_range(SWOFF_PWRCTRL_CR, LDO6_STDBY_CR), + regmap_reg_range(MAIN_CR, LDO6_STDBY_CR), regmap_reg_range(BST_SW_CR, BST_SW_CR), regmap_reg_range(INT_CLEAR_R1, INT_CLEAR_R4), regmap_reg_range(INT_SET_MASK_R1, INT_SET_MASK_R4), diff --git a/include/linux/mfd/stpmic1.h b/include/linux/mfd/stpmic1.h index fa3f99f7e9a1..dc00bac24f5a 100644 --- a/include/linux/mfd/stpmic1.h +++ b/include/linux/mfd/stpmic1.h @@ -15,7 +15,7 @@ #define RREQ_STATE_SR 0x5 #define VERSION_SR 0x6 -#define SWOFF_PWRCTRL_CR 0x10 +#define MAIN_CR 0x10 #define PADS_PULL_CR 0x11 #define BUCKS_PD_CR 0x12 #define LDO14_PD_CR 0x13 @@ -148,14 +148,14 @@ #define LDO_BYPASS_MASK BIT(7) /* Main PMIC Control Register - * SWOFF_PWRCTRL_CR + * MAIN_CR * Address : 0x10 */ -#define ICC_EVENT_ENABLED BIT(4) +#define OCP_OFF_DBG BIT(4) #define PWRCTRL_POLARITY_HIGH BIT(3) -#define PWRCTRL_PIN_VALID BIT(2) -#define RESTART_REQUEST_ENABLED BIT(1) -#define SOFTWARE_SWITCH_OFF_ENABLED BIT(0) +#define PWRCTRL_ENABLE BIT(2) +#define RESTART_REQUEST_ENABLE BIT(1) +#define SOFTWARE_SWITCH_OFF BIT(0) /* Main PMIC PADS Control Register * PADS_PULL_CR From patchwork Tue May 16 13:22:23 2023 Content-Type: text/plain; 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This can be enabled by adding "st,pmic-poweroff" to device-tree. Signed-off-by: Sean Nyekjaer Reviewed-by: Lee Jones --- Changes since v1: - Removed superfluous function drivers/mfd/stpmic1.c | 23 +++++++++++++++++++++++ 1 file changed, 23 insertions(+) diff --git a/drivers/mfd/stpmic1.c b/drivers/mfd/stpmic1.c index 4c9b18d9dec8..5b82cd37d57a 100644 --- a/drivers/mfd/stpmic1.c +++ b/drivers/mfd/stpmic1.c @@ -7,6 +7,7 @@ #include #include #include +#include #include #include #include @@ -117,6 +118,16 @@ static const struct regmap_irq_chip stpmic1_regmap_irq_chip = { .num_irqs = ARRAY_SIZE(stpmic1_irqs), }; +static int stpmic1_power_off(struct sys_off_data *data) +{ + struct stpmic1 *ddata = data->cb_data; + + regmap_update_bits(ddata->regmap, MAIN_CR, + SOFTWARE_SWITCH_OFF, SOFTWARE_SWITCH_OFF); + + return NOTIFY_DONE; +} + static int stpmic1_probe(struct i2c_client *i2c) { struct stpmic1 *ddata; @@ -159,6 +170,18 @@ static int stpmic1_probe(struct i2c_client *i2c) return ret; } + if (of_property_read_bool(i2c->dev.of_node, "st,pmic-poweroff")) { + ret = devm_register_sys_off_handler(ddata->dev, + SYS_OFF_MODE_POWER_OFF, + SYS_OFF_PRIO_DEFAULT, + stpmic1_power_off, + ddata); + if (ret) { + dev_err(ddata->dev, "failed to register sys-off handler: %d\n", ret); + return ret; + } + } + return devm_of_platform_populate(dev); } From patchwork Tue May 16 13:22:24 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Sean Nyekjaer X-Patchwork-Id: 94711 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a59:b0ea:0:b0:3b6:4342:cba0 with SMTP id b10csp441143vqo; Tue, 16 May 2023 06:49:25 -0700 (PDT) X-Google-Smtp-Source: ACHHUZ7awT4r016GI0IvY6EeSLXUZ+ukjrljXJjVYexvdyJ/FcMB/KYGY9Pjw5wAntdGKw2DxH43 X-Received: by 2002:a05:6a20:a11e:b0:104:242a:9a78 with SMTP id q30-20020a056a20a11e00b00104242a9a78mr21893096pzk.2.1684244964970; Tue, 16 May 2023 06:49:24 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1684244964; cv=none; d=google.com; s=arc-20160816; b=W1lLQe6i328UMxwQgW8qpZPtSJtykxTRMwUS2bqN6WwOGv14Q21Mw+LB0B0tE/7CYf 9qngXsUMmz7KhzeIsoIHAjZ7NQygVgkYWdgwHBMLBDnmFHc8Hmmccrh9Q4ee0vUOqRDv Z3/NKSmcO61MQw5x99zSiyjAJGL5gxrC/YGLpa3rFtD80vEwVpXJHvsjXisLG0ZybH1Z dsuUp0DF1lg8Y+SzSt13Qbgs6Zm3IgfAF5TmWFtMe5Ue6XqDd2CnP7CFQ4+oliEAKuub J2wVs3KNvdJ2wEFzexY2JbXsI6rRPSie2TusRike/8N+EbS7RbnUn/bWfJhAicu3r6Yp mJqQ== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from :dkim-signature; bh=Tc4N6cacmpKk5k4on8VEF7pB3edhIp5X8MzTz70xu0Q=; b=AuVT0odbZ0XoExPJlOPbvma0/e/fFqMPJvoD+xOld4aCkAO88N/FeES4Azdm8UMeD4 aWytMOdAMuc6MBBHoEaxlc+RHkau77WbN8UBFUbKuW0FJsdWKX0LmaeBv/hMy6ZjmWe6 gpzPtIPwQqtFGmxjXqscdifJhZ6XvjmCYqo/ZtqC/z2SJjE8uGP6VonjnwfCXHWpFpXm bN/qoUQoJVqxz4+WIyRbMsG8PEqdEGDlvR5o6xdv0SBsm9AqdhSEOZ73RYJ2wMbYouNn JVJocqpegHTKrZMxYC3/UwF8tL3pABv9OGAlBu8Oc2Ei20fWBaF+sxvSXQ2ylsLb27w5 x0Lw== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@geanix.com header.s=default2211 header.b=V4ydLiGb; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=geanix.com Received: from out1.vger.email (out1.vger.email. [2620:137:e000::1:20]) by mx.google.com with ESMTP id x26-20020aa7941a000000b00643652c8879si19848398pfo.326.2023.05.16.06.49.10; Tue, 16 May 2023 06:49:24 -0700 (PDT) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) client-ip=2620:137:e000::1:20; Authentication-Results: mx.google.com; dkim=pass header.i=@geanix.com header.s=default2211 header.b=V4ydLiGb; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=geanix.com Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S233648AbjEPNiJ (ORCPT + 99 others); Tue, 16 May 2023 09:38:09 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:49540 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S233298AbjEPNiG (ORCPT ); Tue, 16 May 2023 09:38:06 -0400 Received: from www530.your-server.de (www530.your-server.de [188.40.30.78]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id F1086CA; Tue, 16 May 2023 06:38:04 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=geanix.com; s=default2211; h=Content-Transfer-Encoding:MIME-Version:References: In-Reply-To:Message-Id:Date:Subject:Cc:To:From:Sender:Reply-To:Content-Type: Content-ID:Content-Description:Resent-Date:Resent-From:Resent-Sender: Resent-To:Resent-Cc:Resent-Message-ID; bh=Tc4N6cacmpKk5k4on8VEF7pB3edhIp5X8MzTz70xu0Q=; b=V4ydLiGbTg7AztiSATz1zSo8dd DlIqofKsUzJRdOOOpdJkrzr2lEM6WLJUl85oHIz7IEhdy0L+1m3enmVBD8rqHhx7IMz/0rPeDb4IS uz4zS3Q3eaVS8qxMrJPKO0CtQdJzn3GyeAswiDYe28gMofn0hyBOvKM79cwYKmDTQt8ChzlHd5/lG hVzYTnuPZtlfEEybVZDjanyl9Y4fVsvDdgjvQNEeg9O3DMjclBjVYYYylhCE1ppgrYwU/w99xYO77 jJsgQTdV0hPKWRkgF3vMNiDOkyHqfhTBB0VllVO6OAHqiOuV/w1aPTyc+oJtYj4vr9kkqKFcniFk3 mPWZNKmg==; Received: from sslproxy03.your-server.de ([88.198.220.132]) by www530.your-server.de with esmtpsa (TLS1.3) tls TLS_AES_256_GCM_SHA384 (Exim 4.94.2) (envelope-from ) id 1pyudb-000AJG-94; Tue, 16 May 2023 15:22:47 +0200 Received: from [185.17.218.86] (helo=zen..) by sslproxy03.your-server.de with esmtpsa (TLSv1.3:TLS_AES_256_GCM_SHA384:256) (Exim 4.92) (envelope-from ) id 1pyuda-000NS5-RA; Tue, 16 May 2023 15:22:46 +0200 From: Sean Nyekjaer To: robh+dt@kernel.org, Lee Jones , Krzysztof Kozlowski , Conor Dooley , pascal Paillet Cc: devicetree@vger.kernel.org, Sean Nyekjaer , linux-kernel@vger.kernel.org Subject: [PATCH v2 3/3] dt-bindings: mfd: stpmic1: add fsl,pmic-poweroff property Date: Tue, 16 May 2023 15:22:24 +0200 Message-Id: <20230516132225.3012541-3-sean@geanix.com> X-Mailer: git-send-email 2.40.0 In-Reply-To: <20230516132225.3012541-1-sean@geanix.com> References: <20230516132225.3012541-1-sean@geanix.com> MIME-Version: 1.0 X-Authenticated-Sender: sean@geanix.com X-Virus-Scanned: Clear (ClamAV 0.103.8/26908/Tue May 16 09:24:20 2023) X-Spam-Status: No, score=-2.1 required=5.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,SPF_HELO_NONE,SPF_PASS, T_SCC_BODY_TEXT_LINE,URIBL_BLOCKED autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-getmail-retrieved-from-mailbox: =?utf-8?q?INBOX?= X-GMAIL-THRID: =?utf-8?q?1766058848545318138?= X-GMAIL-MSGID: =?utf-8?q?1766058848545318138?= Document the new optional "fsl,pmic-poweroff" property. Signed-off-by: Sean Nyekjaer --- Documentation/devicetree/bindings/mfd/st,stpmic1.yaml | 8 ++++++++ 1 file changed, 8 insertions(+) diff --git a/Documentation/devicetree/bindings/mfd/st,stpmic1.yaml b/Documentation/devicetree/bindings/mfd/st,stpmic1.yaml index 9573e4af949e..5183a7c660d2 100644 --- a/Documentation/devicetree/bindings/mfd/st,stpmic1.yaml +++ b/Documentation/devicetree/bindings/mfd/st,stpmic1.yaml @@ -26,6 +26,14 @@ properties: interrupt-controller: true + st,pmic-poweroff: + $ref: /schemas/types.yaml#/definitions/flag + description: | + if present, configure the PMIC to shutdown all power rails when + power off sequence have finished. + Use this option if the SoC should be powered off by external power management + IC (PMIC). + onkey: type: object