From patchwork Mon May 15 20:13:50 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Doug Anderson X-Patchwork-Id: 94326 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a59:b0ea:0:b0:3b6:4342:cba0 with SMTP id b10csp7171633vqo; Mon, 15 May 2023 13:24:07 -0700 (PDT) X-Google-Smtp-Source: ACHHUZ6bCsgeACWspDXfUvAv0PPIHS4k2CbAvaZxlwC42+uJzn/8KHwcD8mxvSY57EQOW8dSIPZe X-Received: by 2002:a17:902:b946:b0:1aa:f6f2:46b7 with SMTP id h6-20020a170902b94600b001aaf6f246b7mr33001516pls.34.1684182247009; Mon, 15 May 2023 13:24:07 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1684182246; cv=none; d=google.com; s=arc-20160816; b=uykzl5zPgnu0+RMBk75vy3K8/sqjIxZ1ve814286rdnnuOQWhhuE7kNKbctVwMZtWv gRaF/839RJ3wt4IHuZOtvrdo1Knoisek6nc9lz72HSwNAJINcIzwEFZvmfUz93r9DP0k cjaU7vD/vRr9kvZbi4sbiMETKBDp1ZZ9+okga4ipiOtWFEiPG6IY6HxI4DmO7fOQ7QL6 bSMX/c9ydygBLumJGaf7T7y8GYcG/zTBCKc2QgxVXmvbj25xsL0fQ9HJgc01eLSsr7MP YVw2IP7wcj8srBeRCPYiiy4KlkwX7dDWVgdm6XvfomkfhrdcOfW2zb56+hLYT+uNBVSc jv/g== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from :dkim-signature; bh=q+xclHRJbfTaOco3ogcoYlZx1POsGrbKOC60b7YSguU=; b=q9iiSeeje4ACEncWMY1i2uJoSFtotOzwP2YyRsH3OqWz22j+bRsNpCTycXj90X7/Fi W3HDBjag6lFQNBpoRdo0yoegkCVZLlICLwhRQAB4aBGHTaAxyy7OmmB7lJMjdCip+ZIy 0kY3VUpS2R+2LY1iL/P2IMcCeF6cj4atXnjAsrITkjD0lm2Pv9uXVH2a1JP28Yjd7cW3 QrbbQHjxf2uV4ggiDQeLnZdO5tcaqwaiTFo0/VbtLZhifTAJc9UHPNfy3EbulVyg42bD fiq9KbYoZJJEO8llnCt8CyLu4tQ61tB4+/kSUfV7EOCNOl7DozqlX7YH/VFCPMjNLdGZ 6HrQ== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@chromium.org header.s=google header.b=g36wlx4d; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=chromium.org Received: from out1.vger.email (out1.vger.email. [2620:137:e000::1:20]) by mx.google.com with ESMTP id x5-20020a170902ec8500b001ab19e023a1si9013599plg.375.2023.05.15.13.23.50; Mon, 15 May 2023 13:24:06 -0700 (PDT) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) client-ip=2620:137:e000::1:20; Authentication-Results: mx.google.com; dkim=pass header.i=@chromium.org header.s=google header.b=g36wlx4d; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=chromium.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S245268AbjEOUQP (ORCPT + 99 others); Mon, 15 May 2023 16:16:15 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:36666 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S243149AbjEOUQJ (ORCPT ); Mon, 15 May 2023 16:16:09 -0400 Received: from mail-pf1-x42e.google.com (mail-pf1-x42e.google.com [IPv6:2607:f8b0:4864:20::42e]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id B6FD1C1 for ; Mon, 15 May 2023 13:16:08 -0700 (PDT) Received: by mail-pf1-x42e.google.com with SMTP id d2e1a72fcca58-6436e075166so9907734b3a.0 for ; Mon, 15 May 2023 13:16:08 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=chromium.org; s=google; t=1684181768; x=1686773768; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=q+xclHRJbfTaOco3ogcoYlZx1POsGrbKOC60b7YSguU=; b=g36wlx4dAT/5M/at1hKyNtZto26zWfKQwhNbIbrF+H00O03nyEY6BiCUtUDqrcdMbq e7fz+6QIIokAKhGcCOG2WqzT4Luc93tGNTu737dq9vjufkb3y1jzvHWHWkE0QjekmU7p lApebxoBnaqlPNm5AlNHXeaQIEHLeKk+EJKHo= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20221208; t=1684181768; x=1686773768; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=q+xclHRJbfTaOco3ogcoYlZx1POsGrbKOC60b7YSguU=; b=Xzp/Q4KatNEK/9Ni7WvcJXzCCVfyuQe4wGBBmEgzm1pJxW0CeiwYuJsnWWLLa3WiwA Cxyn35m9mGNdezAJfoXvq4vjHF7vfmPDjZNpVna276GPR+oIRBzSYkvmM1/4QVx7tLPj aW5mjydkw2gbJGEs+gtUjoz3hMp0EybvVFcUfhzrcEXfsJXyKJxoKWIoFuIV/a7iZhFj E25pVXMJJf7UI9TXtKk04aNmU+BTBMrYYt7ZR437tjYCyisx/dFozRZ2c50espj1koYu FsUrtaWaqX4B6UI2lhbhr+buqXsPjOwekoUeJHcfjEVpiHXXY6Omycz7wNetdvcDm2ab 2sAg== X-Gm-Message-State: AC+VfDzF/65iHkKpiOVEbJ02LliSrayk3IkPrlKiefJpR6bW+O+5RnXr KDv4eXX1P672DFQZXlx8nsUhrg== X-Received: by 2002:a05:6a00:10d3:b0:63b:5496:7afa with SMTP id d19-20020a056a0010d300b0063b54967afamr41742520pfu.11.1684181768187; Mon, 15 May 2023 13:16:08 -0700 (PDT) Received: from tictac2.mtv.corp.google.com ([2620:15c:9d:2:9f33:9d98:277a:d4cd]) by smtp.gmail.com with ESMTPSA id a19-20020a62bd13000000b0063f0c9eadc7sm7981411pff.200.2023.05.15.13.16.06 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 15 May 2023 13:16:07 -0700 (PDT) From: Douglas Anderson To: Marc Zyngier , Thomas Gleixner , Rob Herring , Krzysztof Kozlowski , Matthias Brugger Cc: devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, Allen-KH Cheng , linux-mediatek@lists.infradead.org, Eddie Huang , Hsin-Hsiung Wang , AngeloGioacchino Del Regno , wenst@chromium.org, yidilin@chromium.org, Tinghan Shen , jwerner@chromium.org, Weiyi Lu , Ben Ho , Seiya Wang , Douglas Anderson , Conor Dooley , linux-kernel@vger.kernel.org Subject: [PATCH v2 1/5] dt-bindings: interrupt-controller: arm,gic-v3: Add quirk for Mediatek SoCs w/ broken FW Date: Mon, 15 May 2023 13:13:50 -0700 Message-ID: <20230515131353.v2.1.Iabe67a827e206496efec6beb5616d5a3b99c1e65@changeid> X-Mailer: git-send-email 2.40.1.606.ga4b1b128d6-goog In-Reply-To: <20230515131353.v2.cover@dianders> References: <20230515131353.v2.cover@dianders> MIME-Version: 1.0 X-Spam-Status: No, score=-2.1 required=5.0 tests=BAYES_00,DKIMWL_WL_HIGH, DKIM_SIGNED,DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,RCVD_IN_DNSWL_NONE, SPF_HELO_NONE,SPF_PASS,T_SCC_BODY_TEXT_LINE autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-getmail-retrieved-from-mailbox: =?utf-8?q?INBOX?= X-GMAIL-THRID: =?utf-8?q?1765993083988461638?= X-GMAIL-MSGID: =?utf-8?q?1765993083988461638?= When trying to turn on the "pseudo NMI" kernel feature in Linux, it was discovered that all Mediatek-based Chromebooks that ever shipped (at least ones with GICv3) had a firmware bug where they wouldn't save certain GIC "GICR" registers properly. If a processor ever entered a suspend/idle mode where the GICR registers lost state then they'd be reset to their default state. As a result of the bug, if you try to enable "pseudo NMIs" on the affected devices then certain interrupts will unexpectedly get promoted to be "pseudo NMIs" and cause crashes / freezes / general mayhem. ChromeOS is looking to start turning on "pseudo NMIs" in production to make crash reports more actionable. To do so, we will release firmware updates for at least some of the affected Mediatek Chromebooks. However, even when we update the firmware of a Chromebook it's always possible that a user will end up booting with old firmware. We need to be able to detect when we're running with firmware that will crash and burn if pseudo NMIs are enabled. The current plan is: * Update the device trees of all affected Chromebooks to include the 'mediatek,broken-save-restore-fw' property. The kernel can use this to know not to enable certain features like "pseudo NMI". NOTE: device trees for Chromebooks are never baked into the firmware but are bundled with the kernel. A kernel will never be configured to use "pseudo NMIs" and be bundled with an old device tree. * When we get a fixed firmware for one of these Chromebooks, it will patch the device tree to remove this property. For some details, you can also see the public bug Reviewed-by: Julius Werner Signed-off-by: Douglas Anderson Reviewed-by: AngeloGioacchino Del Regno --- Changes in v2: - "when CPUs are powered" => "when the GIC redistributors are..." - mediatek,gicr-save-quirk => mediatek,broken-save-restore-fw .../bindings/interrupt-controller/arm,gic-v3.yaml | 6 ++++++ 1 file changed, 6 insertions(+) diff --git a/Documentation/devicetree/bindings/interrupt-controller/arm,gic-v3.yaml b/Documentation/devicetree/bindings/interrupt-controller/arm,gic-v3.yaml index 92117261e1e1..39e64c7f6360 100644 --- a/Documentation/devicetree/bindings/interrupt-controller/arm,gic-v3.yaml +++ b/Documentation/devicetree/bindings/interrupt-controller/arm,gic-v3.yaml @@ -166,6 +166,12 @@ properties: resets: maxItems: 1 + mediatek,broken-save-restore-fw: + type: boolean + description: + Asserts that the firmware on this device has issues saving and restoring + GICR registers when the GIC redistributors are powered off. + dependencies: mbi-ranges: [ msi-controller ] msi-controller: [ mbi-ranges ] From patchwork Mon May 15 20:13:51 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Doug Anderson X-Patchwork-Id: 94329 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a59:b0ea:0:b0:3b6:4342:cba0 with SMTP id b10csp7175428vqo; Mon, 15 May 2023 13:31:41 -0700 (PDT) X-Google-Smtp-Source: ACHHUZ4OcNPGzhV5M3skHbAYpS3OMoAukVUONKX8kT5zGy3xOu9I8jUJ8LDxP9nkq6YLxyMITFiM X-Received: by 2002:a17:902:b78a:b0:1aa:d9c5:9cd5 with SMTP id e10-20020a170902b78a00b001aad9c59cd5mr33820332pls.11.1684182701015; Mon, 15 May 2023 13:31:41 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1684182701; cv=none; d=google.com; s=arc-20160816; b=Kw7QvpKogGqO/WNcr+saZcGIrqkZTrJVckVj8F7ELFfom/hf9LXKA6ttTfLERdHC+E mle+FkzD7nU2wRIAVMxDQeUF45J5CUg1u4UCMBw0CxdKKl4C7cd3n/N/bAPx+IoNS7j1 tpRpXJkPKeFOMIswUiYUahfbBd/RL22Yv1BHfVFdn1HDv6cvQHt8fx7OrXGT8821IbP0 gCGpWVYclGhN1O8w8J1E5VqNhl/UVWEC00wn3ZTiPXh9CG5wx6EA4KuxEvC97msRMqTg /M5bVcsaxz7dvziyUZcJjBMxc4YjIPa3J6ah966m89nh1NJIhL/+ecf+Js/L099rd1JE k7sw== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from :dkim-signature; bh=M3ZxCx5hi3hTfImTlWZJFg7LTzfHGowr1aBuZvBj8Ek=; b=0whYGdS68XjY3sESzdR/BcGmIkIbQWYKsaRBHLO/4VPTYzYOEuVqpeqwiqmhd3BV5g biaEmpQUyQksBVyukbcAk9wXlTmi+ze44xVC1HMyWzvQKuw2u5nHgK5MCnxBugsVqKGD dFCnlyyIRzaGjM3ur1qH2kkCkWrZo+dy3i5U4csm+by0QZKT3JHlxwOEBqI2ElEyrrKk dvgUH+4ZaHx+C0LkUoWkhPY+SQiNx6+PSpWQQiUbXBJE1LY7z29NlRCm+H4hGEOrsMkM gzbASiSTdkbFtfX3PcIsOhYDzY1KKgglIsL1bjolpw/Fn8L776XWfRvmAWRxJfJRz5w8 uSJg== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@chromium.org header.s=google header.b=Hbdt9iI0; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=chromium.org Received: from out1.vger.email (out1.vger.email. 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Newer Chromebooks should fix this issue and we may be able to do firmware updates for old Chromebooks. At the moment, the only known issue with these Chromebooks is that we can't enable "pseudo NMIs" since the priority register can be lost. Enabling "pseudo NMIs" on Chromebooks with the problematic firmware causes crashes and freezes. Let's detect devices with this problem and then disable "pseudo NMIs" on them. We'll detect the problem by looking for the presence of the "mediatek,broken-save-restore-fw" property in the GIC device tree node. Any devices with fixed firmware will not have this property. Our detection plan works because we never bake a Chromebook's device tree into firmware. Instead, device trees are always bundled with the kernel. We'll update the device trees of all affected Chromebooks and then we'll never enable "pseudo NMI" on a kernel that is bundled with old device trees. When a firmware update is shipped that fixes this issue it will know to patch the device tree to remove the property. In order to make this work, the quick detection mechanism of the GICv3 code is extended to be able to look for properties in addition to looking at "compatible". Reviewed-by: Julius Werner Signed-off-by: Douglas Anderson Reviewed-by: AngeloGioacchino Del Regno Tested-by: Geert Uytterhoeven Reviewed-by: Douglas Anderson --- Changes in v2: - mediatek,gicr-save-quirk => mediatek,broken-save-restore-fw drivers/irqchip/irq-gic-common.c | 8 ++++++-- drivers/irqchip/irq-gic-common.h | 1 + drivers/irqchip/irq-gic-v3.c | 20 ++++++++++++++++++++ 3 files changed, 27 insertions(+), 2 deletions(-) diff --git a/drivers/irqchip/irq-gic-common.c b/drivers/irqchip/irq-gic-common.c index a610821c8ff2..de47b51cdadb 100644 --- a/drivers/irqchip/irq-gic-common.c +++ b/drivers/irqchip/irq-gic-common.c @@ -16,7 +16,11 @@ void gic_enable_of_quirks(const struct device_node *np, const struct gic_quirk *quirks, void *data) { for (; quirks->desc; quirks++) { - if (!of_device_is_compatible(np, quirks->compatible)) + if (quirks->compatible && + !of_device_is_compatible(np, quirks->compatible)) + continue; + if (quirks->property && + !of_property_read_bool(np, quirks->property)) continue; if (quirks->init(data)) pr_info("GIC: enabling workaround for %s\n", @@ -28,7 +32,7 @@ void gic_enable_quirks(u32 iidr, const struct gic_quirk *quirks, void *data) { for (; quirks->desc; quirks++) { - if (quirks->compatible) + if (quirks->compatible || quirks->property) continue; if (quirks->iidr != (quirks->mask & iidr)) continue; diff --git a/drivers/irqchip/irq-gic-common.h b/drivers/irqchip/irq-gic-common.h index 27e3d4ed4f32..3db4592cda1c 100644 --- a/drivers/irqchip/irq-gic-common.h +++ b/drivers/irqchip/irq-gic-common.h @@ -13,6 +13,7 @@ struct gic_quirk { const char *desc; const char *compatible; + const char *property; bool (*init)(void *data); u32 iidr; u32 mask; diff --git a/drivers/irqchip/irq-gic-v3.c b/drivers/irqchip/irq-gic-v3.c index 6fcee221f201..a605aa79435a 100644 --- a/drivers/irqchip/irq-gic-v3.c +++ b/drivers/irqchip/irq-gic-v3.c @@ -39,6 +39,7 @@ #define FLAGS_WORKAROUND_GICR_WAKER_MSM8996 (1ULL << 0) #define FLAGS_WORKAROUND_CAVIUM_ERRATUM_38539 (1ULL << 1) +#define FLAGS_WORKAROUND_MTK_GICR_SAVE (1ULL << 2) #define GIC_IRQ_TYPE_PARTITION (GIC_IRQ_TYPE_LPI + 1) @@ -1720,6 +1721,15 @@ static bool gic_enable_quirk_msm8996(void *data) return true; } +static bool gic_enable_quirk_mtk_gicr(void *data) +{ + struct gic_chip_data *d = data; + + d->flags |= FLAGS_WORKAROUND_MTK_GICR_SAVE; + + return true; +} + static bool gic_enable_quirk_cavium_38539(void *data) { struct gic_chip_data *d = data; @@ -1792,6 +1802,11 @@ static const struct gic_quirk gic_quirks[] = { .compatible = "qcom,msm8996-gic-v3", .init = gic_enable_quirk_msm8996, }, + { + .desc = "GICv3: Mediatek Chromebook GICR save problem", + .property = "mediatek,broken-save-restore-fw", + .init = gic_enable_quirk_mtk_gicr, + }, { .desc = "GICv3: HIP06 erratum 161010803", .iidr = 0x0204043b, @@ -1834,6 +1849,11 @@ static void gic_enable_nmi_support(void) if (!gic_prio_masking_enabled()) return; + if (gic_data.flags & FLAGS_WORKAROUND_MTK_GICR_SAVE) { + pr_warn("Skipping NMI enable due to firmware issues\n"); + return; + } + ppi_nmi_refs = kcalloc(gic_data.ppi_nr, sizeof(*ppi_nmi_refs), GFP_KERNEL); if (!ppi_nmi_refs) return; From patchwork Mon May 15 20:13:52 2023 Content-Type: text/plain; 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Add the quirk property. Fixes: cd894e274b74 ("arm64: dts: mt8183: Add krane-sku176 board") Reviewed-by: Julius Werner Signed-off-by: Douglas Anderson Reviewed-by: AngeloGioacchino Del Regno --- Changes in v2: - Changed "Fixes" tag. - Moved from mt8183.dtsi to mt8183-kukui.dtsi - mediatek,gicr-save-quirk => mediatek,broken-save-restore-fw arch/arm64/boot/dts/mediatek/mt8183-kukui.dtsi | 4 ++++ 1 file changed, 4 insertions(+) diff --git a/arch/arm64/boot/dts/mediatek/mt8183-kukui.dtsi b/arch/arm64/boot/dts/mediatek/mt8183-kukui.dtsi index 63952c1251df..8892b2f64a0f 100644 --- a/arch/arm64/boot/dts/mediatek/mt8183-kukui.dtsi +++ b/arch/arm64/boot/dts/mediatek/mt8183-kukui.dtsi @@ -292,6 +292,10 @@ dsi_out: endpoint { }; }; +&gic { + mediatek,broken-save-restore-fw; +}; + &gpu { mali-supply = <&mt6358_vgpu_reg>; }; From patchwork Mon May 15 20:13:53 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Doug Anderson X-Patchwork-Id: 94332 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a59:b0ea:0:b0:3b6:4342:cba0 with SMTP id b10csp7181261vqo; Mon, 15 May 2023 13:43:27 -0700 (PDT) X-Google-Smtp-Source: ACHHUZ6HxcdRUEGOtzK6YJSJ3MOK3/ppCC/vikilD+HbWMOvodcwq8wxp3p+HVNRV+DbsB8bna9q X-Received: by 2002:a17:902:aa03:b0:1aa:f78d:97b7 with SMTP id be3-20020a170902aa0300b001aaf78d97b7mr34926075plb.46.1684183407403; Mon, 15 May 2023 13:43:27 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1684183407; cv=none; d=google.com; s=arc-20160816; b=QQSvX1lyeowmXN+cGxtDW3rtXcmoYs51KonB9c9T+/rOpBuBYXdpr0W6JRVYclFRsx WBQBFkwdvA4HWCmO9cniwCuLzpN8gT0sJGM+b38xy9saA6re60pki5phjWlrbtPKyd14 Otv7Rkhxfbx0WWmVypAxp1XTVkH8KFuBolvCH5oDCelWdtG72C6Kn/SUsA9oihjZmSPA BNuyhY1dNCWdYqycQs6VnmhWk4hQxML2pC15hN2Xd24+oKsozvbzdIgiE38VDRQYXOJ1 bLQdMpQfGgC0h4u+IP3uVkbr30g+SXGbx2+pVvXrJ0u/5Xx+n59AZZspoYTuQGmAoueb sePA== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from :dkim-signature; bh=bSFZLbNpPgEje16hneDjcdrQcGQsPzQHluB44E8FHjY=; b=gAhcAhimIFfskA9k817gPU618UdLJeSltNpasjRA+WxWEaI0F9ekKyzZ+PCuuVv7Yj XCB2Kfo98z8+Sw7Yxl3JW62Slei8RuHURmP/f/6/OTXoRHlStFJhVxWgFe9npvzA9xIF K4H0absiovebX1dxjgFNvSBUe7wwpv+t7pmA848Cqi0VJgnoDOJyT1XIfvVJIPor9LsM +s/o52vm7AnL8qlDEX5bnFTdi+XKcXyuZnIemFLXXCBGU0E7DeDvtjpxH8CBSQtD6yVA xwkTwH3c0gnUVy89suHsZemTQQ/rXHE1YtfHa4POXJChtfYfi+RO+XasGE6tBaqm0U0D JHBw== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@chromium.org header.s=google header.b=NzeeeyMk; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=chromium.org Received: from out1.vger.email (out1.vger.email. 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Add the quirk property. Fixes: 331fae2fc922 ("arm64: dts: mediatek: Introduce MT8192-based Asurada board family") Reviewed-by: Julius Werner Signed-off-by: Douglas Anderson Reviewed-by: AngeloGioacchino Del Regno --- Changes in v2: - Changed "Fixes" tag. - Moved from mt8192.dtsi to mt8192-asurada.dtsi - mediatek,gicr-save-quirk => mediatek,broken-save-restore-fw arch/arm64/boot/dts/mediatek/mt8192-asurada.dtsi | 4 ++++ 1 file changed, 4 insertions(+) diff --git a/arch/arm64/boot/dts/mediatek/mt8192-asurada.dtsi b/arch/arm64/boot/dts/mediatek/mt8192-asurada.dtsi index 5a440504d4f9..0e8b34117090 100644 --- a/arch/arm64/boot/dts/mediatek/mt8192-asurada.dtsi +++ b/arch/arm64/boot/dts/mediatek/mt8192-asurada.dtsi @@ -275,6 +275,10 @@ &dsi_out { remote-endpoint = <&anx7625_in>; }; +&gic { + mediatek,broken-save-restore-fw; +}; + &gpu { mali-supply = <&mt6315_7_vbuck1>; status = "okay"; From patchwork Mon May 15 20:13:54 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Doug Anderson X-Patchwork-Id: 94331 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a59:b0ea:0:b0:3b6:4342:cba0 with SMTP id b10csp7179539vqo; Mon, 15 May 2023 13:39:46 -0700 (PDT) X-Google-Smtp-Source: ACHHUZ7A0zOFaSBhbQvgivlplOXp/bUAN5xO9S57A3xdmiJYYoQKyAWGcXyjsqN5yDpiiwVPhrLG X-Received: by 2002:a05:6a20:1596:b0:105:95b2:a8e3 with SMTP id h22-20020a056a20159600b0010595b2a8e3mr7637801pzj.22.1684183186201; Mon, 15 May 2023 13:39:46 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1684183186; cv=none; d=google.com; s=arc-20160816; b=hIds8ujgsPD+4EBZL9LnY8uxXV2OlQosVZp6HWFhw3pKvJbyYC9LHcyjYnWDvazbQF zxvHVkoOZk7JroN9sTBGOIa/UQNzoEt57uK86aGYqhNQKml4S+1ABReX9BsaxodPEz+e EHj6aWbdYrQyaUsK9sdwc1IZ5igWvGAv+eJ6l86jDG5ehchK/QOyWftqReZ9FWRL5Txn iZP4DRB9m9QKX1hCTp29F1vyxVnMmZq9kbKGaidQ6NFVmasOpC1qRH8ERxvo6J1iKPBl 9rssBl8yqOCZEAJG/yMies4Jn111B0buymNpsV5slqk6DgJYvCmZZ9Nf05QTApSc9I1J 84zQ== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from :dkim-signature; bh=KM/irCXkCORVs1tf0J/YTFzQeu/14yX91bXMA72ZW5U=; b=LQpfrcnvH/KdP5U6tzkscFH61KyGW9ktlIEVRSlARjybEdQWaMd9LJG2pJBNT4Hg6H d1KttVoQ3Q2NuLrmiYGK/MJswHttuy0x/+P9z9JvC6TjrZr3al5UYWwW2T4izwwmTwUz YcttL8vF/f0Yi5MUwbe+7wEoBj61vq7W44iDIiZ1ieeJPb0tbmwj+NDExdgLnx1EyDah oWiCXd4WL9DbYjLo41MWqiI6KCYIkKqZy9l+o2XYv9Wbo6B9r2sdEMrpdnphgxm/xwLh Wd09RDB5aq/Ayu4dWZ0dQWkU+5T8M1ElmB7uhsIpbq8bpSvCkSpa/BRmcbIEiXpxx0aY kbTQ== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@chromium.org header.s=google header.b=K0+Zkz4G; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=chromium.org Received: from out1.vger.email (out1.vger.email. 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Add the quirk property. Fixes: 5eb2e303ec6b ("arm64: dts: mediatek: Introduce MT8195 Cherry platform's Tomato") Reviewed-by: Julius Werner Signed-off-by: Douglas Anderson Reviewed-by: AngeloGioacchino Del Regno --- Changes in v2: - Changed "Fixes" tag. - Moved from mt8195.dtsi to mt8195-cherry.dtsi - mediatek,gicr-save-quirk => mediatek,broken-save-restore-fw arch/arm64/boot/dts/mediatek/mt8195-cherry.dtsi | 4 ++++ 1 file changed, 4 insertions(+) diff --git a/arch/arm64/boot/dts/mediatek/mt8195-cherry.dtsi b/arch/arm64/boot/dts/mediatek/mt8195-cherry.dtsi index 8ac80a136c37..f2d0726546c7 100644 --- a/arch/arm64/boot/dts/mediatek/mt8195-cherry.dtsi +++ b/arch/arm64/boot/dts/mediatek/mt8195-cherry.dtsi @@ -255,6 +255,10 @@ dptx_out: endpoint { }; }; +&gic { + mediatek,broken-save-restore-fw; +}; + &gpu { status = "okay"; mali-supply = <&mt6315_7_vbuck1>;