From patchwork Thu May 11 22:05:35 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Doug Anderson X-Patchwork-Id: 92869 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a59:b0ea:0:b0:3b6:4342:cba0 with SMTP id b10csp4709599vqo; Thu, 11 May 2023 15:34:51 -0700 (PDT) X-Google-Smtp-Source: ACHHUZ6vtcqQAmdNZnA1vk7x48d1+Dt13p4AgCrNCiwfKiW+ds2CMwLew4+3502wAqzppG91KK+x X-Received: by 2002:a05:6a20:3c8a:b0:103:90ab:d79 with SMTP id b10-20020a056a203c8a00b0010390ab0d79mr7214383pzj.25.1683844491110; Thu, 11 May 2023 15:34:51 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1683844491; cv=none; d=google.com; s=arc-20160816; b=QSIBq1kcy2ofjAJhJ+ECi4bogxSpeUHZryMoTKaZNykbBy++U485D/k1Df7fv6anps 7MVgAIpvpiRqOZGuASPbp0abukV9r2QK2rhNBDrzhICHzYJxQE3ek7Aie2G/PItoBDI/ UPdHyh5SbEL/h+ffnaIBal37zTP/OUgn1epiN8CCDRISmYP8FTMuDPWZRyUDM0tBRA/z nBKW2xphrD6RL56kBQrr7Z6HW5EwHj/+srI2WDr87aRjsS+nOYQbuhrZTiOw3bvchKJR 0tjQlLoW5aR7yDOxWh3BRNkL8FYlrTHjEUGgQ6vti/+SI+c51qcSl3lco32u1QKHnMLl MGUw== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from :dkim-signature; bh=E8Q+tBaaYskzauPjWFnHayDJlvaj5LMUfZeaf2NrQbQ=; b=jTiBNFanECmii4920BieLAQk6TRZ6GWKwuT7OJxx7pRf+KwXUfF9zoZSTvSKG92p1R NQKV1nWhtfIfffDUNzIofb2xa9j3XLhs/imkckuzRXH187b9RRLez53rC+XgKL1def/G e/AbkzepxLnz9nOke+uHSsgrO0sHDSnqnoQwRs1UYpk/V4Jmd3IQ763tjsOGyrTBU4/P zABT1yipHU2t1gcy6Cmsn5hPhpyZdWig9W+6aAGWWrevJlDM5SB1I86chzGM0Ie63ckH TNlEjhy353mlsmKYi9gH0d+mq2HrNstxDMS7RwE72n8gBLtak3/ponfV8XZ91LhRr/bE dtVg== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@chromium.org header.s=google header.b=jO3XvKkw; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=chromium.org Received: from out1.vger.email (out1.vger.email. [2620:137:e000::1:20]) by mx.google.com with ESMTP id w12-20020a63934c000000b005186ed361f4si7362963pgm.315.2023.05.11.15.34.38; Thu, 11 May 2023 15:34:51 -0700 (PDT) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) client-ip=2620:137:e000::1:20; Authentication-Results: mx.google.com; dkim=pass header.i=@chromium.org header.s=google header.b=jO3XvKkw; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=chromium.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S238825AbjEKWHX (ORCPT + 99 others); Thu, 11 May 2023 18:07:23 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:56408 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S238815AbjEKWHV (ORCPT ); Thu, 11 May 2023 18:07:21 -0400 Received: from mail-pg1-x535.google.com (mail-pg1-x535.google.com [IPv6:2607:f8b0:4864:20::535]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 202C06A45 for ; Thu, 11 May 2023 15:07:20 -0700 (PDT) Received: by mail-pg1-x535.google.com with SMTP id 41be03b00d2f7-52c30fa5271so4785029a12.0 for ; Thu, 11 May 2023 15:07:20 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=chromium.org; s=google; t=1683842839; x=1686434839; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=E8Q+tBaaYskzauPjWFnHayDJlvaj5LMUfZeaf2NrQbQ=; b=jO3XvKkwtvxNz993+Li+17L6pa4w/TVRvEMY4tUBXUiXVgPBB5uE1U72Py0ADFowqw 4UhdzKHqnYW3oIJhRX6Ezvcu9lKjTsfbJHjTMphXNHjJgnIFfy0PwACd0pi08JOHNN5O k+3Cb/D+sfCroFVfwv7zboAl4BRPgefSneMLY= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20221208; t=1683842839; x=1686434839; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=E8Q+tBaaYskzauPjWFnHayDJlvaj5LMUfZeaf2NrQbQ=; b=WIYMCBoP3+nhJTzKqeo5cA2OoRx5mdsKMWQqqUWg2WbvFVWZD6TDaOYXLtcQH8JhOT QuD9pm1ipYnXlvq/vUIviVLpv139meIt3qoQMwLSubQ04TJHaCpHLww2j/rDueLvhnOj CCJyozvJ7dhWoIP1pZady+zUi9bj9AvPSzTyO/sxak6c+D/vWsCrgDim5D4uNBibnvVR EZlGJ2isAtEAp5hv/sj311ZikvRDtlTebNv69E3Yby/OoFWkpsl2p7eNS4DrGElx5off q4fhPHaSEN5rOPYBCFzzGMW55NFtHPJ0wS+rTEipyKKbCBPpbHJ2oYy22G4qbfsL+Hb3 td6A== X-Gm-Message-State: AC+VfDz4Pyn/4p9VvJ/GoVvXpexsJKdaHMr3sSV70q3fl9AR3rIRXHvD og359tBXXLffSHAI4Pn3Bqwd9w== X-Received: by 2002:a17:90b:234f:b0:250:2d63:7b79 with SMTP id ms15-20020a17090b234f00b002502d637b79mr23492520pjb.43.1683842839570; Thu, 11 May 2023 15:07:19 -0700 (PDT) Received: from tictac2.mtv.corp.google.com ([2620:15c:9d:2:b96a:d776:ee3:e572]) by smtp.gmail.com with ESMTPSA id h24-20020a17090a9c1800b00247735d1463sm17589457pjp.39.2023.05.11.15.07.17 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 11 May 2023 15:07:18 -0700 (PDT) From: Douglas Anderson To: Marc Zyngier , Thomas Gleixner , Rob Herring , Krzysztof Kozlowski , Matthias Brugger Cc: devicetree@vger.kernel.org, linux-mediatek@lists.infradead.org, wenst@chromium.org, Eddie Huang , Allen-KH Cheng , Ben Ho , Weiyi Lu , AngeloGioacchino Del Regno , linux-arm-kernel@lists.infradead.org, Tinghan Shen , jwerner@chromium.org, Hsin-Hsiung Wang , yidilin@chromium.org, Seiya Wang , Douglas Anderson , Conor Dooley , linux-kernel@vger.kernel.org Subject: [PATCH 1/6] dt-bindings: interrupt-controller: arm,gic-v3: Add quirk for Mediatek SoCs w/ broken FW Date: Thu, 11 May 2023 15:05:35 -0700 Message-ID: <20230511150539.1.Iabe67a827e206496efec6beb5616d5a3b99c1e65@changeid> X-Mailer: git-send-email 2.40.1.606.ga4b1b128d6-goog In-Reply-To: <20230511150539.6.Ia0b6ebbaa351e3cd67e201355b9ae67783c7d718@changeid> References: <20230511150539.6.Ia0b6ebbaa351e3cd67e201355b9ae67783c7d718@changeid> MIME-Version: 1.0 X-Spam-Status: No, score=-2.1 required=5.0 tests=BAYES_00,DKIMWL_WL_HIGH, DKIM_SIGNED,DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,RCVD_IN_DNSWL_NONE, SPF_HELO_NONE,SPF_PASS,T_SCC_BODY_TEXT_LINE autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-getmail-retrieved-from-mailbox: =?utf-8?q?INBOX?= X-GMAIL-THRID: =?utf-8?q?1765638920913601555?= X-GMAIL-MSGID: =?utf-8?q?1765638920913601555?= When trying to turn on the "pseudo NMI" kernel feature in Linux, it was discovered that all Mediatek-based Chromebooks that ever shipped (at least ones with GICv3) had a firmware bug where they wouldn't save certain GIC "GICR" registers properly. If a processor ever entered a suspend/idle mode where the GICR registers lost state then they'd be reset to their default state. As a result of the bug, if you try to enable "pseudo NMIs" on the affected devices then certain interrupts will unexpectedly get promoted to be "pseudo NMIs" and cause crashes / freezes / general mayhem. ChromeOS is looking to start turning on "pseudo NMIs" in production to make crash reports more actionable. To do so, we will release firmware updates for at least some of the affected Mediatek Chromebooks. However, even when we update the firmware of a Chromebook it's always possible that a user will end up booting with old firmware. We need to be able to detect when we're running with firmware that will crash and burn if pseudo NMIs are enabled. The current plan is: * Update the device trees of all affected Chromebooks to include the 'mediatek,gicr-save-quirk' property. The kernel can use this to know not to enable certain features like "pseudo NMI". NOTE: device trees for Chromebooks are never baked into the firmware but are bundled with the kernel. A kernel will never be configured to use "pseudo NMIs" and be bundled with an old device tree. * When we get a fixed firmware for one of these Chromebooks, it will patch the device tree to remove this property. For some details, you can also see the public bug Signed-off-by: Douglas Anderson Reviewed-by: Julius Werner --- .../bindings/interrupt-controller/arm,gic-v3.yaml | 6 ++++++ 1 file changed, 6 insertions(+) diff --git a/Documentation/devicetree/bindings/interrupt-controller/arm,gic-v3.yaml b/Documentation/devicetree/bindings/interrupt-controller/arm,gic-v3.yaml index 92117261e1e1..8c251caae537 100644 --- a/Documentation/devicetree/bindings/interrupt-controller/arm,gic-v3.yaml +++ b/Documentation/devicetree/bindings/interrupt-controller/arm,gic-v3.yaml @@ -166,6 +166,12 @@ properties: resets: maxItems: 1 + mediatek,gicr-save-quirk: + type: boolean + description: + Asserts that the firmware on this device has issues saving and restoring + GICR registers when CPUs are powered off. + dependencies: mbi-ranges: [ msi-controller ] msi-controller: [ mbi-ranges ] From patchwork Thu May 11 22:05:36 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Doug Anderson X-Patchwork-Id: 92862 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a59:b0ea:0:b0:3b6:4342:cba0 with SMTP id b10csp4697285vqo; Thu, 11 May 2023 15:08:15 -0700 (PDT) X-Google-Smtp-Source: ACHHUZ5SwLFH554bx235IYBC08WwqDwoKMxPtpX0/YQDLII4gNWq7HKVGE9RZ+uSGfUOeVE6YsuN X-Received: by 2002:a17:902:6944:b0:1ac:4163:317 with SMTP id k4-20020a170902694400b001ac41630317mr20936771plt.39.1683842895221; Thu, 11 May 2023 15:08:15 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1683842895; cv=none; d=google.com; s=arc-20160816; b=vsNBNBPkpRIg8cy2ck05SzeesxHgrADULB7gy0XbGga9I0f0bkCtYpVmnOy0uAQH4m prmdm5oYvckXvX83eApBpAThg+RF4HLFMvvBTXTbJPALV+GoXhlIey8b23faIlPw9Tx9 K+aEB+ifk+cb35Q2KPjUqoxBc1990EI3CYwlw3O9YjRDAiWceFA4iJZD3X4k6LXs+2nY vYEmINBZ+w9a3cXj7ujLySRZ7SHKazie0VAyGU9Kz82UVsdd0E/6gvZFteoV0Q5cZfPI J0lfm3XC80MqRJy1F01ZdPsq5g5bzpkLD4JYLbmdo4fKHpIWUijs9nJZZgvUydGoQ9Tb Ovfg== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from :dkim-signature; bh=7GXLLz1cb9WjUR21vBHXCkRjhHYZlPAU9fn/3rFZSY4=; b=x1sf8GM+uHEWAuYB85C/mt74k378xHx/WnEpkLEp7uYqeT9pgR40vdGRuOEbgtiGqk 3pqnPDqS3E8/09YZIFmAEW1HbU6GDckL5ygv51g7Sg4Fn2bN96loiV879ZEaWy2rteOE I+av5WaES3GA6fOGa4XEKmmRJhTrh1qLQXKYGTch/gHvzrvZzBaNOPdLo6eV96JTSiem fnjkEYRm/dTwshrnndxl8b0nNsXc+Fd+nnItYpMa6HVe0EnH42RCDqtXQz7LJY8w4Xsn 2dzdsnHNh1Sf5ZugHGoeoiQLDCPAHMpyLdSINsTM+ZGzOctXPr+bMhiW4tB6Q4UcJwrX leQQ== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@chromium.org header.s=google header.b=DExkZbfi; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=chromium.org Received: from out1.vger.email (out1.vger.email. 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Newer Chromebooks should fix this issue and we may be able to do firmware updates for old Chromebooks. At the moment, the only known issue with these Chromebooks is that we can't enable "pseudo NMIs" since the priority register can be lost. Enabling "pseudo NMIs" on Chromebooks with the problematic firmware causes crashes and freezes. Let's detect devices with this problem and then disable "pseudo NMIs" on them. We'll detect the problem by looking for the presence of the "mediatek,gicr-save-quirk" property in the GIC device tree node. Any devices with fixed firmware will not have this property. Our detection plan works because we never bake a Chromebook's device tree into firmware. Instead, device trees are always bundled with the kernel. We'll update the device trees of all affected Chromebooks and then we'll never enable "pseudo NMI" on a kernel that is bundled with old device trees. When a firmware update is shipped that fixes this issue it will know to patch the device tree to remove the property. In order to make this work, the quick detection mechanism of the GICv3 code is extended to be able to look for properties in addition to looking at "compatible". Signed-off-by: Douglas Anderson Reviewed-by: Julius Werner --- drivers/irqchip/irq-gic-common.c | 8 ++++++-- drivers/irqchip/irq-gic-common.h | 1 + drivers/irqchip/irq-gic-v3.c | 20 ++++++++++++++++++++ 3 files changed, 27 insertions(+), 2 deletions(-) diff --git a/drivers/irqchip/irq-gic-common.c b/drivers/irqchip/irq-gic-common.c index a610821c8ff2..de47b51cdadb 100644 --- a/drivers/irqchip/irq-gic-common.c +++ b/drivers/irqchip/irq-gic-common.c @@ -16,7 +16,11 @@ void gic_enable_of_quirks(const struct device_node *np, const struct gic_quirk *quirks, void *data) { for (; quirks->desc; quirks++) { - if (!of_device_is_compatible(np, quirks->compatible)) + if (quirks->compatible && + !of_device_is_compatible(np, quirks->compatible)) + continue; + if (quirks->property && + !of_property_read_bool(np, quirks->property)) continue; if (quirks->init(data)) pr_info("GIC: enabling workaround for %s\n", @@ -28,7 +32,7 @@ void gic_enable_quirks(u32 iidr, const struct gic_quirk *quirks, void *data) { for (; quirks->desc; quirks++) { - if (quirks->compatible) + if (quirks->compatible || quirks->property) continue; if (quirks->iidr != (quirks->mask & iidr)) continue; diff --git a/drivers/irqchip/irq-gic-common.h b/drivers/irqchip/irq-gic-common.h index 27e3d4ed4f32..3db4592cda1c 100644 --- a/drivers/irqchip/irq-gic-common.h +++ b/drivers/irqchip/irq-gic-common.h @@ -13,6 +13,7 @@ struct gic_quirk { const char *desc; const char *compatible; + const char *property; bool (*init)(void *data); u32 iidr; u32 mask; diff --git a/drivers/irqchip/irq-gic-v3.c b/drivers/irqchip/irq-gic-v3.c index 6fcee221f201..161cc8957e8b 100644 --- a/drivers/irqchip/irq-gic-v3.c +++ b/drivers/irqchip/irq-gic-v3.c @@ -39,6 +39,7 @@ #define FLAGS_WORKAROUND_GICR_WAKER_MSM8996 (1ULL << 0) #define FLAGS_WORKAROUND_CAVIUM_ERRATUM_38539 (1ULL << 1) +#define FLAGS_WORKAROUND_MTK_GICR_SAVE (1ULL << 2) #define GIC_IRQ_TYPE_PARTITION (GIC_IRQ_TYPE_LPI + 1) @@ -1720,6 +1721,15 @@ static bool gic_enable_quirk_msm8996(void *data) return true; } +static bool gic_enable_quirk_mtk_gicr(void *data) +{ + struct gic_chip_data *d = data; + + d->flags |= FLAGS_WORKAROUND_MTK_GICR_SAVE; + + return true; +} + static bool gic_enable_quirk_cavium_38539(void *data) { struct gic_chip_data *d = data; @@ -1792,6 +1802,11 @@ static const struct gic_quirk gic_quirks[] = { .compatible = "qcom,msm8996-gic-v3", .init = gic_enable_quirk_msm8996, }, + { + .desc = "GICv3: Mediatek Chromebook GICR save problem", + .property = "mediatek,gicr-save-quirk", + .init = gic_enable_quirk_mtk_gicr, + }, { .desc = "GICv3: HIP06 erratum 161010803", .iidr = 0x0204043b, @@ -1834,6 +1849,11 @@ static void gic_enable_nmi_support(void) if (!gic_prio_masking_enabled()) return; + if (gic_data.flags & FLAGS_WORKAROUND_MTK_GICR_SAVE) { + pr_warn("Skipping NMI enable due to firmware issues\n"); + return; + } + ppi_nmi_refs = kcalloc(gic_data.ppi_nr, sizeof(*ppi_nmi_refs), GFP_KERNEL); if (!ppi_nmi_refs) return; From patchwork Thu May 11 22:05:37 2023 Content-Type: text/plain; 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Add the quirk property. Fixes: e526c9bc11f8 ("arm64: dts: Add Mediatek SoC MT8183 and evaluation board dts and Makefile") Signed-off-by: Douglas Anderson Reviewed-by: Julius Werner --- arch/arm64/boot/dts/mediatek/mt8183.dtsi | 1 + 1 file changed, 1 insertion(+) diff --git a/arch/arm64/boot/dts/mediatek/mt8183.dtsi b/arch/arm64/boot/dts/mediatek/mt8183.dtsi index 5169779d01df..39545172fce5 100644 --- a/arch/arm64/boot/dts/mediatek/mt8183.dtsi +++ b/arch/arm64/boot/dts/mediatek/mt8183.dtsi @@ -709,6 +709,7 @@ gic: interrupt-controller@c000000 { <0 0x0c400000 0 0x2000>, /* GICC */ <0 0x0c410000 0 0x1000>, /* GICH */ <0 0x0c420000 0 0x2000>; /* GICV */ + mediatek,gicr-save-quirk; interrupts = ; ppi-partitions { From patchwork Thu May 11 22:05:38 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Doug Anderson X-Patchwork-Id: 92866 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a59:b0ea:0:b0:3b6:4342:cba0 with SMTP id b10csp4708020vqo; Thu, 11 May 2023 15:31:30 -0700 (PDT) X-Google-Smtp-Source: ACHHUZ6ZMOYCRURkPo0zlrgkRj8+ZLBgHQHf4UdYq3fMmKZbFE6dXCbFsjNB/1zYSSNo42iaJFOB X-Received: by 2002:a05:6a00:2e9b:b0:642:ffef:1d03 with SMTP id fd27-20020a056a002e9b00b00642ffef1d03mr34060514pfb.32.1683844290222; Thu, 11 May 2023 15:31:30 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1683844290; cv=none; d=google.com; s=arc-20160816; b=YQ/7w+KBZabbCtiSqM5pevUNjfvHaVyKunTHPNPGjshoNHq3jtD0aeTif801FweS55 AnI6qXfPYH+xBYNvC3QMH7Sk5sDiHT0aGrXvfwDUI3XphKWrLoH4ld/6QCe4tIJ+hsph tqdQkP2ZuQ6WPdqr1g1jPe8nz3vEXTE4qzWTVQbF4nsiH75k2WYKTpZoaeQ9X93llPCc FFZz9X+Aoq4sWVZZqbGf5psrobBbG9a9ptvOESZRsw8ZAmzlY9s1rc75928X2Tbe7d0d AA4LPZtneExa9EQHDxo9hw4+tkmrIZVNaJXnamCO/BVKy1S4m9EfcFbhFV+9HCNPQfJB t0Ew== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from :dkim-signature; bh=K+dvOm04w8PPu/rImCk8a3YHkXAbeV87AIPZhDPscPw=; b=hZXNUFJChvsXV+6U2/yExF8QRDpYJPZWC4UtT8QS6nlVOdsHiFgwvQNxqylNk5+Eab cf9nqMu/ZRee8HX3iaQnI709ni2VGxc1bWHz4vrxgAlIvIPzH8dO22FnLt159H57HxYb t6SdO1vP1JtHx0FuysRTkYwE1qcS8woaBhkxzvAtJzC1PpRH8FxSXmazWaNczW1HWzB9 rprSnEqxrPC3Yoc4HDOH5QRHG2SDDUjebuV19OQ2n4F0voaxGxyZKmCXJ4mQky44pCDl mH192ePchJCQIlt/OleX3M3ZGDaPgaSV7POZUD3Xzo8BY0W0iO50AXYanuxkgZXUTILA wHXA== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@chromium.org header.s=google header.b=hssIu15b; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=chromium.org Received: from out1.vger.email (out1.vger.email. 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Add the quirk property. Fixes: 2e78620b1350 ("arm64: dts: Add MediaTek MT8186 dts and evaluation board and Makefile") Signed-off-by: Douglas Anderson Reviewed-by: Julius Werner --- arch/arm64/boot/dts/mediatek/mt8186.dtsi | 1 + 1 file changed, 1 insertion(+) diff --git a/arch/arm64/boot/dts/mediatek/mt8186.dtsi b/arch/arm64/boot/dts/mediatek/mt8186.dtsi index 5e83d4e9efa4..09fbd8f9ea52 100644 --- a/arch/arm64/boot/dts/mediatek/mt8186.dtsi +++ b/arch/arm64/boot/dts/mediatek/mt8186.dtsi @@ -336,6 +336,7 @@ gic: interrupt-controller@c000000 { reg = <0 0x0c000000 0 0x40000>, <0 0x0c040000 0 0x200000>; interrupts = ; + mediatek,gicr-save-quirk; ppi-partitions { ppi_cluster0: interrupt-partition-0 { From patchwork Thu May 11 22:05:39 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Doug Anderson X-Patchwork-Id: 92863 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a59:b0ea:0:b0:3b6:4342:cba0 with SMTP id b10csp4697602vqo; Thu, 11 May 2023 15:08:45 -0700 (PDT) X-Google-Smtp-Source: ACHHUZ7Kb7DMyaT1HtrvLcHMqJo11jvsuIFvgvYTh7uboaQc+FfQtG/G/WO+ns7IVecGb5gbl7/r X-Received: by 2002:a17:903:22c7:b0:1a6:71b1:a0b9 with SMTP id y7-20020a17090322c700b001a671b1a0b9mr28233049plg.47.1683842925270; Thu, 11 May 2023 15:08:45 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1683842925; cv=none; d=google.com; s=arc-20160816; b=nOPW5oe9gR8hRzvplyVQqJ442tpGfU95gLDYRi/kQrAHyAT1dwlYoz/iE9/dOjrx2m 55td9DLnQhOUvjnM+jwwSNN0Bk7JpfM6pqqobpaDBwz0Qd1kJtcLxNCkkuNkFHL8mv7l cKW+GbU/NlglefbcZP/gvZ74NDrV8SjPVQ/3iJQy0J+sKvpEKKy6cy1QNtVygVwg5phN guwpSd1/b3hHEgf0T1MULv51ipnYxIGARQovHR71zFua7lb7gAfH8Wu8a7jDwcXp26wC zndQ0JroDcQ3+vzqKHQKQfkFLTdNBhdOzUgKnjycaUV6yYENWEVaRpQrly7sZLfU1fg7 c70g== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from :dkim-signature; bh=4oNdmLNDKUs/TKLR+gsT5NpmW/ws1iPV3pHW3NShG8U=; b=qBM4PcJR8/j6uiD5MiGrgks2ypmV74Bzh83SdILwSJIF28awQgeDewqXJgmRMMgwW1 bgpZjQhDk7hAU1AlJ0O4KCvPzRpEDfEBXolsRNgt4bYr9Zpq5b2hM7Dbiv2dBFBNtPFb Goc4Pwob3v1C2/5CIoCsiJ++eNKsn8JH33USctmpKZkSPWLMURHV4HA9hUVWSY1f5/G7 b3nsRDYC3XFHUOueC+adZOkgRJKqjJ0B1xO+I+H5D1PzaUQPEalog2T6xSzXvG+FJy3P a+/9pDyt+afMP+tbUvmsry+f2IRep+ypkxQxj6WCFjj3nyMoh0Yg8wfb04ru039uamvh G7oQ== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@chromium.org header.s=google header.b=FKICgaJf; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=chromium.org Received: from out1.vger.email (out1.vger.email. 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Add the quirk property. Fixes: 48489980e27e ("arm64: dts: Add Mediatek SoC MT8192 and evaluation board dts and Makefile") Signed-off-by: Douglas Anderson Reviewed-by: Julius Werner --- arch/arm64/boot/dts/mediatek/mt8192.dtsi | 1 + 1 file changed, 1 insertion(+) diff --git a/arch/arm64/boot/dts/mediatek/mt8192.dtsi b/arch/arm64/boot/dts/mediatek/mt8192.dtsi index 5c30caf74026..8931c59c69f4 100644 --- a/arch/arm64/boot/dts/mediatek/mt8192.dtsi +++ b/arch/arm64/boot/dts/mediatek/mt8192.dtsi @@ -412,6 +412,7 @@ gic: interrupt-controller@c000000 { reg = <0 0x0c000000 0 0x40000>, <0 0x0c040000 0 0x200000>; interrupts = ; + mediatek,gicr-save-quirk; ppi-partitions { ppi_cluster0: interrupt-partition-0 { From patchwork Thu May 11 22:05:40 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Doug Anderson X-Patchwork-Id: 92864 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a59:b0ea:0:b0:3b6:4342:cba0 with SMTP id b10csp4698693vqo; Thu, 11 May 2023 15:10:51 -0700 (PDT) X-Google-Smtp-Source: ACHHUZ6Reta4YiR9ozYb1Pf2CpRtlNuHcad7YlKE4NY03q8HRjITV+7TpuIznY8HdOH2Cz/pZmJG X-Received: by 2002:a17:90a:8283:b0:250:c4c1:882 with SMTP id g3-20020a17090a828300b00250c4c10882mr9429123pjn.30.1683843051605; Thu, 11 May 2023 15:10:51 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1683843051; cv=none; d=google.com; s=arc-20160816; b=g4QX+ahDbiiekWpb41ypM+CN3NZ5/5FfYXSOFTDzWpOiryZz0VXivznSKTvLfgSmyG ar0i+d/mRq5K3zQ46VQoGZm8HnoksYREj5xn3jKxy5em+pEzaGO/ncG4kF03g7TLarJw yhK+foAvESPXbJ2aRXUu/evJxXz9MZ3dznJFctIIRVrImoK7/Y+0pS0qzxm91E8nTvpT Y0PlzMXvo2D1vYa0rN24DcT+hA7oPwpZ02nUnPkA+5RaxRY8ypEYY5nnb/x5ZlhViECl ssoH6Spl2T0zphJgsXULtmMc/m+/6uhMj3jkkasZVAbHn9XS4rGGWxqxfilT3yn0OgO1 QQHA== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from :dkim-signature; bh=M9QSMFz65Ju7EmZBc7wzRidxFiF3tMihmY8MVBVsH1A=; b=cDlzmTwqS5ndbg165xLdbM5xtFuOClrntBJQ5IUILlbOzvOu9/As+2ssU8dnNpIxdd D583/cgs5gjmPTCHSqdz/CksXuQ6n4jboBgB15XAu/B+GN9B5trZP38rpDSC+GMCtDDA 432SE8D7Jw6LoV5zLJpomOTMK22smVlogHTLarIkwOb5qzjf8YsLmnubtXC1PSbqpdal l+5CTo0PyahZNwozqvY98DFuiIev9P4JPaycITEhgPBsORr/AI+tIEjBAI7YgQizcnvj hvzL193IEY/w/v2FI0cGo6QeC+YZq5YNH395rE0Mdgbi8X1TII8a5ySSkLa/Tbmd7jRU J1cA== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@chromium.org header.s=google header.b=abRhbKBI; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=chromium.org Received: from out1.vger.email (out1.vger.email. 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Add the quirk property. Fixes: 37f2582883be ("arm64: dts: Add mediatek SoC mt8195 and evaluation board") Signed-off-by: Douglas Anderson Reviewed-by: Julius Werner --- arch/arm64/boot/dts/mediatek/mt8195.dtsi | 1 + 1 file changed, 1 insertion(+) diff --git a/arch/arm64/boot/dts/mediatek/mt8195.dtsi b/arch/arm64/boot/dts/mediatek/mt8195.dtsi index a44aae4ab953..6df9ad8f658f 100644 --- a/arch/arm64/boot/dts/mediatek/mt8195.dtsi +++ b/arch/arm64/boot/dts/mediatek/mt8195.dtsi @@ -463,6 +463,7 @@ gic: interrupt-controller@c000000 { reg = <0 0x0c000000 0 0x40000>, <0 0x0c040000 0 0x200000>; interrupts = ; + mediatek,gicr-save-quirk; ppi-partitions { ppi_cluster0: interrupt-partition-0 {