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Any individual config can be identified by PHY_ID_MATCH_EXACT in the respective structure. Signed-off-by: Harini Katakam Reviewed-by: Andrew Lunn --- v3: Correct vendor ID v2: New patch drivers/net/phy/mscc/mscc.h | 1 + drivers/net/phy/mscc/mscc_main.c | 14 +------------- 2 files changed, 2 insertions(+), 13 deletions(-) diff --git a/drivers/net/phy/mscc/mscc.h b/drivers/net/phy/mscc/mscc.h index a50235fdf7d9..9acee8759105 100644 --- a/drivers/net/phy/mscc/mscc.h +++ b/drivers/net/phy/mscc/mscc.h @@ -290,6 +290,7 @@ enum rgmii_clock_delay { #define PHY_ID_VSC8575 0x000707d0 #define PHY_ID_VSC8582 0x000707b0 #define PHY_ID_VSC8584 0x000707c0 +#define PHY_VENDOR_MSCC 0x00070400 #define MSCC_VDDMAC_1500 1500 #define MSCC_VDDMAC_1800 1800 diff --git a/drivers/net/phy/mscc/mscc_main.c b/drivers/net/phy/mscc/mscc_main.c index 62bf99e45af1..91010524e03d 100644 --- a/drivers/net/phy/mscc/mscc_main.c +++ b/drivers/net/phy/mscc/mscc_main.c @@ -2656,19 +2656,7 @@ static struct phy_driver vsc85xx_driver[] = { module_phy_driver(vsc85xx_driver); static struct mdio_device_id __maybe_unused vsc85xx_tbl[] = { - { PHY_ID_VSC8504, 0xfffffff0, }, - { PHY_ID_VSC8514, 0xfffffff0, }, - { PHY_ID_VSC8530, 0xfffffff0, }, - { PHY_ID_VSC8531, 0xfffffff0, }, - { PHY_ID_VSC8540, 0xfffffff0, }, - { PHY_ID_VSC8541, 0xfffffff0, }, - { PHY_ID_VSC8552, 0xfffffff0, }, - { PHY_ID_VSC856X, 0xfffffff0, }, - { PHY_ID_VSC8572, 0xfffffff0, }, - { PHY_ID_VSC8574, 0xfffffff0, }, - { PHY_ID_VSC8575, 0xfffffff0, }, - { PHY_ID_VSC8582, 0xfffffff0, }, - { PHY_ID_VSC8584, 0xfffffff0, }, + { PHY_ID_MATCH_VENDOR(PHY_VENDOR_MSCC) }, { } }; From patchwork Thu May 11 12:08:07 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Harini Katakam X-Patchwork-Id: 92535 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a59:b0ea:0:b0:3b6:4342:cba0 with SMTP id b10csp4333868vqo; Thu, 11 May 2023 05:34:38 -0700 (PDT) X-Google-Smtp-Source: ACHHUZ6eYRpsUZjjzn9hy6PGLKtDJZ6/xsi00V6A+JZ1kUEkDl205kwUVavChy6sCeT9oYrfyTls X-Received: by 2002:a17:90a:a587:b0:250:1f6e:a84 with SMTP id b7-20020a17090aa58700b002501f6e0a84mr21822961pjq.23.1683808478539; Thu, 11 May 2023 05:34:38 -0700 (PDT) ARC-Seal: i=2; a=rsa-sha256; t=1683808478; cv=pass; d=google.com; s=arc-20160816; b=GWa81OPxFZl2st75JErBRc+pOvsNbB0UVEfvBQ4XmXNT4tyz0GRkwz4eieVY84EaWX PzZw3ZDp7XCCCDjMmm+hOwii4RpgSYJxnm7p0hTKCItMEr8s2K6ec3FvpME8o01LV83o mZnm67Wh0nyqyZKSYfRUlBm2Hmtqjw0nIHKbWablzHUwNZbS1FAeRCE2m+ZUIdXxhBUA QOX5Hr01cr7UHkDkcz2VTnN+vXYZpERdbTeiJmaR5onx7Z5grFXgdIH4Bbj30wpWWQnL OiSbXsImDIW6UO8TBr1HWiAO/AmkocQK1gpG2TlAURPZ3BsIYQvtLR3gEdjqJWGWvqbx WtiQ== ARC-Message-Signature: i=2; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:mime-version:references:in-reply-to:message-id :date:subject:cc:to:from:dkim-signature; bh=R578/ZAwyPw4Zbv8Rszn4UrKMKi8DO9LSCgUrzUNIAA=; b=LAE2yqtXFguJpVuh5V34oOuyO3LbwJsTQW8jx7ycgRJjbc/5dkr1Zmb5m+OBmWoLNo rJsD4jo+oRnbW3eo/9wazC6x7KSGdTu+2CF7BjkzD2HJ0JEBP4b8762ZAlCqQXC2lJ72 Kh7zt2nYxPnLrneOtvikSpLoca0UH1hIy0rER9tMH/EirtUHkqRrDXdT9jGySWFrNNCC NNx/31ho/HrniCC0hPaBaXEMMRs/Y232f7QbpvzjoZJq6CFxWj4w3BywyqKp64KRBayQ aM9WgABp9L89DnhlLp3mi/VTvyxJa2D8ggAKdd6tlIklQdDyNDiozz4iFqVJ6kYcHYMB LoQw== ARC-Authentication-Results: i=2; mx.google.com; dkim=pass header.i=@amd.com header.s=selector1 header.b=3li8acMB; arc=pass (i=1 spf=pass spfdomain=amd.com dmarc=pass fromdomain=amd.com); spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=QUARANTINE sp=QUARANTINE dis=NONE) header.from=amd.com Received: from out1.vger.email (out1.vger.email. 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X-OriginatorOrg: amd.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 11 May 2023 12:08:28.4458 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: a5efe008-b101-4362-e359-08db52186e48 X-MS-Exchange-CrossTenant-Id: 3dd8961f-e488-4e60-8e11-a82d994e183d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=3dd8961f-e488-4e60-8e11-a82d994e183d;Ip=[165.204.84.17];Helo=[SATLEXMB03.amd.com] X-MS-Exchange-CrossTenant-AuthSource: CO1NAM11FT049.eop-nam11.prod.protection.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: PH0PR12MB8798 X-Spam-Status: No, score=-1.1 required=5.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,FORGED_SPF_HELO, RCVD_IN_DNSWL_NONE,RCVD_IN_MSPIKE_H2,SPF_HELO_PASS,SPF_NONE, T_SCC_BODY_TEXT_LINE autolearn=no autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-getmail-retrieved-from-mailbox: =?utf-8?q?INBOX?= X-GMAIL-THRID: =?utf-8?q?1765601158922872768?= X-GMAIL-MSGID: =?utf-8?q?1765601158922872768?= Add support for optional rx/tx-internal-delay-ps from devicetree. - When rx/tx-internal-delay-ps is/are specified, these take priority - When either is absent, 1) use 2ns for respective settings if rgmii-id/rxid/txid is/are present 2) use 0.2ns for respective settings if mode is rgmii Signed-off-by: Harini Katakam --- v3 - Patch split: - Use rx/tx-internal-delay-ps with phy_get_internal_delay - Change RGMII delay selection precedence - Update commit description and subject everywhere to say RGMII delays instead of RGMII tuning. drivers/net/phy/mscc/mscc.h | 2 ++ drivers/net/phy/mscc/mscc_main.c | 35 +++++++++++++++++++++++++------- 2 files changed, 30 insertions(+), 7 deletions(-) diff --git a/drivers/net/phy/mscc/mscc.h b/drivers/net/phy/mscc/mscc.h index 9acee8759105..ab6c0b7c2136 100644 --- a/drivers/net/phy/mscc/mscc.h +++ b/drivers/net/phy/mscc/mscc.h @@ -374,6 +374,8 @@ struct vsc8531_private { * package. */ unsigned int base_addr; + u32 rx_delay; + u32 tx_delay; #if IS_ENABLED(CONFIG_MACSEC) /* MACsec fields: diff --git a/drivers/net/phy/mscc/mscc_main.c b/drivers/net/phy/mscc/mscc_main.c index 91010524e03d..9e856231e464 100644 --- a/drivers/net/phy/mscc/mscc_main.c +++ b/drivers/net/phy/mscc/mscc_main.c @@ -525,17 +525,14 @@ static int vsc85xx_rgmii_set_skews(struct phy_device *phydev, u32 rgmii_cntl, { u16 rgmii_rx_delay_pos = ffs(rgmii_rx_delay_mask) - 1; u16 rgmii_tx_delay_pos = ffs(rgmii_tx_delay_mask) - 1; + struct vsc8531_private *vsc8531 = phydev->priv; u16 reg_val = 0; int rc; mutex_lock(&phydev->lock); - if (phydev->interface == PHY_INTERFACE_MODE_RGMII_RXID || - phydev->interface == PHY_INTERFACE_MODE_RGMII_ID) - reg_val |= RGMII_CLK_DELAY_2_0_NS << rgmii_rx_delay_pos; - if (phydev->interface == PHY_INTERFACE_MODE_RGMII_TXID || - phydev->interface == PHY_INTERFACE_MODE_RGMII_ID) - reg_val |= RGMII_CLK_DELAY_2_0_NS << rgmii_tx_delay_pos; + reg_val |= vsc8531->rx_delay << rgmii_rx_delay_pos; + reg_val |= vsc8531->tx_delay << rgmii_tx_delay_pos; rc = phy_modify_paged(phydev, MSCC_PHY_PAGE_EXTENDED_2, rgmii_cntl, @@ -1808,10 +1805,34 @@ static irqreturn_t vsc8584_handle_interrupt(struct phy_device *phydev) return IRQ_HANDLED; } +static const int vsc8531_internal_delay[] = {200, 800, 1100, 1700, 2000, 2300, + 2600, 3400}; static int vsc85xx_config_init(struct phy_device *phydev) { - int rc, i, phy_id; + int delay_size = ARRAY_SIZE(vsc8531_internal_delay); struct vsc8531_private *vsc8531 = phydev->priv; + struct device *dev = &phydev->mdio.dev; + int rc, i, phy_id; + + vsc8531->rx_delay = phy_get_internal_delay(phydev, dev, &vsc8531_internal_delay[0], + delay_size, true); + if (vsc8531->rx_delay < 0) { + if (phydev->interface == PHY_INTERFACE_MODE_RGMII_RXID || + phydev->interface == PHY_INTERFACE_MODE_RGMII_ID) + vsc8531->rx_delay = RGMII_CLK_DELAY_2_0_NS; + else + vsc8531->rx_delay = RGMII_CLK_DELAY_0_2_NS; + } + + vsc8531->tx_delay = phy_get_internal_delay(phydev, dev, &vsc8531_internal_delay[0], + delay_size, false); + if (vsc8531->tx_delay < 0) { + if (phydev->interface == PHY_INTERFACE_MODE_RGMII_TXID || + phydev->interface == PHY_INTERFACE_MODE_RGMII_ID) + vsc8531->rx_delay = RGMII_CLK_DELAY_2_0_NS; + else + vsc8531->rx_delay = RGMII_CLK_DELAY_0_2_NS; + } rc = vsc85xx_default_config(phydev); if (rc) From patchwork Thu May 11 12:08:08 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Harini Katakam X-Patchwork-Id: 92503 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a59:b0ea:0:b0:3b6:4342:cba0 with SMTP id b10csp4320034vqo; Thu, 11 May 2023 05:12:40 -0700 (PDT) X-Google-Smtp-Source: ACHHUZ5NPZywCPZy0DMQPJD2zdOqZ6YeJMCNBp0Fbd9jWyqJa+iPieN7g+Y8kyZ2ZRLfsWbtbXnP X-Received: by 2002:a05:6a20:429a:b0:100:a785:4a86 with SMTP id o26-20020a056a20429a00b00100a7854a86mr16317448pzj.7.1683807160595; Thu, 11 May 2023 05:12:40 -0700 (PDT) ARC-Seal: i=2; a=rsa-sha256; t=1683807160; cv=pass; d=google.com; s=arc-20160816; b=a861WpfV+xOkdAvOV9OUu/SUBYccSZRBnBpeyUUDN7sROKClcDkUigyxhli51VwZQD bFgZHuVfjaYvNLOe5YHJVEIVKFvmyhFYy3zKQXs/rAIWeHVRVDwCbBbfPXaQHvCgoIyZ TyE1smLVEdxB9I+gteNgpHB0nBmE6iE7XZ+jSF6KZ9MAZIFnncoRJ/muF6wepvsyRVib r2k1qI22dH35KF0snYeMnz4mCT5PbIP/6n/3rQNp/Sxdka23nqaf4qMCutTR0tw2HPJu Ilx8PAat/ak1yEGVU52kLE+3ZIi97QDMqAEVVEIT/TakhpY1J+dcPE2rBFtf7FcA2ftW qY2A== ARC-Message-Signature: i=2; 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Use exact PHY ID match. Signed-off-by: Harini Katakam --- v3 - Patch split drivers/net/phy/mscc/mscc.h | 1 + drivers/net/phy/mscc/mscc_main.c | 26 ++++++++++++++++++++++++-- 2 files changed, 25 insertions(+), 2 deletions(-) diff --git a/drivers/net/phy/mscc/mscc.h b/drivers/net/phy/mscc/mscc.h index ab6c0b7c2136..6a0521ff61d2 100644 --- a/drivers/net/phy/mscc/mscc.h +++ b/drivers/net/phy/mscc/mscc.h @@ -281,6 +281,7 @@ enum rgmii_clock_delay { #define PHY_ID_VSC8514 0x00070670 #define PHY_ID_VSC8530 0x00070560 #define PHY_ID_VSC8531 0x00070570 +#define PHY_ID_VSC8531_02 0x00070572 #define PHY_ID_VSC8540 0x00070760 #define PHY_ID_VSC8541 0x00070770 #define PHY_ID_VSC8552 0x000704e0 diff --git a/drivers/net/phy/mscc/mscc_main.c b/drivers/net/phy/mscc/mscc_main.c index 9e856231e464..aa1df69043e5 100644 --- a/drivers/net/phy/mscc/mscc_main.c +++ b/drivers/net/phy/mscc/mscc_main.c @@ -2434,9 +2434,8 @@ static struct phy_driver vsc85xx_driver[] = { .get_stats = &vsc85xx_get_stats, }, { - .phy_id = PHY_ID_VSC8531, + PHY_ID_MATCH_EXACT(PHY_ID_VSC8531), .name = "Microsemi VSC8531", - .phy_id_mask = 0xfffffff0, /* PHY_GBIT_FEATURES */ .soft_reset = &genphy_soft_reset, .config_init = &vsc85xx_config_init, @@ -2457,6 +2456,29 @@ static struct phy_driver vsc85xx_driver[] = { .get_strings = &vsc85xx_get_strings, .get_stats = &vsc85xx_get_stats, }, +{ + PHY_ID_MATCH_EXACT(PHY_ID_VSC8531_02), + .name = "Microsemi VSC8531-02", + /* PHY_GBIT_FEATURES */ + .soft_reset = &genphy_soft_reset, + .config_init = &vsc85xx_config_init, + .config_aneg = &vsc85xx_config_aneg, + .read_status = &vsc85xx_read_status, + .handle_interrupt = vsc85xx_handle_interrupt, + .config_intr = &vsc85xx_config_intr, + .suspend = &genphy_suspend, + .resume = &genphy_resume, + .probe = &vsc85xx_probe, + .set_wol = &vsc85xx_wol_set, + .get_wol = &vsc85xx_wol_get, + .get_tunable = &vsc85xx_get_tunable, + .set_tunable = &vsc85xx_set_tunable, + .read_page = &vsc85xx_phy_read_page, + .write_page = &vsc85xx_phy_write_page, + .get_sset_count = &vsc85xx_get_sset_count, + .get_strings = &vsc85xx_get_strings, + .get_stats = &vsc85xx_get_stats, +}, { .phy_id = PHY_ID_VSC8540, .name = "Microsemi FE VSC8540 SyncE",