From patchwork Wed May 10 01:53:07 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Changhuang Liang X-Patchwork-Id: 91792 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a59:b0ea:0:b0:3b6:4342:cba0 with SMTP id b10csp3301493vqo; Tue, 9 May 2023 18:56:11 -0700 (PDT) X-Google-Smtp-Source: ACHHUZ7SmOLS6y99Ou9Hj5LDvsn+XwNoKfUgoF50prUwaOmvBCnwIOcrYjSBXNGzRUdAZQZy/vaB X-Received: by 2002:a05:6a00:ccc:b0:641:4d30:7922 with SMTP id b12-20020a056a000ccc00b006414d307922mr21647484pfv.4.1683683771214; Tue, 09 May 2023 18:56:11 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1683683771; cv=none; d=google.com; s=arc-20160816; b=FE3YVKRbBWwXUIKZDDpO9qRcr5Y2S0MPSktDMi3/EtuKZ/YKZRcW32LyiiUyBMRugi 9a1dHNSUkQ6v1WT8M/wg/kxtHjkyHx4vcc/Dei8z8QOBp8VgqmSrDOFQYaiq/Tw568sn tTIH2751qAOLHnnodKzX7gKJqaANn5J1/qzjkiS8YYU9594nx+CIQi4UIzw7bK/xvbWX hewj5vFtJRaxFkW/bxSW+GAzoEaYrg5nQwkM5D5h8wIJnBfD3UtPf1nSd+W3fp/s3bZs dAWJegldlYI686oV+TOwJMn++bHbjnv+14ETlZwJ/a3ohF6L+E9TzDI7kWrD00rSnmaR u29w== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from; bh=mMHMeDqzBD4h50GxPJI7Y6sYq9NDlOJGeLlOKDVZYnM=; b=G9qq+uSmeKXsD7x8cNbjKQQJPq0ivbxnM0NnLuHYSJNahQNleOOwAYRRJ/8OEzmrX4 P48D3zMlZVzgO2Gx/cvmpMQPvI0Q8/tdoVMnIbhINjEKsZ52AHVXATH8/a1iktyME/jY nHNnV4MD6LQu9xnZ81OK7LDKd3SgGpWvXV8U/4fWWxt3pVT7kn2k2czBZ6QgXzAItqyS HNrDwbTNUn0rzO02Zu9F600lSW8Z/HCM3gvz6t8BF9B+G7Ths4jQJWBowmECoGCNaAk9 aqGSCtflPcG3EohdxSnndvtYs5ODCb7coQO2F85O1l+5A/dbMq0OrkQW0kbQbcvtHdgb pZnA== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: from out1.vger.email (out1.vger.email. [2620:137:e000::1:20]) by mx.google.com with ESMTP id g6-20020a63b146000000b005303db0ebedsi2569927pgp.70.2023.05.09.18.55.56; Tue, 09 May 2023 18:56:11 -0700 (PDT) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) client-ip=2620:137:e000::1:20; Authentication-Results: mx.google.com; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S229737AbjEJBxf convert rfc822-to-8bit (ORCPT + 99 others); Tue, 9 May 2023 21:53:35 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:59756 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S235364AbjEJBxW (ORCPT ); Tue, 9 May 2023 21:53:22 -0400 Received: from fd01.gateway.ufhost.com (fd01.gateway.ufhost.com [61.152.239.71]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 20A1B35B3; Tue, 9 May 2023 18:53:21 -0700 (PDT) Received: from EXMBX165.cuchost.com (unknown [175.102.18.54]) (using TLSv1 with cipher DHE-RSA-AES256-SHA (256/256 bits)) (Client CN "EXMBX165", Issuer "EXMBX165" (not verified)) by fd01.gateway.ufhost.com (Postfix) with ESMTP id B60DC24E289; Wed, 10 May 2023 09:53:14 +0800 (CST) Received: from EXMBX062.cuchost.com (172.16.6.62) by EXMBX165.cuchost.com (172.16.6.75) with Microsoft SMTP Server (TLS) id 15.0.1497.42; Wed, 10 May 2023 09:53:14 +0800 Received: from ubuntu.localdomain (183.27.98.219) by EXMBX062.cuchost.com (172.16.6.62) with Microsoft SMTP Server (TLS) id 15.0.1497.42; Wed, 10 May 2023 09:53:13 +0800 From: Changhuang Liang To: Rob Herring , Krzysztof Kozlowski , Emil Renner Berthing , Conor Dooley , Paul Walmsley , Palmer Dabbelt , Albert Ou CC: Walker Chen , Changhuang Liang , Hal Feng , , , Subject: [PATCH v3 1/5] dt-bindings: power: Add JH7110 AON PMU support Date: Tue, 9 May 2023 18:53:07 -0700 Message-ID: <20230510015311.27505-2-changhuang.liang@starfivetech.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20230510015311.27505-1-changhuang.liang@starfivetech.com> References: <20230510015311.27505-1-changhuang.liang@starfivetech.com> MIME-Version: 1.0 X-Originating-IP: [183.27.98.219] X-ClientProxiedBy: EXCAS066.cuchost.com (172.16.6.26) To EXMBX062.cuchost.com (172.16.6.62) X-YovoleRuleAgent: yovoleflag X-Spam-Status: No, score=-1.9 required=5.0 tests=BAYES_00,SPF_HELO_PASS, SPF_PASS,T_SCC_BODY_TEXT_LINE autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-getmail-retrieved-from-mailbox: =?utf-8?q?INBOX?= X-GMAIL-THRID: =?utf-8?q?1765470393868706185?= X-GMAIL-MSGID: =?utf-8?q?1765470393868706185?= Add AON PMU for StarFive JH7110 SoC, it can be used to turn on/off DPHY rx/tx power switch, and it don't need the property of interrupts. It also can use syscon operation. Signed-off-by: Changhuang Liang --- .../bindings/power/starfive,jh7110-pmu.yaml | 28 +++++++++++++++++-- .../dt-bindings/power/starfive,jh7110-pmu.h | 5 +++- 2 files changed, 29 insertions(+), 4 deletions(-) diff --git a/Documentation/devicetree/bindings/power/starfive,jh7110-pmu.yaml b/Documentation/devicetree/bindings/power/starfive,jh7110-pmu.yaml index 98eb8b4110e7..0591a4e9db6c 100644 --- a/Documentation/devicetree/bindings/power/starfive,jh7110-pmu.yaml +++ b/Documentation/devicetree/bindings/power/starfive,jh7110-pmu.yaml @@ -8,6 +8,7 @@ title: StarFive JH7110 Power Management Unit maintainers: - Walker Chen + - Changhuang Liang description: | StarFive JH7110 SoC includes support for multiple power domains which can be @@ -15,8 +16,13 @@ description: | properties: compatible: - enum: - - starfive,jh7110-pmu + oneOf: + - enum: + - starfive,jh7110-pmu + - items: + - enum: + - starfive,jh7110-aon-syscon + - const: syscon reg: maxItems: 1 @@ -30,9 +36,18 @@ properties: required: - compatible - reg - - interrupts - "#power-domain-cells" +allOf: + - if: + properties: + compatible: + contains: + const: starfive,jh7110-pmu + then: + required: + - interrupts + additionalProperties: false examples: @@ -43,3 +58,10 @@ examples: interrupts = <111>; #power-domain-cells = <1>; }; + + - | + aon_syscon: syscon@17010000 { + compatible = "starfive,jh7110-aon-syscon", "syscon"; + reg = <0x17010000 0x1000>; + #power-domain-cells = <1>; + }; diff --git a/include/dt-bindings/power/starfive,jh7110-pmu.h b/include/dt-bindings/power/starfive,jh7110-pmu.h index 132bfe401fc8..341e2a0676ba 100644 --- a/include/dt-bindings/power/starfive,jh7110-pmu.h +++ b/include/dt-bindings/power/starfive,jh7110-pmu.h @@ -1,6 +1,6 @@ /* SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) */ /* - * Copyright (C) 2022 StarFive Technology Co., Ltd. + * Copyright (C) 2022-2023 StarFive Technology Co., Ltd. * Author: Walker Chen */ #ifndef __DT_BINDINGS_POWER_JH7110_POWER_H__ @@ -14,4 +14,7 @@ #define JH7110_PD_ISP 5 #define JH7110_PD_VENC 6 +#define JH7110_PD_DPHY_TX 0 +#define JH7110_PD_DPHY_RX 1 + #endif From patchwork Wed May 10 01:53:08 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Changhuang Liang X-Patchwork-Id: 91789 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a59:b0ea:0:b0:3b6:4342:cba0 with SMTP id b10csp3300997vqo; Tue, 9 May 2023 18:54:43 -0700 (PDT) X-Google-Smtp-Source: ACHHUZ5pvv/bRAJmni1bEgmq9Eu4Tivl5qj83oRt0mwJR93fhl6UnIilMfZkT88sMWJ3lWM/ucqx X-Received: by 2002:a17:902:da90:b0:1a2:2091:eeae with SMTP id j16-20020a170902da9000b001a22091eeaemr19684157plx.40.1683683682714; Tue, 09 May 2023 18:54:42 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1683683682; cv=none; d=google.com; s=arc-20160816; b=dAUUoiYEV73AxDyiwCH9/gGCEe7Lgd9bV3c/VrKuYjigG3xL84447fp80c9G669Uqe +JS7JuOCqqFqTkwqAtAjIQMLPpIq891MnxV+sttkVg+VPC1s4dLZcFdpdAhrDMJj1X/5 6lNL3kbkMDmKhAkrTobcMB4H/zdQ0Qp3OAKRPaAngoA1BGGbwPnfo1IgTOIyZ6hdP/YO OAIUcRl/y/PvAe+v2a0enkB1JOXxUdtE2WNBox5IugXxmlN9sbYF243lE5qMXxkhyBib 7l10nN17rVRDuS/FDwdRbNfa6QZ8qtb9g9vG5AKxp3Hb3KPD2XWSd1vja1T3hQrSV08L uzow== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from; bh=yLjraBv0R+hcPu8OXcD047J89FdyGplTTiZhgPX21HM=; b=cNjQDfPN+ANVnupaEujyLM8X4zmtAKDX+JeYEgO3KNThrVcjXA+14IWkEczO1l8q5u uVF+FSb687V30LTsi7Tc/jjpdK783zxIwZnqQRaRExsgoNA4sKUJNSnmXdU53bLLnccB JUerC86O8HdUMi+vs57pnFy5SO7t65DGsml0rJQiknDxfUyPO4nGEwVwkifw5YylO2X0 slo0HFURhQSw4aBK9G1xl+l5ht9t57D6lZ/7nyqXI+1TJ6S0wm2r2sNPprM/eOEkoM6B dYHIuymi8O1gqkvt4+cpUaTV7kvdH62Y9gXcPoSBS0sA3a4KDrbPiOin1YweCRyF81e3 AM5Q== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: from out1.vger.email (out1.vger.email. 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Reviewed-by: Conor Dooley Reviewed-by: Walker Chen Signed-off-by: Changhuang Liang --- drivers/soc/starfive/Kconfig | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/drivers/soc/starfive/Kconfig b/drivers/soc/starfive/Kconfig index bdb96dc4c989..1e9b0c414fec 100644 --- a/drivers/soc/starfive/Kconfig +++ b/drivers/soc/starfive/Kconfig @@ -3,8 +3,8 @@ config JH71XX_PMU bool "Support PMU for StarFive JH71XX Soc" depends on PM - depends on SOC_STARFIVE || COMPILE_TEST - default SOC_STARFIVE + depends on ARCH_STARFIVE || COMPILE_TEST + default ARCH_STARFIVE select PM_GENERIC_DOMAINS help Say 'y' here to enable support power domain support. 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[2620:137:e000::1:20]) by mx.google.com with ESMTP id 5-20020a170902ee4500b001a64fba3382si2763914plo.148.2023.05.09.18.54.57; Tue, 09 May 2023 18:55:11 -0700 (PDT) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) client-ip=2620:137:e000::1:20; Authentication-Results: mx.google.com; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S235455AbjEJBxY convert rfc822-to-8bit (ORCPT + 99 others); Tue, 9 May 2023 21:53:24 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:59714 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229561AbjEJBxU (ORCPT ); Tue, 9 May 2023 21:53:20 -0400 Received: from ex01.ufhost.com (ex01.ufhost.com [61.152.239.75]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 3085735B3; Tue, 9 May 2023 18:53:18 -0700 (PDT) Received: from EXMBX165.cuchost.com (unknown [175.102.18.54]) (using TLSv1 with cipher DHE-RSA-AES256-SHA (256/256 bits)) (Client CN "EXMBX165", Issuer "EXMBX165" (not verified)) by ex01.ufhost.com (Postfix) with ESMTP id 2108624E240; Wed, 10 May 2023 09:53:16 +0800 (CST) Received: from EXMBX062.cuchost.com (172.16.6.62) by EXMBX165.cuchost.com (172.16.6.75) with Microsoft SMTP Server (TLS) id 15.0.1497.42; Wed, 10 May 2023 09:53:16 +0800 Received: from ubuntu.localdomain (183.27.98.219) by EXMBX062.cuchost.com (172.16.6.62) with Microsoft SMTP Server (TLS) id 15.0.1497.42; Wed, 10 May 2023 09:53:15 +0800 From: Changhuang Liang To: Rob Herring , Krzysztof Kozlowski , Emil Renner Berthing , Conor Dooley , Paul Walmsley , Palmer Dabbelt , Albert Ou CC: Walker Chen , Changhuang Liang , Hal Feng , , , Subject: [PATCH v3 3/5] soc: starfive: Extract JH7110 pmu private operations Date: Tue, 9 May 2023 18:53:09 -0700 Message-ID: <20230510015311.27505-4-changhuang.liang@starfivetech.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20230510015311.27505-1-changhuang.liang@starfivetech.com> References: <20230510015311.27505-1-changhuang.liang@starfivetech.com> MIME-Version: 1.0 X-Originating-IP: [183.27.98.219] X-ClientProxiedBy: EXCAS066.cuchost.com (172.16.6.26) To EXMBX062.cuchost.com (172.16.6.62) X-YovoleRuleAgent: yovoleflag X-Spam-Status: No, score=-1.9 required=5.0 tests=BAYES_00,SPF_HELO_NONE, SPF_PASS,T_SCC_BODY_TEXT_LINE autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-getmail-retrieved-from-mailbox: =?utf-8?q?INBOX?= X-GMAIL-THRID: =?utf-8?q?1765470331547761483?= X-GMAIL-MSGID: =?utf-8?q?1765470331547761483?= Move JH7110 private operation into private data of compatible. Convenient to add AON PMU which would not have interrupts property. Signed-off-by: Changhuang Liang Reviewed-by: Walker Chen --- drivers/soc/starfive/jh71xx_pmu.c | 89 +++++++++++++++++++++---------- 1 file changed, 62 insertions(+), 27 deletions(-) diff --git a/drivers/soc/starfive/jh71xx_pmu.c b/drivers/soc/starfive/jh71xx_pmu.c index 7d5f50d71c0d..0dbdcc0d2c91 100644 --- a/drivers/soc/starfive/jh71xx_pmu.c +++ b/drivers/soc/starfive/jh71xx_pmu.c @@ -51,9 +51,17 @@ struct jh71xx_domain_info { u8 bit; }; +struct jh71xx_pmu; +struct jh71xx_pmu_dev; + struct jh71xx_pmu_match_data { const struct jh71xx_domain_info *domain_info; int num_domains; + unsigned int pmu_status; + int (*pmu_parse_irq)(struct platform_device *pdev, + struct jh71xx_pmu *pmu); + int (*pmu_set_state)(struct jh71xx_pmu_dev *pmd, + u32 mask, bool on); }; struct jh71xx_pmu { @@ -79,12 +87,12 @@ static int jh71xx_pmu_get_state(struct jh71xx_pmu_dev *pmd, u32 mask, bool *is_o if (!mask) return -EINVAL; - *is_on = readl(pmu->base + JH71XX_PMU_CURR_POWER_MODE) & mask; + *is_on = readl(pmu->base + pmu->match_data->pmu_status) & mask; return 0; } -static int jh71xx_pmu_set_state(struct jh71xx_pmu_dev *pmd, u32 mask, bool on) +static int jh7110_pmu_set_state(struct jh71xx_pmu_dev *pmd, u32 mask, bool on) { struct jh71xx_pmu *pmu = pmd->pmu; unsigned long flags; @@ -92,22 +100,8 @@ static int jh71xx_pmu_set_state(struct jh71xx_pmu_dev *pmd, u32 mask, bool on) u32 mode; u32 encourage_lo; u32 encourage_hi; - bool is_on; int ret; - ret = jh71xx_pmu_get_state(pmd, mask, &is_on); - if (ret) { - dev_dbg(pmu->dev, "unable to get current state for %s\n", - pmd->genpd.name); - return ret; - } - - if (is_on == on) { - dev_dbg(pmu->dev, "pm domain [%s] is already %sable status.\n", - pmd->genpd.name, on ? "en" : "dis"); - return 0; - } - spin_lock_irqsave(&pmu->lock, flags); /* @@ -166,6 +160,29 @@ static int jh71xx_pmu_set_state(struct jh71xx_pmu_dev *pmd, u32 mask, bool on) return 0; } +static int jh71xx_pmu_set_state(struct jh71xx_pmu_dev *pmd, u32 mask, bool on) +{ + struct jh71xx_pmu *pmu = pmd->pmu; + const struct jh71xx_pmu_match_data *match_data = pmu->match_data; + bool is_on; + int ret; + + ret = jh71xx_pmu_get_state(pmd, mask, &is_on); + if (ret) { + dev_dbg(pmu->dev, "unable to get current state for %s\n", + pmd->genpd.name); + return ret; + } + + if (is_on == on) { + dev_dbg(pmu->dev, "pm domain [%s] is already %sable status.\n", + pmd->genpd.name, on ? "en" : "dis"); + return 0; + } + + return match_data->pmu_set_state(pmd, mask, on); +} + static int jh71xx_pmu_on(struct generic_pm_domain *genpd) { struct jh71xx_pmu_dev *pmd = container_of(genpd, @@ -226,6 +243,25 @@ static irqreturn_t jh71xx_pmu_interrupt(int irq, void *data) return IRQ_HANDLED; } +static int jh7110_pmu_parse_irq(struct platform_device *pdev, struct jh71xx_pmu *pmu) +{ + struct device *dev = &pdev->dev; + int ret; + + pmu->irq = platform_get_irq(pdev, 0); + if (pmu->irq < 0) + return pmu->irq; + + ret = devm_request_irq(dev, pmu->irq, jh71xx_pmu_interrupt, + 0, pdev->name, pmu); + if (ret) + dev_err(dev, "failed to request irq\n"); + + jh71xx_pmu_int_enable(pmu, JH71XX_PMU_INT_ALL_MASK & ~JH71XX_PMU_INT_PCH_FAIL, true); + + return 0; +} + static int jh71xx_pmu_init_domain(struct jh71xx_pmu *pmu, int index) { struct jh71xx_pmu_dev *pmd; @@ -275,19 +311,18 @@ static int jh71xx_pmu_probe(struct platform_device *pdev) if (IS_ERR(pmu->base)) return PTR_ERR(pmu->base); - pmu->irq = platform_get_irq(pdev, 0); - if (pmu->irq < 0) - return pmu->irq; - - ret = devm_request_irq(dev, pmu->irq, jh71xx_pmu_interrupt, - 0, pdev->name, pmu); - if (ret) - dev_err(dev, "failed to request irq\n"); + spin_lock_init(&pmu->lock); match_data = of_device_get_match_data(dev); if (!match_data) return -EINVAL; + ret = match_data->pmu_parse_irq(pdev, pmu); + if (ret) { + dev_err(dev, "failed to parse irq\n"); + return ret; + } + pmu->genpd = devm_kcalloc(dev, match_data->num_domains, sizeof(struct generic_pm_domain *), GFP_KERNEL); @@ -307,9 +342,6 @@ static int jh71xx_pmu_probe(struct platform_device *pdev) } } - spin_lock_init(&pmu->lock); - jh71xx_pmu_int_enable(pmu, JH71XX_PMU_INT_ALL_MASK & ~JH71XX_PMU_INT_PCH_FAIL, true); - ret = of_genpd_add_provider_onecell(np, &pmu->genpd_data); if (ret) { dev_err(dev, "failed to register genpd driver: %d\n", ret); @@ -357,6 +389,9 @@ static const struct jh71xx_domain_info jh7110_power_domains[] = { static const struct jh71xx_pmu_match_data jh7110_pmu = { .num_domains = ARRAY_SIZE(jh7110_power_domains), .domain_info = jh7110_power_domains, + .pmu_status = JH71XX_PMU_CURR_POWER_MODE, + .pmu_parse_irq = jh7110_pmu_parse_irq, + .pmu_set_state = jh7110_pmu_set_state, }; static const struct of_device_id jh71xx_pmu_of_match[] = { From patchwork Wed May 10 01:53:10 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Changhuang Liang X-Patchwork-Id: 91791 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a59:b0ea:0:b0:3b6:4342:cba0 with SMTP id b10csp3301209vqo; Tue, 9 May 2023 18:55:20 -0700 (PDT) X-Google-Smtp-Source: ACHHUZ6Mmw8aa7jcsQTrpNgBaJ0kIxha7VS6fgw8v0fHsBF4SjKop71pVjG8ZcKYH5memLDh9Qq0 X-Received: by 2002:a05:6a21:3395:b0:ff:ae2d:9595 with SMTP id yy21-20020a056a21339500b000ffae2d9595mr17619482pzb.41.1683683720461; Tue, 09 May 2023 18:55:20 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1683683720; cv=none; d=google.com; s=arc-20160816; b=KCIHgNV3P64D2H6ffUkPRWkEKRmBvZvvR/3iMMYuweib8KxPhKdEyXM9Uqk3X34aC8 7FsijlBiH2uZkfePXCb5mdP8OCyBYrQYgIyDSO+u16h8Ei37EkMobkjuetAQ6QA3gm1r Q5URGZ9fughy8XH+sv/nP+1/5Q/Ucgeh2IH919//vCZXhBaifHxkdaSeRl2ShfMO2mLw CBHVv1UMoDmYjD4iQIRGRHdEXy5gbsZVMVs5Cd+nwO2F6JUCQlqsncNUGdds63LGQKgQ X8UTJdTI7u5cs2fA5I+I7guaQ2NDyKSXvLcdD6F3g38pf7t13P4I7nO23xZnYGaQP1rY BRlg== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from; bh=eb7wL1IaHDccViVambCnbIqfxDFyPR17od5JmYem9cQ=; b=sdtMq3bMK6+XgOo1KuqbrbXWz74jNurTbuuZTULG3tQLrzvFsDcsecFvilrvX5jshg oNBLF2PNsUzTGxSEhHitFer/8VKuFQICfSJeslMD2L/vJMR48zpKqyNqdxV2QDFtztmb s7ewOYOJJ/KmIkkCy+BpA/8TUbUoZSpt1HmsDHOp6nCQaowINTndLqbnIbTI1PaS1QhY cuWtDs+IZp150LP+q7WaMGN3adphz/r+nFxQn/xM/jylr0K0TqvW6ois8Me98pRSaxZw j7KeVcHIzmlClHrW3t6VC2/wUdID6TNl3YIoPaihencRb21ZPs7hDTOYow1iM4j6H0pV 6s4g== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: from out1.vger.email (out1.vger.email. [2620:137:e000::1:20]) by mx.google.com with ESMTP id s80-20020a632c53000000b0052c9fa0034fsi3020842pgs.699.2023.05.09.18.55.05; Tue, 09 May 2023 18:55:20 -0700 (PDT) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) client-ip=2620:137:e000::1:20; Authentication-Results: mx.google.com; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S235456AbjEJBx0 convert rfc822-to-8bit (ORCPT + 99 others); Tue, 9 May 2023 21:53:26 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:59718 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S234570AbjEJBxU (ORCPT ); Tue, 9 May 2023 21:53:20 -0400 Received: from fd01.gateway.ufhost.com (fd01.gateway.ufhost.com [61.152.239.71]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id E08CD3A85; Tue, 9 May 2023 18:53:18 -0700 (PDT) Received: from EXMBX166.cuchost.com (unknown [175.102.18.54]) (using TLSv1 with cipher DHE-RSA-AES256-SHA (256/256 bits)) (Client CN "EXMBX166", Issuer "EXMBX166" (not verified)) by fd01.gateway.ufhost.com (Postfix) with ESMTP id 665C224E1D4; Wed, 10 May 2023 09:53:17 +0800 (CST) Received: from EXMBX062.cuchost.com (172.16.6.62) by EXMBX166.cuchost.com (172.16.6.76) with Microsoft SMTP Server (TLS) id 15.0.1497.42; Wed, 10 May 2023 09:53:17 +0800 Received: from ubuntu.localdomain (183.27.98.219) by EXMBX062.cuchost.com (172.16.6.62) with Microsoft SMTP Server (TLS) id 15.0.1497.42; Wed, 10 May 2023 09:53:16 +0800 From: Changhuang Liang To: Rob Herring , Krzysztof Kozlowski , Emil Renner Berthing , Conor Dooley , Paul Walmsley , Palmer Dabbelt , Albert Ou CC: Walker Chen , Changhuang Liang , Hal Feng , , , Subject: [PATCH v3 4/5] soc: starfive: Add JH7110 AON PMU support Date: Tue, 9 May 2023 18:53:10 -0700 Message-ID: <20230510015311.27505-5-changhuang.liang@starfivetech.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20230510015311.27505-1-changhuang.liang@starfivetech.com> References: <20230510015311.27505-1-changhuang.liang@starfivetech.com> MIME-Version: 1.0 X-Originating-IP: [183.27.98.219] X-ClientProxiedBy: EXCAS066.cuchost.com (172.16.6.26) To EXMBX062.cuchost.com (172.16.6.62) X-YovoleRuleAgent: yovoleflag X-Spam-Status: No, score=-1.9 required=5.0 tests=BAYES_00,SPF_HELO_PASS, SPF_PASS,T_SCC_BODY_TEXT_LINE autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-getmail-retrieved-from-mailbox: =?utf-8?q?INBOX?= X-GMAIL-THRID: =?utf-8?q?1765470340807466375?= X-GMAIL-MSGID: =?utf-8?q?1765470340807466375?= Add AON PMU for StarFive JH7110 SoC. It can be used to turn on/off the dphy rx/tx power switch. Reviewed-by: Walker Chen Signed-off-by: Changhuang Liang --- MAINTAINERS | 1 + drivers/soc/starfive/jh71xx_pmu.c | 57 ++++++++++++++++++++++++++++--- 2 files changed, 53 insertions(+), 5 deletions(-) diff --git a/MAINTAINERS b/MAINTAINERS index 4c0b39c44957..ce0befe39394 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -19939,6 +19939,7 @@ F: include/dt-bindings/reset/starfive?jh71*.h STARFIVE JH71XX PMU CONTROLLER DRIVER M: Walker Chen +M: Changhuang Liang S: Supported F: Documentation/devicetree/bindings/power/starfive* F: drivers/soc/starfive/jh71xx_pmu.c diff --git a/drivers/soc/starfive/jh71xx_pmu.c b/drivers/soc/starfive/jh71xx_pmu.c index 0dbdcc0d2c91..c7b474409cf7 100644 --- a/drivers/soc/starfive/jh71xx_pmu.c +++ b/drivers/soc/starfive/jh71xx_pmu.c @@ -2,7 +2,7 @@ /* * StarFive JH71XX PMU (Power Management Unit) Controller Driver * - * Copyright (C) 2022 StarFive Technology Co., Ltd. + * Copyright (C) 2022-2023 StarFive Technology Co., Ltd. */ #include @@ -24,6 +24,9 @@ #define JH71XX_PMU_EVENT_STATUS 0x88 #define JH71XX_PMU_INT_STATUS 0x8C +/* aon pmu register offset */ +#define JH71XX_AON_PMU_SWITCH 0x00 + /* sw encourage cfg */ #define JH71XX_PMU_SW_ENCOURAGE_EN_LO 0x05 #define JH71XX_PMU_SW_ENCOURAGE_EN_HI 0x50 @@ -160,6 +163,26 @@ static int jh7110_pmu_set_state(struct jh71xx_pmu_dev *pmd, u32 mask, bool on) return 0; } +static int jh7110_aon_pmu_set_state(struct jh71xx_pmu_dev *pmd, u32 mask, bool on) +{ + struct jh71xx_pmu *pmu = pmd->pmu; + unsigned long flags; + u32 val; + + spin_lock_irqsave(&pmu->lock, flags); + val = readl(pmu->base + JH71XX_AON_PMU_SWITCH); + + if (on) + val |= mask; + else + val &= ~mask; + + writel(val, pmu->base + JH71XX_AON_PMU_SWITCH); + spin_unlock_irqrestore(&pmu->lock, flags); + + return 0; +} + static int jh71xx_pmu_set_state(struct jh71xx_pmu_dev *pmd, u32 mask, bool on) { struct jh71xx_pmu *pmu = pmd->pmu; @@ -317,10 +340,12 @@ static int jh71xx_pmu_probe(struct platform_device *pdev) if (!match_data) return -EINVAL; - ret = match_data->pmu_parse_irq(pdev, pmu); - if (ret) { - dev_err(dev, "failed to parse irq\n"); - return ret; + if (match_data->pmu_parse_irq) { + ret = match_data->pmu_parse_irq(pdev, pmu); + if (ret) { + dev_err(dev, "failed to parse irq\n"); + return ret; + } } pmu->genpd = devm_kcalloc(dev, match_data->num_domains, @@ -394,10 +419,31 @@ static const struct jh71xx_pmu_match_data jh7110_pmu = { .pmu_set_state = jh7110_pmu_set_state, }; +static const struct jh71xx_domain_info jh7110_aon_power_domains[] = { + [JH7110_PD_DPHY_TX] = { + .name = "DPHY-TX", + .bit = 30, + }, + [JH7110_PD_DPHY_RX] = { + .name = "DPHY-RX", + .bit = 31, + }, +}; + +static const struct jh71xx_pmu_match_data jh7110_aon_pmu = { + .num_domains = ARRAY_SIZE(jh7110_aon_power_domains), + .domain_info = jh7110_aon_power_domains, + .pmu_status = JH71XX_AON_PMU_SWITCH, + .pmu_set_state = jh7110_aon_pmu_set_state, +}; + static const struct of_device_id jh71xx_pmu_of_match[] = { { .compatible = "starfive,jh7110-pmu", .data = (void *)&jh7110_pmu, + }, { + .compatible = "starfive,jh7110-aon-syscon", + .data = (void *)&jh7110_aon_pmu, }, { /* sentinel */ } @@ -414,5 +460,6 @@ static struct platform_driver jh71xx_pmu_driver = { builtin_platform_driver(jh71xx_pmu_driver); MODULE_AUTHOR("Walker Chen "); +MODULE_AUTHOR("Changhuang Liang "); MODULE_DESCRIPTION("StarFive JH71XX PMU Driver"); MODULE_LICENSE("GPL"); From patchwork Wed May 10 01:53:11 2023 Content-Type: text/plain; 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[2620:137:e000::1:20]) by mx.google.com with ESMTP id 4-20020a630704000000b004fba0f483c8si3053276pgh.185.2023.05.09.19.02.36; Tue, 09 May 2023 19:02:51 -0700 (PDT) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) client-ip=2620:137:e000::1:20; Authentication-Results: mx.google.com; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S229555AbjEJBx3 convert rfc822-to-8bit (ORCPT + 99 others); Tue, 9 May 2023 21:53:29 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:59720 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S233875AbjEJBxU (ORCPT ); Tue, 9 May 2023 21:53:20 -0400 Received: from fd01.gateway.ufhost.com (fd01.gateway.ufhost.com [61.152.239.71]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 7C44E3A8B; Tue, 9 May 2023 18:53:19 -0700 (PDT) Received: from EXMBX165.cuchost.com (unknown [175.102.18.54]) (using TLSv1 with cipher DHE-RSA-AES256-SHA (256/256 bits)) (Client CN "EXMBX165", Issuer "EXMBX165" (not verified)) by fd01.gateway.ufhost.com (Postfix) with ESMTP id 33ECF7FFD; Wed, 10 May 2023 09:53:18 +0800 (CST) Received: from EXMBX062.cuchost.com (172.16.6.62) by EXMBX165.cuchost.com (172.16.6.75) with Microsoft SMTP Server (TLS) id 15.0.1497.42; Wed, 10 May 2023 09:53:18 +0800 Received: from ubuntu.localdomain (183.27.98.219) by EXMBX062.cuchost.com (172.16.6.62) with Microsoft SMTP Server (TLS) id 15.0.1497.42; Wed, 10 May 2023 09:53:17 +0800 From: Changhuang Liang To: Rob Herring , Krzysztof Kozlowski , Emil Renner Berthing , Conor Dooley , Paul Walmsley , Palmer Dabbelt , Albert Ou CC: Walker Chen , Changhuang Liang , Hal Feng , , , Subject: [PATCH v3 5/5] riscv: dts: starfive: jh7110: Add AON PMU node Date: Tue, 9 May 2023 18:53:11 -0700 Message-ID: <20230510015311.27505-6-changhuang.liang@starfivetech.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20230510015311.27505-1-changhuang.liang@starfivetech.com> References: <20230510015311.27505-1-changhuang.liang@starfivetech.com> MIME-Version: 1.0 X-Originating-IP: [183.27.98.219] X-ClientProxiedBy: EXCAS066.cuchost.com (172.16.6.26) To EXMBX062.cuchost.com (172.16.6.62) X-YovoleRuleAgent: yovoleflag X-Spam-Status: No, score=-1.9 required=5.0 tests=BAYES_00,SPF_HELO_PASS, SPF_PASS,T_SCC_BODY_TEXT_LINE autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-getmail-retrieved-from-mailbox: =?utf-8?q?INBOX?= X-GMAIL-THRID: =?utf-8?q?1765470814485533838?= X-GMAIL-MSGID: =?utf-8?q?1765470814485533838?= Add AON PMU node to configure power. It can be used to turn on/off dphy rx/tx power switch. It also can use syscon operation. Reviewed-by: Walker Chen Signed-off-by: Changhuang Liang --- arch/riscv/boot/dts/starfive/jh7110.dtsi | 6 ++++++ 1 file changed, 6 insertions(+) diff --git a/arch/riscv/boot/dts/starfive/jh7110.dtsi b/arch/riscv/boot/dts/starfive/jh7110.dtsi index 4c5fdb905da8..d31257d4dcfc 100644 --- a/arch/riscv/boot/dts/starfive/jh7110.dtsi +++ b/arch/riscv/boot/dts/starfive/jh7110.dtsi @@ -486,6 +486,12 @@ aoncrg: clock-controller@17000000 { #reset-cells = <1>; }; + aon_syscon: syscon@17010000 { + compatible = "starfive,jh7110-aon-syscon", "syscon"; + reg = <0x0 0x17010000 0x0 0x1000>; + #power-domain-cells = <1>; + }; + aongpio: pinctrl@17020000 { compatible = "starfive,jh7110-aon-pinctrl"; reg = <0x0 0x17020000 0x0 0x10000>;