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Signed-off-by: Bjorn Andersson Reviewed-by: Krzysztof Kozlowski Reviewed-by: Bhupesh Sharma --- Documentation/devicetree/bindings/mmc/sdhci-msm.yaml | 1 + 1 file changed, 1 insertion(+) diff --git a/Documentation/devicetree/bindings/mmc/sdhci-msm.yaml b/Documentation/devicetree/bindings/mmc/sdhci-msm.yaml index 4f2d9e8127dd..9a87c03937c7 100644 --- a/Documentation/devicetree/bindings/mmc/sdhci-msm.yaml +++ b/Documentation/devicetree/bindings/mmc/sdhci-msm.yaml @@ -41,6 +41,7 @@ properties: - qcom,qcs404-sdhci - qcom,sc7180-sdhci - qcom,sc7280-sdhci + - qcom,sc8280xp-sdhci - qcom,sdm630-sdhci - qcom,sdm670-sdhci - qcom,sdm845-sdhci From patchwork Tue May 9 03:01:36 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Bjorn Andersson X-Patchwork-Id: 91354 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a59:b0ea:0:b0:3b6:4342:cba0 with SMTP id b10csp2593466vqo; Mon, 8 May 2023 20:27:58 -0700 (PDT) X-Google-Smtp-Source: ACHHUZ7tbMwcJ+gEcgGvw1SEQyO8zmedEfxAzxPVvbUlbLRQaTWcQkU9LZM5bgPJ+hfUKq2+A2J7 X-Received: by 2002:a05:6a00:2e10:b0:5a8:8535:18b with SMTP id fc16-20020a056a002e1000b005a88535018bmr13953251pfb.11.1683602877946; Mon, 08 May 2023 20:27:57 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1683602877; cv=none; d=google.com; s=arc-20160816; b=DM3xHNxp4g3WiwU1+EjTFtgUxogvIP7dlYN4EkgOxjBlTmGbiINGwUXuWiLIudkNsa 1EgzoG3TziYwjWi7Og3dyJjo7s2kxKd2TOUEHLfMxU0CT2alKWnCRBvFCpAo5T8OdyAM jBdW+eLlEQmW6ZmciNMaKgvcdxZwTZmgRO4O7ILpsWN/mz2GYIEq9FFPuTm5hcKpItcw oeqXdLyljBOZiXo6zBPDIXXeZ8u7XmOcUBMp9Uee/l+kITd6ow99nV3HKUPK3WWY6mKV bQpEIraAJdkA5RGXAxYdtgM5hy8uGhE5wvdKU2t72a1TXNF94nrHP1aZnYW7XMy1EUf2 i6bA== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from :dkim-signature; bh=pXVV3nfzCOm7QY3MEN3h2bXr7fLYfGrXSBMk6YRabB0=; b=kl6MKwWDdEkkSTcT3k4ayOQ+q1YgmsEUnOkZeVjJBvopZcMfS/rjivCYn094zEm1+E P8QE+q5riiUrbMMCuyVKpA2uzzoM+pxY798xpUxEaGCuo1q8g7oa04LMpuMbwtNKA61q NekiepH9dWvJWlRX+eSs9xFhDgdUh2BJhblF9AYx4QEXcy+3CsH5+IIC7XZiJFhUTaF4 8gVf99RKOQLgpJn5Bz87RkoIBqU/LPTxTH/sUM5DHPf8ePeCuDIoVZEtM6y3pmVM1Ps7 3+6nQR0KzFSuY4gC39Vl1LLWjY7bGxTh9y5dEbFzSrCbvsfLZkFOSuET4oBfx5VJyIdQ jxxQ== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@quicinc.com header.s=qcppdkim1 header.b=nQ2wXJ21; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=quicinc.com Received: from out1.vger.email (out1.vger.email. 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Signed-off-by: Bjorn Andersson --- arch/arm64/boot/dts/qcom/sc8280xp-crd.dts | 80 +++++++++++++++++++++++ arch/arm64/boot/dts/qcom/sc8280xp.dtsi | 39 +++++++++++ 2 files changed, 119 insertions(+) diff --git a/arch/arm64/boot/dts/qcom/sc8280xp-crd.dts b/arch/arm64/boot/dts/qcom/sc8280xp-crd.dts index 5b25d54b9591..f83411e0e7f8 100644 --- a/arch/arm64/boot/dts/qcom/sc8280xp-crd.dts +++ b/arch/arm64/boot/dts/qcom/sc8280xp-crd.dts @@ -308,6 +308,13 @@ vreg_l1c: ldo1 { regulator-initial-mode = ; }; + vreg_l6c: ldo6 { + regulator-name = "vreg_l6c"; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <2960000>; + regulator-initial-mode = ; + }; + vreg_l7c: ldo7 { regulator-name = "vreg_l7c"; regulator-min-microvolt = <2504000>; @@ -318,6 +325,13 @@ vreg_l7c: ldo7 { RPMH_REGULATOR_MODE_HPM>; }; + vreg_l9c: ldo9 { + regulator-name = "vreg_l9c"; + regulator-min-microvolt = <2960000>; + regulator-max-microvolt = <2960000>; + regulator-initial-mode = ; + }; + vreg_l13c: ldo13 { regulator-name = "vreg_l13c"; regulator-min-microvolt = <3072000>; @@ -600,6 +614,18 @@ &remoteproc_nsp0 { status = "okay"; }; +&sdc2 { + cd-gpios = <&tlmm 131 GPIO_ACTIVE_LOW>; + pinctrl-names = "default", "sleep"; + pinctrl-0 = <&sdc2_default_state>; + pinctrl-1 = <&sdc2_sleep_state>; + vmmc-supply = <&vreg_l9c>; + vqmmc-supply = <&vreg_l6c>; + no-sdio; + no-mmc; + status = "okay"; +}; + &uart17 { compatible = "qcom,geni-debug-uart"; @@ -842,6 +868,60 @@ wake-n-pins { }; }; + sdc2_default_state: sdc2-default-state { + clk-pins { + pins = "sdc2_clk"; + drive-strength = <16>; + bias-disable; + }; + + cmd-pins { + pins = "sdc2_cmd"; + drive-strength = <16>; + bias-pull-up; + }; + + data-pins { + pins = "sdc2_data"; + drive-strength = <16>; + bias-pull-up; + }; + + card-detect-pins { + pins = "gpio131"; + function = "gpio"; + drive-strength = <2>; + bias-disable; + }; + }; + + sdc2_sleep_state: sdc2-sleep-state { + clk-pins { + pins = "sdc2_clk"; + drive-strength = <2>; + bias-disable; + }; + + cmd-pins { + pins = "sdc2_cmd"; + drive-strength = <2>; + bias-pull-up; + }; + + data-pins { + pins = "sdc2_data"; + drive-strength = <2>; + bias-pull-up; + }; + + card-detect-pins { + pins = "gpio131"; + function = "gpio"; + drive-strength = <2>; + bias-disable; + }; + }; + tpad_default: tpad-default-state { int-n-pins { pins = "gpio182"; diff --git a/arch/arm64/boot/dts/qcom/sc8280xp.dtsi b/arch/arm64/boot/dts/qcom/sc8280xp.dtsi index 8fa9fbfe5d00..21dfb48d923c 100644 --- a/arch/arm64/boot/dts/qcom/sc8280xp.dtsi +++ b/arch/arm64/boot/dts/qcom/sc8280xp.dtsi @@ -2815,6 +2815,45 @@ data-pins { }; }; + sdc2: mmc@8804000 { + compatible = "qcom,sc8280xp-sdhci", "qcom,sdhci-msm-v5"; + reg = <0 0x08804000 0 0x1000>; + + interrupts = , + ; + interrupt-names = "hc_irq", "pwr_irq"; + + clocks = <&gcc GCC_SDCC2_AHB_CLK>, + <&gcc GCC_SDCC2_APPS_CLK>, + <&rpmhcc RPMH_CXO_CLK>; + clock-names = "iface", "core", "xo"; + resets = <&gcc GCC_SDCC4_BCR>; + interconnects = <&aggre2_noc MASTER_SDCC_2 0 &mc_virt SLAVE_EBI1 0>, + <&gem_noc MASTER_APPSS_PROC 0 &config_noc SLAVE_SDCC_2 0>; + interconnect-names = "sdhc-ddr","cpu-sdhc"; + iommus = <&apps_smmu 0x4e0 0x0>; + power-domains = <&rpmhpd SC8280XP_CX>; + operating-points-v2 = <&sdc2_opp_table>; + bus-width = <4>; + dma-coherent; + + status = "disabled"; + + sdc2_opp_table: opp-table { + compatible = "operating-points-v2"; + + opp-100000000 { + opp-hz = /bits/ 64 <100000000>; + required-opps = <&rpmhpd_opp_low_svs>; + }; + + opp-202000000 { + opp-hz = /bits/ 64 <202000000>; + required-opps = <&rpmhpd_opp_svs_l1>; + }; + }; + }; + usb_0_qmpphy: phy@88eb000 { compatible = "qcom,sc8280xp-qmp-usb43dp-phy"; reg = <0 0x088eb000 0 0x4000>;