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Received: from DB7PR04MB5098.eurprd04.prod.outlook.com (2603:10a6:10:1c::18) by DU2PR04MB9132.eurprd04.prod.outlook.com (2603:10a6:10:2f7::18) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.6363.25; Fri, 5 May 2023 06:35:56 +0000 Received: from DB7PR04MB5098.eurprd04.prod.outlook.com ([fe80::6418:d0b1:6971:5da0]) by DB7PR04MB5098.eurprd04.prod.outlook.com ([fe80::6418:d0b1:6971:5da0%5]) with mapi id 15.20.6363.022; Fri, 5 May 2023 06:35:56 +0000 From: Clark Wang To: broonie@kernel.org Cc: linux-spi@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH] spi: lpspi: disable lpspi module irq in DMA mode Date: Fri, 5 May 2023 14:35:57 +0800 Message-Id: <20230505063557.3962220-1-xiaoning.wang@nxp.com> X-Mailer: git-send-email 2.34.1 X-ClientProxiedBy: SGXP274CA0015.SGPP274.PROD.OUTLOOK.COM (2603:1096:4:b8::27) To DB7PR04MB5098.eurprd04.prod.outlook.com (2603:10a6:10:1c::18) MIME-Version: 1.0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: DB7PR04MB5098:EE_|DU2PR04MB9132:EE_ X-MS-Office365-Filtering-Correlation-Id: 0d95bc8f-6500-467b-9907-08db4d32faed X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0; 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So disable irq to avoid the too much irq events. Signed-off-by: Clark Wang --- drivers/spi/spi-fsl-lpspi.c | 7 ++++++- 1 file changed, 6 insertions(+), 1 deletion(-) diff --git a/drivers/spi/spi-fsl-lpspi.c b/drivers/spi/spi-fsl-lpspi.c index f2341ab99556..4b70038ceb6b 100644 --- a/drivers/spi/spi-fsl-lpspi.c +++ b/drivers/spi/spi-fsl-lpspi.c @@ -910,9 +910,14 @@ static int fsl_lpspi_probe(struct platform_device *pdev) ret = fsl_lpspi_dma_init(&pdev->dev, fsl_lpspi, controller); if (ret == -EPROBE_DEFER) goto out_pm_get; - if (ret < 0) dev_err(&pdev->dev, "dma setup error %d, use pio\n", ret); + else + /* + * disable LPSPI module IRQ when enable DMA mode successfully, + * to prevent the unexpected LPSPI module IRQ events. + */ + disable_irq(irq); ret = devm_spi_register_controller(&pdev->dev, controller); if (ret < 0) {