From patchwork Thu May 4 20:06:41 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Cristian Ciocaltea X-Patchwork-Id: 90221 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a59:b0ea:0:b0:3b6:4342:cba0 with SMTP id b10csp594657vqo; Thu, 4 May 2023 13:40:40 -0700 (PDT) X-Google-Smtp-Source: ACHHUZ5C62nHgsDC+76JSBmrjQ3/sVQ6/LF53/drC6AJZboaMC6V0yL0iXx28jlyn66pZWEk+p7i X-Received: by 2002:a05:6a00:2492:b0:63d:2b95:5476 with SMTP id c18-20020a056a00249200b0063d2b955476mr4127544pfv.23.1683232840635; Thu, 04 May 2023 13:40:40 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1683232840; cv=none; d=google.com; s=arc-20160816; b=V82Q6fnlk0gbx7feFdkjy+v75dlICBxLJVHGwVj3yknUa0eI2YWnCan40IjQX9BbGl oHXKhAHoQy6GzK9DZBepO9RhgVuu/tQEyJh2CZs1TzvCwkigZkp70mroEONiX0E9iJms WlaSZRvPo0KQonmafggE12MMyN6s/twKo7ULVf6qtLUBheYFo/WrcnIDhbmFUelFM7xS IuRIyTs20GkEjWzCRvT7dcIJE4UscVNO6nAddLzdHKUgVlobLynkSLc15DYSi0ediYlk CIIJNQXDZ6ZUbfVU/k1CvIUzzuC7r++SeX47glciWlo0RQO9oCfOY7ekHy3yoYBVxwca IEzQ== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from :dkim-signature; bh=jOSikDBicr334yX7WdftP/MqUKN6oyw5iHw0bLsFGjE=; b=dg7L+gu3NIBuFDg3xJhfCFcpuISkKQVektlyJv9PYPBd13Gdxy1Q2IHVUGela1Udl1 5wUKvYqIZXfRQR2e+JKBYqvzE6Oq/6x4IOvFpEHPeUqxrLuJ5hMD9QPPfm43cRRHNTky eYt+tb9Njd7+sM2GBgtCWVCtCdHppl93UvbFKf1o3W3nZyOuuN4nAq+gLsYESGhGrfBH ht1tjxDR+AVab7C3vhEZ5ABY524vJjjO8P3bBbGsQDRf3Gyyd8aJOtkhq7JP/OITy9sv tyOCbp+Q4kaw6Lu4IFxxJd6jeBXW/plIHn+sI3O6y8Wr/HN2rHNirz2EdLVJoUqul9Jb SjFA== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@collabora.com header.s=mail header.b="K0g/Popk"; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=QUARANTINE sp=QUARANTINE dis=NONE) header.from=collabora.com Received: from out1.vger.email (out1.vger.email. [2620:137:e000::1:20]) by mx.google.com with ESMTP id c186-20020a621cc3000000b0063d2b810fcbsi256665pfc.208.2023.05.04.13.40.27; Thu, 04 May 2023 13:40:40 -0700 (PDT) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) client-ip=2620:137:e000::1:20; Authentication-Results: mx.google.com; dkim=pass header.i=@collabora.com header.s=mail header.b="K0g/Popk"; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=QUARANTINE sp=QUARANTINE dis=NONE) header.from=collabora.com Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S232821AbjEDUXV (ORCPT + 99 others); Thu, 4 May 2023 16:23:21 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:33968 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S232128AbjEDUXA (ORCPT ); Thu, 4 May 2023 16:23:00 -0400 Received: from madras.collabora.co.uk (madras.collabora.co.uk [IPv6:2a00:1098:0:82:1000:25:2eeb:e5ab]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 6D339460DD; Thu, 4 May 2023 13:08:56 -0700 (PDT) Received: from localhost (unknown [188.27.34.213]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange ECDHE (P-256) server-signature RSA-PSS (4096 bits) server-digest SHA256) (No client certificate requested) (Authenticated sender: cristicc) by madras.collabora.co.uk (Postfix) with ESMTPSA id 1ACB166056FE; Thu, 4 May 2023 21:06:59 +0100 (BST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=collabora.com; s=mail; t=1683230819; bh=FAY1EPbzVsY+T4aD7Y+s8uKBaKAiDAFUSJuuliQH5Ko=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=K0g/PopkGy/ytdJlNuQK+/YBNqdYPmR0qFKbxcczNPnJu7F4Vz3YUtRGMnoPOd4/Q SVkO3mP1g04isjX3tDLN6ehlb/E2SzBQbQzMERbqfQvvGgDgYCCbyi17a5PmMOADGN PNpx4mMQqRidja+tIKODSw4CWllXJxxLF9aKOnJLzZF2kPAIzUyhGGTUnzyd0vfyvf 2dmgYqlDsef5SutVFB7yStze4ghkDiOPhrH8ZBznAsvRrqhZ7saT6gCI+Tv2TPUFt7 V56dfFuB9q+Kg5afDmszFAtxsgLZCcuPT6qk7mSm1kPrW6X1mD9x8SviEkvDQbUP3B eRH83iAyVHEgg== From: Cristian Ciocaltea To: Srinivas Kandagatla , Rob Herring , Krzysztof Kozlowski , Heiko Stuebner , Philipp Zabel , Sebastian Reichel , Shreeya Patel , Kever Yang , Finley Xiao , Vincent Legoll Cc: devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-rockchip@lists.infradead.org, linux-kernel@vger.kernel.org, kernel@collabora.com Subject: [PATCH v2 1/8] dt-bindings: nvmem: Convert rockchip-otp.txt to dt-schema Date: Thu, 4 May 2023 23:06:41 +0300 Message-Id: <20230504200648.1119866-2-cristian.ciocaltea@collabora.com> X-Mailer: git-send-email 2.40.0 In-Reply-To: <20230504200648.1119866-1-cristian.ciocaltea@collabora.com> References: <20230504200648.1119866-1-cristian.ciocaltea@collabora.com> MIME-Version: 1.0 X-Spam-Status: No, score=-2.1 required=5.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,SPF_HELO_NONE,SPF_PASS, T_SCC_BODY_TEXT_LINE,URIBL_BLOCKED autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-getmail-retrieved-from-mailbox: =?utf-8?q?INBOX?= X-GMAIL-THRID: =?utf-8?q?1764997558744290554?= X-GMAIL-MSGID: =?utf-8?q?1764997558744290554?= Convert the Rockchip OTP memory bindings to dt-schema. Signed-off-by: Cristian Ciocaltea Reviewed-by: Heiko Stuebner Reviewed-by: Krzysztof Kozlowski --- .../bindings/nvmem/rockchip,otp.yaml | 82 +++++++++++++++++++ .../bindings/nvmem/rockchip-otp.txt | 25 ------ 2 files changed, 82 insertions(+), 25 deletions(-) create mode 100644 Documentation/devicetree/bindings/nvmem/rockchip,otp.yaml delete mode 100644 Documentation/devicetree/bindings/nvmem/rockchip-otp.txt diff --git a/Documentation/devicetree/bindings/nvmem/rockchip,otp.yaml b/Documentation/devicetree/bindings/nvmem/rockchip,otp.yaml new file mode 100644 index 000000000000..4cd425ae2823 --- /dev/null +++ b/Documentation/devicetree/bindings/nvmem/rockchip,otp.yaml @@ -0,0 +1,82 @@ +# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/nvmem/rockchip,otp.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Rockchip internal OTP (One Time Programmable) memory + +maintainers: + - Heiko Stuebner + +allOf: + - $ref: nvmem.yaml# + +properties: + compatible: + enum: + - rockchip,px30-otp + - rockchip,rk3308-otp + + reg: + maxItems: 1 + + clocks: + maxItems: 3 + + clock-names: + items: + - const: otp + - const: apb_pclk + - const: phy + + resets: + maxItems: 1 + + reset-names: + items: + - const: phy + +required: + - compatible + - reg + - clocks + - clock-names + - resets + - reset-names + +unevaluatedProperties: false + +examples: + - | + #include + + soc { + #address-cells = <2>; + #size-cells = <2>; + + otp: efuse@ff290000 { + compatible = "rockchip,px30-otp"; + reg = <0x0 0xff290000 0x0 0x4000>; + clocks = <&cru SCLK_OTP_USR>, <&cru PCLK_OTP_NS>, + <&cru PCLK_OTP_PHY>; + clock-names = "otp", "apb_pclk", "phy"; + resets = <&cru SRST_OTP_PHY>; + reset-names = "phy"; + #address-cells = <1>; + #size-cells = <1>; + + cpu_id: id@7 { + reg = <0x07 0x10>; + }; + + cpu_leakage: cpu-leakage@17 { + reg = <0x17 0x1>; + }; + + performance: performance@1e { + reg = <0x1e 0x1>; + bits = <4 3>; + }; + }; + }; diff --git a/Documentation/devicetree/bindings/nvmem/rockchip-otp.txt b/Documentation/devicetree/bindings/nvmem/rockchip-otp.txt deleted file mode 100644 index 40f649f7c2e5..000000000000 --- a/Documentation/devicetree/bindings/nvmem/rockchip-otp.txt +++ /dev/null @@ -1,25 +0,0 @@ -Rockchip internal OTP (One Time Programmable) memory device tree bindings - -Required properties: -- compatible: Should be one of the following. - - "rockchip,px30-otp" - for PX30 SoCs. - - "rockchip,rk3308-otp" - for RK3308 SoCs. -- reg: Should contain the registers location and size -- clocks: Must contain an entry for each entry in clock-names. -- clock-names: Should be "otp", "apb_pclk" and "phy". -- resets: Must contain an entry for each entry in reset-names. - See ../../reset/reset.txt for details. -- reset-names: Should be "phy". - -See nvmem.txt for more information. - -Example: - otp: otp@ff290000 { - compatible = "rockchip,px30-otp"; - reg = <0x0 0xff290000 0x0 0x4000>; - #address-cells = <1>; - #size-cells = <1>; - clocks = <&cru SCLK_OTP_USR>, <&cru PCLK_OTP_NS>, - <&cru PCLK_OTP_PHY>; - clock-names = "otp", "apb_pclk", "phy"; - }; From patchwork Thu May 4 20:06:42 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Cristian Ciocaltea X-Patchwork-Id: 90231 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a59:b0ea:0:b0:3b6:4342:cba0 with SMTP id b10csp598618vqo; Thu, 4 May 2023 13:49:53 -0700 (PDT) X-Google-Smtp-Source: ACHHUZ6V8Ti3pMmJ17Z4D+P/lCD0Fdd4kasbDil+xc450oBzH67IyE5yZi8Y57VhDiP5Yus7RkMI X-Received: by 2002:a17:902:74c1:b0:19e:ab29:1ec2 with SMTP id f1-20020a17090274c100b0019eab291ec2mr4953404plt.65.1683233393163; Thu, 04 May 2023 13:49:53 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1683233393; cv=none; d=google.com; s=arc-20160816; b=XrLtYYqhCaa93jEoM4HP6Hq3aChjdEpbe+hjuljKacq/Gh5b5TRa2ZQvbks+D+Uo3x k21PD+Uu5F7fWzA60PuwW7OolC2n7JnnFgttH2AGPtndJ1OFhHfnQP84tTUvPy9YDMT2 xAp6uhc+Opjw3tCCb+0pk/06hcsgqHwTQMtbqeRwWLz2ZNw2IzmnllFXwdp79IGPg1yk Vf8RiOgm6vLU0kpPxQ5wY6vW5I9QOhXk9pNsAVFR0mGt9VW8y26GCE6CdwdvyvblYoTD dLhFZhXFiKXGqdAgW+FLsVA7GIxNi0Go721vQHfA6t5MX29C0lpiHVJN4A8QRQuQpkxE YOkQ== ARC-Message-Signature: i=1; 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[2620:137:e000::1:20]) by mx.google.com with ESMTP id l12-20020a170902f68c00b001a96c3b93besi31106213plg.68.2023.05.04.13.49.40; Thu, 04 May 2023 13:49:53 -0700 (PDT) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) client-ip=2620:137:e000::1:20; Authentication-Results: mx.google.com; dkim=pass header.i=@collabora.com header.s=mail header.b=nYzofxzl; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=QUARANTINE sp=QUARANTINE dis=NONE) header.from=collabora.com Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S229802AbjEDUtU (ORCPT + 99 others); Thu, 4 May 2023 16:49:20 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:36958 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229792AbjEDUtE (ORCPT ); Thu, 4 May 2023 16:49:04 -0400 Received: from madras.collabora.co.uk (madras.collabora.co.uk [IPv6:2a00:1098:0:82:1000:25:2eeb:e5ab]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 0E58C46B9; Thu, 4 May 2023 13:48:32 -0700 (PDT) Received: from localhost (unknown [188.27.34.213]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange ECDHE (P-256) server-signature RSA-PSS (4096 bits) server-digest SHA256) (No client certificate requested) (Authenticated sender: cristicc) by madras.collabora.co.uk (Postfix) with ESMTPSA id E03A66605700; Thu, 4 May 2023 21:07:01 +0100 (BST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=collabora.com; s=mail; t=1683230822; bh=MaX5xiMpkREv1mrGy3uq4EJmAVpURoqntpnyiSAp4pw=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=nYzofxzlXC5bJnckergPL6/YhJyiLjHvHA+dWpDbHjxUQU6PiBTLpJh5XmAsiipiJ cgWK9F4V9Xm2vSHp0oT2N45u3oWekNfvXLT/6wERI1Gj+FSCQshNE/ufUR3Rheuged Hkwh8HC6lL9O9YhjNqBu67KwodpU82PAgd8p0kprR1HNvP/Z6/hkpESQkSK0oLx8D0 T19DOyzLAlpHU/euxIkcPEWYSu1zMRh+5NlcbkgN8aBpFhSsz6kUht/IwDQ5PN00/b dqjQvZOW2iw9NOP+ydWdjUkEGz4jcuTiEQEoYgWiZSaW59RkvQ2YxGSagh4MqJ/a6b fxqh04rEBITMg== From: Cristian Ciocaltea To: Srinivas Kandagatla , Rob Herring , Krzysztof Kozlowski , Heiko Stuebner , Philipp Zabel , Sebastian Reichel , Shreeya Patel , Kever Yang , Finley Xiao , Vincent Legoll Cc: devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-rockchip@lists.infradead.org, linux-kernel@vger.kernel.org, kernel@collabora.com Subject: [PATCH v2 2/8] dt-bindings: nvmem: rockchip,otp: Add compatible for RK3588 Date: Thu, 4 May 2023 23:06:42 +0300 Message-Id: <20230504200648.1119866-3-cristian.ciocaltea@collabora.com> X-Mailer: git-send-email 2.40.0 In-Reply-To: <20230504200648.1119866-1-cristian.ciocaltea@collabora.com> References: <20230504200648.1119866-1-cristian.ciocaltea@collabora.com> MIME-Version: 1.0 X-Spam-Status: No, score=-2.1 required=5.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,SPF_HELO_NONE,SPF_PASS, T_SCC_BODY_TEXT_LINE,URIBL_BLOCKED autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-getmail-retrieved-from-mailbox: =?utf-8?q?INBOX?= X-GMAIL-THRID: =?utf-8?q?1764998138090259223?= X-GMAIL-MSGID: =?utf-8?q?1764998138090259223?= Document the OTP memory found on Rockchip RK3588 SoC. Since RK3588 uses different clocks & resets configurations than PX30 / RK3308, provide the required changes in the binding to be able to handle both variants. Signed-off-by: Cristian Ciocaltea Reviewed-by: Heiko Stuebner Reviewed-by: Krzysztof Kozlowski --- .../bindings/nvmem/rockchip,otp.yaml | 54 ++++++++++++++++--- 1 file changed, 47 insertions(+), 7 deletions(-) diff --git a/Documentation/devicetree/bindings/nvmem/rockchip,otp.yaml b/Documentation/devicetree/bindings/nvmem/rockchip,otp.yaml index 4cd425ae2823..9c6eff788928 100644 --- a/Documentation/devicetree/bindings/nvmem/rockchip,otp.yaml +++ b/Documentation/devicetree/bindings/nvmem/rockchip,otp.yaml @@ -9,33 +9,35 @@ title: Rockchip internal OTP (One Time Programmable) memory maintainers: - Heiko Stuebner -allOf: - - $ref: nvmem.yaml# - properties: compatible: enum: - rockchip,px30-otp - rockchip,rk3308-otp + - rockchip,rk3588-otp reg: maxItems: 1 clocks: - maxItems: 3 + minItems: 3 + maxItems: 4 clock-names: + minItems: 3 items: - const: otp - const: apb_pclk - const: phy + - const: arb resets: - maxItems: 1 + minItems: 1 + maxItems: 3 reset-names: - items: - - const: phy + minItems: 1 + maxItems: 3 required: - compatible @@ -45,6 +47,44 @@ required: - resets - reset-names +allOf: + - $ref: nvmem.yaml# + + - if: + properties: + compatible: + contains: + enum: + - rockchip,px30-otp + - rockchip,rk3308-otp + then: + properties: + clocks: + maxItems: 3 + resets: + maxItems: 1 + reset-names: + items: + - const: phy + + - if: + properties: + compatible: + contains: + enum: + - rockchip,rk3588-otp + then: + properties: + clocks: + minItems: 4 + resets: + minItems: 3 + reset-names: + items: + - const: otp + - const: apb + - const: arb + unevaluatedProperties: false examples: From patchwork Thu May 4 20:06:43 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Cristian Ciocaltea X-Patchwork-Id: 90229 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a59:b0ea:0:b0:3b6:4342:cba0 with SMTP id b10csp597666vqo; Thu, 4 May 2023 13:47:25 -0700 (PDT) X-Google-Smtp-Source: ACHHUZ64JbzqBwPcKZPhf2nTpL+glin9tPDjNI63SuHIEWCZktu9SEyPW1VaaKTnSC3qt6CvGM9v X-Received: by 2002:a05:6a20:54a1:b0:f0:a556:4777 with SMTP id i33-20020a056a2054a100b000f0a5564777mr4249805pzk.3.1683233244729; Thu, 04 May 2023 13:47:24 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1683233244; cv=none; d=google.com; s=arc-20160816; b=dfX8UYR6cwQ7WSqSjNTZsDaeYjrdwqEj0pOfV7W44g0SEN+nJNAH5y5himuDTJHvpw XlzI8t0MHf2g0dyUuHX10VKhC2BE4bd4sa5Pfm6aYA+/4UAkidmlgUdJN+MJRr7p8+Is /cZOO+SovyyYwtn7X4B1N391+1JYItazwQq1PgR4wBeIM5wBLdwcYAYAhhv+9jo1vi2y 9T4axeSUw8aZpGvGGskWyDiqR3WRyTfEOweaE6nBexbY1rKTBCo9kNh0gQkFzBkVpT+6 NLvNZuPjpDUP89vAxmnzlI7pGOAZ/27NYQE3Mlhx+4niJRG+a6fMlOmriQQaBnjVpvp4 pbhA== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from :dkim-signature; bh=QGwRO5gzQYo2DFqv+jGQmWnhv43v1DsLRL0Hw4cV/9U=; b=vyrAZpCKj/ugLTU+VBSbos98LZ+Vncj5MnxplsiQYLnMXHldMrf8O7fb6aSXPxcawl Idjk0TGGbDz4k3ltMYA07WUpB804habTQfktLbEfMLDD2L25e1KbWok2LajjD1UtKcvI Zu0CI+KT286s/5iRcV0RUNQatrOJOO3q07wGlOxzWZDdvJyTDUs6+U8FWW7NTh+WBH5l WqwiYih4PtnB5y5PSkHV9IC7fmxxNpaBv9VSNdTYH2cjofBKgcCWmH5d513+RBgbPNuB 2pKz1dWFKl0Ig3dB2chkMnJaM0QTULGMtA3kFNruinljF2eJu/nqIyFQ/Y8io3hcB1Vc AcxQ== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@collabora.com header.s=mail header.b=VarQny02; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=QUARANTINE sp=QUARANTINE dis=NONE) header.from=collabora.com Received: from out1.vger.email (out1.vger.email. [2620:137:e000::1:20]) by mx.google.com with ESMTP id o27-20020a637e5b000000b0052c9896a41fsi283330pgn.164.2023.05.04.13.47.10; Thu, 04 May 2023 13:47:24 -0700 (PDT) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) client-ip=2620:137:e000::1:20; Authentication-Results: mx.google.com; dkim=pass header.i=@collabora.com header.s=mail header.b=VarQny02; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=QUARANTINE sp=QUARANTINE dis=NONE) header.from=collabora.com Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S230015AbjEDUjU (ORCPT + 99 others); Thu, 4 May 2023 16:39:20 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:53668 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S230474AbjEDUjA (ORCPT ); Thu, 4 May 2023 16:39:00 -0400 Received: from madras.collabora.co.uk (madras.collabora.co.uk [IPv6:2a00:1098:0:82:1000:25:2eeb:e5ab]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id DAD8222F6D; Thu, 4 May 2023 13:33:24 -0700 (PDT) Received: from localhost (unknown [188.27.34.213]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange ECDHE (P-256) server-signature RSA-PSS (4096 bits) server-digest SHA256) (No client certificate requested) (Authenticated sender: cristicc) by madras.collabora.co.uk (Postfix) with ESMTPSA id 7D64D6605706; Thu, 4 May 2023 21:07:04 +0100 (BST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=collabora.com; s=mail; t=1683230824; bh=bsTYiFtKphZh0XX4Lj4uy3XKBQ72cqtuCs3n4S2XrLE=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=VarQny02pcjwxuZN35D8+n09G0gD2N5TIHVicIy4RHQSzpJCKfAsbDN+rtRc/FsIV xenUc25X8oZkTYOtWiVXBR+fjWFq9fITiqyT9faQaaK2+H8A7FzYIMo4oVLBgZwDGb VciirdQjZrvHCCXXgc/+oDZr22hzWQkzQej0rVc+8a/2E0Ny6b1ThKHpVACO8GFG0+ 7AenE7Qh4saScriLumELH5pO8oHsAYiH7Vq60QtKrhhElyB90PuXwQHVlN2nGgUNUJ q0YRvdMo0p6spbsL//13GqjIR8CtxigPxtXKNue3+8qMjlNED5RZWhjvKXKworGtAo 1anN3d8ADkpKQ== From: Cristian Ciocaltea To: Srinivas Kandagatla , Rob Herring , Krzysztof Kozlowski , Heiko Stuebner , Philipp Zabel , Sebastian Reichel , Shreeya Patel , Kever Yang , Finley Xiao , Vincent Legoll Cc: devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-rockchip@lists.infradead.org, linux-kernel@vger.kernel.org, kernel@collabora.com Subject: [PATCH v2 3/8] nvmem: rockchip-otp: Add clks and reg_read to rockchip_data Date: Thu, 4 May 2023 23:06:43 +0300 Message-Id: <20230504200648.1119866-4-cristian.ciocaltea@collabora.com> X-Mailer: git-send-email 2.40.0 In-Reply-To: <20230504200648.1119866-1-cristian.ciocaltea@collabora.com> References: <20230504200648.1119866-1-cristian.ciocaltea@collabora.com> MIME-Version: 1.0 X-Spam-Status: No, score=-2.1 required=5.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,SPF_HELO_NONE,SPF_PASS, T_SCC_BODY_TEXT_LINE,URIBL_BLOCKED autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-getmail-retrieved-from-mailbox: =?utf-8?q?INBOX?= X-GMAIL-THRID: =?utf-8?q?1764997983263628120?= X-GMAIL-MSGID: =?utf-8?q?1764997983263628120?= In preparation to support new Rockchip OTP memory devices with different clock configurations and register layout, extend rockchip_data struct with the related members: clks, num_clks, reg_read. Additionally, to avoid managing redundant driver data, drop num_clks member from rockchip_otp struct and update all references to point to the equivalent member in rockchip_data. Signed-off-by: Cristian Ciocaltea Tested-by: Vincent Legoll Reviewed-by: Heiko Stuebner --- drivers/nvmem/rockchip-otp.c | 79 ++++++++++++++++++++++-------------- 1 file changed, 49 insertions(+), 30 deletions(-) diff --git a/drivers/nvmem/rockchip-otp.c b/drivers/nvmem/rockchip-otp.c index 9f53bcce2f87..b5a84b379da4 100644 --- a/drivers/nvmem/rockchip-otp.c +++ b/drivers/nvmem/rockchip-otp.c @@ -54,21 +54,19 @@ #define OTPC_TIMEOUT 10000 +struct rockchip_data { + int size; + const char * const *clks; + int num_clks; + nvmem_reg_read_t reg_read; +}; + struct rockchip_otp { struct device *dev; void __iomem *base; - struct clk_bulk_data *clks; - int num_clks; + struct clk_bulk_data *clks; struct reset_control *rst; -}; - -/* list of required clocks */ -static const char * const rockchip_otp_clocks[] = { - "otp", "apb_pclk", "phy", -}; - -struct rockchip_data { - int size; + const struct rockchip_data *data; }; static int rockchip_otp_reset(struct rockchip_otp *otp) @@ -132,29 +130,23 @@ static int rockchip_otp_ecc_enable(struct rockchip_otp *otp, bool enable) return ret; } -static int rockchip_otp_read(void *context, unsigned int offset, - void *val, size_t bytes) +static int px30_otp_read(void *context, unsigned int offset, + void *val, size_t bytes) { struct rockchip_otp *otp = context; u8 *buf = val; - int ret = 0; - - ret = clk_bulk_prepare_enable(otp->num_clks, otp->clks); - if (ret < 0) { - dev_err(otp->dev, "failed to prepare/enable clks\n"); - return ret; - } + int ret; ret = rockchip_otp_reset(otp); if (ret) { dev_err(otp->dev, "failed to reset otp phy\n"); - goto disable_clks; + return ret; } ret = rockchip_otp_ecc_enable(otp, false); if (ret < 0) { dev_err(otp->dev, "rockchip_otp_ecc_enable err\n"); - goto disable_clks; + return ret; } writel(OTPC_USE_USER | OTPC_USE_USER_MASK, otp->base + OTPC_USER_CTRL); @@ -174,8 +166,28 @@ static int rockchip_otp_read(void *context, unsigned int offset, read_end: writel(0x0 | OTPC_USE_USER_MASK, otp->base + OTPC_USER_CTRL); -disable_clks: - clk_bulk_disable_unprepare(otp->num_clks, otp->clks); + + return ret; +} + +static int rockchip_otp_read(void *context, unsigned int offset, + void *val, size_t bytes) +{ + struct rockchip_otp *otp = context; + int ret; + + if (!otp->data || !otp->data->reg_read) + return -EINVAL; + + ret = clk_bulk_prepare_enable(otp->data->num_clks, otp->clks); + if (ret < 0) { + dev_err(otp->dev, "failed to prepare/enable clks\n"); + return ret; + } + + ret = otp->data->reg_read(context, offset, val, bytes); + + clk_bulk_disable_unprepare(otp->data->num_clks, otp->clks); return ret; } @@ -189,8 +201,15 @@ static struct nvmem_config otp_config = { .reg_read = rockchip_otp_read, }; +static const char * const px30_otp_clocks[] = { + "otp", "apb_pclk", "phy", +}; + static const struct rockchip_data px30_data = { .size = 0x40, + .clks = px30_otp_clocks, + .num_clks = ARRAY_SIZE(px30_otp_clocks), + .reg_read = px30_otp_read, }; static const struct of_device_id rockchip_otp_match[] = { @@ -225,21 +244,21 @@ static int rockchip_otp_probe(struct platform_device *pdev) if (!otp) return -ENOMEM; + otp->data = data; otp->dev = dev; otp->base = devm_platform_ioremap_resource(pdev, 0); if (IS_ERR(otp->base)) return PTR_ERR(otp->base); - otp->num_clks = ARRAY_SIZE(rockchip_otp_clocks); - otp->clks = devm_kcalloc(dev, otp->num_clks, - sizeof(*otp->clks), GFP_KERNEL); + otp->clks = devm_kcalloc(dev, data->num_clks, sizeof(*otp->clks), + GFP_KERNEL); if (!otp->clks) return -ENOMEM; - for (i = 0; i < otp->num_clks; ++i) - otp->clks[i].id = rockchip_otp_clocks[i]; + for (i = 0; i < data->num_clks; ++i) + otp->clks[i].id = data->clks[i]; - ret = devm_clk_bulk_get(dev, otp->num_clks, otp->clks); + ret = devm_clk_bulk_get(dev, data->num_clks, otp->clks); if (ret) return ret; From patchwork Thu May 4 20:06:44 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Cristian Ciocaltea X-Patchwork-Id: 90238 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a59:b0ea:0:b0:3b6:4342:cba0 with SMTP id b10csp604452vqo; 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[2620:137:e000::1:20]) by mx.google.com with ESMTP id 80-20020a621953000000b0064388a82666si253114pfz.378.2023.05.04.14.02.09; Thu, 04 May 2023 14:02:23 -0700 (PDT) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) client-ip=2620:137:e000::1:20; Authentication-Results: mx.google.com; dkim=pass header.i=@collabora.com header.s=mail header.b=D5fUQzDh; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=QUARANTINE sp=QUARANTINE dis=NONE) header.from=collabora.com Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S230385AbjEDUkZ (ORCPT + 99 others); Thu, 4 May 2023 16:40:25 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:53950 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S231598AbjEDUjz (ORCPT ); Thu, 4 May 2023 16:39:55 -0400 Received: from madras.collabora.co.uk (madras.collabora.co.uk [IPv6:2a00:1098:0:82:1000:25:2eeb:e5ab]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id CCE9D1A1CD; Thu, 4 May 2023 13:34:44 -0700 (PDT) Received: from localhost (unknown [188.27.34.213]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange ECDHE (P-256) server-signature RSA-PSS (4096 bits) server-digest SHA256) (No client certificate requested) (Authenticated sender: cristicc) by madras.collabora.co.uk (Postfix) with ESMTPSA id 3779B6605701; Thu, 4 May 2023 21:07:08 +0100 (BST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=collabora.com; s=mail; t=1683230828; bh=tj5wNFVQXlsB8/T7XkM5lV9GRsAs+861QXowj8ll4qg=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=D5fUQzDh9jZEt4W5d0V5VZwBtc1VqHnMitIS+KkO9iiZxxrcKpyyR/dEow0nnuQmj ISR0vIw7Lpk+hC0hNaUF+F+TfDHc3foG3jBzfdDdd1i8Fn2yGfKkJ0PhdBdKT+qvkw Oufm+hnUZBbqTuWAuNosAZpMfaTQwjeH/ROcbcTKNyIPueZdoiPIBJjxPK4qo+t+bA c6BOWprlQYeRoy9piCHGnilDSN56RoG4Gd3v4DrFxfSq7E8ZU8SoBwipsE4VPgh+HS 8hHd8rnHCLq9tA6IglAWi95kjzn/Xk5aEidcK1G95V/m1PYysQzNn5F2ovUp++aemm Wm0SJVgQ/8BZg== From: Cristian Ciocaltea To: Srinivas Kandagatla , Rob Herring , Krzysztof Kozlowski , Heiko Stuebner , Philipp Zabel , Sebastian Reichel , Shreeya Patel , Kever Yang , Finley Xiao , Vincent Legoll Cc: devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-rockchip@lists.infradead.org, linux-kernel@vger.kernel.org, kernel@collabora.com Subject: [PATCH v2 4/8] nvmem: rockchip-otp: Generalize rockchip_otp_wait_status() Date: Thu, 4 May 2023 23:06:44 +0300 Message-Id: <20230504200648.1119866-5-cristian.ciocaltea@collabora.com> X-Mailer: git-send-email 2.40.0 In-Reply-To: <20230504200648.1119866-1-cristian.ciocaltea@collabora.com> References: <20230504200648.1119866-1-cristian.ciocaltea@collabora.com> MIME-Version: 1.0 X-Spam-Status: No, score=-2.1 required=5.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,SPF_HELO_NONE,SPF_PASS, T_SCC_BODY_TEXT_LINE,URIBL_BLOCKED autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-getmail-retrieved-from-mailbox: =?utf-8?q?INBOX?= X-GMAIL-THRID: =?utf-8?q?1764998925195622684?= X-GMAIL-MSGID: =?utf-8?q?1764998925195622684?= In preparation to support additional Rockchip OTP memory devices with different register layout, generalize rockchip_otp_wait_status() to accept a new parameter for specifying the offset of the status register. Signed-off-by: Cristian Ciocaltea Tested-by: Vincent Legoll Reviewed-by: Heiko Stuebner --- drivers/nvmem/rockchip-otp.c | 11 ++++++----- 1 file changed, 6 insertions(+), 5 deletions(-) diff --git a/drivers/nvmem/rockchip-otp.c b/drivers/nvmem/rockchip-otp.c index b5a84b379da4..b62e001f9116 100644 --- a/drivers/nvmem/rockchip-otp.c +++ b/drivers/nvmem/rockchip-otp.c @@ -90,18 +90,19 @@ static int rockchip_otp_reset(struct rockchip_otp *otp) return 0; } -static int rockchip_otp_wait_status(struct rockchip_otp *otp, u32 flag) +static int rockchip_otp_wait_status(struct rockchip_otp *otp, + unsigned int reg, u32 flag) { u32 status = 0; int ret; - ret = readl_poll_timeout_atomic(otp->base + OTPC_INT_STATUS, status, + ret = readl_poll_timeout_atomic(otp->base + reg, status, (status & flag), 1, OTPC_TIMEOUT); if (ret) return ret; /* clean int status */ - writel(flag, otp->base + OTPC_INT_STATUS); + writel(flag, otp->base + reg); return 0; } @@ -123,7 +124,7 @@ static int rockchip_otp_ecc_enable(struct rockchip_otp *otp, bool enable) writel(SBPI_ENABLE_MASK | SBPI_ENABLE, otp->base + OTPC_SBPI_CTRL); - ret = rockchip_otp_wait_status(otp, OTPC_SBPI_DONE); + ret = rockchip_otp_wait_status(otp, OTPC_INT_STATUS, OTPC_SBPI_DONE); if (ret < 0) dev_err(otp->dev, "timeout during ecc_enable\n"); @@ -156,7 +157,7 @@ static int px30_otp_read(void *context, unsigned int offset, otp->base + OTPC_USER_ADDR); writel(OTPC_USER_FSM_ENABLE | OTPC_USER_FSM_ENABLE_MASK, otp->base + OTPC_USER_ENABLE); - ret = rockchip_otp_wait_status(otp, OTPC_USER_DONE); + ret = rockchip_otp_wait_status(otp, OTPC_INT_STATUS, OTPC_USER_DONE); if (ret < 0) { dev_err(otp->dev, "timeout during read setup\n"); goto read_end; From patchwork Thu May 4 20:06:45 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Cristian Ciocaltea X-Patchwork-Id: 90234 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a59:b0ea:0:b0:3b6:4342:cba0 with SMTP id b10csp601174vqo; Thu, 4 May 2023 13:56:33 -0700 (PDT) X-Google-Smtp-Source: ACHHUZ7DwJjRg1MKHd4w+2k6ZIBpHxRw1NPU5SWD1bboseXsZxyR/OhQI8kyyaz1aoYxUnA5LH3i X-Received: by 2002:a17:903:120e:b0:1aa:e30e:29d3 with SMTP id l14-20020a170903120e00b001aae30e29d3mr6145267plh.29.1683233793359; Thu, 04 May 2023 13:56:33 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1683233793; cv=none; d=google.com; s=arc-20160816; b=R4F5hLpaO1iuyFbdh+ZXEtdvGo5URYy2GROgVAlcnWIixg8S+TzX6QEcepbYY8HYud leSNz71faQp6NT5Gdml2sGXJKdCvuZMQdYOktOOkHPfe2hIpAGx/uWy/y1xoovfy9HH0 ble3nAcZA9v+zUAwHEHuE49dudiY+rUhz9fyf27QfcMtC3ba4RkPhAwWLMvNFP0EeqPi 2rjtIeq4BOttLmj2gJvZlVl+Y2dc55ISjA6zK5t6EWinxaXJwezxn/UVL6t+WHMNecOk LqnlCeZ8r5FFU18StR1YRQoT29m3ZDri6z/6y+V/9qPbRzjCKOrNpq5Mh6RJrNmnLeAS ru2w== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from :dkim-signature; bh=aNCL2SsFMtLF+woCjEjcgeWZ7S3strS2NHoSBj7cFSQ=; b=MWr1Yel/FYBPnyQWmYxgyAOLPeDiXmtTrPS6EWaJYaO1m5CTa0loWa7AtUlXrt30PJ LiXVpJdcK4VERmuXC3HdcWDrdEXAZvEHaqj6OG9ah6vFHCxeVqO2q2gkrc2O9SX6S6b/ uyn/GVF6pRqGrL7EYrwvQl8atRcPY+MR7GcHf3TkpwCRRZvrYFF1NdX3qTD2aVbr33Wo wkLpgX0NFFFTxMZ8od9Me8HKDnCqK+3gH7HAfmsO5LaQRQnStzmFSBRc/fv76KEYc73R 3S2p6HWfH131oYjvtfxmcwtdhrsnAQPm6ndJDu622Ftey2eqSQ01arPcTuaNu1i8a2NZ Sp8w== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@collabora.com header.s=mail header.b=RvDTFACj; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=QUARANTINE sp=QUARANTINE dis=NONE) header.from=collabora.com Received: from out1.vger.email (out1.vger.email. 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Signed-off-by: Cristian Ciocaltea Tested-by: Vincent Legoll Reviewed-by: Heiko Stuebner --- drivers/nvmem/rockchip-otp.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/nvmem/rockchip-otp.c b/drivers/nvmem/rockchip-otp.c index b62e001f9116..439aea1f8874 100644 --- a/drivers/nvmem/rockchip-otp.c +++ b/drivers/nvmem/rockchip-otp.c @@ -263,7 +263,7 @@ static int rockchip_otp_probe(struct platform_device *pdev) if (ret) return ret; - otp->rst = devm_reset_control_get(dev, "phy"); + otp->rst = devm_reset_control_array_get_exclusive(dev); if (IS_ERR(otp->rst)) return PTR_ERR(otp->rst); From patchwork Thu May 4 20:06:46 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Cristian Ciocaltea X-Patchwork-Id: 90232 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a59:b0ea:0:b0:3b6:4342:cba0 with SMTP id b10csp600452vqo; Thu, 4 May 2023 13:54:44 -0700 (PDT) X-Google-Smtp-Source: ACHHUZ5129c63n/MtQxWzf6uCWMH98Ea7O/8HR6qIPBbOsLP/MiaSL8z67tMcOuqGhWjNHgNcY/6 X-Received: by 2002:a17:90a:8049:b0:24d:e929:56cf with SMTP id e9-20020a17090a804900b0024de92956cfmr3454811pjw.39.1683233684426; Thu, 04 May 2023 13:54:44 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1683233684; cv=none; d=google.com; s=arc-20160816; b=Xzea5Vx8Y4RcHIDzQs52clCyJlmdjVSakV/ts34x0p3TAPRi7Lf2IsZ3za1q0Wdw2Z LxVGjM4PWT76WMoNIPgY100jvXhVaaxqPwanHIaQgSRz0kdH01B2yXCvmA+ekXmW6rcV ldyeLZO4eZUMnBitZOENbKgzGEM/wUGW8ZtpdVva0UVoxpxABbPCZkT4qGTrUi2BKgpL YPBuyLSUtVTcMN7XUH31cHPlOBz9VlI1q9+d6vmbZDK3l1+I0TBn41lVL3kgM2bFAGHo eSNtTMohgLsDLdiLRLSY4o/MTSsRe8Ly80MNiEhSxJD8wLut6KC4oGAnmGG50PDHRKZ0 qjuw== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from :dkim-signature; bh=yL2k7/HAHDyyNgrl1iAhxlgb9ms7e7E/tFMo9NbqJ9E=; b=0xSYmmSrxNRItJnC91oHAF0NuSFq5Zv1LYdCATcjye3F/9WnEq2rhpHan9D57C3uGg 12r9XaeGOhqpe5jW2tti5kzL98fCL092p3G+6uxAVuL55j8mbsRKoOpGBEZJLpEbRa+G kB3A+YQPTvM5S0OOyQNLt7IWgsOpyhl/uDFQStY9wiHMaMRQMSqsv9fk2LprTWs7fRLx N6JrQXi3WHFWL7b/+ssNsr6JoGuDv3r6bPO8Fwl3/E/lR7jSrhbTL3ty6ZdMN3/v3lxQ gMleWcnS8BKExxX51S8rowuqlFo3B0vpTzcU06qYw00Pxys8Ieogrlq8E2vg85ZCZqR8 4qdg== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@collabora.com header.s=mail header.b="Mog/gRj1"; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=QUARANTINE sp=QUARANTINE dis=NONE) header.from=collabora.com Received: from out1.vger.email (out1.vger.email. [2620:137:e000::1:20]) by mx.google.com with ESMTP id s10-20020a17090aad8a00b002498408b1c5si4749870pjq.39.2023.05.04.13.54.30; Thu, 04 May 2023 13:54:44 -0700 (PDT) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) client-ip=2620:137:e000::1:20; Authentication-Results: mx.google.com; dkim=pass header.i=@collabora.com header.s=mail header.b="Mog/gRj1"; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=QUARANTINE sp=QUARANTINE dis=NONE) header.from=collabora.com Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S230459AbjEDUj0 (ORCPT + 99 others); Thu, 4 May 2023 16:39:26 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:53744 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S230387AbjEDUjH (ORCPT ); Thu, 4 May 2023 16:39:07 -0400 Received: from madras.collabora.co.uk (madras.collabora.co.uk [IPv6:2a00:1098:0:82:1000:25:2eeb:e5ab]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id D5CED19D4C; Thu, 4 May 2023 13:33:34 -0700 (PDT) Received: from localhost (unknown [188.27.34.213]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange ECDHE (P-256) server-signature RSA-PSS (4096 bits) server-digest SHA256) (No client certificate requested) (Authenticated sender: cristicc) by madras.collabora.co.uk (Postfix) with ESMTPSA id 60EA866056FF; Thu, 4 May 2023 21:07:14 +0100 (BST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=collabora.com; s=mail; t=1683230834; bh=liP+soMrPQDOXxG2SMtxGxRaMcIPp5ZaL+QpnsunI+8=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=Mog/gRj1ztd5K51jKBGYdqmuisZiPHDnvVb5L5W0/NkdTgORXgtK2QJ29Rov0kYQP 7dcSIu/NYIixTxqqAaljb1XMfnBGfY5giCriXv+sKPrVy0FfRtSlABBG9X8tysw5yZ 8wzCHbvT9l84lc5cq96B4ax0XwxlClSGkBhmbky+fYLVTcNVvMdxwI0s2Xv/pc3TfL K0I8AhLvAzIKIHdacgqJY3n5wbpa0QukcYmipZbefRAy66o8fCaunv8MVGT4zXdwdQ bXTmiTONhmJe8jZE2dK4Bfn8YxjtEh3erIyoZewTqSWDafVguO4i2M0/4iPuM4Uybf 57OYJEmZ9UVkg== From: Cristian Ciocaltea To: Srinivas Kandagatla , Rob Herring , Krzysztof Kozlowski , Heiko Stuebner , Philipp Zabel , Sebastian Reichel , Shreeya Patel , Kever Yang , Finley Xiao , Vincent Legoll Cc: devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-rockchip@lists.infradead.org, linux-kernel@vger.kernel.org, kernel@collabora.com Subject: [PATCH v2 6/8] nvmem: rockchip-otp: Improve probe error handling Date: Thu, 4 May 2023 23:06:46 +0300 Message-Id: <20230504200648.1119866-7-cristian.ciocaltea@collabora.com> X-Mailer: git-send-email 2.40.0 In-Reply-To: <20230504200648.1119866-1-cristian.ciocaltea@collabora.com> References: <20230504200648.1119866-1-cristian.ciocaltea@collabora.com> MIME-Version: 1.0 X-Spam-Status: No, score=-2.1 required=5.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,SPF_HELO_NONE,SPF_PASS, T_SCC_BODY_TEXT_LINE,URIBL_BLOCKED autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-getmail-retrieved-from-mailbox: =?utf-8?q?INBOX?= X-GMAIL-THRID: =?utf-8?q?1764998443816188143?= X-GMAIL-MSGID: =?utf-8?q?1764998443816188143?= Enhance error handling in the probe function by making use of dev_err_probe(), which ensures the error code is always printed, in addition to the specified error message. Signed-off-by: Cristian Ciocaltea Tested-by: Vincent Legoll Reviewed-by: Heiko Stuebner --- drivers/nvmem/rockchip-otp.c | 21 ++++++++++++--------- 1 file changed, 12 insertions(+), 9 deletions(-) diff --git a/drivers/nvmem/rockchip-otp.c b/drivers/nvmem/rockchip-otp.c index 439aea1f8874..84bf956cc4e1 100644 --- a/drivers/nvmem/rockchip-otp.c +++ b/drivers/nvmem/rockchip-otp.c @@ -235,10 +235,8 @@ static int rockchip_otp_probe(struct platform_device *pdev) int ret, i; data = of_device_get_match_data(dev); - if (!data) { - dev_err(dev, "failed to get match data\n"); - return -EINVAL; - } + if (!data) + return dev_err_probe(dev, -EINVAL, "failed to get match data\n"); otp = devm_kzalloc(&pdev->dev, sizeof(struct rockchip_otp), GFP_KERNEL); @@ -249,7 +247,8 @@ static int rockchip_otp_probe(struct platform_device *pdev) otp->dev = dev; otp->base = devm_platform_ioremap_resource(pdev, 0); if (IS_ERR(otp->base)) - return PTR_ERR(otp->base); + return dev_err_probe(dev, PTR_ERR(otp->base), + "failed to ioremap resource\n"); otp->clks = devm_kcalloc(dev, data->num_clks, sizeof(*otp->clks), GFP_KERNEL); @@ -261,18 +260,22 @@ static int rockchip_otp_probe(struct platform_device *pdev) ret = devm_clk_bulk_get(dev, data->num_clks, otp->clks); if (ret) - return ret; + return dev_err_probe(dev, ret, "failed to get clocks\n"); otp->rst = devm_reset_control_array_get_exclusive(dev); if (IS_ERR(otp->rst)) - return PTR_ERR(otp->rst); + return dev_err_probe(dev, PTR_ERR(otp->rst), + "failed to get resets\n"); otp_config.size = data->size; otp_config.priv = otp; otp_config.dev = dev; - nvmem = devm_nvmem_register(dev, &otp_config); - return PTR_ERR_OR_ZERO(nvmem); + nvmem = devm_nvmem_register(dev, &otp_config); + if (IS_ERR(nvmem)) + return dev_err_probe(dev, PTR_ERR(nvmem), + "failed to register nvmem device\n"); + return 0; } static struct platform_driver rockchip_otp_driver = { From patchwork Thu May 4 20:06:47 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Cristian Ciocaltea X-Patchwork-Id: 90228 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a59:b0ea:0:b0:3b6:4342:cba0 with SMTP id b10csp597668vqo; Thu, 4 May 2023 13:47:25 -0700 (PDT) X-Google-Smtp-Source: ACHHUZ4PxY4hTInTNQZW4U8/T2q7CpNYupxEZ0O5RGOy7dXFPdoXsSKY9yKYNdcCDWolWPyj/nc4 X-Received: by 2002:a05:6a00:9a6:b0:63a:65a9:10db with SMTP id u38-20020a056a0009a600b0063a65a910dbmr5096102pfg.7.1683233244751; Thu, 04 May 2023 13:47:24 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1683233244; cv=none; d=google.com; s=arc-20160816; b=qB3gMjtnXpexmdC9p0vOyiQssIw3s/nzGEn+HSUyNffCdVFC++p2wenQl52jDXBsZJ sHme5IaWGmfpofw0iw+vF96ocs822EOOUbgH8rfpI+/SVUjjHplVHzLIULH/BGYefr+u YB46NB6XgqW2wRXrB+AqQ4WiyaPeLB54prcDvN2JlyrktbEO51MMXDxiB2jHjpU0oQpc ATMxBIklmymU2hGXLaB4LpupIGA+guFlSkrh5Z/XAfJtW/Uy2SVqdniwBLnDaaHvjOnD psDaFvWpv1qqKO/rtHzqceJJZPfuF69HBf0Lx8p9BNWe0TQWd/Kh3LrFJDKiEN7jqQgB tXBw== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from :dkim-signature; bh=5UeFOnokKEG+rFchz7xZEvGnDWk1sTNIOnRqjUrjnAg=; b=R8EIkEMqNUz19D8qlMAXkEj9VbmiQHsoKk8QzllLrBfyS0ifFD+I22jKRji6dEdWjp xms0YFMZmy6jd8ciC0tB3uzKlOg6RIKN8dR9VnJ6O9GM8SEmWw67SccPu2Tbi9DpOGxs IqIMuEqstbznN56+2N3Wd9m2cqx4dD+3F8gTzilaniercbo+ZqhM2SBfyLT82G2XqOyK AdDC98kS7d3ryL70jXOqdLVXOt3NZLQmV9vPs9ZYuT37bTka17zSYcsLw2H+jHlKyysS GIn6LU6OZzz5mWnymNKHa1cbMQD7j5KnOvHjQ+D6qGNiR3Fd8jZl0SW+gDRahopKfJr7 Mo/g== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@collabora.com header.s=mail header.b="RjM/umza"; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=QUARANTINE sp=QUARANTINE dis=NONE) header.from=collabora.com Received: from out1.vger.email (out1.vger.email. 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While here, remove the unnecessary 'void *' casts in the OF device ID table. Co-developed-by: Finley Xiao Signed-off-by: Finley Xiao Signed-off-by: Cristian Ciocaltea Tested-by: Vincent Legoll Reviewed-by: Heiko Stuebner --- drivers/nvmem/rockchip-otp.c | 78 +++++++++++++++++++++++++++++++++++- 1 file changed, 76 insertions(+), 2 deletions(-) diff --git a/drivers/nvmem/rockchip-otp.c b/drivers/nvmem/rockchip-otp.c index 84bf956cc4e1..cb9aa5428350 100644 --- a/drivers/nvmem/rockchip-otp.c +++ b/drivers/nvmem/rockchip-otp.c @@ -54,6 +54,19 @@ #define OTPC_TIMEOUT 10000 +/* RK3588 Register */ +#define RK3588_OTPC_AUTO_CTRL 0x04 +#define RK3588_OTPC_AUTO_EN 0x08 +#define RK3588_OTPC_INT_ST 0x84 +#define RK3588_OTPC_DOUT0 0x20 +#define RK3588_NO_SECURE_OFFSET 0x300 +#define RK3588_NBYTES 4 +#define RK3588_BURST_NUM 1 +#define RK3588_BURST_SHIFT 8 +#define RK3588_ADDR_SHIFT 16 +#define RK3588_AUTO_EN BIT(0) +#define RK3588_RD_DONE BIT(1) + struct rockchip_data { int size; const char * const *clks; @@ -171,6 +184,52 @@ static int px30_otp_read(void *context, unsigned int offset, return ret; } +static int rk3588_otp_read(void *context, unsigned int offset, + void *val, size_t bytes) +{ + struct rockchip_otp *otp = context; + unsigned int addr_start, addr_end, addr_len; + int ret, i = 0; + u32 data; + u8 *buf; + + addr_start = round_down(offset, RK3588_NBYTES) / RK3588_NBYTES; + addr_end = round_up(offset + bytes, RK3588_NBYTES) / RK3588_NBYTES; + addr_len = addr_end - addr_start; + addr_start += RK3588_NO_SECURE_OFFSET; + + buf = kzalloc(array_size(addr_len, RK3588_NBYTES), GFP_KERNEL); + if (!buf) + return -ENOMEM; + + while (addr_len--) { + writel((addr_start << RK3588_ADDR_SHIFT) | + (RK3588_BURST_NUM << RK3588_BURST_SHIFT), + otp->base + RK3588_OTPC_AUTO_CTRL); + writel(RK3588_AUTO_EN, otp->base + RK3588_OTPC_AUTO_EN); + + ret = rockchip_otp_wait_status(otp, RK3588_OTPC_INT_ST, + RK3588_RD_DONE); + if (ret < 0) { + dev_err(otp->dev, "timeout during read setup\n"); + goto read_end; + } + + data = readl(otp->base + RK3588_OTPC_DOUT0); + memcpy(&buf[i], &data, RK3588_NBYTES); + + i += RK3588_NBYTES; + addr_start++; + } + + memcpy(val, buf + offset % RK3588_NBYTES, bytes); + +read_end: + kfree(buf); + + return ret; +} + static int rockchip_otp_read(void *context, unsigned int offset, void *val, size_t bytes) { @@ -213,14 +272,29 @@ static const struct rockchip_data px30_data = { .reg_read = px30_otp_read, }; +static const char * const rk3588_otp_clocks[] = { + "otp", "apb_pclk", "phy", "arb", +}; + +static const struct rockchip_data rk3588_data = { + .size = 0x400, + .clks = rk3588_otp_clocks, + .num_clks = ARRAY_SIZE(rk3588_otp_clocks), + .reg_read = rk3588_otp_read, +}; + static const struct of_device_id rockchip_otp_match[] = { { .compatible = "rockchip,px30-otp", - .data = (void *)&px30_data, + .data = &px30_data, }, { .compatible = "rockchip,rk3308-otp", - .data = (void *)&px30_data, + .data = &px30_data, + }, + { + .compatible = "rockchip,rk3588-otp", + .data = &rk3588_data, }, { /* sentinel */ }, }; From patchwork Thu May 4 20:06:48 2023 Content-Type: text/plain; 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Co-developed-by: Finley Xiao Signed-off-by: Finley Xiao Signed-off-by: Cristian Ciocaltea Tested-by: Vincent Legoll --- arch/arm64/boot/dts/rockchip/rk3588s.dtsi | 54 +++++++++++++++++++++++ 1 file changed, 54 insertions(+) diff --git a/arch/arm64/boot/dts/rockchip/rk3588s.dtsi b/arch/arm64/boot/dts/rockchip/rk3588s.dtsi index 767084a1ec43..d842988af418 100644 --- a/arch/arm64/boot/dts/rockchip/rk3588s.dtsi +++ b/arch/arm64/boot/dts/rockchip/rk3588s.dtsi @@ -1822,6 +1822,60 @@ spi4: spi@fecb0000 { status = "disabled"; }; + otp: efuse@fecc0000 { + compatible = "rockchip,rk3588-otp"; + reg = <0x0 0xfecc0000 0x0 0x400>; + clocks = <&cru CLK_OTPC_NS>, <&cru PCLK_OTPC_NS>, + <&cru CLK_OTP_PHY_G>, <&cru CLK_OTPC_ARB>; + clock-names = "otp", "apb_pclk", "phy", "arb"; + resets = <&cru SRST_OTPC_NS>, <&cru SRST_P_OTPC_NS>, + <&cru SRST_OTPC_ARB>; + reset-names = "otp", "apb", "arb"; + #address-cells = <1>; + #size-cells = <1>; + + cpu_code: cpu-code@2 { + reg = <0x02 0x2>; + }; + + otp_id: id@7 { + reg = <0x07 0x10>; + }; + + otp_cpu_version: cpu-version@1c { + reg = <0x1c 0x1>; + bits = <3 3>; + }; + + cpub0_leakage: cpu-leakage@17 { + reg = <0x17 0x1>; + }; + + cpub1_leakage: cpu-leakage@18 { + reg = <0x18 0x1>; + }; + + cpul_leakage: cpu-leakage@19 { + reg = <0x19 0x1>; + }; + + log_leakage: log-leakage@1a { + reg = <0x1a 0x1>; + }; + + gpu_leakage: gpu-leakage@1b { + reg = <0x1b 0x1>; + }; + + npu_leakage: npu-leakage@28 { + reg = <0x28 0x1>; + }; + + codec_leakage: codec-leakage@29 { + reg = <0x29 0x1>; + }; + }; + dmac2: dma-controller@fed10000 { compatible = "arm,pl330", "arm,primecell"; reg = <0x0 0xfed10000 0x0 0x4000>;