From patchwork Thu May 4 09:46:38 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Arnaud POULIQUEN X-Patchwork-Id: 90035 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a59:b0ea:0:b0:3b6:4342:cba0 with SMTP id b10csp191925vqo; Thu, 4 May 2023 03:09:31 -0700 (PDT) X-Google-Smtp-Source: ACHHUZ4RFFEDMJmiEe4ETZEtsEUSgEt9ZLkLF8UDvAJu/DHCBcq1tPrCOg00YZlSIQ1XHzZlDX9b X-Received: by 2002:a05:6a20:3d19:b0:f3:e0fc:a654 with SMTP id y25-20020a056a203d1900b000f3e0fca654mr2170982pzi.7.1683194971434; Thu, 04 May 2023 03:09:31 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1683194971; cv=none; d=google.com; s=arc-20160816; b=PCyJjJMUaYM/z+d12VIU2A4W+69bI60hdCnEYqz4xBbnUEpKke9yRxCyNtDgokiRF7 dRoh91z8lVDCs9wbg9p14KuwuxfD1jb3n+3veuOYC8uUbOS3wLtH22PMyuRP8IJGCE6w xrmfvb18cV5iYPmJ2jX8ZKtqI5ezXpAyPoe+oe0r1jFz3yaWxvmXjotvnqAGgl2QoBps qIwjg4KUIpfhZL9ZwNWAb5SoZAs6r/aHl/O45MD/YMF9j/C458gkarAuo0eY8PNAhzba eS7Xomhw48Q4yLBe4yeTL87Tnf6L/qvJgzVSCWq/BPkNtK6+gIEz/tO0rR0ipPYbpHGr O/Ig== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from :dkim-signature; bh=AM1K4/BQXW0CuUZYLo3aJkmKe0XEgpleRDfLVkoedAI=; b=0J3W+R48KVMp9sLce25LizHaIC7jYxEBYJIIVI3FxKs1mtv/c/cKPJ/dyrm3YET2vO 6v+9fGA402tr29etdQODNMq5qyEAiLqnoegEN4D5QIOLk1LtRSWSosLp+Lvu8DGG3KMu R8vuOEc4ZS7GttDTf7OTZGJlAqf1wEL37TR3KS9U17Vi3TXriSwxwIMhNgHDtN+mAtpI FHD52k0o5qnULXnZ6Q8g+dTmdr4r/TWl3ru+sKwvEEeBkqfKM7qO8IZxOPTBvHJGMJcD g0jBeljWlT2j9wjgC/fcNrFyyM6j5sRbzkj8el3trA/mpii1d9mJWXrkEPUfa2cNtRnG J5PA== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@foss.st.com header.s=selector1 header.b=uZOIRkdO; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=foss.st.com Received: from out1.vger.email (out1.vger.email. [2620:137:e000::1:20]) by mx.google.com with ESMTP id z5-20020a655a45000000b00519858f0ac3si8820829pgs.157.2023.05.04.03.09.16; Thu, 04 May 2023 03:09:31 -0700 (PDT) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) client-ip=2620:137:e000::1:20; Authentication-Results: mx.google.com; dkim=pass header.i=@foss.st.com header.s=selector1 header.b=uZOIRkdO; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=foss.st.com Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S230476AbjEDJrx (ORCPT + 99 others); Thu, 4 May 2023 05:47:53 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:59894 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S230381AbjEDJr1 (ORCPT ); Thu, 4 May 2023 05:47:27 -0400 Received: from mx07-00178001.pphosted.com (mx08-00178001.pphosted.com [91.207.212.93]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 433C449DA; Thu, 4 May 2023 02:47:25 -0700 (PDT) Received: from pps.filterd (m0046661.ppops.net [127.0.0.1]) by mx07-00178001.pphosted.com (8.17.1.19/8.17.1.19) with ESMTP id 3448eebR015762; Thu, 4 May 2023 11:46:54 +0200 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=foss.st.com; h=from : to : cc : subject : date : message-id : in-reply-to : references : mime-version : content-transfer-encoding : content-type; s=selector1; bh=AM1K4/BQXW0CuUZYLo3aJkmKe0XEgpleRDfLVkoedAI=; b=uZOIRkdOTl99BF7eO1RBUF+TjGa6A4pXBpyM1jSFlXg54mSviWfc87P4dl1Zub+BOJcx LMm+MHRQf57uvLtzs192j1NuQw0zqdB/URdPLvH6GcMPkMt2wpsWNMwDTJkm++BcuC3/ tlN6woxZWCb0zVkjn/udU+WgItBp/M5yg5C+B5+rsFkAAMwtDJX4LErIZUjCTseLVgeL vUdQxB/H27zwpL0giZyIh2ok5ME/+ZvwU+9YWnryqMWHaX0MxvAG5bizPq7LhkNm/7c9 o6e9Qt6q/VWoQmYg7IcMhuCc8uC7ZzGdRdTX5Z9n0UOLblXsyhNp67n5J/wbbk28A3ZW iA== Received: from beta.dmz-eu.st.com (beta.dmz-eu.st.com [164.129.1.35]) by mx07-00178001.pphosted.com (PPS) with ESMTPS id 3qc6uw9tde-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Thu, 04 May 2023 11:46:53 +0200 Received: from euls16034.sgp.st.com (euls16034.sgp.st.com [10.75.44.20]) by beta.dmz-eu.st.com (STMicroelectronics) with ESMTP id 85370100034; Thu, 4 May 2023 11:46:52 +0200 (CEST) Received: from Webmail-eu.st.com (shfdag1node2.st.com [10.75.129.70]) by euls16034.sgp.st.com (STMicroelectronics) with ESMTP id 7BC0E214D07; Thu, 4 May 2023 11:46:52 +0200 (CEST) Received: from localhost (10.201.21.213) by SHFDAG1NODE2.st.com (10.75.129.70) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.2507.21; Thu, 4 May 2023 11:46:52 +0200 From: Arnaud Pouliquen To: Rob Herring , Krzysztof Kozlowski , Bjorn Andersson , Mathieu Poirier , Alexandre Torgue CC: , , , , , Arnaud Pouliquen Subject: [PATCH v2 1/4] dt-bindings: remoteproc: st,stm32-rproc: Rework reset declarations Date: Thu, 4 May 2023 11:46:38 +0200 Message-ID: <20230504094641.870378-2-arnaud.pouliquen@foss.st.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20230504094641.870378-1-arnaud.pouliquen@foss.st.com> References: <20230504094641.870378-1-arnaud.pouliquen@foss.st.com> MIME-Version: 1.0 X-Originating-IP: [10.201.21.213] X-ClientProxiedBy: SHFCAS1NODE2.st.com (10.75.129.73) To SHFDAG1NODE2.st.com (10.75.129.70) X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.205,Aquarius:18.0.942,Hydra:6.0.573,FMLib:17.11.170.22 definitions=2023-05-04_06,2023-05-03_01,2023-02-09_01 X-Spam-Status: No, score=-2.7 required=5.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,RCVD_IN_DNSWL_LOW,SPF_HELO_NONE,SPF_PASS, T_SCC_BODY_TEXT_LINE,URIBL_BLOCKED autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-getmail-retrieved-from-mailbox: =?utf-8?q?INBOX?= X-GMAIL-THRID: =?utf-8?q?1764957850077423044?= X-GMAIL-MSGID: =?utf-8?q?1764957850077423044?= With the introduction of the SCMI (System Control and Management Interface), it is now possible to use the SCMI to handle the hold boot instead of a dedicated SMC call. As consequence two configurations are possible: - without SCMI server on OP-TEE: use the Linux rcc reset service and use syscon for the MCU hold boot - With SCMI server on OP-TEE: use the SCMI reset service for both the MCU reset and the MCU hold boot. This patch: - make optional and deprecated the use of the property st,syscfg-tz which was used to check if the trusted Zone was enable to use scm call, to manage the hold boot. The reset controller phandle is used instead to select the configurations. - make st,syscfg-holdboot optional - adds properties check on resets definitions. - adds an example of the SCMI reset service usage. Signed-off-by: Arnaud Pouliquen --- Updates vs previous version: - do not suppress "st,syscfg-tz" property to keep legacy compatibility but set it as deprecated - remove "reset-name" from requested property for legacy compatibility --- .../bindings/remoteproc/st,stm32-rproc.yaml | 42 ++++++++++++++++--- 1 file changed, 37 insertions(+), 5 deletions(-) diff --git a/Documentation/devicetree/bindings/remoteproc/st,stm32-rproc.yaml b/Documentation/devicetree/bindings/remoteproc/st,stm32-rproc.yaml index 66b1e3efdaa3..93105d174279 100644 --- a/Documentation/devicetree/bindings/remoteproc/st,stm32-rproc.yaml +++ b/Documentation/devicetree/bindings/remoteproc/st,stm32-rproc.yaml @@ -25,7 +25,14 @@ properties: maxItems: 3 resets: - maxItems: 1 + minItems: 1 + maxItems: 2 + + reset-names: + items: + - const: mcu_rst + - const: hold_boot + minItems: 1 st,syscfg-holdboot: description: remote processor reset hold boot @@ -37,6 +44,7 @@ properties: - description: The field mask of the hold boot st,syscfg-tz: + deprecated: true description: Reference to the system configuration which holds the RCC trust zone mode $ref: "/schemas/types.yaml#/definitions/phandle-array" @@ -135,22 +143,46 @@ required: - compatible - reg - resets - - st,syscfg-holdboot - - st,syscfg-tz + +allOf: + - if: + properties: + reset-names: + not: + contains: + const: hold_boot + then: + required: + - st,syscfg-holdboot + else: + properties: + st,syscfg-holdboot: false additionalProperties: false examples: - | #include - m4_rproc: m4@10000000 { + m4_rproc_example1: m4@10000000 { compatible = "st,stm32mp1-m4"; reg = <0x10000000 0x40000>, <0x30000000 0x40000>, <0x38000000 0x10000>; resets = <&rcc MCU_R>; + reset-names = "mcu_rst"; st,syscfg-holdboot = <&rcc 0x10C 0x1>; - st,syscfg-tz = <&rcc 0x000 0x1>; + st,syscfg-rsc-tbl = <&tamp 0x144 0xFFFFFFFF>; + st,syscfg-m4-state = <&tamp 0x148 0xFFFFFFFF>; + }; + - | + #include + m4_rproc_example2: m4@10000000 { + compatible = "st,stm32mp1-m4"; + reg = <0x10000000 0x40000>, + <0x30000000 0x40000>, + <0x38000000 0x10000>; + resets = <&scmi MCU_R>, <&scmi MCU_HOLD_BOOT_R>; + reset-names = "mcu_rst", "hold_boot"; st,syscfg-rsc-tbl = <&tamp 0x144 0xFFFFFFFF>; st,syscfg-m4-state = <&tamp 0x148 0xFFFFFFFF>; }; From patchwork Thu May 4 09:46:39 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Arnaud POULIQUEN X-Patchwork-Id: 90036 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a59:b0ea:0:b0:3b6:4342:cba0 with SMTP id b10csp191989vqo; Thu, 4 May 2023 03:09:37 -0700 (PDT) X-Google-Smtp-Source: ACHHUZ48fybldPIswUHi4QFfjF34eYWgVpW5bllSv6c8WFRCBIcBQugfWO4f8GJ+HF4cebBgWcBq X-Received: by 2002:a17:902:f68e:b0:1a2:58f1:5e1d with SMTP id l14-20020a170902f68e00b001a258f15e1dmr3628138plg.36.1683194977510; Thu, 04 May 2023 03:09:37 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1683194977; cv=none; d=google.com; s=arc-20160816; b=JutxG8XuDC52x84BdqBazyBtm/K2zb0P12W4cS31iUzVNJre2hyfTrMj16kjjYFIog ytXxi0dyNeggZwEMt3DG7uNR6u+9W5d24flskSAixm/t5m35LissqkCaJ9d0JanH2GPy +FH1GDnTzKcJgUciaQNXKgius5XmTkF2jLIG1hU0vFEBPo271luQ6C8V2WzleZYr2gkH CM8GcJG9SQnUMyqoDz2XoCeqec6P+N0zAQ3Hu4YKWC7Kb1QwDL6JRZ1dmgGrZbIRyPse zkicSqDNsEWzc/kVFAKSoHW1SAwkfPreD3lpki0UdgSBIZslWv+LTr8rBOiCalucsqfc bdJQ== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from :dkim-signature; bh=I0DdDsFCaPtPMNVJWEIGh2sxNVuBtInCqcxh0YNZ2bQ=; b=lvLdzj4JA/Jp8fb3QiEV+RUnZhKcJ8kBDD/vSmXK+vGu6EcjPcMK2ThFsLAKKw8Ccs TIVguGofxaSW9XLBF8c2YaAWHBl7PMHNS4ovB5xjLlIWBM941ej4WEuHspf1n9d0QHR0 ZTwF1beJYOBCy3y52sbO8wZmtEuxDdOGsS8+5vBIlw9Z9wkgciFqstJl8pgMj8LFJmRe JJR2BFtju0V2nUSfq/kwvSsOtoINQ/bdzHw6Xrd2maz3Mfud7RLpZyeO4bSWr6HPA3um oMRqBPOPLu0CQWmGO245/bvRWmaGxvqg3LsLqZXVZir0alOglJRYo7WWarj/3F69Qnmd iJlQ== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@foss.st.com header.s=selector1 header.b=dMIWrXyT; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=foss.st.com Received: from out1.vger.email (out1.vger.email. [2620:137:e000::1:20]) by mx.google.com with ESMTP id c2-20020a17090a8d0200b0024dfb95d54csi9476761pjo.177.2023.05.04.03.09.24; Thu, 04 May 2023 03:09:37 -0700 (PDT) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) client-ip=2620:137:e000::1:20; Authentication-Results: mx.google.com; dkim=pass header.i=@foss.st.com header.s=selector1 header.b=dMIWrXyT; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=foss.st.com Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S230224AbjEDJrt (ORCPT + 99 others); Thu, 4 May 2023 05:47:49 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:59890 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S230366AbjEDJr1 (ORCPT ); Thu, 4 May 2023 05:47:27 -0400 Received: from mx07-00178001.pphosted.com (mx07-00178001.pphosted.com [185.132.182.106]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 3127049D5; Thu, 4 May 2023 02:47:25 -0700 (PDT) Received: from pps.filterd (m0288072.ppops.net [127.0.0.1]) by mx07-00178001.pphosted.com (8.17.1.19/8.17.1.19) with ESMTP id 3447a1h4008978; Thu, 4 May 2023 11:46:54 +0200 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=foss.st.com; h=from : to : cc : subject : date : message-id : in-reply-to : references : mime-version : content-transfer-encoding : content-type; s=selector1; bh=I0DdDsFCaPtPMNVJWEIGh2sxNVuBtInCqcxh0YNZ2bQ=; b=dMIWrXyTLzpprM5nmhMMCbEfEMPqWHHMCh+dzRL4O2xMV3SAR1kBZgM96e5pvGBcx51m N++HqzlTcM7IV3g4Sn60P2s+he4lJd7c8ipREJjbdBRMa7v/Il+uWJEC9GGqrpSRNF9/ q76JyS9VIptnwRuiLz634TLAjhPxMOjdq0eOcQxjJIquhBmx0RDq/4Fh3Zn0NmKOvZta qxrwJMvINjnMdfogN2GGAl44MZ7ZasHWuLGQJXlknV4z0KbkmhWER1M44335EcG6EBMt eqO+6nQXNzlSjSywx0mL6rIo/axHuOes/XWQu4lw9Xh8okD3zVaZzWjtxT/39yworhmX Jw== Received: from beta.dmz-eu.st.com (beta.dmz-eu.st.com [164.129.1.35]) by mx07-00178001.pphosted.com (PPS) with ESMTPS id 3qbu1ud06g-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Thu, 04 May 2023 11:46:54 +0200 Received: from euls16034.sgp.st.com (euls16034.sgp.st.com [10.75.44.20]) by beta.dmz-eu.st.com (STMicroelectronics) with ESMTP id C0DC0100038; Thu, 4 May 2023 11:46:53 +0200 (CEST) Received: from Webmail-eu.st.com (shfdag1node2.st.com [10.75.129.70]) by euls16034.sgp.st.com (STMicroelectronics) with ESMTP id B91D82138F9; Thu, 4 May 2023 11:46:53 +0200 (CEST) Received: from localhost (10.201.21.213) by SHFDAG1NODE2.st.com (10.75.129.70) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.2507.21; Thu, 4 May 2023 11:46:53 +0200 From: Arnaud Pouliquen To: Rob Herring , Krzysztof Kozlowski , Bjorn Andersson , Mathieu Poirier , Alexandre Torgue CC: , , , , , Arnaud Pouliquen Subject: [PATCH v2 2/4] remoteproc: stm32: Allow hold boot management by the SCMI reset controller Date: Thu, 4 May 2023 11:46:39 +0200 Message-ID: <20230504094641.870378-3-arnaud.pouliquen@foss.st.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20230504094641.870378-1-arnaud.pouliquen@foss.st.com> References: <20230504094641.870378-1-arnaud.pouliquen@foss.st.com> MIME-Version: 1.0 X-Originating-IP: [10.201.21.213] X-ClientProxiedBy: SHFCAS1NODE2.st.com (10.75.129.73) To SHFDAG1NODE2.st.com (10.75.129.70) X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.205,Aquarius:18.0.942,Hydra:6.0.573,FMLib:17.11.170.22 definitions=2023-05-04_06,2023-05-03_01,2023-02-09_01 X-Spam-Status: No, score=-2.7 required=5.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,RCVD_IN_DNSWL_LOW,SPF_HELO_NONE,SPF_PASS, T_SCC_BODY_TEXT_LINE,URIBL_BLOCKED autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-getmail-retrieved-from-mailbox: =?utf-8?q?INBOX?= X-GMAIL-THRID: =?utf-8?q?1764957856565810567?= X-GMAIL-MSGID: =?utf-8?q?1764957856565810567?= The hold boot can be managed by the SCMI controller as a reset. If the "hold_boot" reset is defined in the device tree, use it. Else use the syscon controller directly to access to the register. The support of the SMC call is deprecated but kept for legacy support. Signed-off-by: Arnaud Pouliquen --- Updates vs previous version - keep support of the "st,syscfg-tz" property for legacy compatibility - rename secured_soc in hold_boot_smc for readability - add comments to explain hold boot management. - update commit message --- drivers/remoteproc/stm32_rproc.c | 78 +++++++++++++++++++++++--------- 1 file changed, 57 insertions(+), 21 deletions(-) diff --git a/drivers/remoteproc/stm32_rproc.c b/drivers/remoteproc/stm32_rproc.c index 7d782ed9e589..e9cf24274345 100644 --- a/drivers/remoteproc/stm32_rproc.c +++ b/drivers/remoteproc/stm32_rproc.c @@ -79,6 +79,7 @@ struct stm32_mbox { struct stm32_rproc { struct reset_control *rst; + struct reset_control *hold_boot_rst; struct stm32_syscon hold_boot; struct stm32_syscon pdds; struct stm32_syscon m4_state; @@ -88,7 +89,7 @@ struct stm32_rproc { struct stm32_rproc_mem *rmems; struct stm32_mbox mb[MBOX_NB_MBX]; struct workqueue_struct *workqueue; - bool secured_soc; + bool hold_boot_smc; void __iomem *rsc_va; }; @@ -401,13 +402,28 @@ static int stm32_rproc_set_hold_boot(struct rproc *rproc, bool hold) struct arm_smccc_res smc_res; int val, err; + /* + * Three ways to manage the hold boot + * - using SCMI: the hold boot is managed as a reset, + * - using Linux(no SCMI): the hold boot is managed as a syscon register + * - using SMC call (deprecated): use SMC reset interface + */ + val = hold ? HOLD_BOOT : RELEASE_BOOT; - if (IS_ENABLED(CONFIG_HAVE_ARM_SMCCC) && ddata->secured_soc) { + if (ddata->hold_boot_rst) { + /* Use the SCMI reset controller */ + if (!hold) + err = reset_control_deassert(ddata->hold_boot_rst); + else + err = reset_control_assert(ddata->hold_boot_rst); + } else if (IS_ENABLED(CONFIG_HAVE_ARM_SMCCC) && ddata->hold_boot_smc) { + /* Use the SMC call */ arm_smccc_smc(STM32_SMC_RCC, STM32_SMC_REG_WRITE, hold_boot.reg, val, 0, 0, 0, 0, &smc_res); err = smc_res.a0; } else { + /* Use syscon */ err = regmap_update_bits(hold_boot.map, hold_boot.reg, hold_boot.mask, val); } @@ -705,34 +721,54 @@ static int stm32_rproc_parse_dt(struct platform_device *pdev, dev_info(dev, "wdg irq registered\n"); } - ddata->rst = devm_reset_control_get_by_index(dev, 0); + ddata->rst = devm_reset_control_get_optional(dev, "mcu_rst"); + if (!ddata->rst) { + /* Try legacy fallback method: get it by index */ + ddata->rst = devm_reset_control_get_by_index(dev, 0); + } if (IS_ERR(ddata->rst)) return dev_err_probe(dev, PTR_ERR(ddata->rst), "failed to get mcu_reset\n"); /* - * if platform is secured the hold boot bit must be written by - * smc call and read normally. - * if not secure the hold boot bit could be read/write normally + * Three ways to manage the hold boot + * - using SCMI: the hold boot is managed as a reset + * The DT "reset-mames" property should be defined with 2 items: + * reset-names = "mcu_rst", "hold_boot"; + * - using SMC call (deprecated): use SMC reset interface + * The DT "reset-mames" property is optional, "st,syscfg-tz" is required + * - default(no SCMI, no SMC): the hold boot is managed as a syscon register + * The DT "reset-mames" property is optional, "st,syscfg-holdboot" is required */ - err = stm32_rproc_get_syscon(np, "st,syscfg-tz", &tz); - if (err) { - dev_err(dev, "failed to get tz syscfg\n"); - return err; - } - err = regmap_read(tz.map, tz.reg, &tzen); - if (err) { - dev_err(dev, "failed to read tzen\n"); - return err; + ddata->hold_boot_rst = devm_reset_control_get_optional(dev, "hold_boot"); + if (IS_ERR(ddata->hold_boot_rst)) { + if (PTR_ERR(ddata->hold_boot_rst) == -EPROBE_DEFER) + return PTR_ERR(ddata->hold_boot_rst); + ddata->hold_boot_rst = NULL; + } + + if (!ddata->hold_boot_rst && IS_ENABLED(CONFIG_HAVE_ARM_SMCCC)) { + /* Manage the MCU_BOOT using SMC call */ + err = stm32_rproc_get_syscon(np, "st,syscfg-tz", &tz); + if (!err) { + err = regmap_read(tz.map, tz.reg, &tzen); + if (err) { + dev_err(dev, "failed to read tzen\n"); + return err; + } + ddata->hold_boot_smc = tzen & tz.mask; + } } - ddata->secured_soc = tzen & tz.mask; - err = stm32_rproc_get_syscon(np, "st,syscfg-holdboot", - &ddata->hold_boot); - if (err) { - dev_err(dev, "failed to get hold boot\n"); - return err; + if (!ddata->hold_boot_rst && !ddata->hold_boot_smc) { + /* Default: hold boot manage it through the syscon controller */ + err = stm32_rproc_get_syscon(np, "st,syscfg-holdboot", + &ddata->hold_boot); + if (err) { + dev_err(dev, "failed to get hold boot\n"); + return err; + } } err = stm32_rproc_get_syscon(np, "st,syscfg-pdds", &ddata->pdds); From patchwork Thu May 4 09:46:40 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Arnaud POULIQUEN X-Patchwork-Id: 90032 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a59:b0ea:0:b0:3b6:4342:cba0 with SMTP id b10csp181974vqo; Thu, 4 May 2023 02:52:16 -0700 (PDT) X-Google-Smtp-Source: ACHHUZ5V6AzshHUHobOn6h60RB2vUgMUps3RXMUzqc5xswyUgI1D775EcZT2Vq07viLTxSAAFW+a X-Received: by 2002:a05:6a20:e611:b0:f0:2501:349b with SMTP id my17-20020a056a20e61100b000f02501349bmr1635206pzb.25.1683193936213; Thu, 04 May 2023 02:52:16 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1683193936; cv=none; d=google.com; s=arc-20160816; b=fF0MGGPxSrraFOF0sx/Ak3s6YbstwNxY+j46Loxt9Deov/Mse6ilWuoQj/kyP0x4Eh NdQT0piXmvsEIKNiBvERYKyxOvPj40+RriAoHFGxuB9npaAXMhaN01U+K+p1Kv0Ftg5Q ugf1GYlEgqDvzkcPLC2UBDn/A+afhLwYeGq9wTtSQqw3zFp4LGmf6zpuIOxT93qNzSv9 kKrTqGUr6Vt7zpGrKFp6vOv3xCWEWKOM/iX+8pASwZX4tREsy4gLJOUB225B7d+SD9o+ kMgV4toglltNoWSoP6o+0+6IK+fdHNs3rRrTZwYAVYKWwF4Okj9Hi0Jee+VUc2kHET59 xf+g== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from :dkim-signature; bh=6ZAeKfaCVjCcQYatDKf5A35sHggy0HxLFWn8Q2KLZBk=; b=NGArMoDajuiFvWYIPqgs8y8y645H3kdI1EJJzn1JWoLlYAo0ACKfniuxTw5fKye6y6 9M0JO16Era3PkxGRpZeBhfivlyjj4Thy+x8PdfAoTgvkrT0UGdrlAkK71FN0rhDYMCNJ lFJarKS51YrRGQmG6xuKUoniSwI4brt4kPtuQqMraBpCtqMbbVPnmNlwJVFOMrVzNfxO GwM/DKGwXCcF0KPJe6JtYdDBdGBd6vGo2yg2QNAD5n973yEdgUv7ltmjH9sVCEMPOR1M 7OUoD3fwy9oU/cHUFpdWad5CmYIvPpSPiFuAgqi8gdO5cpkpPHWAr4lBMT7HFN1/VE6f kD0w== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@foss.st.com header.s=selector1 header.b=RoEBYkGp; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=foss.st.com Received: from out1.vger.email (out1.vger.email. [2620:137:e000::1:20]) by mx.google.com with ESMTP id t69-20020a638148000000b0052c75ef69b1si2667007pgd.825.2023.05.04.02.52.00; Thu, 04 May 2023 02:52:16 -0700 (PDT) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) client-ip=2620:137:e000::1:20; Authentication-Results: mx.google.com; dkim=pass header.i=@foss.st.com header.s=selector1 header.b=RoEBYkGp; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=foss.st.com Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S230417AbjEDJr3 (ORCPT + 99 others); Thu, 4 May 2023 05:47:29 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:59880 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229972AbjEDJr0 (ORCPT ); Thu, 4 May 2023 05:47:26 -0400 Received: from mx07-00178001.pphosted.com (mx08-00178001.pphosted.com [91.207.212.93]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 0ACC746B8; Thu, 4 May 2023 02:47:23 -0700 (PDT) Received: from pps.filterd (m0046660.ppops.net [127.0.0.1]) by mx07-00178001.pphosted.com (8.17.1.19/8.17.1.19) with ESMTP id 34470Zrq017402; Thu, 4 May 2023 11:47:09 +0200 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=foss.st.com; h=from : to : cc : subject : date : message-id : in-reply-to : references : mime-version : content-transfer-encoding : content-type; s=selector1; bh=6ZAeKfaCVjCcQYatDKf5A35sHggy0HxLFWn8Q2KLZBk=; b=RoEBYkGpsg3gmhYy0mGguNKc/8Hz9Gux7m7QYdYPHGGgDLnkardx8IF1/TH1749xMwOm pNqsk4/7rA1tRKNByM2BBaefU++wnXEgoh0GEpCbgZfGS7sfQwDSiRwavo3lUDYChVQq R0SmAf8Vek9PzHk3ksKUdVIjb+O8pSRUH1DwE1rdc/iXrA9aQpToSGOjZtC7UK0Hgo6U t8uHQQWlZf86OhAwlkIDJAgNU3X8qB+kQ1fY8xBHPkCj+HVj+4hFkV2fhggiTFplstWr xmbO+T+1oTOUpnYdtLB5Xm8Z89RFrOSjyt7iI/061gXzdsL+95JJKh79UJIONgRk3IK+ fA== Received: from beta.dmz-eu.st.com (beta.dmz-eu.st.com [164.129.1.35]) by mx07-00178001.pphosted.com (PPS) with ESMTPS id 3qbu4j4pse-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Thu, 04 May 2023 11:47:09 +0200 Received: from euls16034.sgp.st.com (euls16034.sgp.st.com [10.75.44.20]) by beta.dmz-eu.st.com (STMicroelectronics) with ESMTP id 984E810002A; Thu, 4 May 2023 11:46:55 +0200 (CEST) Received: from Webmail-eu.st.com (shfdag1node2.st.com [10.75.129.70]) by euls16034.sgp.st.com (STMicroelectronics) with ESMTP id 90BE62138F9; Thu, 4 May 2023 11:46:55 +0200 (CEST) Received: from localhost (10.201.21.213) by SHFDAG1NODE2.st.com (10.75.129.70) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.2507.21; Thu, 4 May 2023 11:46:54 +0200 From: Arnaud Pouliquen To: Rob Herring , Krzysztof Kozlowski , Bjorn Andersson , Mathieu Poirier , Alexandre Torgue CC: , , , , , Arnaud Pouliquen Subject: [PATCH v2 3/4] ARM: dts: stm32: Update reset declarations Date: Thu, 4 May 2023 11:46:40 +0200 Message-ID: <20230504094641.870378-4-arnaud.pouliquen@foss.st.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20230504094641.870378-1-arnaud.pouliquen@foss.st.com> References: <20230504094641.870378-1-arnaud.pouliquen@foss.st.com> MIME-Version: 1.0 X-Originating-IP: [10.201.21.213] X-ClientProxiedBy: SHFCAS1NODE2.st.com (10.75.129.73) To SHFDAG1NODE2.st.com (10.75.129.70) X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.205,Aquarius:18.0.942,Hydra:6.0.573,FMLib:17.11.170.22 definitions=2023-05-04_06,2023-05-03_01,2023-02-09_01 X-Spam-Status: No, score=-2.7 required=5.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,RCVD_IN_DNSWL_LOW,SPF_HELO_NONE,SPF_PASS, T_SCC_BODY_TEXT_LINE,URIBL_BLOCKED autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-getmail-retrieved-from-mailbox: =?utf-8?q?INBOX?= X-GMAIL-THRID: =?utf-8?q?1764956765003732585?= X-GMAIL-MSGID: =?utf-8?q?1764956765003732585?= Since the introduction of the SCMI for the management of the MCU hold boot in OP-TEE, management of the hold boot by SMC call is deprecated. - Clean the st,syscfg-tz which allows to determine if the trust zone is enable. - Add reset-names properties to be able to differentiate the MCU reset and the MCU HOLD BOOT. Signed-off-by: Arnaud Pouliquen --- arch/arm/boot/dts/stm32mp151.dtsi | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/arch/arm/boot/dts/stm32mp151.dtsi b/arch/arm/boot/dts/stm32mp151.dtsi index 4e437d3f2ed6..25626797db94 100644 --- a/arch/arm/boot/dts/stm32mp151.dtsi +++ b/arch/arm/boot/dts/stm32mp151.dtsi @@ -1820,8 +1820,8 @@ m4_rproc: m4@10000000 { <0x30000000 0x40000>, <0x38000000 0x10000>; resets = <&rcc MCU_R>; + reset-names = "mcu_rst"; st,syscfg-holdboot = <&rcc 0x10C 0x1>; - st,syscfg-tz = <&rcc 0x000 0x1>; st,syscfg-pdds = <&pwr_mcu 0x0 0x1>; st,syscfg-rsc-tbl = <&tamp 0x144 0xFFFFFFFF>; st,syscfg-m4-state = <&tamp 0x148 0xFFFFFFFF>; From patchwork Thu May 4 09:46:41 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Arnaud POULIQUEN X-Patchwork-Id: 90033 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a59:b0ea:0:b0:3b6:4342:cba0 with SMTP id b10csp182722vqo; Thu, 4 May 2023 02:54:13 -0700 (PDT) X-Google-Smtp-Source: ACHHUZ6p1LiTvA5lJvcyvywuOsEcUwO0udywnC5Pr9P30pRonxqqG/CACt0BmIRe24/DVbJm3PJA X-Received: by 2002:a05:6a20:389:b0:ef:c4f6:9122 with SMTP id 9-20020a056a20038900b000efc4f69122mr1614495pzt.24.1683194052649; Thu, 04 May 2023 02:54:12 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1683194052; cv=none; d=google.com; s=arc-20160816; b=Tg7oqQNTNeTjQ2q8wPNUWen1QC0sYvBrUhOEGhi1uIhpvImLJfk9b/6+VS/+f0U6LH ZXfMVB3PPeB/SxduoPTOZDLUvDkyEAZvmE3Y245HocDl9aEIlKgym/hXIqhWBWDshz/8 OoGZlGc3SkEd4L/La2tqXhyXlr7IhdG9iO4eacorKoe5yVirJQ/MCSrqK3sFMfehGlcS sxYA4hg3uY2mHiJK33xtsuPOCUr5k5igWQdejGkP5wF+2CUHJEf9UEXZ9VktCy2xT/im DVPkVOPxfDnbRQBrWn4Csh2RdvTh6wbWELkI8KnHQgk1EskZoCqJcjQDhTmNHMi6wYVM DtFw== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from :dkim-signature; bh=tr01CIe/LpDGGpoPafu39bOHteV6ORG+tu0CkFYJUD0=; b=hWG1PVD+8GqaObeQCVBvZrDuUpiOuIaDtdBI9OzhIQ/Gv30f8iCswOYdQFUUj4/2+J OFLbsVtEZ2gd7JnEzLgkxJ7AW/YA/2v2uxvJnE7R0GTex6fzl4XBSFSA0mktiKpHeiJR CujAS87SMFLojQ2PiuhJCosRlNJ+aVDSt20wFK1lftzLFxQeMNyue4Bwpn2DrtDvQO84 X4OmES3aTgushXnV85u/fkctcNf4vD2yXxP1EqXfDDXFD5mFbcf4TfOPGZUBrvKDVhwo F/Rz5PtgjKs7vHcQsIbfzzvFDrzincIwpstAAXGaIfWJwPKw3W57upaXty2rLSE/KCkv C8XA== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@foss.st.com header.s=selector1 header.b=8AdbekMA; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=foss.st.com Received: from out1.vger.email (out1.vger.email. [2620:137:e000::1:20]) by mx.google.com with ESMTP id n19-20020a635c53000000b00524d6cd6415si31361690pgm.665.2023.05.04.02.53.58; Thu, 04 May 2023 02:54:12 -0700 (PDT) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) client-ip=2620:137:e000::1:20; Authentication-Results: mx.google.com; dkim=pass header.i=@foss.st.com header.s=selector1 header.b=8AdbekMA; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=foss.st.com Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S230437AbjEDJrk (ORCPT + 99 others); Thu, 4 May 2023 05:47:40 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:59888 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S230160AbjEDJr1 (ORCPT ); Thu, 4 May 2023 05:47:27 -0400 Received: from mx07-00178001.pphosted.com (mx08-00178001.pphosted.com [91.207.212.93]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 0DBC649D0; Thu, 4 May 2023 02:47:24 -0700 (PDT) Received: from pps.filterd (m0046661.ppops.net [127.0.0.1]) by mx07-00178001.pphosted.com (8.17.1.19/8.17.1.19) with ESMTP id 3448eebS015762; Thu, 4 May 2023 11:46:56 +0200 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=foss.st.com; h=from : to : cc : subject : date : message-id : in-reply-to : references : mime-version : content-transfer-encoding : content-type; s=selector1; bh=tr01CIe/LpDGGpoPafu39bOHteV6ORG+tu0CkFYJUD0=; b=8AdbekMAyF/Vouy9hihxbWWvtjd7UozRxa1KRcWR7ENzD9GnPUAab3n3JAyQucvLlG4h Wbo9rC3xL4vG6z89tBgjS/kicSigfLlDdEWdfuzn1SfPcDCMfccvA8vYNXyF6t0S32fm y2nPbGg8wkVgaMCuTr4UhIa6dj+0KvGstXWEavYi7Zm0oQK945JWHRpbroxUMFfvtsX4 L2QStngYN5VYgd+od2EjpuFohghPUfQhPvLcf3Zz8qBUZnLqkp0GCj2Jzb1ve82fi/lb Ix4yMrCb22sZba3eNmVGYkq3nlm7drHW4Kj6pCpVG+i2GKVE7lRBCz5Eyk8kj2Sh1vGq hQ== Received: from beta.dmz-eu.st.com (beta.dmz-eu.st.com [164.129.1.35]) by mx07-00178001.pphosted.com (PPS) with ESMTPS id 3qc6uw9tdp-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Thu, 04 May 2023 11:46:56 +0200 Received: from euls16034.sgp.st.com (euls16034.sgp.st.com [10.75.44.20]) by beta.dmz-eu.st.com (STMicroelectronics) with ESMTP id 20A50100034; Thu, 4 May 2023 11:46:56 +0200 (CEST) Received: from Webmail-eu.st.com (shfdag1node2.st.com [10.75.129.70]) by euls16034.sgp.st.com (STMicroelectronics) with ESMTP id 18B882138F9; Thu, 4 May 2023 11:46:56 +0200 (CEST) Received: from localhost (10.201.21.213) by SHFDAG1NODE2.st.com (10.75.129.70) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.2507.21; Thu, 4 May 2023 11:46:55 +0200 From: Arnaud Pouliquen To: Rob Herring , Krzysztof Kozlowski , Bjorn Andersson , Mathieu Poirier , Alexandre Torgue CC: , , , , , Arnaud Pouliquen Subject: [PATCH v2 4/4] ARM: dts: stm32: fix m4_rproc references to use SCMI Date: Thu, 4 May 2023 11:46:41 +0200 Message-ID: <20230504094641.870378-5-arnaud.pouliquen@foss.st.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20230504094641.870378-1-arnaud.pouliquen@foss.st.com> References: <20230504094641.870378-1-arnaud.pouliquen@foss.st.com> MIME-Version: 1.0 X-Originating-IP: [10.201.21.213] X-ClientProxiedBy: SHFCAS1NODE2.st.com (10.75.129.73) To SHFDAG1NODE2.st.com (10.75.129.70) X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.205,Aquarius:18.0.942,Hydra:6.0.573,FMLib:17.11.170.22 definitions=2023-05-04_06,2023-05-03_01,2023-02-09_01 X-Spam-Status: No, score=-2.7 required=5.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,RCVD_IN_DNSWL_LOW,SPF_HELO_NONE,SPF_PASS, T_SCC_BODY_TEXT_LINE,URIBL_BLOCKED autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-getmail-retrieved-from-mailbox: =?utf-8?q?INBOX?= X-GMAIL-THRID: =?utf-8?q?1764956887443750253?= X-GMAIL-MSGID: =?utf-8?q?1764956887443750253?= Fixes stm32mp15*-scmi DTS files introduced in [1]: This patch fixes the node which uses the MCU reset and adds the missing HOLD_BOOT which is also handled by the SCMI reset service. This change cannot be applied as a fix on commit [1], the management of the hold boot impacts also the stm32_rproc driver. [1] 'commit 5b7e58313a77 ("ARM: dts: stm32: Add SCMI version of STM32 boards (DK1/DK2/ED1/EV1)")' Signed-off-by: Arnaud Pouliquen --- arch/arm/boot/dts/stm32mp157a-dk1-scmi.dts | 6 ++++-- arch/arm/boot/dts/stm32mp157c-dk2-scmi.dts | 6 ++++-- arch/arm/boot/dts/stm32mp157c-ed1-scmi.dts | 6 ++++-- arch/arm/boot/dts/stm32mp157c-ev1-scmi.dts | 6 ++++-- 4 files changed, 16 insertions(+), 8 deletions(-) diff --git a/arch/arm/boot/dts/stm32mp157a-dk1-scmi.dts b/arch/arm/boot/dts/stm32mp157a-dk1-scmi.dts index e539cc80bef8..134788e64265 100644 --- a/arch/arm/boot/dts/stm32mp157a-dk1-scmi.dts +++ b/arch/arm/boot/dts/stm32mp157a-dk1-scmi.dts @@ -55,8 +55,10 @@ &mdma1 { resets = <&scmi_reset RST_SCMI_MDMA>; }; -&mlahb { - resets = <&scmi_reset RST_SCMI_MCU>; +&m4_rproc { + resets = <&scmi_reset RST_SCMI_MCU>, + <&scmi_reset RST_SCMI_MCU_HOLD_BOOT>; + reset-names = "mcu_rst", "hold_boot"; }; &rcc { diff --git a/arch/arm/boot/dts/stm32mp157c-dk2-scmi.dts b/arch/arm/boot/dts/stm32mp157c-dk2-scmi.dts index 97e4f94b0a24..c42e658debfb 100644 --- a/arch/arm/boot/dts/stm32mp157c-dk2-scmi.dts +++ b/arch/arm/boot/dts/stm32mp157c-dk2-scmi.dts @@ -61,8 +61,10 @@ &mdma1 { resets = <&scmi_reset RST_SCMI_MDMA>; }; -&mlahb { - resets = <&scmi_reset RST_SCMI_MCU>; +&m4_rproc { + resets = <&scmi_reset RST_SCMI_MCU>, + <&scmi_reset RST_SCMI_MCU_HOLD_BOOT>; + reset-names = "mcu_rst", "hold_boot"; }; &rcc { diff --git a/arch/arm/boot/dts/stm32mp157c-ed1-scmi.dts b/arch/arm/boot/dts/stm32mp157c-ed1-scmi.dts index 9cf0a44d2f47..7a56ff2d4185 100644 --- a/arch/arm/boot/dts/stm32mp157c-ed1-scmi.dts +++ b/arch/arm/boot/dts/stm32mp157c-ed1-scmi.dts @@ -60,8 +60,10 @@ &mdma1 { resets = <&scmi_reset RST_SCMI_MDMA>; }; -&mlahb { - resets = <&scmi_reset RST_SCMI_MCU>; +&m4_rproc { + resets = <&scmi_reset RST_SCMI_MCU>, + <&scmi_reset RST_SCMI_MCU_HOLD_BOOT>; + reset-names = "mcu_rst", "hold_boot"; }; &rcc { diff --git a/arch/arm/boot/dts/stm32mp157c-ev1-scmi.dts b/arch/arm/boot/dts/stm32mp157c-ev1-scmi.dts index 3b9dd6f4ccc9..119874dd91e4 100644 --- a/arch/arm/boot/dts/stm32mp157c-ev1-scmi.dts +++ b/arch/arm/boot/dts/stm32mp157c-ev1-scmi.dts @@ -66,8 +66,10 @@ &mdma1 { resets = <&scmi_reset RST_SCMI_MDMA>; }; -&mlahb { - resets = <&scmi_reset RST_SCMI_MCU>; +&m4_rproc { + resets = <&scmi_reset RST_SCMI_MCU>, + <&scmi_reset RST_SCMI_MCU_HOLD_BOOT>; + reset-names = "mcu_rst", "hold_boot"; }; &rcc {