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[2620:137:e000::1:20]) by mx.google.com with ESMTP id s3-20020a17090a440300b0020243dc975bsi7911624pjg.116.2022.10.24.01.28.36; Mon, 24 Oct 2022 01:28:50 -0700 (PDT) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) client-ip=2620:137:e000::1:20; Authentication-Results: mx.google.com; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=nxp.com Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S230401AbiJXI2Y (ORCPT + 99 others); Mon, 24 Oct 2022 04:28:24 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:55766 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S230373AbiJXI17 (ORCPT ); Mon, 24 Oct 2022 04:27:59 -0400 Received: from inva021.nxp.com (inva021.nxp.com [92.121.34.21]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id BF51F52E78; Mon, 24 Oct 2022 01:27:41 -0700 (PDT) Received: from inva021.nxp.com (localhost [127.0.0.1]) by inva021.eu-rdc02.nxp.com (Postfix) with ESMTP id D4B91220E99; Mon, 24 Oct 2022 10:27:06 +0200 (CEST) Received: from aprdc01srsp001v.ap-rdc01.nxp.com (aprdc01srsp001v.ap-rdc01.nxp.com [165.114.16.16]) by inva021.eu-rdc02.nxp.com (Postfix) with ESMTP id 9F510220E93; Mon, 24 Oct 2022 10:27:06 +0200 (CEST) Received: from localhost.localdomain (shlinux2.ap.freescale.net [10.192.224.44]) by aprdc01srsp001v.ap-rdc01.nxp.com (Postfix) with ESMTP id D5C26180226C; Mon, 24 Oct 2022 16:27:04 +0800 (+08) From: Richard Zhu To: l.stach@pengutronix.de, bhelgaas@google.com, robh+dt@kernel.org, lorenzo.pieralisi@arm.com, shawnguo@kernel.org, kishon@ti.com, kw@linux.com, frank.li@nxp.com Cc: hongxing.zhu@nxp.com, linux-pci@vger.kernel.org, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, kernel@pengutronix.de, linux-imx@nxp.com Subject: [RESEND v4 01/14] dt-bindings: imx6q-pcie: Add i.MX8MM PCIe EP mode compatible string Date: Mon, 24 Oct 2022 16:06:30 +0800 Message-Id: <1666598803-1912-2-git-send-email-hongxing.zhu@nxp.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1666598803-1912-1-git-send-email-hongxing.zhu@nxp.com> References: <1666598803-1912-1-git-send-email-hongxing.zhu@nxp.com> X-Virus-Scanned: ClamAV using ClamSMTP X-Spam-Status: No, score=-4.2 required=5.0 tests=BAYES_00,RCVD_IN_DNSWL_MED, SPF_HELO_NONE,SPF_PASS autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-getmail-retrieved-from-mailbox: =?utf-8?q?INBOX?= X-GMAIL-THRID: =?utf-8?q?1747556898058732772?= X-GMAIL-MSGID: =?utf-8?q?1747556898058732772?= Add i.MX8MM PCIe endpoint mode compatible string. Signed-off-by: Richard Zhu Acked-by: Rob Herring --- Documentation/devicetree/bindings/pci/fsl,imx6q-pcie.yaml | 1 + 1 file changed, 1 insertion(+) diff --git a/Documentation/devicetree/bindings/pci/fsl,imx6q-pcie.yaml b/Documentation/devicetree/bindings/pci/fsl,imx6q-pcie.yaml index 376e739bcad4..e4038e2b3de9 100644 --- a/Documentation/devicetree/bindings/pci/fsl,imx6q-pcie.yaml +++ b/Documentation/devicetree/bindings/pci/fsl,imx6q-pcie.yaml @@ -27,6 +27,7 @@ properties: - fsl,imx8mq-pcie - fsl,imx8mm-pcie - fsl,imx8mp-pcie + - fsl,imx8mm-pcie-ep reg: items: From patchwork Mon Oct 24 08:06:31 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Richard Zhu X-Patchwork-Id: 8234 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a5d:6687:0:0:0:0:0 with SMTP id l7csp320116wru; Mon, 24 Oct 2022 01:29:10 -0700 (PDT) X-Google-Smtp-Source: AMsMyM6UO2k7LzW4rpFw4l7d7soGULjjMvveJFDqQ2q5/PfDmqLwqT7biotYCU0HBteCmUM9Wj3z X-Received: by 2002:a17:90b:350d:b0:20d:5438:f59a with SMTP id ls13-20020a17090b350d00b0020d5438f59amr35993671pjb.41.1666600150300; Mon, 24 Oct 2022 01:29:10 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1666600150; cv=none; d=google.com; s=arc-20160816; b=Hf7BA8m8XdfkBFrfDtCTY55KiYU8pcOe3pwHAE4qaGm2xM3SAnV+ndIIvk/r11fu5u HDVzduSiZs6mexz6SdRp+vkp2GtnXTWCROXWDj0NnpCh1JV8MKx/jNyd2jnro9t+2Crk yUP0tsfSLsGuVN00wdzY404fx6SuYQGH7s06AIn15hP8GVIZXE7FuoL+Jq2lz59c1sYm bsH2d0SGcRXxAA6YePRWGHe0HV+gPqhHIldHZjJNvBldS7n+055iN4MmgG4mBsRUZs4w ujOvCRcOXTwho7QpSZH279qQBgn7P6JfrplOoHS28iJzAejGjOZDMzHzdwMxtzweEDmd gtsg== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:references:in-reply-to:message-id:date:subject :cc:to:from; bh=3sjVJlXh8qs1WZP5bgLiEYfK8s+qjQRu+6sNx15BasY=; b=VlQPmWBNEHhX6qv0bAlXE3P/JduZhoNqIthjqP9yeTN9e9kY12Ag5MkC6+WFcwzAmD o0sjb8E/iUdDLhaw/fq28OAax5lNcDDcPMPLtWYoysaUTEAIEW4VL1Ylupd6qbDKDRbX xng68aUVgdAr6AdsGVv3d1+UISdpBARc40+PjFoS7A/o3SVnG+JrPqZq4pU/ln4B5oRg n59Zqb66uaoG8o1cWctJOB/Z3gidqXwRM9WkrKzxkViIH1HfBt86WL4q58Zd0Wi/FLhH 6fXhUW+voxVoNw9Aj65+t6JvJubKsbPdB8ngh6NX315AveIOauKkkBUhie876PPvTIMb tbhQ== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=nxp.com Received: from out1.vger.email (out1.vger.email. [2620:137:e000::1:20]) by mx.google.com with ESMTP id x14-20020a63170e000000b00460609ce615si37575558pgl.243.2022.10.24.01.28.57; Mon, 24 Oct 2022 01:29:10 -0700 (PDT) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) client-ip=2620:137:e000::1:20; Authentication-Results: mx.google.com; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=nxp.com Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S230294AbiJXI2i (ORCPT + 99 others); Mon, 24 Oct 2022 04:28:38 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:55890 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S230402AbiJXI2B (ORCPT ); Mon, 24 Oct 2022 04:28:01 -0400 Received: from inva020.nxp.com (inva020.nxp.com [92.121.34.13]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 1CD3B2AE2E; Mon, 24 Oct 2022 01:27:44 -0700 (PDT) Received: from inva020.nxp.com (localhost [127.0.0.1]) by inva020.eu-rdc02.nxp.com (Postfix) with ESMTP id 6E7811B8F2E; Mon, 24 Oct 2022 10:27:08 +0200 (CEST) Received: from aprdc01srsp001v.ap-rdc01.nxp.com (aprdc01srsp001v.ap-rdc01.nxp.com [165.114.16.16]) by inva020.eu-rdc02.nxp.com (Postfix) with ESMTP id 35A231B8F1F; Mon, 24 Oct 2022 10:27:08 +0200 (CEST) Received: from localhost.localdomain (shlinux2.ap.freescale.net [10.192.224.44]) by aprdc01srsp001v.ap-rdc01.nxp.com (Postfix) with ESMTP id 2A1DD1820F76; Mon, 24 Oct 2022 16:27:06 +0800 (+08) From: Richard Zhu To: l.stach@pengutronix.de, bhelgaas@google.com, robh+dt@kernel.org, lorenzo.pieralisi@arm.com, shawnguo@kernel.org, kishon@ti.com, kw@linux.com, frank.li@nxp.com Cc: hongxing.zhu@nxp.com, linux-pci@vger.kernel.org, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, kernel@pengutronix.de, linux-imx@nxp.com Subject: [RESEND v4 02/14] dt-bindings: imx6q-pcie: Add i.MX8MQ PCIe EP mode compatible string Date: Mon, 24 Oct 2022 16:06:31 +0800 Message-Id: <1666598803-1912-3-git-send-email-hongxing.zhu@nxp.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1666598803-1912-1-git-send-email-hongxing.zhu@nxp.com> References: <1666598803-1912-1-git-send-email-hongxing.zhu@nxp.com> X-Virus-Scanned: ClamAV using ClamSMTP X-Spam-Status: No, score=-4.2 required=5.0 tests=BAYES_00,RCVD_IN_DNSWL_MED, SPF_HELO_NONE,SPF_PASS autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-getmail-retrieved-from-mailbox: =?utf-8?q?INBOX?= X-GMAIL-THRID: =?utf-8?q?1747556919148645047?= X-GMAIL-MSGID: =?utf-8?q?1747556919148645047?= Add i.MX8MQ PCIe endpoint mode compatible string. Signed-off-by: Richard Zhu Acked-by: Rob Herring --- Documentation/devicetree/bindings/pci/fsl,imx6q-pcie.yaml | 1 + 1 file changed, 1 insertion(+) diff --git a/Documentation/devicetree/bindings/pci/fsl,imx6q-pcie.yaml b/Documentation/devicetree/bindings/pci/fsl,imx6q-pcie.yaml index e4038e2b3de9..114e11b62195 100644 --- a/Documentation/devicetree/bindings/pci/fsl,imx6q-pcie.yaml +++ b/Documentation/devicetree/bindings/pci/fsl,imx6q-pcie.yaml @@ -28,6 +28,7 @@ properties: - fsl,imx8mm-pcie - fsl,imx8mp-pcie - fsl,imx8mm-pcie-ep + - fsl,imx8mq-pcie-ep reg: items: From patchwork Mon Oct 24 08:06:32 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Richard Zhu X-Patchwork-Id: 8233 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a5d:6687:0:0:0:0:0 with SMTP id l7csp320065wru; Mon, 24 Oct 2022 01:28:57 -0700 (PDT) X-Google-Smtp-Source: AMsMyM453lgUnPgdpzU0hVQNTGAgSKM39dNVU/6i20i1hsVK4W3dGgOm7E273RZRac94iNgj0ioL X-Received: by 2002:a17:90b:2243:b0:20b:42a:4c0d with SMTP id hk3-20020a17090b224300b0020b042a4c0dmr70473360pjb.123.1666600137043; Mon, 24 Oct 2022 01:28:57 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1666600137; cv=none; d=google.com; s=arc-20160816; b=KZg0mW/8MHY56P7qXRD4sNNRqneNBEGaQ9l6ra+bU6c53rwF82HVXulO+MjpJFXu0z xdIzZg/EE9S+puxvoNE86uV4nC8kUTEH7/WDhogzLEpH4iHEBTmm9UMT1/aVP2e7QD8a LLAcYLZ4+4KjjmIJ+o+tKoum38HT9j/u9sBdHNI4P7WdhWTfMHcC+UwAoHL3JYq41UyJ FFpUPcuFITGEXZDMu7J9F+OS0hhGxIFSxupcV6jo2d4+7j7jqPamtxT9egBsreoc0ajP U/ZQMrRr/OODRTP0O2EstrBJDaEIdh043ai1+wNtBHmExWR6BPYUvA//S8z+OWw5jFGO dUFA== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:references:in-reply-to:message-id:date:subject :cc:to:from; bh=aYK1sADb/Mct6+HQA5wBf9Zf2BuV/BkcNqb55pJ6gOo=; b=piBWuAXJ3F6Z11+obFuIeqSpPGWa/099ZjJBvykQO3o8oL5h4pfoGz4wedtyeuL9UL Nol8H8uT4uaUMSryC8SuQaQlE77ecw/XJYj7Pxz9NhKLjTH3d9g+eGFkag/521mzLetN 7vi0spOZg9G4Ib7OaOUSEIU3F+EvE92wV+BnSVUAxQNC3K/B1ZInHc1vJzD3C7kheD/B 6YGGm1VNPbfuUNx7ZwWt/bxFEiarld/73TFf+gvE20wmbOUofXbSEFQp5WlcCKKfFRlV icjuFtQNfT7uoUhxV0Pnaa9n3rsQXMG3VpCWYu7MekiHRKgQbyC48u/Vz1YWq8NElGR4 XSYQ== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=nxp.com Received: from out1.vger.email (out1.vger.email. [2620:137:e000::1:20]) by mx.google.com with ESMTP id in16-20020a17090b439000b00212ee661e5bsi5780227pjb.153.2022.10.24.01.28.44; Mon, 24 Oct 2022 01:28:57 -0700 (PDT) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) client-ip=2620:137:e000::1:20; Authentication-Results: mx.google.com; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=nxp.com Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S230428AbiJXI22 (ORCPT + 99 others); Mon, 24 Oct 2022 04:28:28 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:55770 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S230374AbiJXI17 (ORCPT ); Mon, 24 Oct 2022 04:27:59 -0400 Received: from inva020.nxp.com (inva020.nxp.com [92.121.34.13]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id DBC3652DF7; Mon, 24 Oct 2022 01:27:46 -0700 (PDT) Received: from inva020.nxp.com (localhost [127.0.0.1]) by inva020.eu-rdc02.nxp.com (Postfix) with ESMTP id B5FC91B8F2C; Mon, 24 Oct 2022 10:27:09 +0200 (CEST) Received: from aprdc01srsp001v.ap-rdc01.nxp.com (aprdc01srsp001v.ap-rdc01.nxp.com [165.114.16.16]) by inva020.eu-rdc02.nxp.com (Postfix) with ESMTP id 7D4CE1B8F26; Mon, 24 Oct 2022 10:27:09 +0200 (CEST) Received: from localhost.localdomain (shlinux2.ap.freescale.net [10.192.224.44]) by aprdc01srsp001v.ap-rdc01.nxp.com (Postfix) with ESMTP id B3E99180226C; Mon, 24 Oct 2022 16:27:07 +0800 (+08) From: Richard Zhu To: l.stach@pengutronix.de, bhelgaas@google.com, robh+dt@kernel.org, lorenzo.pieralisi@arm.com, shawnguo@kernel.org, kishon@ti.com, kw@linux.com, frank.li@nxp.com Cc: hongxing.zhu@nxp.com, linux-pci@vger.kernel.org, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, kernel@pengutronix.de, linux-imx@nxp.com Subject: [RESEND v4 03/14] dt-bindings: imx6q-pcie: Add i.MX8MP PCIe EP mode compatible string Date: Mon, 24 Oct 2022 16:06:32 +0800 Message-Id: <1666598803-1912-4-git-send-email-hongxing.zhu@nxp.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1666598803-1912-1-git-send-email-hongxing.zhu@nxp.com> References: <1666598803-1912-1-git-send-email-hongxing.zhu@nxp.com> X-Virus-Scanned: ClamAV using ClamSMTP X-Spam-Status: No, score=-4.2 required=5.0 tests=BAYES_00,RCVD_IN_DNSWL_MED, SPF_HELO_NONE,SPF_PASS autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-getmail-retrieved-from-mailbox: =?utf-8?q?INBOX?= X-GMAIL-THRID: =?utf-8?q?1747556905361311117?= X-GMAIL-MSGID: =?utf-8?q?1747556905361311117?= Add i.MX8MP PCIe endpoint mode compatible string. Signed-off-by: Richard Zhu Acked-by: Rob Herring --- Documentation/devicetree/bindings/pci/fsl,imx6q-pcie.yaml | 1 + 1 file changed, 1 insertion(+) diff --git a/Documentation/devicetree/bindings/pci/fsl,imx6q-pcie.yaml b/Documentation/devicetree/bindings/pci/fsl,imx6q-pcie.yaml index 114e11b62195..d79cbc55064a 100644 --- a/Documentation/devicetree/bindings/pci/fsl,imx6q-pcie.yaml +++ b/Documentation/devicetree/bindings/pci/fsl,imx6q-pcie.yaml @@ -29,6 +29,7 @@ properties: - fsl,imx8mp-pcie - fsl,imx8mm-pcie-ep - fsl,imx8mq-pcie-ep + - fsl,imx8mp-pcie-ep reg: items: From patchwork Mon Oct 24 08:06:33 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Richard Zhu X-Patchwork-Id: 8241 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a5d:6687:0:0:0:0:0 with SMTP id l7csp320291wru; Mon, 24 Oct 2022 01:29:42 -0700 (PDT) X-Google-Smtp-Source: AMsMyM4mAMRpDR7vLI++ga1HDmP46sFpbsdWgUGj3wt/yHGp8b0lKuhiEQyZ9KaM/2hFtbsqT+qx X-Received: by 2002:a65:6ccd:0:b0:439:2033:6ee with SMTP id g13-20020a656ccd000000b00439203306eemr27858649pgw.271.1666600182175; Mon, 24 Oct 2022 01:29:42 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1666600182; cv=none; d=google.com; s=arc-20160816; b=DcEUpGss+KuRoWZPBjZ+GDk2rr9wErDRJ8W4++Hk8fzxRDfg1B75CmHkFaa6ktSzRo Hq7RRcEm8amu+lx/J8ZvZCwq1rp6w8c/8yBWz2TtpC10rfb+IwYus//aSc2CHvn04GpO 4SOkLoZyxCVXr7PKC3DkTJT4mH7BtGIt6Wd6ujU95EuFK1HNpuPVKU4O9Qdxk1vKgjOW j42xjn1sUdvaOOqUEzio0B0fBzmGgg3avWp2mUYa395ev7Re7UpEg0q9eiMtRFsP0YtV CGTrEm/iMJ7sWgRptCmPJH8xhqo9jvNcs33eS344vJ+Q4jINuH7JIQPfdQdrVUQK/pRU G7sw== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:references:in-reply-to:message-id:date:subject :cc:to:from; bh=NPN2gqMuqThBX7NJwXbn22cjk8rEf/aETqkq0xSjSwg=; b=SGMB5d8mobSjS04oV1DucjoTo3SgtWFsv3noB36D/InRIOqZv0DVkC920Dyr1m/r1t CtPA8wi3e3qJszJy9r86fTF8gPOGSo2f3g0jq/niA3ku1Mak8+debe6ecl31UJY6Xc2r S4TRNkOat8ssJ4TguQmbGyi0d4NcmlDUGXrAbi4jqw6GdS6yRpP5lcrs5kqRvYbJS3IB LlBU82SakyDF2awBM0PoLMZ3r0OGIzAMtznTj7BD6inpqe3ctqeYJ9ekeXGjL/znZQM7 wPT8CrQXuCXMqlXc1HINqYrd0fSVU0YulTZmZVE5sB6hBDb/aptMeoy/Zu6t3Fge81DV fZ3A== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=nxp.com Received: from out1.vger.email (out1.vger.email. [2620:137:e000::1:20]) by mx.google.com with ESMTP id f3-20020a631003000000b0046ed62f820bsi9283815pgl.810.2022.10.24.01.29.29; Mon, 24 Oct 2022 01:29:42 -0700 (PDT) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) client-ip=2620:137:e000::1:20; Authentication-Results: mx.google.com; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=nxp.com Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S230447AbiJXI2g (ORCPT + 99 others); Mon, 24 Oct 2022 04:28:36 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:55760 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S230375AbiJXI17 (ORCPT ); Mon, 24 Oct 2022 04:27:59 -0400 Received: from inva020.nxp.com (inva020.nxp.com [92.121.34.13]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id DA2DA42D51; Mon, 24 Oct 2022 01:27:48 -0700 (PDT) Received: from inva020.nxp.com (localhost [127.0.0.1]) by inva020.eu-rdc02.nxp.com (Postfix) with ESMTP id 0A0331B8F1F; Mon, 24 Oct 2022 10:27:11 +0200 (CEST) Received: from aprdc01srsp001v.ap-rdc01.nxp.com (aprdc01srsp001v.ap-rdc01.nxp.com [165.114.16.16]) by inva020.eu-rdc02.nxp.com (Postfix) with ESMTP id C67831B8F37; Mon, 24 Oct 2022 10:27:10 +0200 (CEST) Received: from localhost.localdomain (shlinux2.ap.freescale.net [10.192.224.44]) by aprdc01srsp001v.ap-rdc01.nxp.com (Postfix) with ESMTP id 080741820F58; Mon, 24 Oct 2022 16:27:08 +0800 (+08) From: Richard Zhu To: l.stach@pengutronix.de, bhelgaas@google.com, robh+dt@kernel.org, lorenzo.pieralisi@arm.com, shawnguo@kernel.org, kishon@ti.com, kw@linux.com, frank.li@nxp.com Cc: hongxing.zhu@nxp.com, linux-pci@vger.kernel.org, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, kernel@pengutronix.de, linux-imx@nxp.com Subject: [RESEND v4 04/14] arm64: dts: Add i.MX8MM PCIe EP support Date: Mon, 24 Oct 2022 16:06:33 +0800 Message-Id: <1666598803-1912-5-git-send-email-hongxing.zhu@nxp.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1666598803-1912-1-git-send-email-hongxing.zhu@nxp.com> References: <1666598803-1912-1-git-send-email-hongxing.zhu@nxp.com> X-Virus-Scanned: ClamAV using ClamSMTP X-Spam-Status: No, score=-4.2 required=5.0 tests=BAYES_00,RCVD_IN_DNSWL_MED, SPF_HELO_NONE,SPF_PASS autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-getmail-retrieved-from-mailbox: =?utf-8?q?INBOX?= X-GMAIL-THRID: =?utf-8?q?1747556952553777107?= X-GMAIL-MSGID: =?utf-8?q?1747556952553777107?= Add i.MX8MM PCIe EP support. Signed-off-by: Richard Zhu --- arch/arm64/boot/dts/freescale/imx8mm.dtsi | 20 ++++++++++++++++++++ 1 file changed, 20 insertions(+) diff --git a/arch/arm64/boot/dts/freescale/imx8mm.dtsi b/arch/arm64/boot/dts/freescale/imx8mm.dtsi index afb90f59c83c..eca7a42ac52a 100644 --- a/arch/arm64/boot/dts/freescale/imx8mm.dtsi +++ b/arch/arm64/boot/dts/freescale/imx8mm.dtsi @@ -1291,6 +1291,26 @@ pcie0: pcie@33800000 { status = "disabled"; }; + pcie0_ep: pcie_ep@33800000 { + compatible = "fsl,imx8mm-pcie-ep"; + reg = <0x33800000 0x400000>, + <0x18000000 0x8000000>; + reg-names = "regs", "addr_space"; + num-lanes = <1>; + interrupts = ; + interrupt-names = "dma"; + fsl,max-link-speed = <2>; + power-domains = <&pgc_pcie>; + resets = <&src IMX8MQ_RESET_PCIE_CTRL_APPS_EN>, + <&src IMX8MQ_RESET_PCIE_CTRL_APPS_TURNOFF>; + reset-names = "apps", "turnoff"; + phys = <&pcie_phy>; + phy-names = "pcie-phy"; + num-ib-windows = <4>; + num-ob-windows = <4>; + status = "disabled"; + }; + gpu_3d: gpu@38000000 { compatible = "vivante,gc"; reg = <0x38000000 0x8000>; From patchwork Mon Oct 24 08:06:34 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Richard Zhu X-Patchwork-Id: 8236 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a5d:6687:0:0:0:0:0 with SMTP id l7csp320126wru; Mon, 24 Oct 2022 01:29:12 -0700 (PDT) X-Google-Smtp-Source: AMsMyM7kE8PgqQBw7SNKQUDOxHTox8VEC1ymopyJQnrtPit0J+lIuz9oxeeyKh/LHJzb6ci5+4di X-Received: by 2002:a17:90b:1808:b0:20c:8409:2007 with SMTP id lw8-20020a17090b180800b0020c84092007mr37666178pjb.226.1666600141590; Mon, 24 Oct 2022 01:29:01 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1666600141; cv=none; d=google.com; s=arc-20160816; b=hRE1rP/0pFQxgRnvWV8eCiazdiBzOi8e00GN0rtK/NFDfFKgKwtlddB5hgT/rSv/ME BtSdw+l0KJUZ82fP9oIjmf0DnRzDaHlv2QFzEXvJ1yxGgZEUDaos7/LpHTwEVomv1KUV iIJpPMFamzJFYutbOYieucw8VOoumxOMuYP5JrJpiAXnAtFAdLym+N0K/TTNUaAqZFH2 Uba4Yg3HHjBC+B/ReC6GBswVsE2bZf2GD2nPYabpdoYgNICNq7avHevP2XmejNfScBYG UjWEcQRzniUsEXW7isTBZOskSn353S0lBvt4a7BXOQl6e8c1eogASwYi3pKg4vnLxpkh wLtQ== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:references:in-reply-to:message-id:date:subject :cc:to:from; bh=fA7+ViS9RjZQJZ30H4QERUy3nQ7K/vJz8J+uPLd3GFo=; b=st5PRNh1lcCdPxdWxAlg7w/FvMabON0NF6tQmzAVzYpBz/sKnqe2waX+cI5TJv9NS3 G+mrFDyEBW+kyMJRsCUoObHJ5v8REiJIHl4zR+GbNuBSYDSFoF/lLD5VKgno/ksUGTXJ XNb0LIoK2ZrBbrYZsCefyV4AWpL3Jrd+jCPAmJMK/X11zi9lj2jPgQ9I0QAQekEgEY15 myUCbHkhBRtX7L1w7PLKFubagTnmwiNl5ebzPwu2v+1EUdxvElZ5LqpP/T+26pwVwPbG dEkSv+okdBbJ4SYR/8HeUXcNAxlq3quKkFx/j6iE32FcnJWwz8wyDG1Pxt0FM9cegSOD AyKw== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=nxp.com Received: from out1.vger.email (out1.vger.email. [2620:137:e000::1:20]) by mx.google.com with ESMTP id pj11-20020a17090b4f4b00b0020d542eb5f0si10291722pjb.110.2022.10.24.01.28.49; Mon, 24 Oct 2022 01:29:01 -0700 (PDT) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) client-ip=2620:137:e000::1:20; Authentication-Results: mx.google.com; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=nxp.com Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S230436AbiJXI2c (ORCPT + 99 others); Mon, 24 Oct 2022 04:28:32 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:55756 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S230379AbiJXI17 (ORCPT ); Mon, 24 Oct 2022 04:27:59 -0400 Received: from inva021.nxp.com (inva021.nxp.com [92.121.34.21]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 9FE7E233AB; Mon, 24 Oct 2022 01:27:50 -0700 (PDT) Received: from inva021.nxp.com (localhost [127.0.0.1]) by inva021.eu-rdc02.nxp.com (Postfix) with ESMTP id 8AB14220E9A; Mon, 24 Oct 2022 10:27:12 +0200 (CEST) Received: from aprdc01srsp001v.ap-rdc01.nxp.com (aprdc01srsp001v.ap-rdc01.nxp.com [165.114.16.16]) by inva021.eu-rdc02.nxp.com (Postfix) with ESMTP id 5CB2B220EB0; Mon, 24 Oct 2022 10:27:12 +0200 (CEST) Received: from localhost.localdomain (shlinux2.ap.freescale.net [10.192.224.44]) by aprdc01srsp001v.ap-rdc01.nxp.com (Postfix) with ESMTP id 509ED180226C; Mon, 24 Oct 2022 16:27:10 +0800 (+08) From: Richard Zhu To: l.stach@pengutronix.de, bhelgaas@google.com, robh+dt@kernel.org, lorenzo.pieralisi@arm.com, shawnguo@kernel.org, kishon@ti.com, kw@linux.com, frank.li@nxp.com Cc: hongxing.zhu@nxp.com, linux-pci@vger.kernel.org, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, kernel@pengutronix.de, linux-imx@nxp.com Subject: [RESEND v4 05/14] arm64: dts: Add i.MX8MM PCIe EP support on EVK board Date: Mon, 24 Oct 2022 16:06:34 +0800 Message-Id: <1666598803-1912-6-git-send-email-hongxing.zhu@nxp.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1666598803-1912-1-git-send-email-hongxing.zhu@nxp.com> References: <1666598803-1912-1-git-send-email-hongxing.zhu@nxp.com> X-Virus-Scanned: ClamAV using ClamSMTP X-Spam-Status: No, score=-4.2 required=5.0 tests=BAYES_00,RCVD_IN_DNSWL_MED, SPF_HELO_NONE,SPF_PASS autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-getmail-retrieved-from-mailbox: =?utf-8?q?INBOX?= X-GMAIL-THRID: =?utf-8?q?1747556909817220710?= X-GMAIL-MSGID: =?utf-8?q?1747556909817220710?= Add i.MX8MM PCIe EP support on EVK board. Signed-off-by: Richard Zhu --- arch/arm64/boot/dts/freescale/imx8mm-evk.dtsi | 14 ++++++++++++++ 1 file changed, 14 insertions(+) diff --git a/arch/arm64/boot/dts/freescale/imx8mm-evk.dtsi b/arch/arm64/boot/dts/freescale/imx8mm-evk.dtsi index 7d6317d95b13..d43eb2eb23bf 100644 --- a/arch/arm64/boot/dts/freescale/imx8mm-evk.dtsi +++ b/arch/arm64/boot/dts/freescale/imx8mm-evk.dtsi @@ -380,6 +380,20 @@ &sai2 { status = "okay"; }; +&pcie0_ep{ + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_pcie0>; + clocks = <&clk IMX8MM_CLK_PCIE1_ROOT>, <&clk IMX8MM_CLK_PCIE1_AUX>, + <&pcie0_refclk>; + clock-names = "pcie", "pcie_aux", "pcie_bus"; + assigned-clocks = <&clk IMX8MM_CLK_PCIE1_AUX>, + <&clk IMX8MM_CLK_PCIE1_CTRL>; + assigned-clock-rates = <10000000>, <250000000>; + assigned-clock-parents = <&clk IMX8MM_SYS_PLL2_50M>, + <&clk IMX8MM_SYS_PLL2_250M>; + status = "disabled"; +}; + &sai3 { pinctrl-names = "default"; pinctrl-0 = <&pinctrl_sai3>; From patchwork Mon Oct 24 08:06:35 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Richard Zhu X-Patchwork-Id: 8235 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a5d:6687:0:0:0:0:0 with SMTP id l7csp320117wru; Mon, 24 Oct 2022 01:29:10 -0700 (PDT) X-Google-Smtp-Source: AMsMyM7ssN3lQR/78aB6wyJljxm1hPftt2xfWZPX0Q/Zovlwf6cftDlpwZupnSjkjzFF/C0K38Ot X-Received: by 2002:a17:902:d510:b0:185:4b76:6277 with SMTP id b16-20020a170902d51000b001854b766277mr31946786plg.82.1666600150299; Mon, 24 Oct 2022 01:29:10 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1666600150; cv=none; d=google.com; s=arc-20160816; b=Qvu3oZwfW8nfUZLIkRFpNi3DGDr2cgVJurL7BMtUQ/jpxXT31HLJDjZmcxQb25Tunq 0GuVSqXrfWC2laEEfSeb/YQcmngrYK3AcCCBjscVInXEi5l0vRalrSroVc3hAJCjmd2n sFPrVU4T82pkGtEdt7yOCuUZuppAXtsTHoI3NY7I5PliCPl0sFLKqTBhrhpInvTivP1M rqyU1dXtmP+Mg6T0Ez5AnBgAyFyFeUUrL7xDLQrJ10KXu2/MiOQsU2DUtZwB8YFK6Gs4 2h3V9P8CqilZdTxhju1my/drv1JzbAqkC+RLNoKDzb/SyCxdijb5L+LZLEYgvT0FtQ3S A3bA== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:references:in-reply-to:message-id:date:subject :cc:to:from; bh=5crGIsUUxjW1PB0EwBMl4gKAXwZ/2/PFNNC9GMegpyc=; b=e8Im4oikoi4IFFU72p1twHKVrbH6pqL6BUeGHfDsRU82gUQ8YQmKLHWpXLK/twYxrs Iqkf5gxvSO6dxmKGpQ5+Wbz+bdVdnpVxti1MXwE3r570C2+ZoFOZSRQ8MC3TMQotylFw HSiu869RD7GbHOD+5UG/F2YvhMowZzBgdsQgFL0BfzzqICmLe6/A57BWobUsCiewKEV+ nH1bS5/UfwK5gATq6sWZNIHncJ2ajkWvS1TrKNNxjfJZQc9GOgRrsp69lq78rJ2secQ1 GebiCBoCgj+eG8KUI5TVfvjnzNsnpjJu6+z0eOiR8dKNI0XESVqO3lxY3EjUkH/cynAX rh8w== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=nxp.com Received: from out1.vger.email (out1.vger.email. [2620:137:e000::1:20]) by mx.google.com with ESMTP id h64-20020a638343000000b00460c07c5542si3056641pge.407.2022.10.24.01.28.57; Mon, 24 Oct 2022 01:29:10 -0700 (PDT) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) client-ip=2620:137:e000::1:20; Authentication-Results: mx.google.com; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=nxp.com Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S230512AbiJXI2l (ORCPT + 99 others); Mon, 24 Oct 2022 04:28:41 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:55896 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S230403AbiJXI2C (ORCPT ); Mon, 24 Oct 2022 04:28:02 -0400 Received: from inva020.nxp.com (inva020.nxp.com [92.121.34.13]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id A0B154E632; Mon, 24 Oct 2022 01:27:50 -0700 (PDT) Received: from inva020.nxp.com (localhost [127.0.0.1]) by inva020.eu-rdc02.nxp.com (Postfix) with ESMTP id D52C21B8F26; Mon, 24 Oct 2022 10:27:13 +0200 (CEST) Received: from aprdc01srsp001v.ap-rdc01.nxp.com (aprdc01srsp001v.ap-rdc01.nxp.com [165.114.16.16]) by inva020.eu-rdc02.nxp.com (Postfix) with ESMTP id 9D99A1B8F3A; Mon, 24 Oct 2022 10:27:13 +0200 (CEST) Received: from localhost.localdomain (shlinux2.ap.freescale.net [10.192.224.44]) by aprdc01srsp001v.ap-rdc01.nxp.com (Postfix) with ESMTP id DBDA71820F58; Mon, 24 Oct 2022 16:27:11 +0800 (+08) From: Richard Zhu To: l.stach@pengutronix.de, bhelgaas@google.com, robh+dt@kernel.org, lorenzo.pieralisi@arm.com, shawnguo@kernel.org, kishon@ti.com, kw@linux.com, frank.li@nxp.com Cc: hongxing.zhu@nxp.com, linux-pci@vger.kernel.org, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, kernel@pengutronix.de, linux-imx@nxp.com Subject: [RESEND v4 06/14] arm64: dts: Add i.MX8MQ PCIe EP support Date: Mon, 24 Oct 2022 16:06:35 +0800 Message-Id: <1666598803-1912-7-git-send-email-hongxing.zhu@nxp.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1666598803-1912-1-git-send-email-hongxing.zhu@nxp.com> References: <1666598803-1912-1-git-send-email-hongxing.zhu@nxp.com> X-Virus-Scanned: ClamAV using ClamSMTP X-Spam-Status: No, score=-4.2 required=5.0 tests=BAYES_00,RCVD_IN_DNSWL_MED, SPF_HELO_NONE,SPF_PASS autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-getmail-retrieved-from-mailbox: =?utf-8?q?INBOX?= X-GMAIL-THRID: =?utf-8?q?1747556919381564045?= X-GMAIL-MSGID: =?utf-8?q?1747556919381564045?= Add i.MX8MQ PCIe EP support. Signed-off-by: Richard Zhu --- arch/arm64/boot/dts/freescale/imx8mq.dtsi | 27 +++++++++++++++++++++++ 1 file changed, 27 insertions(+) diff --git a/arch/arm64/boot/dts/freescale/imx8mq.dtsi b/arch/arm64/boot/dts/freescale/imx8mq.dtsi index 19eaa523564d..93871804b282 100644 --- a/arch/arm64/boot/dts/freescale/imx8mq.dtsi +++ b/arch/arm64/boot/dts/freescale/imx8mq.dtsi @@ -1581,6 +1581,33 @@ pcie1: pcie@33c00000 { status = "disabled"; }; + pcie1_ep: pcie_ep@33c00000 { + compatible = "fsl,imx8mq-pcie-ep"; + reg = <0x33c00000 0x000400000>, + <0x20000000 0x08000000>; + reg-names = "regs", "addr_space"; + num-lanes = <1>; + interrupts = ; + interrupt-names = "dma"; + fsl,max-link-speed = <2>; + power-domains = <&pgc_pcie>; + resets = <&src IMX8MQ_RESET_PCIEPHY2>, + <&src IMX8MQ_RESET_PCIE2_CTRL_APPS_EN>, + <&src IMX8MQ_RESET_PCIE2_CTRL_APPS_TURNOFF>; + reset-names = "pciephy", "apps", "turnoff"; + assigned-clocks = <&clk IMX8MQ_CLK_PCIE2_CTRL>, + <&clk IMX8MQ_CLK_PCIE2_PHY>, + <&clk IMX8MQ_CLK_PCIE2_AUX>; + assigned-clock-parents = <&clk IMX8MQ_SYS2_PLL_250M>, + <&clk IMX8MQ_SYS2_PLL_100M>, + <&clk IMX8MQ_SYS1_PLL_80M>; + assigned-clock-rates = <250000000>, <100000000>, + <10000000>; + num-ib-windows = <4>; + num-ob-windows = <4>; + status = "disabled"; + }; + gic: interrupt-controller@38800000 { compatible = "arm,gic-v3"; reg = <0x38800000 0x10000>, /* GIC Dist */ From patchwork Mon Oct 24 08:06:36 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Richard Zhu X-Patchwork-Id: 8239 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a5d:6687:0:0:0:0:0 with SMTP id l7csp320236wru; Mon, 24 Oct 2022 01:29:30 -0700 (PDT) X-Google-Smtp-Source: AMsMyM5esa2CXgP0KHGXzLqbYZntv2v/CXsNtJPYnc5Ks/eTcAFNukksq0Rl96KnqHU5xM8YEnj1 X-Received: by 2002:a17:90a:c09:b0:20d:7820:2e60 with SMTP id 9-20020a17090a0c0900b0020d78202e60mr70130513pjs.180.1666600170543; Mon, 24 Oct 2022 01:29:30 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1666600170; cv=none; d=google.com; s=arc-20160816; b=ZgV2FqFUwpUKw0POQ+H04MrC9xVeQLKpXyNAA/WG5npK4X9jCnbxeEYBVpdCYjeXVM jrwtu9WlzdhEyskQJejuBub6wj8kmCAEoGonZXUXOgQ++kIRbL+3iGKXlFwHLzA+gwHU /wcjCemV2xM+qDvPexwU9aBhVi7zSBwtdbkaIidNJIf9LutcIeo8fhirQy82QYSrQYm0 cMRuld89AfLCUWMPt5NDh97/Q2BtCjqURBfdhXD9bPUxhW+jGYyhI6RXkAZA+CpqI0k2 Wtwqum0zoyrVIlyOd9x/q8rN+qd0A17hqpoot5wuhtx8RebV9kV/Gtifq5Ns6v93yq1e 11ag== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:references:in-reply-to:message-id:date:subject :cc:to:from; bh=f0C1QqLZTfegWalyf8kwrRY4ZLX3DoqcLbcNh2p24tM=; b=j03EuUe3Vonjj2nN1buM2fdCVx7QiILE0olLMS6PqTBKQJz3LtcijfjYu/4K6x6lbR 430C/BpoWP65ZKuBvKIS4Vj2HXn5FsbazqGAWK+Xlbp4e6gw/QJ7LSJNCVOfoFTxN8jg TAqzs5sqlsYecvaWInPFUue/t0oCm+g6lquWPb+5u42jM4rT4ryd8ys6VhP+mXQ+W/ud X8qn9GUvtEIC8a8Z5MynGfftoo9uLAMWbGa+zm0z5feLJCoIvVNul4SyNlINWM/YKKZf IgUrr94F/c2UrGJBkqgpNN3a/yXKobnNXOGee6lTKfPqK/oKM3UZMvsYaxzoyr9l87Hf ZSOQ== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=nxp.com Received: from out1.vger.email (out1.vger.email. [2620:137:e000::1:20]) by mx.google.com with ESMTP id q5-20020a056a00084500b00560bdd654ffsi36959613pfk.314.2022.10.24.01.29.17; Mon, 24 Oct 2022 01:29:30 -0700 (PDT) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) client-ip=2620:137:e000::1:20; Authentication-Results: mx.google.com; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=nxp.com Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S231127AbiJXI2r (ORCPT + 99 others); Mon, 24 Oct 2022 04:28:47 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:56120 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S230425AbiJXI2H (ORCPT ); Mon, 24 Oct 2022 04:28:07 -0400 Received: from inva021.nxp.com (inva021.nxp.com [92.121.34.21]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 2BEC51B7AD; Mon, 24 Oct 2022 01:27:52 -0700 (PDT) Received: from inva021.nxp.com (localhost [127.0.0.1]) by inva021.eu-rdc02.nxp.com (Postfix) with ESMTP id 2017A220E63; Mon, 24 Oct 2022 10:27:15 +0200 (CEST) Received: from aprdc01srsp001v.ap-rdc01.nxp.com (aprdc01srsp001v.ap-rdc01.nxp.com [165.114.16.16]) by inva021.eu-rdc02.nxp.com (Postfix) with ESMTP id E5CB7220E49; Mon, 24 Oct 2022 10:27:14 +0200 (CEST) Received: from localhost.localdomain (shlinux2.ap.freescale.net [10.192.224.44]) by aprdc01srsp001v.ap-rdc01.nxp.com (Postfix) with ESMTP id 279DE180226C; Mon, 24 Oct 2022 16:27:13 +0800 (+08) From: Richard Zhu To: l.stach@pengutronix.de, bhelgaas@google.com, robh+dt@kernel.org, lorenzo.pieralisi@arm.com, shawnguo@kernel.org, kishon@ti.com, kw@linux.com, frank.li@nxp.com Cc: hongxing.zhu@nxp.com, linux-pci@vger.kernel.org, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, kernel@pengutronix.de, linux-imx@nxp.com Subject: [RESEND v4 07/14] arm64: dts: Add i.MX8MQ PCIe EP support on EVK board Date: Mon, 24 Oct 2022 16:06:36 +0800 Message-Id: <1666598803-1912-8-git-send-email-hongxing.zhu@nxp.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1666598803-1912-1-git-send-email-hongxing.zhu@nxp.com> References: <1666598803-1912-1-git-send-email-hongxing.zhu@nxp.com> X-Virus-Scanned: ClamAV using ClamSMTP X-Spam-Status: No, score=-4.2 required=5.0 tests=BAYES_00,RCVD_IN_DNSWL_MED, SPF_HELO_NONE,SPF_PASS autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-getmail-retrieved-from-mailbox: =?utf-8?q?INBOX?= X-GMAIL-THRID: =?utf-8?q?1747556940675513490?= X-GMAIL-MSGID: =?utf-8?q?1747556940675513490?= Add i.MX8MQ PCIe EP support on EVK board. Signed-off-by: Richard Zhu --- arch/arm64/boot/dts/freescale/imx8mq-evk.dts | 12 ++++++++++++ 1 file changed, 12 insertions(+) diff --git a/arch/arm64/boot/dts/freescale/imx8mq-evk.dts b/arch/arm64/boot/dts/freescale/imx8mq-evk.dts index 82387b9cb800..9f3bad9b49a6 100644 --- a/arch/arm64/boot/dts/freescale/imx8mq-evk.dts +++ b/arch/arm64/boot/dts/freescale/imx8mq-evk.dts @@ -377,6 +377,18 @@ &pcie1 { status = "okay"; }; +&pcie1_ep { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_pcie1>; + clocks = <&clk IMX8MQ_CLK_PCIE2_ROOT>, + <&clk IMX8MQ_CLK_PCIE2_AUX>, + <&clk IMX8MQ_CLK_PCIE2_PHY>, + <&pcie0_refclk>; + clock-names = "pcie", "pcie_aux", "pcie_phy", "pcie_bus"; + vph-supply = <&vgen5_reg>; + status = "disabled"; +}; + &pgc_gpu { power-supply = <&sw1a_reg>; }; From patchwork Mon Oct 24 08:06:37 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Richard Zhu X-Patchwork-Id: 8237 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a5d:6687:0:0:0:0:0 with SMTP id l7csp320219wru; Mon, 24 Oct 2022 01:29:28 -0700 (PDT) X-Google-Smtp-Source: AMsMyM6fJ+2chTG4eSu+jhGkeCaUhDLB0ejVpJYnMysZsy/oG1DCMOj8g9CtDrD27WTWdHT22zxw X-Received: by 2002:a63:5946:0:b0:461:e1b9:c5a5 with SMTP id j6-20020a635946000000b00461e1b9c5a5mr27589342pgm.56.1666600168246; Mon, 24 Oct 2022 01:29:28 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1666600168; cv=none; d=google.com; s=arc-20160816; b=LOXj549eKF5gr19S2/CG9eEVysMkvlW8EjLB1T+MqvLXgZWSxXEdkrWRHZvjk125V8 RVrEoJuK8Y12u65PdlFs/NI6J0dXRHAs3yqzKOUWO7t74oHKGJCnbauTASjWmpIo9Ghw ZUTWelstbViGCb/SbRj7nIQVsGrLYpnWA8JTkmOFzkEhwFCbzgp6cVGil6qOhddOaPNy 4Nb8RkoHmB4oilklpkAPypChUiajbF4oYNVPSQIrKMuiiT/3ZvlUyUHJpvTlWui4Hx0U BbQtUJmFKlBgVRnUkjwCj4v5FehQa4nT2hAE70emg2XL4Sr6OoYqULJViFIc3nfljQ0z /9Dw== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:references:in-reply-to:message-id:date:subject :cc:to:from; bh=Wf77qsEKpB9Rr94aGe9tk03iX8UJqrDgBol4kPB2XZ0=; b=WwaYUbSkNneEVs4E0Mo3GkZ5n54qBo2cR+cjvQS+1nwB+tyQrIfdIbi1+nrR7kCFo5 yWq1/8b5fiGCpTAPnxlXUDRm/yjR4ebopv65+VSavdDVUAMeZMR25opBYAbppbVO8u+i JjU4RfNzdYzDwmIWIrFtia3NtDVFElHrIg4hOUM8gFLHr/V0qXS8Lo3BZLz4G1Z1H6C+ nKOYUdcfC5thFhUvm7p1EkGOwB8WOfjPPivWCsIPzi3Kvq9atBTVGcwHBNxSrkGE0ZR/ ZCPSiPitNfSXGU+xJefjLaoFjHwpXbRClF9Zg+pu3Jm2cltWrnoCvHkw43raNchUccUd b4aw== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=nxp.com Received: from out1.vger.email (out1.vger.email. [2620:137:e000::1:20]) by mx.google.com with ESMTP id j22-20020a056a00235600b0053a339cafb3si37847806pfj.53.2022.10.24.01.29.16; Mon, 24 Oct 2022 01:29:28 -0700 (PDT) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) client-ip=2620:137:e000::1:20; Authentication-Results: mx.google.com; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=nxp.com Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S230367AbiJXI2o (ORCPT + 99 others); Mon, 24 Oct 2022 04:28:44 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:55930 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S230406AbiJXI2D (ORCPT ); Mon, 24 Oct 2022 04:28:03 -0400 Received: from inva021.nxp.com (inva021.nxp.com [92.121.34.21]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 542CB4E613; Mon, 24 Oct 2022 01:27:52 -0700 (PDT) Received: from inva021.nxp.com (localhost [127.0.0.1]) by inva021.eu-rdc02.nxp.com (Postfix) with ESMTP id 148E4220EAE; Mon, 24 Oct 2022 10:27:16 +0200 (CEST) Received: from aprdc01srsp001v.ap-rdc01.nxp.com (aprdc01srsp001v.ap-rdc01.nxp.com [165.114.16.16]) by inva021.eu-rdc02.nxp.com (Postfix) with ESMTP id D89AA220E59; Mon, 24 Oct 2022 10:27:15 +0200 (CEST) Received: from localhost.localdomain (shlinux2.ap.freescale.net [10.192.224.44]) by aprdc01srsp001v.ap-rdc01.nxp.com (Postfix) with ESMTP id 704241834868; Mon, 24 Oct 2022 16:27:14 +0800 (+08) From: Richard Zhu To: l.stach@pengutronix.de, bhelgaas@google.com, robh+dt@kernel.org, lorenzo.pieralisi@arm.com, shawnguo@kernel.org, kishon@ti.com, kw@linux.com, frank.li@nxp.com Cc: hongxing.zhu@nxp.com, linux-pci@vger.kernel.org, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, kernel@pengutronix.de, linux-imx@nxp.com Subject: [RESEND v4 08/14] arm64: dts: Add i.MX8MP PCIe EP support Date: Mon, 24 Oct 2022 16:06:37 +0800 Message-Id: <1666598803-1912-9-git-send-email-hongxing.zhu@nxp.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1666598803-1912-1-git-send-email-hongxing.zhu@nxp.com> References: <1666598803-1912-1-git-send-email-hongxing.zhu@nxp.com> X-Virus-Scanned: ClamAV using ClamSMTP X-Spam-Status: No, score=-4.2 required=5.0 tests=BAYES_00,RCVD_IN_DNSWL_MED, SPF_HELO_NONE,SPF_PASS autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-getmail-retrieved-from-mailbox: =?utf-8?q?INBOX?= X-GMAIL-THRID: =?utf-8?q?1747556938171622521?= X-GMAIL-MSGID: =?utf-8?q?1747556938171622521?= Add i.MX8MP PCIe EP support. Signed-off-by: Richard Zhu --- arch/arm64/boot/dts/freescale/imx8mp.dtsi | 19 +++++++++++++++++++ 1 file changed, 19 insertions(+) diff --git a/arch/arm64/boot/dts/freescale/imx8mp.dtsi b/arch/arm64/boot/dts/freescale/imx8mp.dtsi index bb916a0948a8..53d376e14b88 100644 --- a/arch/arm64/boot/dts/freescale/imx8mp.dtsi +++ b/arch/arm64/boot/dts/freescale/imx8mp.dtsi @@ -1192,6 +1192,25 @@ pcie: pcie@33800000 { status = "disabled"; }; + pcie_ep: pcie_ep@33800000 { + compatible = "fsl,imx8mp-pcie-ep"; + reg = <0x33800000 0x000400000>, <0x18000000 0x08000000>; + reg-names = "regs", "addr_space"; + num-lanes = <1>; + interrupts = ; /* eDMA */ + interrupt-names = "dma"; + fsl,max-link-speed = <3>; + power-domains = <&hsio_blk_ctrl IMX8MP_HSIOBLK_PD_PCIE>; + resets = <&src IMX8MP_RESET_PCIE_CTRL_APPS_EN>, + <&src IMX8MP_RESET_PCIE_CTRL_APPS_TURNOFF>; + reset-names = "apps", "turnoff"; + phys = <&pcie_phy>; + phy-names = "pcie-phy"; + num-ib-windows = <4>; + num-ob-windows = <4>; + status = "disabled"; + }; + gpu3d: gpu@38000000 { compatible = "vivante,gc"; reg = <0x38000000 0x8000>; From patchwork Mon Oct 24 08:06:38 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Richard Zhu X-Patchwork-Id: 8242 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a5d:6687:0:0:0:0:0 with SMTP id l7csp320567wru; Mon, 24 Oct 2022 01:30:40 -0700 (PDT) X-Google-Smtp-Source: AMsMyM72Ey3JsCiOsysehfJA+kVOYUqo58zw/eZtAJWzTtraqddTxcDuUDlstibZlAZM8aUFOEBq X-Received: by 2002:a17:902:7b91:b0:185:4548:3a96 with SMTP id w17-20020a1709027b9100b0018545483a96mr32491107pll.130.1666600240063; Mon, 24 Oct 2022 01:30:40 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1666600240; cv=none; d=google.com; s=arc-20160816; b=QI3h6BiKeKmQVE/9CEeeqzXPhjZ4qM+kSi0MkM3zx0+5MP8ihQjVVKqGXhrPjEP3t0 N8yaLm9UdgRojMy5wtcVY2LGEXRRuSrqtlinwczmtBescUFyaoAT8vUZdw8BTJviDte3 2bb2CzkChiTZEyf18khPYixVB8lsJ/nMYJIKl0x6ZxlP12a5jvIb5mVtsGwVtNV6qtRe o1wvGbhmOT1W3pP2vec8p2k1XbC+v2DZ6t57chLQdQ2dg+ieDrScdsjBGfHl+BQZIbF3 7QOuR8LyzS1tgkq/miV4jpNsnwr6ZLMxyK5+4ZD7GdVy9Pye2b/1/y/dB/SlVyfGgwE9 eqcg== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:references:in-reply-to:message-id:date:subject :cc:to:from; bh=QjE3K/fqTcmhGKgofMhZGICz74qv+eB+rggGpQIKHj8=; b=NH1snV/wJgZdFwMXPSYkp7ipfWrLOd+qhYDiE67k2wqPJprCcG0yFYvmhuE+j4EFAq nnPUJ1IKugic7f1wrcfvI/2DDj/iRPuPDb2K3tukRMyEzCIYNnQFPjPuEgdyA9b8nyUz mNYY5cYRqYeOqZkWc78RvzlMOSjWID4aAIbvTufF4jK/k9QhPXq0zWkIbBq1OtEsCPic sOigAwEk6RBAakmv/IkKNcjtUrfgcrOZZOGmZm86Tv6FUAin1yksrB04HeimnasyHw1f 6GrNIGtRXirfgn51rBA15M0jzLca9UuUZd2ZWli/rxjqysp8r96fmj2yaq+kCcKYMMyn 3fMA== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=nxp.com Received: from out1.vger.email (out1.vger.email. [2620:137:e000::1:20]) by mx.google.com with ESMTP id r134-20020a632b8c000000b0042b30f95f99si35300151pgr.807.2022.10.24.01.30.26; Mon, 24 Oct 2022 01:30:40 -0700 (PDT) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) client-ip=2620:137:e000::1:20; Authentication-Results: mx.google.com; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=nxp.com Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S231181AbiJXI3Q (ORCPT + 99 others); Mon, 24 Oct 2022 04:29:16 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:55982 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S230405AbiJXI2Y (ORCPT ); Mon, 24 Oct 2022 04:28:24 -0400 Received: from inva021.nxp.com (inva021.nxp.com [92.121.34.21]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 8E54759248; Mon, 24 Oct 2022 01:28:11 -0700 (PDT) Received: from inva021.nxp.com (localhost [127.0.0.1]) by inva021.eu-rdc02.nxp.com (Postfix) with ESMTP id 6082A220EAF; Mon, 24 Oct 2022 10:27:17 +0200 (CEST) Received: from aprdc01srsp001v.ap-rdc01.nxp.com (aprdc01srsp001v.ap-rdc01.nxp.com [165.114.16.16]) by inva021.eu-rdc02.nxp.com (Postfix) with ESMTP id 2CD60220E9B; Mon, 24 Oct 2022 10:27:17 +0200 (CEST) Received: from localhost.localdomain (shlinux2.ap.freescale.net [10.192.224.44]) by aprdc01srsp001v.ap-rdc01.nxp.com (Postfix) with ESMTP id B8F1A180226C; Mon, 24 Oct 2022 16:27:15 +0800 (+08) From: Richard Zhu To: l.stach@pengutronix.de, bhelgaas@google.com, robh+dt@kernel.org, lorenzo.pieralisi@arm.com, shawnguo@kernel.org, kishon@ti.com, kw@linux.com, frank.li@nxp.com Cc: hongxing.zhu@nxp.com, linux-pci@vger.kernel.org, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, kernel@pengutronix.de, linux-imx@nxp.com Subject: [RESEND v4 09/14] arm64: dts: Add i.MX8MP PCIe EP support on EVK board Date: Mon, 24 Oct 2022 16:06:38 +0800 Message-Id: <1666598803-1912-10-git-send-email-hongxing.zhu@nxp.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1666598803-1912-1-git-send-email-hongxing.zhu@nxp.com> References: <1666598803-1912-1-git-send-email-hongxing.zhu@nxp.com> X-Virus-Scanned: ClamAV using ClamSMTP X-Spam-Status: No, score=-4.2 required=5.0 tests=BAYES_00,RCVD_IN_DNSWL_MED, SPF_HELO_NONE,SPF_PASS autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-getmail-retrieved-from-mailbox: =?utf-8?q?INBOX?= X-GMAIL-THRID: =?utf-8?q?1747557013045750503?= X-GMAIL-MSGID: =?utf-8?q?1747557013045750503?= Add i.MX8MP PCIe EP support on EVK board. Signed-off-by: Richard Zhu --- arch/arm64/boot/dts/freescale/imx8mp-evk.dts | 13 +++++++++++++ 1 file changed, 13 insertions(+) diff --git a/arch/arm64/boot/dts/freescale/imx8mp-evk.dts b/arch/arm64/boot/dts/freescale/imx8mp-evk.dts index 9f1469db554d..6daaa5ddc6b6 100644 --- a/arch/arm64/boot/dts/freescale/imx8mp-evk.dts +++ b/arch/arm64/boot/dts/freescale/imx8mp-evk.dts @@ -390,6 +390,19 @@ &pcie { status = "okay"; }; +&pcie_ep{ + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_pcie0>; + clocks = <&clk IMX8MP_CLK_HSIO_ROOT>, + <&clk IMX8MP_CLK_PCIE_ROOT>, + <&clk IMX8MP_CLK_HSIO_AXI>; + clock-names = "pcie", "pcie_aux", "pcie_bus"; + assigned-clocks = <&clk IMX8MP_CLK_PCIE_AUX>; + assigned-clock-rates = <10000000>; + assigned-clock-parents = <&clk IMX8MP_SYS_PLL2_50M>; + status = "disabled"; +}; + &snvs_pwrkey { status = "okay"; }; From patchwork Mon Oct 24 08:06:39 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Richard Zhu X-Patchwork-Id: 8238 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a5d:6687:0:0:0:0:0 with SMTP id l7csp320237wru; Mon, 24 Oct 2022 01:29:30 -0700 (PDT) X-Google-Smtp-Source: AMsMyM4/v/3uqqbpszPF3qqf1dnHWRNk1/h6/li6JmEc0cn/w8R7sBNn1NofhFIKX2qWXuKc2bQA X-Received: by 2002:a17:902:f684:b0:17f:95cc:af8 with SMTP id l4-20020a170902f68400b0017f95cc0af8mr32307769plg.91.1666600170570; Mon, 24 Oct 2022 01:29:30 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1666600170; cv=none; d=google.com; s=arc-20160816; b=1BndMMufaVaa8e65OXj/SI6GDdLkY2G7yL+I17Hl+ujbQy1SfvFX2sONu8pt3+BsBC 6WIIQd81d3UEv4xflG42ZZBSTLRrejxrh/KPESpKNVpwaZSmj8aUcEmqLHN9O/KS/u4g Nk/KQeZkuqDpcmx/0dmMrzet1C7OuIxgA2R4BFZjxS3A1eBW/qDjCEJYodlU2xE48K6s Dy7IMXqwQI6mSY7pz31Q7tCzGiY6OjvjwtXmEAHcRgSMW+g/R8INb4eCqunjRpp0gA/w LmmTleQVkBD9iAJmwJul70mQupfDzWWVlzxlyDd3AAipWSXh4aySvvw7oCgfMkDO7zhs iO0Q== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:references:in-reply-to:message-id:date:subject :cc:to:from; bh=Ca2SlBb+oCFVhPJMig3EC5BwDT2x57boD25CeuYlGAY=; b=bqfqtrFcU49jb+urogCosdf6I/CgZ2GkRQHm7rfcuNgiTYdsbd7NHKVtx15vV+9gnn Ojsd7d1HXibOti1UMgzPAP1T2rBhreAW5TFqMI3hXcjnR/oSDexWVmCSwQfKf3L3ZmKv aDkUGHsg78D+KXJ7DTDypj38ekHPEfu00PFlqWdalxvY0B98Q4W3rLax8zxES0R4D6QP BzoRfHqY9D7yQu8oAf8JZebk21Sp8g0YKhSedF7tCPjMLwPLXTqPF67X4uMAl8WmI5n6 IKf6Ht0RjkUWQz0ollWLNmVQIsUZT7rov/FhTiEr4inmSaGTmrmve9ZafcJbyDZz+nUe 8dPw== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=nxp.com Received: from out1.vger.email (out1.vger.email. [2620:137:e000::1:20]) by mx.google.com with ESMTP id u18-20020a63d352000000b0043158b8ca77si33509695pgi.123.2022.10.24.01.29.17; Mon, 24 Oct 2022 01:29:30 -0700 (PDT) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) client-ip=2620:137:e000::1:20; Authentication-Results: mx.google.com; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=nxp.com Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S231132AbiJXI2u (ORCPT + 99 others); Mon, 24 Oct 2022 04:28:50 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:55774 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S230288AbiJXI2R (ORCPT ); Mon, 24 Oct 2022 04:28:17 -0400 Received: from inva020.nxp.com (inva020.nxp.com [92.121.34.13]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id B6E5C50718; Mon, 24 Oct 2022 01:27:52 -0700 (PDT) Received: from inva020.nxp.com (localhost [127.0.0.1]) by inva020.eu-rdc02.nxp.com (Postfix) with ESMTP id ADAF51B8F42; Mon, 24 Oct 2022 10:27:18 +0200 (CEST) Received: from aprdc01srsp001v.ap-rdc01.nxp.com (aprdc01srsp001v.ap-rdc01.nxp.com [165.114.16.16]) by inva020.eu-rdc02.nxp.com (Postfix) with ESMTP id 75B801B8F3B; Mon, 24 Oct 2022 10:27:18 +0200 (CEST) Received: from localhost.localdomain (shlinux2.ap.freescale.net [10.192.224.44]) by aprdc01srsp001v.ap-rdc01.nxp.com (Postfix) with ESMTP id 0DD901834868; Mon, 24 Oct 2022 16:27:16 +0800 (+08) From: Richard Zhu To: l.stach@pengutronix.de, bhelgaas@google.com, robh+dt@kernel.org, lorenzo.pieralisi@arm.com, shawnguo@kernel.org, kishon@ti.com, kw@linux.com, frank.li@nxp.com Cc: hongxing.zhu@nxp.com, linux-pci@vger.kernel.org, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, kernel@pengutronix.de, linux-imx@nxp.com Subject: [RESEND v4 10/14] misc: pci_endpoint_test: Add i.MX8 PCIe EP device support Date: Mon, 24 Oct 2022 16:06:39 +0800 Message-Id: <1666598803-1912-11-git-send-email-hongxing.zhu@nxp.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1666598803-1912-1-git-send-email-hongxing.zhu@nxp.com> References: <1666598803-1912-1-git-send-email-hongxing.zhu@nxp.com> X-Virus-Scanned: ClamAV using ClamSMTP X-Spam-Status: No, score=-4.2 required=5.0 tests=BAYES_00,RCVD_IN_DNSWL_MED, SPF_HELO_NONE,SPF_PASS autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-getmail-retrieved-from-mailbox: =?utf-8?q?INBOX?= X-GMAIL-THRID: =?utf-8?q?1747556940427235907?= X-GMAIL-MSGID: =?utf-8?q?1747556940427235907?= Set the DEVICE_ID of i.MX8 PCIe and add i.MX8 PCIE EP device support in pci_endpoint_test driver. Signed-off-by: Richard Zhu --- drivers/misc/pci_endpoint_test.c | 2 ++ 1 file changed, 2 insertions(+) diff --git a/drivers/misc/pci_endpoint_test.c b/drivers/misc/pci_endpoint_test.c index 11530b4ec389..e2687229955d 100644 --- a/drivers/misc/pci_endpoint_test.c +++ b/drivers/misc/pci_endpoint_test.c @@ -72,6 +72,7 @@ #define PCI_DEVICE_ID_TI_J7200 0xb00f #define PCI_DEVICE_ID_TI_AM64 0xb010 #define PCI_DEVICE_ID_LS1088A 0x80c0 +#define PCI_DEVICE_ID_IMX8 0x0808 #define is_am654_pci_dev(pdev) \ ((pdev)->device == PCI_DEVICE_ID_TI_AM654) @@ -980,6 +981,7 @@ static const struct pci_device_id pci_endpoint_test_tbl[] = { { PCI_DEVICE(PCI_VENDOR_ID_FREESCALE, 0x81c0), .driver_data = (kernel_ulong_t)&default_data, }, + { PCI_DEVICE(PCI_VENDOR_ID_FREESCALE, PCI_DEVICE_ID_IMX8),}, { PCI_DEVICE(PCI_VENDOR_ID_FREESCALE, PCI_DEVICE_ID_LS1088A), .driver_data = (kernel_ulong_t)&default_data, }, From patchwork Mon Oct 24 08:06:40 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Richard Zhu X-Patchwork-Id: 8250 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a5d:6687:0:0:0:0:0 with SMTP id l7csp333858wru; Mon, 24 Oct 2022 02:02:14 -0700 (PDT) X-Google-Smtp-Source: AMsMyM5xIyHnM74XPzJZ0+ypdDyFaKFaLPMlvL6+GZDb1XKOxL17ouXcHEWzpgnlXrqEazaxVgu6 X-Received: by 2002:a17:907:2723:b0:78e:22f9:f16a with SMTP id d3-20020a170907272300b0078e22f9f16amr25493936ejl.682.1666602134135; Mon, 24 Oct 2022 02:02:14 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1666602134; cv=none; d=google.com; s=arc-20160816; b=kuGHyiizW1wV2aR2vvoy/tUwMK4hnphNG/tqpAlsuhuOGpk6rTZ7FyjSni3R1PaPq5 IpvKs3Pce5vEu1Z5cFtM+x4ntzW19wQFyWNr94mklN03CLmCPGpU5CbiNxdRfdDE6YsT V/mud+G5CICZOMCIn1TmsH4qwH4WV1ioro5CQUc9UdeZOUgp0IJfmD0Ld1vsi3zjY5LR hrCAQg49ZeLLL6NZMZbChf7cXmqZuNGVjF0pwhMa6ZLviVrZzcgOhcMTHYSvpoqwcyQb QPEVmE5KC90t3Nxoa0mzvWxbyYl6XKnWtD7/dy2hPwBrCpWSVLn01XM+XL4SxxBrhzox uuQA== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:references:in-reply-to:message-id:date:subject :cc:to:from; bh=ht6HGxAhTEDaFlcV806UmmvePXgF+g4w5tQhqlZ/pAc=; b=Jco8YvQ7WQld+/EY2UoF6aw10SaWcrKy3WPHjXy6rTVhojtlMHAfOJ9diVMfYtHXQX FFSh3GSC7sNTTrnZOSsPoFdGqS6LEI8vTTFdhvw5qAN6ziTEmvzy7le1oJx2ZD+xKN6J w6IFcigGgz76owi1BmB2/Ymcq7EI/wEplIADk2eNsD9bfi9qMHu84Q01vhep419k5i5T e5iAT828mXkPpBOPUTyUVct9UH38jPa9RAIL/ngYTH+hbJhITAsWHUwbPVxfFJ1BWtMf Cr2WZ48oCg2NyflAmjEkCzHWKoMkzcVVTXenQaPJax+ESq26gumVbmmp8rwGUxWmzNYS 6j0Q== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=nxp.com Received: from out1.vger.email (out1.vger.email. [2620:137:e000::1:20]) by mx.google.com with ESMTP id y89-20020a50bb62000000b004488842d88esi5973662ede.13.2022.10.24.02.01.48; Mon, 24 Oct 2022 02:02:14 -0700 (PDT) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) client-ip=2620:137:e000::1:20; Authentication-Results: mx.google.com; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=nxp.com Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S230503AbiJXI32 (ORCPT + 99 others); Mon, 24 Oct 2022 04:29:28 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:56066 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S230416AbiJXI21 (ORCPT ); Mon, 24 Oct 2022 04:28:27 -0400 Received: from inva021.nxp.com (inva021.nxp.com [92.121.34.21]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id EC88D65255; Mon, 24 Oct 2022 01:28:11 -0700 (PDT) Received: from inva021.nxp.com (localhost [127.0.0.1]) by inva021.eu-rdc02.nxp.com (Postfix) with ESMTP id 2CCB2220EA8; Mon, 24 Oct 2022 10:27:20 +0200 (CEST) Received: from aprdc01srsp001v.ap-rdc01.nxp.com (aprdc01srsp001v.ap-rdc01.nxp.com [165.114.16.16]) by inva021.eu-rdc02.nxp.com (Postfix) with ESMTP id B4FE1220EAD; Mon, 24 Oct 2022 10:27:19 +0200 (CEST) Received: from localhost.localdomain (shlinux2.ap.freescale.net [10.192.224.44]) by aprdc01srsp001v.ap-rdc01.nxp.com (Postfix) with ESMTP id 5609C1820F58; Mon, 24 Oct 2022 16:27:18 +0800 (+08) From: Richard Zhu To: l.stach@pengutronix.de, bhelgaas@google.com, robh+dt@kernel.org, lorenzo.pieralisi@arm.com, shawnguo@kernel.org, kishon@ti.com, kw@linux.com, frank.li@nxp.com Cc: hongxing.zhu@nxp.com, linux-pci@vger.kernel.org, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, kernel@pengutronix.de, linux-imx@nxp.com Subject: [RESEND v4 11/14] PCI: imx6: Add i.MX PCIe EP mode support Date: Mon, 24 Oct 2022 16:06:40 +0800 Message-Id: <1666598803-1912-12-git-send-email-hongxing.zhu@nxp.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1666598803-1912-1-git-send-email-hongxing.zhu@nxp.com> References: <1666598803-1912-1-git-send-email-hongxing.zhu@nxp.com> X-Virus-Scanned: ClamAV using ClamSMTP X-Spam-Status: No, score=-4.2 required=5.0 tests=BAYES_00,RCVD_IN_DNSWL_MED, SPF_HELO_NONE,SPF_PASS autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-getmail-retrieved-from-mailbox: =?utf-8?q?INBOX?= X-GMAIL-THRID: =?utf-8?q?1747558999541516191?= X-GMAIL-MSGID: =?utf-8?q?1747558999541516191?= i.MX PCIe is one dual mode PCIe controller. Add i.MX PCIe EP mode support here, and split the PCIe modes to the Root Complex mode and Endpoint mode. Signed-off-by: Richard Zhu --- drivers/pci/controller/dwc/Kconfig | 23 ++++- drivers/pci/controller/dwc/pci-imx6.c | 128 +++++++++++++++++++++++--- 2 files changed, 137 insertions(+), 14 deletions(-) diff --git a/drivers/pci/controller/dwc/Kconfig b/drivers/pci/controller/dwc/Kconfig index 62ce3abf0f19..83580c92d216 100644 --- a/drivers/pci/controller/dwc/Kconfig +++ b/drivers/pci/controller/dwc/Kconfig @@ -92,10 +92,31 @@ config PCI_EXYNOS functions to implement the driver. config PCI_IMX6 - bool "Freescale i.MX6/7/8 PCIe controller" + bool + +config PCI_IMX6_HOST + bool "Freescale i.MX6/7/8 PCIe controller host mode" depends on ARCH_MXC || COMPILE_TEST depends on PCI_MSI_IRQ_DOMAIN select PCIE_DW_HOST + select PCI_IMX6 + help + Enables support for the PCIe controller in the i.MX SoCs to + work in Root Complex mode. The PCI controller on i.MX is based + on DesignWare hardware and therefore the driver re-uses the + DesignWare core functions to implement the driver. + +config PCI_IMX6_EP + bool "Freescale i.MX6/7/8 PCIe controller endpoint mode" + depends on ARCH_MXC || COMPILE_TEST + depends on PCI_ENDPOINT + select PCIE_DW_EP + select PCI_IMX6 + help + Enables support for the PCIe controller in the i.MX SoCs to + work in endpoint mode. The PCI controller on i.MX is based + on DesignWare hardware and therefore the driver re-uses the + DesignWare core functions to implement the driver. config PCIE_SPEAR13XX bool "STMicroelectronics SPEAr PCIe controller" diff --git a/drivers/pci/controller/dwc/pci-imx6.c b/drivers/pci/controller/dwc/pci-imx6.c index 2616585ca5f8..31467a31128a 100644 --- a/drivers/pci/controller/dwc/pci-imx6.c +++ b/drivers/pci/controller/dwc/pci-imx6.c @@ -60,6 +60,7 @@ enum imx6_pcie_variants { struct imx6_pcie_drvdata { enum imx6_pcie_variants variant; + enum dw_pcie_device_mode mode; u32 flags; int dbi_length; const char *gpr; @@ -159,17 +160,20 @@ static unsigned int imx6_pcie_grp_offset(const struct imx6_pcie *imx6_pcie) static void imx6_pcie_configure_type(struct imx6_pcie *imx6_pcie) { - unsigned int mask, val; + unsigned int mask, val, mode; + + if (imx6_pcie->drvdata->mode == DW_PCIE_EP_TYPE) + mode = PCI_EXP_TYPE_ENDPOINT; + else + mode = PCI_EXP_TYPE_ROOT_PORT; if (imx6_pcie->drvdata->variant == IMX8MQ && imx6_pcie->controller_id == 1) { mask = IMX8MQ_GPR12_PCIE2_CTRL_DEVICE_TYPE; - val = FIELD_PREP(IMX8MQ_GPR12_PCIE2_CTRL_DEVICE_TYPE, - PCI_EXP_TYPE_ROOT_PORT); + val = FIELD_PREP(IMX8MQ_GPR12_PCIE2_CTRL_DEVICE_TYPE, mode); } else { mask = IMX6Q_GPR12_DEVICE_TYPE; - val = FIELD_PREP(IMX6Q_GPR12_DEVICE_TYPE, - PCI_EXP_TYPE_ROOT_PORT); + val = FIELD_PREP(IMX6Q_GPR12_DEVICE_TYPE, mode); } regmap_update_bits(imx6_pcie->iomuxc_gpr, IOMUXC_GPR12, mask, val); @@ -1002,8 +1006,99 @@ static const struct dw_pcie_host_ops imx6_pcie_host_ops = { static const struct dw_pcie_ops dw_pcie_ops = { .start_link = imx6_pcie_start_link, + .stop_link = imx6_pcie_stop_link, +}; + +static void imx6_pcie_ep_init(struct dw_pcie_ep *ep) +{ + enum pci_barno bar; + struct dw_pcie *pci = to_dw_pcie_from_ep(ep); + + for (bar = BAR_0; bar <= BAR_5; bar++) + dw_pcie_ep_reset_bar(pci, bar); +} + +static int imx6_pcie_ep_raise_irq(struct dw_pcie_ep *ep, u8 func_no, + enum pci_epc_irq_type type, + u16 interrupt_num) +{ + struct dw_pcie *pci = to_dw_pcie_from_ep(ep); + + switch (type) { + case PCI_EPC_IRQ_LEGACY: + return dw_pcie_ep_raise_legacy_irq(ep, func_no); + case PCI_EPC_IRQ_MSI: + return dw_pcie_ep_raise_msi_irq(ep, func_no, interrupt_num); + case PCI_EPC_IRQ_MSIX: + return dw_pcie_ep_raise_msix_irq(ep, func_no, interrupt_num); + default: + dev_err(pci->dev, "UNKNOWN IRQ type\n"); + return -EINVAL; + } + + return 0; +} + +static const struct pci_epc_features imx8m_pcie_epc_features = { + .linkup_notifier = false, + .msi_capable = true, + .msix_capable = false, + .reserved_bar = 1 << BAR_1 | 1 << BAR_3, + .align = SZ_64K, +}; + +static const struct pci_epc_features* +imx6_pcie_ep_get_features(struct dw_pcie_ep *ep) +{ + return &imx8m_pcie_epc_features; +} + +static const struct dw_pcie_ep_ops pcie_ep_ops = { + .ep_init = imx6_pcie_ep_init, + .raise_irq = imx6_pcie_ep_raise_irq, + .get_features = imx6_pcie_ep_get_features, }; +static int imx6_add_pcie_ep(struct imx6_pcie *imx6_pcie, + struct platform_device *pdev) +{ + int ret; + unsigned int pcie_dbi2_offset; + struct dw_pcie_ep *ep; + struct resource *res; + struct dw_pcie *pci = imx6_pcie->pci; + struct dw_pcie_rp *pp = &pci->pp; + struct device *dev = pci->dev; + + imx6_pcie_host_init(pp); + ep = &pci->ep; + ep->ops = &pcie_ep_ops; + + switch (imx6_pcie->drvdata->variant) { + default: + pcie_dbi2_offset = SZ_4K; + break; + } + pci->dbi_base2 = pci->dbi_base + pcie_dbi2_offset; + res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "addr_space"); + if (!res) + return -EINVAL; + + ep->phys_base = res->start; + ep->addr_size = resource_size(res); + ep->page_size = SZ_64K; + + ret = dw_pcie_ep_init(ep); + if (ret) { + dev_err(dev, "failed to initialize endpoint\n"); + return ret; + } + /* Start LTSSM. */ + imx6_pcie_ltssm_enable(dev); + + return 0; +} + static void imx6_pcie_pm_turnoff(struct imx6_pcie *imx6_pcie) { struct device *dev = imx6_pcie->pci->dev; @@ -1278,15 +1373,22 @@ static int imx6_pcie_probe(struct platform_device *pdev) if (ret) return ret; - ret = dw_pcie_host_init(&pci->pp); - if (ret < 0) - return ret; + if (imx6_pcie->drvdata->mode == DW_PCIE_EP_TYPE) { + ret = imx6_add_pcie_ep(imx6_pcie, pdev); + if (ret < 0) + return ret; + } else { + ret = dw_pcie_host_init(&pci->pp); + if (ret < 0) + return ret; + + if (pci_msi_enabled()) { + u8 offset = dw_pcie_find_capability(pci, PCI_CAP_ID_MSI); - if (pci_msi_enabled()) { - u8 offset = dw_pcie_find_capability(pci, PCI_CAP_ID_MSI); - val = dw_pcie_readw_dbi(pci, offset + PCI_MSI_FLAGS); - val |= PCI_MSI_FLAGS_ENABLE; - dw_pcie_writew_dbi(pci, offset + PCI_MSI_FLAGS, val); + val = dw_pcie_readw_dbi(pci, offset + PCI_MSI_FLAGS); + val |= PCI_MSI_FLAGS_ENABLE; + dw_pcie_writew_dbi(pci, offset + PCI_MSI_FLAGS, val); + } } return 0; From patchwork Mon Oct 24 08:06:41 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Richard Zhu X-Patchwork-Id: 8251 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a5d:6687:0:0:0:0:0 with SMTP id l7csp334077wru; Mon, 24 Oct 2022 02:02:28 -0700 (PDT) X-Google-Smtp-Source: AMsMyM702jj2lEWh8bG1JgIa7rZUkClSLr1btxcJqPd0bSYK40U+klCEsC7bFBW8quZ3bNOxnsBD X-Received: by 2002:a17:907:8688:b0:791:91a0:fdb3 with SMTP id qa8-20020a170907868800b0079191a0fdb3mr25162308ejc.499.1666602137815; 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[2620:137:e000::1:20]) by mx.google.com with ESMTP id sa2-20020a1709076d0200b00780a882d337si25777215ejc.480.2022.10.24.02.01.53; Mon, 24 Oct 2022 02:02:17 -0700 (PDT) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) client-ip=2620:137:e000::1:20; Authentication-Results: mx.google.com; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=nxp.com Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S230446AbiJXI3Y (ORCPT + 99 others); Mon, 24 Oct 2022 04:29:24 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:56074 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S230476AbiJXI20 (ORCPT ); Mon, 24 Oct 2022 04:28:26 -0400 Received: from inva021.nxp.com (inva021.nxp.com [92.121.34.21]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id C3B626527C; Mon, 24 Oct 2022 01:28:13 -0700 (PDT) Received: from inva021.nxp.com (localhost [127.0.0.1]) by inva021.eu-rdc02.nxp.com (Postfix) with ESMTP id 6299F220E5A; Mon, 24 Oct 2022 10:27:21 +0200 (CEST) Received: from aprdc01srsp001v.ap-rdc01.nxp.com (aprdc01srsp001v.ap-rdc01.nxp.com [165.114.16.16]) by inva021.eu-rdc02.nxp.com (Postfix) with ESMTP id 0181E220EA4; Mon, 24 Oct 2022 10:27:21 +0200 (CEST) Received: from localhost.localdomain (shlinux2.ap.freescale.net [10.192.224.44]) by aprdc01srsp001v.ap-rdc01.nxp.com (Postfix) with ESMTP id 955371820F76; Mon, 24 Oct 2022 16:27:19 +0800 (+08) From: Richard Zhu To: l.stach@pengutronix.de, bhelgaas@google.com, robh+dt@kernel.org, lorenzo.pieralisi@arm.com, shawnguo@kernel.org, kishon@ti.com, kw@linux.com, frank.li@nxp.com Cc: hongxing.zhu@nxp.com, linux-pci@vger.kernel.org, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, kernel@pengutronix.de, linux-imx@nxp.com Subject: [RESEND v4 12/14] PCI: imx6: Add i.MX8MQ PCIe EP support Date: Mon, 24 Oct 2022 16:06:41 +0800 Message-Id: <1666598803-1912-13-git-send-email-hongxing.zhu@nxp.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1666598803-1912-1-git-send-email-hongxing.zhu@nxp.com> References: <1666598803-1912-1-git-send-email-hongxing.zhu@nxp.com> X-Virus-Scanned: ClamAV using ClamSMTP X-Spam-Status: No, score=-4.2 required=5.0 tests=BAYES_00,RCVD_IN_DNSWL_MED, SPF_HELO_NONE,SPF_PASS autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-getmail-retrieved-from-mailbox: =?utf-8?q?INBOX?= X-GMAIL-THRID: =?utf-8?q?1747559003537878924?= X-GMAIL-MSGID: =?utf-8?q?1747559003537878924?= Add i.MX8MQ PCIe EP support. Signed-off-by: Richard Zhu --- drivers/pci/controller/dwc/pci-imx6.c | 38 +++++++++++++++++++++++---- 1 file changed, 33 insertions(+), 5 deletions(-) diff --git a/drivers/pci/controller/dwc/pci-imx6.c b/drivers/pci/controller/dwc/pci-imx6.c index 31467a31128a..f40b23c7f3cb 100644 --- a/drivers/pci/controller/dwc/pci-imx6.c +++ b/drivers/pci/controller/dwc/pci-imx6.c @@ -52,6 +52,7 @@ enum imx6_pcie_variants { IMX8MQ, IMX8MM, IMX8MP, + IMX8MQ_EP, }; #define IMX6_PCIE_FLAG_IMX6_PHY BIT(0) @@ -153,6 +154,7 @@ struct imx6_pcie { static unsigned int imx6_pcie_grp_offset(const struct imx6_pcie *imx6_pcie) { WARN_ON(imx6_pcie->drvdata->variant != IMX8MQ && + imx6_pcie->drvdata->variant != IMX8MQ_EP && imx6_pcie->drvdata->variant != IMX8MM && imx6_pcie->drvdata->variant != IMX8MP); return imx6_pcie->controller_id == 1 ? IOMUXC_GPR16 : IOMUXC_GPR14; @@ -167,13 +169,22 @@ static void imx6_pcie_configure_type(struct imx6_pcie *imx6_pcie) else mode = PCI_EXP_TYPE_ROOT_PORT; - if (imx6_pcie->drvdata->variant == IMX8MQ && - imx6_pcie->controller_id == 1) { - mask = IMX8MQ_GPR12_PCIE2_CTRL_DEVICE_TYPE; - val = FIELD_PREP(IMX8MQ_GPR12_PCIE2_CTRL_DEVICE_TYPE, mode); - } else { + switch (imx6_pcie->drvdata->variant) { + case IMX8MQ: + case IMX8MQ_EP: + if (imx6_pcie->controller_id == 1) { + mask = IMX8MQ_GPR12_PCIE2_CTRL_DEVICE_TYPE; + val = FIELD_PREP(IMX8MQ_GPR12_PCIE2_CTRL_DEVICE_TYPE, + mode); + } else { + mask = IMX6Q_GPR12_DEVICE_TYPE; + val = FIELD_PREP(IMX6Q_GPR12_DEVICE_TYPE, mode); + } + break; + default: mask = IMX6Q_GPR12_DEVICE_TYPE; val = FIELD_PREP(IMX6Q_GPR12_DEVICE_TYPE, mode); + break; } regmap_update_bits(imx6_pcie->iomuxc_gpr, IOMUXC_GPR12, mask, val); @@ -315,6 +326,7 @@ static void imx6_pcie_init_phy(struct imx6_pcie *imx6_pcie) */ break; case IMX8MQ: + case IMX8MQ_EP: /* * TODO: Currently this code assumes external * oscillator is being used @@ -566,6 +578,7 @@ static int imx6_pcie_enable_ref_clk(struct imx6_pcie *imx6_pcie) break; case IMX8MM: case IMX8MQ: + case IMX8MQ_EP: case IMX8MP: ret = clk_prepare_enable(imx6_pcie->pcie_aux); if (ret) { @@ -611,6 +624,7 @@ static void imx6_pcie_disable_ref_clk(struct imx6_pcie *imx6_pcie) break; case IMX8MM: case IMX8MQ: + case IMX8MQ_EP: case IMX8MP: clk_disable_unprepare(imx6_pcie->pcie_aux); break; @@ -676,6 +690,7 @@ static void imx6_pcie_assert_core_reset(struct imx6_pcie *imx6_pcie) switch (imx6_pcie->drvdata->variant) { case IMX7D: case IMX8MQ: + case IMX8MQ_EP: reset_control_assert(imx6_pcie->pciephy_reset); fallthrough; case IMX8MM: @@ -717,6 +732,7 @@ static int imx6_pcie_deassert_core_reset(struct imx6_pcie *imx6_pcie) switch (imx6_pcie->drvdata->variant) { case IMX8MQ: + case IMX8MQ_EP: reset_control_deassert(imx6_pcie->pciephy_reset); break; case IMX7D: @@ -804,6 +820,7 @@ static void imx6_pcie_ltssm_enable(struct device *dev) break; case IMX7D: case IMX8MQ: + case IMX8MQ_EP: case IMX8MM: case IMX8MP: reset_control_deassert(imx6_pcie->apps_reset); @@ -824,6 +841,7 @@ static void imx6_pcie_ltssm_disable(struct device *dev) break; case IMX7D: case IMX8MQ: + case IMX8MQ_EP: case IMX8MM: case IMX8MP: reset_control_assert(imx6_pcie->apps_reset); @@ -1075,6 +1093,9 @@ static int imx6_add_pcie_ep(struct imx6_pcie *imx6_pcie, ep->ops = &pcie_ep_ops; switch (imx6_pcie->drvdata->variant) { + case IMX8MQ_EP: + pcie_dbi2_offset = SZ_1M; + break; default: pcie_dbi2_offset = SZ_4K; break; @@ -1260,6 +1281,7 @@ static int imx6_pcie_probe(struct platform_device *pdev) "pcie_inbound_axi clock missing or invalid\n"); break; case IMX8MQ: + case IMX8MQ_EP: imx6_pcie->pcie_aux = devm_clk_get(dev, "pcie_aux"); if (IS_ERR(imx6_pcie->pcie_aux)) return dev_err_probe(dev, PTR_ERR(imx6_pcie->pcie_aux), @@ -1444,6 +1466,11 @@ static const struct imx6_pcie_drvdata drvdata[] = { .flags = IMX6_PCIE_FLAG_SUPPORTS_SUSPEND, .gpr = "fsl,imx8mp-iomuxc-gpr", }, + [IMX8MQ_EP] = { + .variant = IMX8MQ_EP, + .mode = DW_PCIE_EP_TYPE, + .gpr = "fsl,imx8mq-iomuxc-gpr", + }, }; static const struct of_device_id imx6_pcie_of_match[] = { @@ -1454,6 +1481,7 @@ static const struct of_device_id imx6_pcie_of_match[] = { { .compatible = "fsl,imx8mq-pcie", .data = &drvdata[IMX8MQ], }, { .compatible = "fsl,imx8mm-pcie", .data = &drvdata[IMX8MM], }, { .compatible = "fsl,imx8mp-pcie", .data = &drvdata[IMX8MP], }, + { .compatible = "fsl,imx8mq-pcie-ep", .data = &drvdata[IMX8MQ_EP], }, {}, }; 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[2620:137:e000::1:20]) by mx.google.com with ESMTP id lx4-20020a17090b4b0400b00202c8fa5c54si10302431pjb.95.2022.10.24.01.34.22; Mon, 24 Oct 2022 01:34:35 -0700 (PDT) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) client-ip=2620:137:e000::1:20; Authentication-Results: mx.google.com; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=nxp.com Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S231134AbiJXI3b (ORCPT + 99 others); Mon, 24 Oct 2022 04:29:31 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:55740 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S230421AbiJXI2a (ORCPT ); Mon, 24 Oct 2022 04:28:30 -0400 Received: from inva020.nxp.com (inva020.nxp.com [92.121.34.13]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 2E52065666; Mon, 24 Oct 2022 01:28:15 -0700 (PDT) Received: from inva020.nxp.com (localhost [127.0.0.1]) by inva020.eu-rdc02.nxp.com (Postfix) with ESMTP id 05C951B8F3B; Mon, 24 Oct 2022 10:27:23 +0200 (CEST) Received: from aprdc01srsp001v.ap-rdc01.nxp.com (aprdc01srsp001v.ap-rdc01.nxp.com [165.114.16.16]) by inva020.eu-rdc02.nxp.com (Postfix) with ESMTP id 96F7C1B8F36; Mon, 24 Oct 2022 10:27:22 +0200 (CEST) Received: from localhost.localdomain (shlinux2.ap.freescale.net [10.192.224.44]) by aprdc01srsp001v.ap-rdc01.nxp.com (Postfix) with ESMTP id D59BB180226C; Mon, 24 Oct 2022 16:27:20 +0800 (+08) From: Richard Zhu To: l.stach@pengutronix.de, bhelgaas@google.com, robh+dt@kernel.org, lorenzo.pieralisi@arm.com, shawnguo@kernel.org, kishon@ti.com, kw@linux.com, frank.li@nxp.com Cc: hongxing.zhu@nxp.com, linux-pci@vger.kernel.org, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, kernel@pengutronix.de, linux-imx@nxp.com Subject: [RESEND v4 13/14] PCI: imx6: Add i.MX8MM PCIe EP support Date: Mon, 24 Oct 2022 16:06:42 +0800 Message-Id: <1666598803-1912-14-git-send-email-hongxing.zhu@nxp.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1666598803-1912-1-git-send-email-hongxing.zhu@nxp.com> References: <1666598803-1912-1-git-send-email-hongxing.zhu@nxp.com> X-Virus-Scanned: ClamAV using ClamSMTP X-Spam-Status: No, score=-4.2 required=5.0 tests=BAYES_00,RCVD_IN_DNSWL_MED, SPF_HELO_NONE,SPF_PASS autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-getmail-retrieved-from-mailbox: =?utf-8?q?INBOX?= X-GMAIL-THRID: =?utf-8?q?1747557259930235234?= X-GMAIL-MSGID: =?utf-8?q?1747557259930235234?= Add i.MX8MM PCIe EP support. Signed-off-by: Richard Zhu --- drivers/pci/controller/dwc/pci-imx6.c | 17 +++++++++++++++++ 1 file changed, 17 insertions(+) diff --git a/drivers/pci/controller/dwc/pci-imx6.c b/drivers/pci/controller/dwc/pci-imx6.c index f40b23c7f3cb..3f01cf3776ec 100644 --- a/drivers/pci/controller/dwc/pci-imx6.c +++ b/drivers/pci/controller/dwc/pci-imx6.c @@ -53,6 +53,7 @@ enum imx6_pcie_variants { IMX8MM, IMX8MP, IMX8MQ_EP, + IMX8MM_EP, }; #define IMX6_PCIE_FLAG_IMX6_PHY BIT(0) @@ -156,6 +157,7 @@ static unsigned int imx6_pcie_grp_offset(const struct imx6_pcie *imx6_pcie) WARN_ON(imx6_pcie->drvdata->variant != IMX8MQ && imx6_pcie->drvdata->variant != IMX8MQ_EP && imx6_pcie->drvdata->variant != IMX8MM && + imx6_pcie->drvdata->variant != IMX8MM_EP && imx6_pcie->drvdata->variant != IMX8MP); return imx6_pcie->controller_id == 1 ? IOMUXC_GPR16 : IOMUXC_GPR14; } @@ -319,6 +321,7 @@ static void imx6_pcie_init_phy(struct imx6_pcie *imx6_pcie) { switch (imx6_pcie->drvdata->variant) { case IMX8MM: + case IMX8MM_EP: case IMX8MP: /* * The PHY initialization had been done in the PHY @@ -577,6 +580,7 @@ static int imx6_pcie_enable_ref_clk(struct imx6_pcie *imx6_pcie) case IMX7D: break; case IMX8MM: + case IMX8MM_EP: case IMX8MQ: case IMX8MQ_EP: case IMX8MP: @@ -623,6 +627,7 @@ static void imx6_pcie_disable_ref_clk(struct imx6_pcie *imx6_pcie) IMX7D_GPR12_PCIE_PHY_REFCLK_SEL); break; case IMX8MM: + case IMX8MM_EP: case IMX8MQ: case IMX8MQ_EP: case IMX8MP: @@ -694,6 +699,7 @@ static void imx6_pcie_assert_core_reset(struct imx6_pcie *imx6_pcie) reset_control_assert(imx6_pcie->pciephy_reset); fallthrough; case IMX8MM: + case IMX8MM_EP: case IMX8MP: reset_control_assert(imx6_pcie->apps_reset); break; @@ -771,6 +777,7 @@ static int imx6_pcie_deassert_core_reset(struct imx6_pcie *imx6_pcie) break; case IMX6Q: /* Nothing to do */ case IMX8MM: + case IMX8MM_EP: case IMX8MP: break; } @@ -822,6 +829,7 @@ static void imx6_pcie_ltssm_enable(struct device *dev) case IMX8MQ: case IMX8MQ_EP: case IMX8MM: + case IMX8MM_EP: case IMX8MP: reset_control_deassert(imx6_pcie->apps_reset); break; @@ -843,6 +851,7 @@ static void imx6_pcie_ltssm_disable(struct device *dev) case IMX8MQ: case IMX8MQ_EP: case IMX8MM: + case IMX8MM_EP: case IMX8MP: reset_control_assert(imx6_pcie->apps_reset); break; @@ -1094,6 +1103,7 @@ static int imx6_add_pcie_ep(struct imx6_pcie *imx6_pcie, switch (imx6_pcie->drvdata->variant) { case IMX8MQ_EP: + case IMX8MM_EP: pcie_dbi2_offset = SZ_1M; break; default: @@ -1306,6 +1316,7 @@ static int imx6_pcie_probe(struct platform_device *pdev) } break; case IMX8MM: + case IMX8MM_EP: case IMX8MP: imx6_pcie->pcie_aux = devm_clk_get(dev, "pcie_aux"); if (IS_ERR(imx6_pcie->pcie_aux)) @@ -1471,6 +1482,11 @@ static const struct imx6_pcie_drvdata drvdata[] = { .mode = DW_PCIE_EP_TYPE, .gpr = "fsl,imx8mq-iomuxc-gpr", }, + [IMX8MM_EP] = { + .variant = IMX8MM_EP, + .mode = DW_PCIE_EP_TYPE, + .gpr = "fsl,imx8mm-iomuxc-gpr", + }, }; static const struct of_device_id imx6_pcie_of_match[] = { @@ -1482,6 +1498,7 @@ static const struct of_device_id imx6_pcie_of_match[] = { { .compatible = "fsl,imx8mm-pcie", .data = &drvdata[IMX8MM], }, { .compatible = "fsl,imx8mp-pcie", .data = &drvdata[IMX8MP], }, { .compatible = "fsl,imx8mq-pcie-ep", .data = &drvdata[IMX8MQ_EP], }, + { .compatible = "fsl,imx8mm-pcie-ep", .data = &drvdata[IMX8MM_EP], }, {}, }; From patchwork Mon Oct 24 08:06:43 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Richard Zhu X-Patchwork-Id: 8240 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a5d:6687:0:0:0:0:0 with SMTP id l7csp320290wru; Mon, 24 Oct 2022 01:29:42 -0700 (PDT) X-Google-Smtp-Source: AMsMyM6+pmiMDJbOSGTn2NjSPSbRjUAscNnKWCaRUkVwV1DvzRQcZmBRzs9Pgg29ysRy4gYdYqVI X-Received: by 2002:a17:90b:1c06:b0:20a:f070:9f3c with SMTP id oc6-20020a17090b1c0600b0020af0709f3cmr38070968pjb.151.1666600182191; Mon, 24 Oct 2022 01:29:42 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1666600182; cv=none; d=google.com; s=arc-20160816; b=0bPDB8o/zlSyT98DLc99+TSKvmlOzZ0UcxA8ytXGUqSWG2Spxsq8OuQvO8ODh+R+tg 2Xa28tVK3WDmBAlM3XDodMN+JMT1EUvSzhOTqLSe57/movFqnXf+Iv3TJEj72TNSss+l iPX9ohbsj+eOu0mLI4xUc5mGhOox5pzFO0VoBYHwq89Zk8K8BkZ1P0XNY1R5KgQReYpc siIT1W7HGplmkL1VmZ5Ky43tUxMlnx3GXJdHJFOLyoMH0/uXqj95kjP74BYYM4y+jP9C nDKaVCbcSBMNpESPoZzhYhK+L2MyTFEmsX0zd1Kkhvtwot+J534pjRoPksF+RKJenKAA lqvA== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:references:in-reply-to:message-id:date:subject :cc:to:from; bh=MR6KXisjVclBLHMbmz5PZR/p8zK7Oy7Da46F9WilSuI=; b=Ar28F5aOa1zzVvsxZKPxeibRIEbqTaTM3H4i9Hj1hHFGOVT+F5fiDIJHHrfRyam720 +kIN1LSl9Rj8O5pRcZUajeUDp7j9zMP+cT9IXDCCriaibrSaF/OJe27ccv7JNp17E5J3 kos5feqYjUToEbxszTI1kZlaYiqLUBkz87oE6HJFv3c2k5HfyZqmGq39wseYO63OzLa7 45XN3V86Y3Unf1Uyu2F23Sh/MxmEVZZkF/DQAWu0sk39OX02ZI+WQY33H9u124qz3/+B zPZZtJDUVL2T0ifImPmlki2ZBPZXTFiyb6Ne3iVr05T/bmYwubaoXIHYvOXo3lBBPEFq MkGA== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=nxp.com Received: from out1.vger.email (out1.vger.email. [2620:137:e000::1:20]) by mx.google.com with ESMTP id w5-20020a655345000000b0046afe44ce9esi33466230pgr.131.2022.10.24.01.29.29; Mon, 24 Oct 2022 01:29:42 -0700 (PDT) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) client-ip=2620:137:e000::1:20; Authentication-Results: mx.google.com; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=nxp.com Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S231158AbiJXI24 (ORCPT + 99 others); Mon, 24 Oct 2022 04:28:56 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:55820 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S230337AbiJXI2U (ORCPT ); Mon, 24 Oct 2022 04:28:20 -0400 Received: from inva021.nxp.com (inva021.nxp.com [92.121.34.21]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id A3DEB1CFF6; Mon, 24 Oct 2022 01:28:13 -0700 (PDT) Received: from inva021.nxp.com (localhost [127.0.0.1]) by inva021.eu-rdc02.nxp.com (Postfix) with ESMTP id 40DBB220E61; Mon, 24 Oct 2022 10:27:24 +0200 (CEST) Received: from aprdc01srsp001v.ap-rdc01.nxp.com (aprdc01srsp001v.ap-rdc01.nxp.com [165.114.16.16]) by inva021.eu-rdc02.nxp.com (Postfix) with ESMTP id D9604220E93; Mon, 24 Oct 2022 10:27:23 +0200 (CEST) Received: from localhost.localdomain (shlinux2.ap.freescale.net [10.192.224.44]) by aprdc01srsp001v.ap-rdc01.nxp.com (Postfix) with ESMTP id 21D631820F58; Mon, 24 Oct 2022 16:27:22 +0800 (+08) From: Richard Zhu To: l.stach@pengutronix.de, bhelgaas@google.com, robh+dt@kernel.org, lorenzo.pieralisi@arm.com, shawnguo@kernel.org, kishon@ti.com, kw@linux.com, frank.li@nxp.com Cc: hongxing.zhu@nxp.com, linux-pci@vger.kernel.org, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, kernel@pengutronix.de, linux-imx@nxp.com Subject: [RESEND v4 14/14] PCI: imx6: Add i.MX8MP PCIe EP support Date: Mon, 24 Oct 2022 16:06:43 +0800 Message-Id: <1666598803-1912-15-git-send-email-hongxing.zhu@nxp.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1666598803-1912-1-git-send-email-hongxing.zhu@nxp.com> References: <1666598803-1912-1-git-send-email-hongxing.zhu@nxp.com> X-Virus-Scanned: ClamAV using ClamSMTP X-Spam-Status: No, score=-4.2 required=5.0 tests=BAYES_00,RCVD_IN_DNSWL_MED, SPF_HELO_NONE,SPF_PASS autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-getmail-retrieved-from-mailbox: =?utf-8?q?INBOX?= X-GMAIL-THRID: =?utf-8?q?1747556952385617167?= X-GMAIL-MSGID: =?utf-8?q?1747556952385617167?= Add the i.MX8MP PCIe EP support. Signed-off-by: Richard Zhu --- drivers/pci/controller/dwc/pci-imx6.c | 19 ++++++++++++++++++- 1 file changed, 18 insertions(+), 1 deletion(-) diff --git a/drivers/pci/controller/dwc/pci-imx6.c b/drivers/pci/controller/dwc/pci-imx6.c index 3f01cf3776ec..3f04b9ebfd0f 100644 --- a/drivers/pci/controller/dwc/pci-imx6.c +++ b/drivers/pci/controller/dwc/pci-imx6.c @@ -54,6 +54,7 @@ enum imx6_pcie_variants { IMX8MP, IMX8MQ_EP, IMX8MM_EP, + IMX8MP_EP, }; #define IMX6_PCIE_FLAG_IMX6_PHY BIT(0) @@ -158,7 +159,8 @@ static unsigned int imx6_pcie_grp_offset(const struct imx6_pcie *imx6_pcie) imx6_pcie->drvdata->variant != IMX8MQ_EP && imx6_pcie->drvdata->variant != IMX8MM && imx6_pcie->drvdata->variant != IMX8MM_EP && - imx6_pcie->drvdata->variant != IMX8MP); + imx6_pcie->drvdata->variant != IMX8MP && + imx6_pcie->drvdata->variant != IMX8MP_EP); return imx6_pcie->controller_id == 1 ? IOMUXC_GPR16 : IOMUXC_GPR14; } @@ -323,6 +325,7 @@ static void imx6_pcie_init_phy(struct imx6_pcie *imx6_pcie) case IMX8MM: case IMX8MM_EP: case IMX8MP: + case IMX8MP_EP: /* * The PHY initialization had been done in the PHY * driver, break here directly. @@ -584,6 +587,7 @@ static int imx6_pcie_enable_ref_clk(struct imx6_pcie *imx6_pcie) case IMX8MQ: case IMX8MQ_EP: case IMX8MP: + case IMX8MP_EP: ret = clk_prepare_enable(imx6_pcie->pcie_aux); if (ret) { dev_err(dev, "unable to enable pcie_aux clock\n"); @@ -631,6 +635,7 @@ static void imx6_pcie_disable_ref_clk(struct imx6_pcie *imx6_pcie) case IMX8MQ: case IMX8MQ_EP: case IMX8MP: + case IMX8MP_EP: clk_disable_unprepare(imx6_pcie->pcie_aux); break; default: @@ -701,6 +706,7 @@ static void imx6_pcie_assert_core_reset(struct imx6_pcie *imx6_pcie) case IMX8MM: case IMX8MM_EP: case IMX8MP: + case IMX8MP_EP: reset_control_assert(imx6_pcie->apps_reset); break; case IMX6SX: @@ -779,6 +785,7 @@ static int imx6_pcie_deassert_core_reset(struct imx6_pcie *imx6_pcie) case IMX8MM: case IMX8MM_EP: case IMX8MP: + case IMX8MP_EP: break; } @@ -831,6 +838,7 @@ static void imx6_pcie_ltssm_enable(struct device *dev) case IMX8MM: case IMX8MM_EP: case IMX8MP: + case IMX8MP_EP: reset_control_deassert(imx6_pcie->apps_reset); break; } @@ -853,6 +861,7 @@ static void imx6_pcie_ltssm_disable(struct device *dev) case IMX8MM: case IMX8MM_EP: case IMX8MP: + case IMX8MP_EP: reset_control_assert(imx6_pcie->apps_reset); break; } @@ -1104,6 +1113,7 @@ static int imx6_add_pcie_ep(struct imx6_pcie *imx6_pcie, switch (imx6_pcie->drvdata->variant) { case IMX8MQ_EP: case IMX8MM_EP: + case IMX8MP_EP: pcie_dbi2_offset = SZ_1M; break; default: @@ -1318,6 +1328,7 @@ static int imx6_pcie_probe(struct platform_device *pdev) case IMX8MM: case IMX8MM_EP: case IMX8MP: + case IMX8MP_EP: imx6_pcie->pcie_aux = devm_clk_get(dev, "pcie_aux"); if (IS_ERR(imx6_pcie->pcie_aux)) return dev_err_probe(dev, PTR_ERR(imx6_pcie->pcie_aux), @@ -1487,6 +1498,11 @@ static const struct imx6_pcie_drvdata drvdata[] = { .mode = DW_PCIE_EP_TYPE, .gpr = "fsl,imx8mm-iomuxc-gpr", }, + [IMX8MP_EP] = { + .variant = IMX8MP_EP, + .mode = DW_PCIE_EP_TYPE, + .gpr = "fsl,imx8mp-iomuxc-gpr", + }, }; static const struct of_device_id imx6_pcie_of_match[] = { @@ -1499,6 +1515,7 @@ static const struct of_device_id imx6_pcie_of_match[] = { { .compatible = "fsl,imx8mp-pcie", .data = &drvdata[IMX8MP], }, { .compatible = "fsl,imx8mq-pcie-ep", .data = &drvdata[IMX8MQ_EP], }, { .compatible = "fsl,imx8mm-pcie-ep", .data = &drvdata[IMX8MM_EP], }, + { .compatible = "fsl,imx8mp-pcie-ep", .data = &drvdata[IMX8MP_EP], }, {}, };