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[2620:137:e000::1:20]) by mx.google.com with ESMTP id f16-20020a63f110000000b00524db291facsi31899354pgi.504.2023.05.04.01.12.45; Thu, 04 May 2023 01:13:00 -0700 (PDT) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) client-ip=2620:137:e000::1:20; Authentication-Results: mx.google.com; dkim=pass header.i=@ti.com header.s=ti-com-17Q1 header.b=sWe2lTU0; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=QUARANTINE sp=NONE dis=NONE) header.from=ti.com Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S230039AbjEDIHa (ORCPT + 99 others); Thu, 4 May 2023 04:07:30 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:49950 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S230186AbjEDIGt (ORCPT ); Thu, 4 May 2023 04:06:49 -0400 Received: from lelv0142.ext.ti.com (lelv0142.ext.ti.com [198.47.23.249]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 6D70246A0; Thu, 4 May 2023 01:06:16 -0700 (PDT) Received: from fllv0034.itg.ti.com ([10.64.40.246]) by lelv0142.ext.ti.com (8.15.2/8.15.2) with ESMTP id 34485XDI087733; Thu, 4 May 2023 03:05:33 -0500 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ti.com; s=ti-com-17Q1; t=1683187533; bh=4EBtpAG5F3Ym7EmSZz91biGLB+dh0uAAY7RS7+0C628=; h=From:To:CC:Subject:Date:In-Reply-To:References; b=sWe2lTU0nQvzLqazu9/wSJ6dpEFBKG5y7IVeXA8mPasQi1jlkG5EbM9utb1VKmrE5 LaTC+3ZjFKP1eT8I5CY2b86q4qRXPqPf046G20cgrf435FO9MmtLUF33fMAeUeHRPr N5N0aVmCV5HasOMKOp3LWRO8+embyaF0GXNOI3ds= Received: from DFLE102.ent.ti.com (dfle102.ent.ti.com [10.64.6.23]) by fllv0034.itg.ti.com (8.15.2/8.15.2) with ESMTPS id 34485Xvu109292 (version=TLSv1.2 cipher=AES256-GCM-SHA384 bits=256 verify=FAIL); Thu, 4 May 2023 03:05:33 -0500 Received: from DFLE109.ent.ti.com (10.64.6.30) by DFLE102.ent.ti.com (10.64.6.23) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.2507.23; Thu, 4 May 2023 03:05:33 -0500 Received: from lelv0327.itg.ti.com (10.180.67.183) by DFLE109.ent.ti.com (10.64.6.30) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.2507.23 via Frontend Transport; Thu, 4 May 2023 03:05:33 -0500 Received: from ula0497641.dhcp.ti.com (ileaxei01-snat2.itg.ti.com [10.180.69.6]) by lelv0327.itg.ti.com (8.15.2/8.15.2) with ESMTP id 34485R1P090093; Thu, 4 May 2023 03:05:31 -0500 From: Neha Malcom Francis To: , , , , CC: , , , , Subject: [PATCH v6 1/3] dt-bindings: misc: esm: Add ESM support for TI K3 devices Date: Thu, 4 May 2023 13:35:24 +0530 Message-ID: <20230504080526.133149-2-n-francis@ti.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20230504080526.133149-1-n-francis@ti.com> References: <20230504080526.133149-1-n-francis@ti.com> MIME-Version: 1.0 X-EXCLAIMER-MD-CONFIG: e1e8a2fd-e40a-4ac6-ac9b-f7e9cc9ee180 X-Spam-Status: No, score=-4.6 required=5.0 tests=BAYES_00,DKIMWL_WL_HIGH, DKIM_SIGNED,DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,RCVD_IN_DNSWL_MED, SPF_HELO_PASS,SPF_PASS,T_SCC_BODY_TEXT_LINE,URIBL_BLOCKED autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-getmail-retrieved-from-mailbox: =?utf-8?q?INBOX?= X-GMAIL-THRID: =?utf-8?q?1764950519924313837?= X-GMAIL-MSGID: =?utf-8?q?1764950519924313837?= Document the binding for TI K3 ESM (Error Signaling Module) block. Signed-off-by: Neha Malcom Francis Reviewed-by: Krzysztof Kozlowski --- .../bindings/misc/ti,j721e-esm.yaml | 53 +++++++++++++++++++ 1 file changed, 53 insertions(+) create mode 100644 Documentation/devicetree/bindings/misc/ti,j721e-esm.yaml diff --git a/Documentation/devicetree/bindings/misc/ti,j721e-esm.yaml b/Documentation/devicetree/bindings/misc/ti,j721e-esm.yaml new file mode 100644 index 000000000000..0c9a8444844c --- /dev/null +++ b/Documentation/devicetree/bindings/misc/ti,j721e-esm.yaml @@ -0,0 +1,53 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +# Copyright (C) 2022 Texas Instruments Incorporated +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/misc/ti,j721e-esm.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Texas Instruments K3 ESM + +maintainers: + - Neha Malcom Francis + +description: + The ESM (Error Signaling Module) is an IP block on TI K3 devices + that allows handling of safety events somewhat similar to what interrupt + controller would do. The safety signals have their separate paths within + the SoC, and they are handled by the ESM, which routes them to the proper + destination, which can be system reset, interrupt controller, etc. In the + simplest configuration the signals are just routed to reset the SoC. + +properties: + compatible: + const: ti,j721e-esm + + reg: + maxItems: 1 + + ti,esm-pins: + $ref: /schemas/types.yaml#/definitions/uint32-array + description: + integer array of ESM interrupt pins to route to external event pin + which can be used to reset the SoC. + minItems: 1 + maxItems: 255 + +required: + - compatible + - reg + - ti,esm-pins + +additionalProperties: false + +examples: + - | + bus { + #address-cells = <2>; + #size-cells = <2>; + esm@700000 { + compatible = "ti,j721e-esm"; + reg = <0x0 0x700000 0x0 0x1000>; + ti,esm-pins = <344>, <345>; + }; + }; From patchwork Thu May 4 08:05:25 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Neha Malcom Francis X-Patchwork-Id: 90005 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a59:b0ea:0:b0:3b6:4342:cba0 with SMTP id b10csp164285vqo; Thu, 4 May 2023 02:11:41 -0700 (PDT) X-Google-Smtp-Source: ACHHUZ6IU7VRfVv8z050y2wUSI3ct89xzXFLh29j1JM0HDoWBaeneuPp0I/R7Ga1J60kFZlNzUY0 X-Received: by 2002:a17:903:230e:b0:1a6:8031:59e7 with SMTP id d14-20020a170903230e00b001a6803159e7mr3664240plh.46.1683191501470; Thu, 04 May 2023 02:11:41 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1683191501; cv=none; d=google.com; s=arc-20160816; b=lxcjP8zLr24DsYd2n8pFDxb8HMnLXvtaV6MnIdOmeqEtFz5NOT2JzwFS/BwbZvKhHu 5fvrmpjUDzvsw3AHXFK0UJXUPtKjgpg0NsX4boFpCNqDt0vDMvwz9ElUH8fhUO58mBev NayzvY7G+aggT05mXCAeDMk3gfgFGGModPZgvl0O2n4dDlfDK20KMqBi97Ksj2xza6Ue o56E3aGkLj4cQhCqMWvsWKJZhAFe0CJfYBYM5O/Lf/hz0MOsljySnNluM1jad9tuiEbR ol6uAZMaGGuloT7XQYSFWrICYQLoURb9YjF2iwNU9vI5h2drLRN5NS73mzN3NSxQ/RHL 8JiA== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from :dkim-signature; bh=yzKY0j1IN0uVnmTekTQ5bwgUObuyqL70kFDbyTxDOec=; b=R7ouxuuV6fDhfgxs01HxtwpzxJO+rPrpfy9H/+mYLii/jsaxhifDXwme/SfMJHWflD GTwH4glf6Yic2smkkA5GYVmFsh13ZsIh1/3qiv+IaIaCZ1BJftF8wamqDtEn3erHE1dG CbD8CHrBndPd6geC9RwfotNsJcEyhsHwqnaC3C8IDq+vTCTV63KfsrdgrtKjEZbWpwqn 5MdiSAxWo96MjhmwHybNjnUn4VTjDIb5em9SbovWvIVVaXu2yrMmuQZ9VHSZEwRO4Nza K+G82mH8pcJiLcwMnWzmqMCLnkXcl2IC1CyWiE+3BC2eC5fw2c+qHmsB8YwfGGorUDwi mW2g== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@ti.com header.s=ti-com-17Q1 header.b=ITSCxuRO; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=QUARANTINE sp=NONE dis=NONE) header.from=ti.com Received: from out1.vger.email (out1.vger.email. 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Signed-off-by: Neha Malcom Francis --- arch/arm64/boot/dts/ti/k3-j721e-main.dtsi | 6 ++++++ arch/arm64/boot/dts/ti/k3-j721e.dtsi | 1 + 2 files changed, 7 insertions(+) diff --git a/arch/arm64/boot/dts/ti/k3-j721e-main.dtsi b/arch/arm64/boot/dts/ti/k3-j721e-main.dtsi index 10c8a5fb4ee2..91f7e5d03440 100644 --- a/arch/arm64/boot/dts/ti/k3-j721e-main.dtsi +++ b/arch/arm64/boot/dts/ti/k3-j721e-main.dtsi @@ -2532,4 +2532,10 @@ main_spi7: spi@2170000 { clocks = <&k3_clks 273 1>; status = "disabled"; }; + + main_esm: esm@700000 { + compatible = "ti,j721e-esm"; + reg = <0x0 0x700000 0x0 0x1000>; + ti,esm-pins = <344>, <345>; + }; }; diff --git a/arch/arm64/boot/dts/ti/k3-j721e.dtsi b/arch/arm64/boot/dts/ti/k3-j721e.dtsi index b912143b6a11..52bcde601eb8 100644 --- a/arch/arm64/boot/dts/ti/k3-j721e.dtsi +++ b/arch/arm64/boot/dts/ti/k3-j721e.dtsi @@ -131,6 +131,7 @@ cbass_main: bus@100000 { #size-cells = <2>; ranges = <0x00 0x00100000 0x00 0x00100000 0x00 0x00020000>, /* ctrl mmr */ <0x00 0x00600000 0x00 0x00600000 0x00 0x00031100>, /* GPIO */ + <0x00 0x00700000 0x00 0x00700000 0x00 0x00001000>, /* ESM */ <0x00 0x00900000 0x00 0x00900000 0x00 0x00012000>, /* serdes */ <0x00 0x00a40000 0x00 0x00a40000 0x00 0x00000800>, /* timesync router */ <0x00 0x06000000 0x00 0x06000000 0x00 0x00400000>, /* USBSS0 */ From patchwork Thu May 4 08:05:26 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Neha Malcom Francis X-Patchwork-Id: 89981 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a59:b0ea:0:b0:3b6:4342:cba0 with SMTP id b10csp143039vqo; Thu, 4 May 2023 01:25:55 -0700 (PDT) X-Google-Smtp-Source: ACHHUZ7Fa8JyQJRa5OUzg/xSRKHEadZ+uHOeOgjhTqDLkZYW5NBSxmPz7KIrH8o7lyZeef9Hr3eh X-Received: by 2002:a05:6a20:2588:b0:f0:3fc4:744f with SMTP id k8-20020a056a20258800b000f03fc4744fmr1693477pzd.8.1683188755523; Thu, 04 May 2023 01:25:55 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1683188755; cv=none; d=google.com; s=arc-20160816; b=NysloY5m4IzhDhLa8rQQ4LrQAxahWO3aHTNOIthRyvPjzsRxE7Q1KD0/Kru+8vNoOn sKKGMvl4bYlF+m0bHQBs+V9+ngGB7dlZ4gEMeRF8F1dR79uO7B9umr+ikKjO3zYG4UV+ towR5wkvit2UuRJgAbUWMgb/BH9pWktSxufhyPp74xprQJ6OYREkASrNrlPLnofpAR99 g7vtPLRQiVM+PS2hM+JFPR2Bh8DLt5KSivGeQO6gMvw8ESQPf54EjdYtVsWhvjQ58HEE tmv0MhNqQqH4JL5JcycH7yLg1XPwE03Z+7MrCznYyy1v4N4lfp2Gcwco+YgJIp7nidLb jkvg== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from :dkim-signature; bh=1GIZKi464DswWpYYI8PkLUvrxRe5Lbt01DrvEsUrNoA=; b=TvMGLVrszspjhW9HqH/O5uM0yd5BBOx0vJw6Y77lbMUV1ZO+SYBYRqICUtldFUuQd1 6p3M96wHbTIPcRzi4xdby4YBdVswZ9UY29COr2++lptG/CvsoscnDyRQ/OL8TWEPIsIT W4D6u+t1fD5TH4VNcNoLiVN3PaQoU+Zt+9OCXrzubOeM25BrtZUzkaE85OMqQTf85gUt 5qCnIu7G/Hlicfk0T/5W4JNfn0EULOCWchLLoDnDB/wUb2S7s/jMnNk5J2E7knvVkLeQ UB5RQejRgd3baptZlGEahcHXN2hkPMu8GN+J8+SiZt9Z+yqQAM2luSt0xg2DBsyxWMOb WV8w== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@ti.com header.s=ti-com-17Q1 header.b=Vc7gbfmB; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=QUARANTINE sp=NONE dis=NONE) header.from=ti.com Received: from out1.vger.email (out1.vger.email. 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Signed-off-by: Neha Malcom Francis --- arch/arm64/boot/dts/ti/k3-j7200-main.dtsi | 6 ++++++ arch/arm64/boot/dts/ti/k3-j7200.dtsi | 1 + 2 files changed, 7 insertions(+) diff --git a/arch/arm64/boot/dts/ti/k3-j7200-main.dtsi b/arch/arm64/boot/dts/ti/k3-j7200-main.dtsi index ef352e32f19d..89f816f5e53d 100644 --- a/arch/arm64/boot/dts/ti/k3-j7200-main.dtsi +++ b/arch/arm64/boot/dts/ti/k3-j7200-main.dtsi @@ -1010,4 +1010,10 @@ main_r5fss0_core1: r5f@5d00000 { ti,loczrama = <1>; }; }; + + main_esm: esm@700000 { + compatible = "ti,j721e-esm"; + reg = <0x0 0x700000 0x0 0x1000>; + ti,esm-pins = <656>, <657>; + }; }; diff --git a/arch/arm64/boot/dts/ti/k3-j7200.dtsi b/arch/arm64/boot/dts/ti/k3-j7200.dtsi index bbe380c72a7e..4998eb4fbe75 100644 --- a/arch/arm64/boot/dts/ti/k3-j7200.dtsi +++ b/arch/arm64/boot/dts/ti/k3-j7200.dtsi @@ -128,6 +128,7 @@ cbass_main: bus@100000 { #size-cells = <2>; ranges = <0x00 0x00100000 0x00 0x00100000 0x00 0x00020000>, /* ctrl mmr */ <0x00 0x00600000 0x00 0x00600000 0x00 0x00031100>, /* GPIO */ + <0x00 0x00700000 0x00 0x00700000 0x00 0x00001000>, /* ESM */ <0x00 0x00a40000 0x00 0x00a40000 0x00 0x00000800>, /* timesync router */ <0x00 0x01000000 0x00 0x01000000 0x00 0x0d000000>, /* Most peripherals */ <0x00 0x30000000 0x00 0x30000000 0x00 0x0c400000>, /* MAIN NAVSS */