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[2620:137:e000::1:20]) by mx.google.com with ESMTP id r18-20020aa79632000000b005d866387e7asi34336000pfg.181.2023.05.03.18.30.11; Wed, 03 May 2023 18:30:23 -0700 (PDT) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) client-ip=2620:137:e000::1:20; Authentication-Results: mx.google.com; dkim=pass header.i=@collabora.com header.s=mail header.b=cG8oO1FM; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=QUARANTINE sp=QUARANTINE dis=NONE) header.from=collabora.com Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S229703AbjEDAtH (ORCPT + 99 others); Wed, 3 May 2023 20:49:07 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:55498 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229660AbjEDAtF (ORCPT ); Wed, 3 May 2023 20:49:05 -0400 Received: from madras.collabora.co.uk (madras.collabora.co.uk [IPv6:2a00:1098:0:82:1000:25:2eeb:e5ab]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 6A33C99; Wed, 3 May 2023 17:49:04 -0700 (PDT) Received: from notapiano.myfiosgateway.com (unknown [IPv6:2600:4041:5b1a:cd00:524d:e95d:1a9c:492a]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (4096 bits) server-digest SHA256) (No client certificate requested) (Authenticated sender: nfraprado) by madras.collabora.co.uk (Postfix) with ESMTPSA id 74E4A66032D5; Thu, 4 May 2023 01:49:00 +0100 (BST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=collabora.com; s=mail; t=1683161342; bh=BKsoOLwf3MWeyx0HHhnkyVrCjdOFjcx9T5XOHh5ftLI=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=cG8oO1FMlYR32CajRzJJVGbLBrqEm+Rao9pbnJI+p2DKG+H0HpAJCrzUTxu34UoFh J0iJ4VnhjzRXH9wGOkIfl9Cz3H1ByVdl+ZSSJfF0ZFFFN66hVLiv858pQY837vMxcu du+KXes9bKEAI6gZiFc1MozFZRQVslqDMBK9ZHBvEUX/14kQP3d5uDk5GiRq9bGGXf P/60wwO8laC5FQW6H+Ei6L7AYDD2ZPCw/K7DfP2eAYK0M5VnIwM9NWICkrpvss5ZQ+ g31KHb6Qb6GLHi8bFy/RaPRQguhAcWcpB4ts+MqZDgMWyScTLyWIiL2z4oxGUlh5ib eTkSLBzCVvteg== From: =?utf-8?b?TsOtY29sYXMgRi4gUi4gQS4gUHJhZG8=?= To: Daniel Lezcano Cc: kernel@collabora.com, Alexandre Mergnat , Balsam CHIHI , Chen-Yu Tsai , Alexandre Bailon , AngeloGioacchino Del Regno , =?utf-8?b?TsOtY29sYXMgRi4gUi4gQS4gUHJhZG8=?= , Amit Kucheria , Matthias Brugger , "Rafael J. Wysocki" , Zhang Rui , linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, linux-mediatek@lists.infradead.org, linux-pm@vger.kernel.org Subject: [PATCH v2 1/6] thermal/drivers/mediatek/lvts_thermal: Handle IRQ on all controllers Date: Wed, 3 May 2023 20:48:47 -0400 Message-Id: <20230504004852.627049-2-nfraprado@collabora.com> X-Mailer: git-send-email 2.40.1 In-Reply-To: <20230504004852.627049-1-nfraprado@collabora.com> References: <20230504004852.627049-1-nfraprado@collabora.com> MIME-Version: 1.0 X-Spam-Status: No, score=-2.1 required=5.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,SPF_HELO_NONE,SPF_PASS, T_SCC_BODY_TEXT_LINE,URIBL_BLOCKED autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-getmail-retrieved-from-mailbox: =?utf-8?q?INBOX?= X-GMAIL-THRID: =?utf-8?q?1764925189753966698?= X-GMAIL-MSGID: =?utf-8?q?1764925189753966698?= There is a single IRQ handler for each LVTS thermal domain, and it is supposed to check each of its underlying controllers for the origin of the interrupt and clear its status. However due to a typo, only the first controller was ever being handled, which resulted in the interrupt never being cleared when it happened on the other controllers. Add the missing index so interrupts are handled for all controllers. Fixes: f5f633b18234 ("thermal/drivers/mediatek: Add the Low Voltage Thermal Sensor driver") Signed-off-by: Nícolas F. R. A. Prado Reviewed-by: Matthias Brugger Reviewed-by: AngeloGioacchino Del Regno Tested-by: Chen-Yu Tsai --- (no changes since v1) drivers/thermal/mediatek/lvts_thermal.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/thermal/mediatek/lvts_thermal.c b/drivers/thermal/mediatek/lvts_thermal.c index 3df4989f9902..2988f201633a 100644 --- a/drivers/thermal/mediatek/lvts_thermal.c +++ b/drivers/thermal/mediatek/lvts_thermal.c @@ -450,7 +450,7 @@ static irqreturn_t lvts_irq_handler(int irq, void *data) for (i = 0; i < lvts_td->num_lvts_ctrl; i++) { - aux = lvts_ctrl_irq_handler(lvts_td->lvts_ctrl); + aux = lvts_ctrl_irq_handler(&lvts_td->lvts_ctrl[i]); if (aux != IRQ_HANDLED) continue; From patchwork Thu May 4 00:48:48 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?b?TsOtY29sYXMgRi4gUi4gQS4gUHJhZG8=?= X-Patchwork-Id: 89888 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a59:b0ea:0:b0:3b6:4342:cba0 with SMTP id b10csp1726589vqo; Wed, 3 May 2023 18:17:02 -0700 (PDT) X-Google-Smtp-Source: ACHHUZ6Q6OpQfFq3NSPbTxmM8kwWf0KC0rnLWBsiHkFkLLs14Re6Vhf4UQANqnnm0gk50o5OsROo X-Received: by 2002:a17:902:7c91:b0:1aa:ed81:5d7f with SMTP id y17-20020a1709027c9100b001aaed815d7fmr2077287pll.8.1683163022265; Wed, 03 May 2023 18:17:02 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1683163022; cv=none; d=google.com; s=arc-20160816; b=C44pbO9dtCtNEpMpeccaymlKsNViKEnQhT/lpsvybOgnOYelKoSdZgqS/ZP2SPsvb8 tKaIAsO2w3Yl/fKXLwDDKBR4m2+eYW8nWbNEvTs4Zwd9IYcsIvv1HkNOx55entjEpent eDX6FZVYB+eeHu7kMQ8j6YsF5G3qEfWbYsaLomKJub/eVQe+OyS5tHLn/6yYlQ/S7yVW rzlvke6mXjyIJXIfjdACa4UTYtmnPwQvnEAz5Zw4G6bEGAMjUUuIuWMId3/Evq3MwioG 2FtPNkNf1klDPuwI19Xuy/w/HLLgzQyxfYPZQ9stZg1CqEvoNqA9dU8JbpCFqX0QMQpL IAyQ== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from :dkim-signature; bh=LiXu+B8iL+bWmt9dONK1QcOxUx0R1wWreoAZkIyWpwU=; b=Hr9yzZZA3083VfnPE2nuzVIpvZ5o0HYXtvFJt3l6Mk4H4WfygDRXf6V/vxGnUFn3/K B00ggm1Vmd5Q44uco5yZsTiO3ecOhIWNkW2xjzYgJds0kSmFeuUmaHQarut7ET78EVm8 ndVYOouj92B7y+uxpM5iUgIY4AvgjITohmxIZRdGq+eAJFUa0ESV3qNmGShdNu6wUAGi lDcEYSZGaxpEblbGeTMzLeMNoxjQsaC6KAtpcLx3zLy4GQsP2XC4eNBeYX2dITjH1t4y ObkACvxK18pCkPwwM6n8BP5Gch81djl1mprnMFVrDZDNgMOj2rSODTtHT1oom6017P+o fs/Q== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@collabora.com header.s=mail header.b=m9a8Fxgg; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=QUARANTINE sp=QUARANTINE dis=NONE) header.from=collabora.com Received: from out1.vger.email (out1.vger.email. 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Wysocki" , Zhang Rui , linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, linux-mediatek@lists.infradead.org, linux-pm@vger.kernel.org Subject: [PATCH v2 2/6] thermal/drivers/mediatek/lvts_thermal: Honor sensors in immediate mode Date: Wed, 3 May 2023 20:48:48 -0400 Message-Id: <20230504004852.627049-3-nfraprado@collabora.com> X-Mailer: git-send-email 2.40.1 In-Reply-To: <20230504004852.627049-1-nfraprado@collabora.com> References: <20230504004852.627049-1-nfraprado@collabora.com> MIME-Version: 1.0 X-Spam-Status: No, score=-2.1 required=5.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,SPF_HELO_NONE,SPF_PASS, T_SCC_BODY_TEXT_LINE,URIBL_BLOCKED autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-getmail-retrieved-from-mailbox: =?utf-8?q?INBOX?= X-GMAIL-THRID: =?utf-8?q?1764924348960944010?= X-GMAIL-MSGID: =?utf-8?q?1764924348960944010?= Each controller can be configured to operate on immediate or filtered mode. On filtered mode, the sensors are enabled by setting the corresponding bits in MONCTL0, while on immediate mode, by setting MSRCTL1. Previously, the code would set MSRCTL1 for all four sensors when configured to immediate mode, but given that the controller might not have all four sensors connected, this would cause interrupts to trigger for non-existent sensors. Fix this by handling the MSRCTL1 register analogously to the MONCTL0: only enable the sensors that were declared. Fixes: f5f633b18234 ("thermal/drivers/mediatek: Add the Low Voltage Thermal Sensor driver") Signed-off-by: Nícolas F. R. A. Prado Reviewed-by: AngeloGioacchino Del Regno Tested-by: Chen-Yu Tsai --- (no changes since v1) drivers/thermal/mediatek/lvts_thermal.c | 50 +++++++++++++------------ 1 file changed, 26 insertions(+), 24 deletions(-) diff --git a/drivers/thermal/mediatek/lvts_thermal.c b/drivers/thermal/mediatek/lvts_thermal.c index 2988f201633a..f7d998a45ea0 100644 --- a/drivers/thermal/mediatek/lvts_thermal.c +++ b/drivers/thermal/mediatek/lvts_thermal.c @@ -922,24 +922,6 @@ static int lvts_ctrl_configure(struct device *dev, struct lvts_ctrl *lvts_ctrl) LVTS_HW_FILTER << 3 | LVTS_HW_FILTER; writel(value, LVTS_MSRCTL0(lvts_ctrl->base)); - /* - * LVTS_MSRCTL1 : Measurement control - * - * Bits: - * - * 9: Ignore MSRCTL0 config and do immediate measurement on sensor3 - * 6: Ignore MSRCTL0 config and do immediate measurement on sensor2 - * 5: Ignore MSRCTL0 config and do immediate measurement on sensor1 - * 4: Ignore MSRCTL0 config and do immediate measurement on sensor0 - * - * That configuration will ignore the filtering and the delays - * introduced below in MONCTL1 and MONCTL2 - */ - if (lvts_ctrl->mode == LVTS_MSR_IMMEDIATE_MODE) { - value = BIT(9) | BIT(6) | BIT(5) | BIT(4); - writel(value, LVTS_MSRCTL1(lvts_ctrl->base)); - } - /* * LVTS_MONCTL1 : Period unit and group interval configuration * @@ -1004,6 +986,8 @@ static int lvts_ctrl_start(struct device *dev, struct lvts_ctrl *lvts_ctrl) struct lvts_sensor *lvts_sensors = lvts_ctrl->sensors; struct thermal_zone_device *tz; u32 sensor_map = 0; + u32 sensor_map_bits[][4] = {{BIT(4), BIT(5), BIT(6), BIT(9)}, + {BIT(0), BIT(1), BIT(2), BIT(3)}}; int i; for (i = 0; i < lvts_ctrl->num_lvts_sensor; i++) { @@ -1040,20 +1024,38 @@ static int lvts_ctrl_start(struct device *dev, struct lvts_ctrl *lvts_ctrl) * map, so we can enable the temperature monitoring in * the hardware thermal controller. */ - sensor_map |= BIT(i); + sensor_map |= sensor_map_bits[lvts_ctrl->mode][i]; } /* - * Bits: - * 9: Single point access flow - * 0-3: Enable sensing point 0-3 - * * The initialization of the thermal zones give us * which sensor point to enable. If any thermal zone * was not described in the device tree, it won't be * enabled here in the sensor map. */ - writel(sensor_map | BIT(9), LVTS_MONCTL0(lvts_ctrl->base)); + if (lvts_ctrl->mode == LVTS_MSR_IMMEDIATE_MODE) { + /* + * LVTS_MSRCTL1 : Measurement control + * + * Bits: + * + * 9: Ignore MSRCTL0 config and do immediate measurement on sensor3 + * 6: Ignore MSRCTL0 config and do immediate measurement on sensor2 + * 5: Ignore MSRCTL0 config and do immediate measurement on sensor1 + * 4: Ignore MSRCTL0 config and do immediate measurement on sensor0 + * + * That configuration will ignore the filtering and the delays + * introduced in MONCTL1 and MONCTL2 + */ + writel(sensor_map, LVTS_MSRCTL1(lvts_ctrl->base)); + } else { + /* + * Bits: + * 9: Single point access flow + * 0-3: Enable sensing point 0-3 + */ + writel(sensor_map | BIT(9), LVTS_MONCTL0(lvts_ctrl->base)); + } return 0; } From patchwork Thu May 4 00:48:49 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?b?TsOtY29sYXMgRi4gUi4gQS4gUHJhZG8=?= X-Patchwork-Id: 89890 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a59:b0ea:0:b0:3b6:4342:cba0 with SMTP id b10csp1728498vqo; Wed, 3 May 2023 18:22:10 -0700 (PDT) X-Google-Smtp-Source: ACHHUZ4H7mvX27zAHsBhfX+lx4oD0aqFbtCTYZlrquy/s2jwt1ke2EWYpx+zBtFroIlqkWB4qiWD X-Received: by 2002:a17:902:da83:b0:1a2:37fc:b591 with SMTP id j3-20020a170902da8300b001a237fcb591mr2299484plx.69.1683163330248; Wed, 03 May 2023 18:22:10 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1683163330; cv=none; d=google.com; s=arc-20160816; b=hUie0ugUQEJV7UOrymgEnUQz8duvF3r8gWLBNBjSw0XEROCBUbGUEha9BIpD7h1pu6 tOosdWZb0dDWiiBAYsC6UQ5ni8gkYTyO4O2HG1IjB1whzKMmktHRAfFqBdFScP5rnHz/ dJ5eCjoMMZa5K5phF5RH6lXWtsYk7MHnYciRn8FUMfEfyAmpktab8KljrEFfvJ9oTwnQ a+zc/lWTFqG9FGW2pkoaOoV/t6IaYg+rZXYcCFueNLlTQrqiRHFGjI573PrVJc2IEF/z XI1E1yzwyFp6w5SnKqmdGUkSzFTOczx25WVHGrD3RTrgItxVbQi64VimDV3s/PDF7NZq T3dA== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from :dkim-signature; bh=xIPE5+CM013nG9jQKV59gUKrHx26ORJxB3HPKE5zJbo=; b=olaIbqp+MSp1F415MVLjY7B/W3iQ9+rigKk/efkYGKsQ0Gem9iEdE2nwovGauq9NAF qW9xBcxhJucxdzgQkv09cwqF8/dR+nfWCb78beI3TfVvOoKtRdd63ScVb+oUyyvqgMC9 GV/yfOoFCpTY8cKN4g2F8MpYRSmZekt2R3cprI6UtGa7zn+kSvt1XOkZzQ1evQ/aGLzK 3Qg/y05gjYdQO/W+4+Y4Cr+I+eLDe6Oz3/bcWdW/pQmwF9BmZ+mXbQ2r1aXqIP15ZR9I Ch4tJLDzv2vBDVNMmIUCmTw0U3o4c+WL3kPhS3FTInI1fvSq9oHlyLWCtrpXs5aix1vw 2h1w== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@collabora.com header.s=mail header.b=ImOCyceJ; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=QUARANTINE sp=QUARANTINE dis=NONE) header.from=collabora.com Received: from out1.vger.email (out1.vger.email. [2620:137:e000::1:20]) by mx.google.com with ESMTP id j5-20020a170903024500b001a55571febesi37428212plh.277.2023.05.03.18.21.57; Wed, 03 May 2023 18:22:10 -0700 (PDT) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) client-ip=2620:137:e000::1:20; Authentication-Results: mx.google.com; dkim=pass header.i=@collabora.com header.s=mail header.b=ImOCyceJ; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=QUARANTINE sp=QUARANTINE dis=NONE) header.from=collabora.com Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S229768AbjEDAtP (ORCPT + 99 others); Wed, 3 May 2023 20:49:15 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:55568 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229660AbjEDAtI (ORCPT ); Wed, 3 May 2023 20:49:08 -0400 Received: from madras.collabora.co.uk (madras.collabora.co.uk [46.235.227.172]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 359262D63; Wed, 3 May 2023 17:49:07 -0700 (PDT) Received: from notapiano.myfiosgateway.com (unknown [IPv6:2600:4041:5b1a:cd00:524d:e95d:1a9c:492a]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (4096 bits) server-digest SHA256) (No client certificate requested) (Authenticated sender: nfraprado) by madras.collabora.co.uk (Postfix) with ESMTPSA id 6E34D66056D0; Thu, 4 May 2023 01:49:04 +0100 (BST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=collabora.com; s=mail; t=1683161346; bh=I0TwCLic8TNtbkOyqfw/qj1nZCg2iygKpx0tmYdTpr0=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=ImOCyceJFSlpUEpX17l8RSswSI7dWLw3v0LauHjxNrxULTxQ6Uo3899XBn7q6RnSx xIPRfHSe6r7iraHXPtDtR1gMRrnxFN4S8iS45KQkSTh6+f7IAIChzpWieeaudHyCaB 7cf0gq9cQRIRiC/dVgcdWK7Q0pUcAzUR6WeXKXJ92lD2ESk09lmnSbP65MILuFbycO VfP7t2ZiOQevgUG1jRosAQ61FbU33E5KUPN2xFZqaWq0lCtphVMMyRibO5aDighwa2 +X/JPQzXguplSOLRaEd/iutnws3cUdRmRZkbANejlwkL3I9NPjWfdQ03KCgCdxQtY6 4aCgkGcOi73bw== From: =?utf-8?b?TsOtY29sYXMgRi4gUi4gQS4gUHJhZG8=?= To: Daniel Lezcano Cc: kernel@collabora.com, Alexandre Mergnat , Balsam CHIHI , Chen-Yu Tsai , Alexandre Bailon , AngeloGioacchino Del Regno , =?utf-8?b?TsOtY29sYXMgRi4gUi4gQS4gUHJhZG8=?= , Amit Kucheria , Matthias Brugger , "Rafael J. Wysocki" , Zhang Rui , linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, linux-mediatek@lists.infradead.org, linux-pm@vger.kernel.org Subject: [PATCH v2 3/6] thermal/drivers/mediatek/lvts_thermal: Use offset threshold for IRQ Date: Wed, 3 May 2023 20:48:49 -0400 Message-Id: <20230504004852.627049-4-nfraprado@collabora.com> X-Mailer: git-send-email 2.40.1 In-Reply-To: <20230504004852.627049-1-nfraprado@collabora.com> References: <20230504004852.627049-1-nfraprado@collabora.com> MIME-Version: 1.0 X-Spam-Status: No, score=-2.1 required=5.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,SPF_HELO_NONE,SPF_PASS, T_SCC_BODY_TEXT_LINE,URIBL_BLOCKED autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-getmail-retrieved-from-mailbox: =?utf-8?q?INBOX?= X-GMAIL-THRID: =?utf-8?q?1764924672279789147?= X-GMAIL-MSGID: =?utf-8?q?1764924672279789147?= There are two kinds of temperature monitoring interrupts available: * High Offset, Low Offset * Hot, Hot to normal, Cold The code currently uses the hot/h2n/cold interrupts, however in a way that doesn't work: the cold threshold is left uninitialized, which prevents the other thresholds from ever triggering, and the h2n interrupt is used as the lower threshold, which prevents the hot interrupt from triggering again after the thresholds are updated by the thermal framework, since a hot interrupt can only trigger again after the hot to normal interrupt has been triggered. But better yet than addressing those issues, is to use the high/low offset interrupts instead. This way only two thresholds need to be managed, which have a simpler state machine, making them a better match to the thermal framework's high and low thresholds. Fixes: f5f633b18234 ("thermal/drivers/mediatek: Add the Low Voltage Thermal Sensor driver") Signed-off-by: Nícolas F. R. A. Prado --- Changes in v2: - Added this commit drivers/thermal/mediatek/lvts_thermal.c | 12 ++++++------ 1 file changed, 6 insertions(+), 6 deletions(-) diff --git a/drivers/thermal/mediatek/lvts_thermal.c b/drivers/thermal/mediatek/lvts_thermal.c index f7d998a45ea0..8449ba6ca90e 100644 --- a/drivers/thermal/mediatek/lvts_thermal.c +++ b/drivers/thermal/mediatek/lvts_thermal.c @@ -297,9 +297,9 @@ static int lvts_set_trips(struct thermal_zone_device *tz, int low, int high) u32 raw_high = lvts_temp_to_raw(high); /* - * Hot to normal temperature threshold + * Low offset temperature threshold * - * LVTS_H2NTHRE + * LVTS_OFFSETL * * Bits: * @@ -308,13 +308,13 @@ static int lvts_set_trips(struct thermal_zone_device *tz, int low, int high) if (low != -INT_MAX) { pr_debug("%s: Setting low limit temperature interrupt: %d\n", thermal_zone_device_type(tz), low); - writel(raw_low, LVTS_H2NTHRE(base)); + writel(raw_low, LVTS_OFFSETL(base)); } /* - * Hot temperature threshold + * High offset temperature threshold * - * LVTS_HTHRE + * LVTS_OFFSETH * * Bits: * @@ -322,7 +322,7 @@ static int lvts_set_trips(struct thermal_zone_device *tz, int low, int high) */ pr_debug("%s: Setting high limit temperature interrupt: %d\n", thermal_zone_device_type(tz), high); - writel(raw_high, LVTS_HTHRE(base)); + writel(raw_high, LVTS_OFFSETH(base)); return 0; } From patchwork Thu May 4 00:48:50 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?b?TsOtY29sYXMgRi4gUi4gQS4gUHJhZG8=?= X-Patchwork-Id: 89891 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a59:b0ea:0:b0:3b6:4342:cba0 with SMTP id b10csp1728832vqo; Wed, 3 May 2023 18:22:58 -0700 (PDT) X-Google-Smtp-Source: ACHHUZ6hvPM/GIyOUehtrIbTu9j+D0Lqmi6I6CiTkNfsSn1OybFGy3HyF2UEfVYsIQiIbBXWo4Ma X-Received: by 2002:a17:902:8d8a:b0:1ab:5b0:6f16 with SMTP id v10-20020a1709028d8a00b001ab05b06f16mr1949213plo.43.1683163378317; Wed, 03 May 2023 18:22:58 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1683163378; cv=none; d=google.com; s=arc-20160816; b=kWhz8UlNmY67e/LsZ+JVOiQ4lvhtRPHAY7nufo11xsyGXeTw+EHAlQPoNPejeq7ZYb IkVLIyELFuCvwEjFa/UBlhsNQ4aEDG3xBeJ2XtJ8YYkdmAn4DpD0WmC3WqwKJgRScT6p L8MTLdSaYIwDvppGiZinKptfchSSEBFHr+ecH1YQ5YsJMzJje0ZsmQfUFmeD/MZnaB0q 7F5KMKPoKh8LzB6iCTR+g8+ji/c0UT1dtZcNKgKRQybxkq2CyUvAlnp0pzDClceW7Nep yc/jDhqRY62pe2gUZnGcZNgSbUaJXhkWdUMfWaVuWMx8UCAs/OsCxrlR4DNVY95x2AUj tyvQ== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from :dkim-signature; bh=6aTLuIf9MPhvx568mMZeylxZrnlvv0+rnQXzdPS7AcY=; b=QPX2tF3zQo/fjUnFivf6B0aExmfhldBqvD9jjD1kKZLsrLTI7yUw0OhjvUJNAXubtF S4OpDJwBSZImiwApO03X+1VmYSJ3PXvMHh4Np9nJLfmfPM5kuBmD9z4qmv9Q2BxsNXvy 6GFskHFLBW0zvYfMCgwWhDlC03+p8KoeChkLTDaLX0io7Bx/nxSMYLuO9lj6cWNGosNM NFQI0hngao8FnNcVeiEqiNtEt0dOe9eTAhxhEA9+i/ns4E4hwbkhpZTeoWkeutVpLL+N BDbiMEjJKh5nJMLRFYCYI8swPacVuIT10fhp0XJvz/WEJMgsu/zYabdyuaVpZ8p6zQTd dwEw== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@collabora.com header.s=mail header.b=XO0QnBwx; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=QUARANTINE sp=QUARANTINE dis=NONE) header.from=collabora.com Received: from out1.vger.email (out1.vger.email. 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Wysocki" , Zhang Rui , linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, linux-mediatek@lists.infradead.org, linux-pm@vger.kernel.org Subject: [PATCH v2 4/6] thermal/drivers/mediatek/lvts_thermal: Disable undesired interrupts Date: Wed, 3 May 2023 20:48:50 -0400 Message-Id: <20230504004852.627049-5-nfraprado@collabora.com> X-Mailer: git-send-email 2.40.1 In-Reply-To: <20230504004852.627049-1-nfraprado@collabora.com> References: <20230504004852.627049-1-nfraprado@collabora.com> MIME-Version: 1.0 X-Spam-Status: No, score=-2.1 required=5.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,SPF_HELO_NONE,SPF_PASS, T_SCC_BODY_TEXT_LINE,URIBL_BLOCKED autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-getmail-retrieved-from-mailbox: =?utf-8?q?INBOX?= X-GMAIL-THRID: =?utf-8?q?1764924722590496004?= X-GMAIL-MSGID: =?utf-8?q?1764924722590496004?= Out of the many interrupts supported by the hardware, the only ones of interest to the driver currently are: * The temperature went over the high offset threshold, for any of the sensors * The temperature went below the low offset threshold, for any of the sensors * The temperature went over the stage3 threshold These are the only thresholds configured by the driver through the OFFSETH, OFFSETL, and PROTTC registers, respectively. The current interrupt mask in LVTS_MONINT_CONF, enables many more interrupts, including data ready on sensors for both filtered and immediate mode. These are not only not handled by the driver, but they are also triggered too often, causing unneeded overhead. Disable these unnecessary interrupts. The meaning of each bit can be seen in the comment describing LVTS_MONINTST in the IRQ handler. Fixes: f5f633b18234 ("thermal/drivers/mediatek: Add the Low Voltage Thermal Sensor driver") Signed-off-by: Nícolas F. R. A. Prado --- Changes in v2: - Reworded commit and changed flag to use offset interrupts instead drivers/thermal/mediatek/lvts_thermal.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/thermal/mediatek/lvts_thermal.c b/drivers/thermal/mediatek/lvts_thermal.c index 8449ba6ca90e..efd1e938e1c2 100644 --- a/drivers/thermal/mediatek/lvts_thermal.c +++ b/drivers/thermal/mediatek/lvts_thermal.c @@ -63,7 +63,7 @@ #define LVTS_HW_FILTER 0x2 #define LVTS_TSSEL_CONF 0x13121110 #define LVTS_CALSCALE_CONF 0x300 -#define LVTS_MONINT_CONF 0x9FBF7BDE +#define LVTS_MONINT_CONF 0x8300318C #define LVTS_INT_SENSOR0 0x0009001F #define LVTS_INT_SENSOR1 0x001203E0 From patchwork Thu May 4 00:48:51 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?b?TsOtY29sYXMgRi4gUi4gQS4gUHJhZG8=?= X-Patchwork-Id: 89889 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a59:b0ea:0:b0:3b6:4342:cba0 with SMTP id b10csp1727940vqo; Wed, 3 May 2023 18:20:44 -0700 (PDT) X-Google-Smtp-Source: ACHHUZ7pa0XN1XpBGvPNKXXMK8H9/Am+0WL2KcMi1yjgZs8mu7zH0HQZHhj9eVVsG5XD407Pd+qW X-Received: by 2002:a17:90a:c86:b0:24e:5245:6383 with SMTP id v6-20020a17090a0c8600b0024e52456383mr481685pja.23.1683163244546; Wed, 03 May 2023 18:20:44 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1683163244; cv=none; d=google.com; s=arc-20160816; b=nCrHV+jtEGdX7X7xah9kRMiiiCd3VgX98ZsfjP6PLJdS20P5Zr8XuiyJbYhpkADCHw F+9lzEOsuL1i9ghEDjFzOTp0zLtAH9bxjnYgrViEUhc7kB+djg64RKUtPKlyp1piroMJ Uu6d8JYpD0yozNkTOaMo+QZR/RC8sBkBFPLNZl4UfYIHD2arNtV1UZkZQGTlfKU+50HQ 9NnbilhvOJYCrybQa4Ol6D3gs2pXcYM0yU4RA23xHUjSgpficxwVHgtpPky96X+Ztsmq 5Lwp0u+TnGq9Pvf2gwJFaNUoYwlVYHczILtztWijwT0cSK7XWdkey99oPnSw4Vw61uJ5 8V1g== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from :dkim-signature; bh=uISMcfItksDJnkYB8GQbrMA3BsuwGo1DkXUxyS6B2io=; b=KOf+aWB1e8djZatelmEKyRFtVB4d4KIEUNwLGfoo973Q64y7v+ACpFgPDvFSsF0Lvp ZymcrHh9P5tv12Yo0Ijmo9hoReU9cBxTxMbb0apqUrRbd6aWxqofseL8KYJhrQwtF3Ir 4juvh/KuLS7TA0UNFZCmOLvap4cy4z0ikL2dKt5XB673J59QiI4X9vz4sN3oEmOX3TOJ VhciVs99ReJ+Q8D1ZV/x5HZJsxneofBLo2nu5jpEO6PROJ51thXp+4bVm9fwD7pgCKyg v9nLBgsaUSZRbHje/iTWF+8KVZ2n9VHDgPeQ9MrJRS+4FHmBaE+Bn3RuYvlLt/uQM9lo 2tGw== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@collabora.com header.s=mail header.b=ZbTkggtm; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=QUARANTINE sp=QUARANTINE dis=NONE) header.from=collabora.com Received: from out1.vger.email (out1.vger.email. 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Wysocki" , Zhang Rui , linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, linux-mediatek@lists.infradead.org, linux-pm@vger.kernel.org Subject: [PATCH v2 5/6] thermal/drivers/mediatek/lvts_thermal: Don't leave threshold zeroed Date: Wed, 3 May 2023 20:48:51 -0400 Message-Id: <20230504004852.627049-6-nfraprado@collabora.com> X-Mailer: git-send-email 2.40.1 In-Reply-To: <20230504004852.627049-1-nfraprado@collabora.com> References: <20230504004852.627049-1-nfraprado@collabora.com> MIME-Version: 1.0 X-Spam-Status: No, score=-2.1 required=5.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,SPF_HELO_NONE,SPF_PASS, T_SCC_BODY_TEXT_LINE,URIBL_BLOCKED autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-getmail-retrieved-from-mailbox: =?utf-8?q?INBOX?= X-GMAIL-THRID: =?utf-8?q?1764924582139478380?= X-GMAIL-MSGID: =?utf-8?q?1764924582139478380?= The thermal framework might leave the low threshold unset if there aren't any lower trip points. This leaves the register zeroed, which translates to a very high temperature for the low threshold. The interrupt for this threshold is then immediately triggered, and the state machine gets stuck, preventing any other temperature monitoring interrupts to ever trigger. (The same happens by not setting the Cold or Hot to Normal thresholds when using those) Set the unused threshold to a valid low value. This value was chosen so that for any valid golden temperature read from the efuse, when the value is converted to raw and back again to milliCelsius, the result doesn't underflow. Fixes: f5f633b18234 ("thermal/drivers/mediatek: Add the Low Voltage Thermal Sensor driver") Signed-off-by: Nícolas F. R. A. Prado --- Changes in v2: - Added this commit drivers/thermal/mediatek/lvts_thermal.c | 7 +++++++ 1 file changed, 7 insertions(+) diff --git a/drivers/thermal/mediatek/lvts_thermal.c b/drivers/thermal/mediatek/lvts_thermal.c index efd1e938e1c2..951a4cb75ef6 100644 --- a/drivers/thermal/mediatek/lvts_thermal.c +++ b/drivers/thermal/mediatek/lvts_thermal.c @@ -82,6 +82,8 @@ #define LVTS_HW_SHUTDOWN_MT8195 105000 #define LVTS_HW_SHUTDOWN_MT8192 105000 +#define LVTS_MINIUM_THRESHOLD 20000 + static int golden_temp = LVTS_GOLDEN_TEMP_DEFAULT; static int coeff_b = LVTS_COEFF_B; @@ -309,6 +311,11 @@ static int lvts_set_trips(struct thermal_zone_device *tz, int low, int high) pr_debug("%s: Setting low limit temperature interrupt: %d\n", thermal_zone_device_type(tz), low); writel(raw_low, LVTS_OFFSETL(base)); + } else { + pr_debug("%s: Setting low limit temperature to minimum\n", + thermal_zone_device_type(tz)); + raw_low = lvts_temp_to_raw(LVTS_MINIUM_THRESHOLD); + writel(raw_low, LVTS_OFFSETL(base)); } /* From patchwork Thu May 4 00:48:52 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?b?TsOtY29sYXMgRi4gUi4gQS4gUHJhZG8=?= X-Patchwork-Id: 89887 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a59:b0ea:0:b0:3b6:4342:cba0 with SMTP id b10csp1715582vqo; Wed, 3 May 2023 17:52:34 -0700 (PDT) X-Google-Smtp-Source: ACHHUZ62ev5jhQRJ1A0xNlenxWPxKkCy/ECWGd0zSojcSB4aoSxbNlHf5Qs5F/ejNu5bbhVTzKXO X-Received: by 2002:a05:6a20:2d2b:b0:f5:607f:b78 with SMTP id g43-20020a056a202d2b00b000f5607f0b78mr541857pzl.27.1683161553814; Wed, 03 May 2023 17:52:33 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1683161553; cv=none; d=google.com; s=arc-20160816; b=VI70yYZknAZQhzg0T4nlGcqdxKWrIE8iYCGs1fgrCOkK31f3fHRSev/YRcoKzmpsdp 1X4IzRFKUqJC/vhWP0ghPPGXzLgHh0BlE13Pqdg0JT8lL3WvsrYrOd75Jvh4ZYA+kBWJ 0bUO5urNvOQMJ/RbRJNWw7s3/bKsILsP9mLoo/YZ2+fE9rv+mAUPtoS1t7gpCqeCX5W/ SBu5eru+mR/XSN21rivTudDqg4vZKJvfRcvcOQRgJ61Jrcz1nMVxPOgl5m3kwgK/412y TVRzOXGHWz83LLlWBe0Pr/u5Ea5TOdm08J49W1/0nLrXI2GM23P2yf8V1suTc71ThYIx q/SA== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from :dkim-signature; bh=o5Y7cZBrq2eKNjGH9XtBuSapGz5eTcNiWUbtGDnAJYc=; b=YSiuNjVy5QQIlBy+3rPJVfBIpRMDgOPBk8tDojClH4vIhbLthidXu8Yaw0Yf9NN+Bv KUeKl69cRjFAkfn7agVaYcePWEl9czGwTmQnpul8N59J/BY84ftZYL8fRDenqNwuHFaz kI5pf+ePOZs3EJFp3GUrHMpj5fg19kdN+pu0j5dgzjvpXDlqSkaMF5kftGpD/Qw0uNgb fF2PkAAt7Mcb0DCdmEOe1JXgojcbC8gSGBlzJX6vmN7SK9R+SEEcJfgqO3McsrNoOxtI z1E/KY+ZjawQBnpSDYMtmnyNAAIJZYSIUOGUbpsWfA/PhUPHru1njspz8OhT3ySXihZ0 ywmQ== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@collabora.com header.s=mail header.b=CobGbuMm; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=QUARANTINE sp=QUARANTINE dis=NONE) header.from=collabora.com Received: from out1.vger.email (out1.vger.email. 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Wysocki" , Zhang Rui , linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, linux-mediatek@lists.infradead.org, linux-pm@vger.kernel.org Subject: [PATCH v2 6/6] thermal/drivers/mediatek/lvts_thermal: Manage threshold between sensors Date: Wed, 3 May 2023 20:48:52 -0400 Message-Id: <20230504004852.627049-7-nfraprado@collabora.com> X-Mailer: git-send-email 2.40.1 In-Reply-To: <20230504004852.627049-1-nfraprado@collabora.com> References: <20230504004852.627049-1-nfraprado@collabora.com> MIME-Version: 1.0 X-Spam-Status: No, score=-2.1 required=5.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,SPF_HELO_NONE,SPF_PASS, T_SCC_BODY_TEXT_LINE,URIBL_BLOCKED autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-getmail-retrieved-from-mailbox: =?utf-8?q?INBOX?= X-GMAIL-THRID: =?utf-8?q?1764922809449426145?= X-GMAIL-MSGID: =?utf-8?q?1764922809449426145?= Each LVTS thermal controller can have up to four sensors, each capable of triggering its own interrupt when its measured temperature crosses the configured threshold. The threshold for each sensor is handled separately by the thermal framework, since each one is registered with its own thermal zone and trips. However, the temperature thresholds are configured on the controller, and therefore are shared between all sensors on that controller. When the temperature measured by the sensors is different enough to cause the thermal framework to configure different thresholds for each one, interrupts start triggering on sensors outside the last threshold configured. To address the issue, track the thresholds required by each sensor and only actually set the highest one in the hardware, and disable interrupts for all sensors outside the current configured range. Fixes: f5f633b18234 ("thermal/drivers/mediatek: Add the Low Voltage Thermal Sensor driver") Signed-off-by: Nícolas F. R. A. Prado --- Changes in v2: - Added this commit drivers/thermal/mediatek/lvts_thermal.c | 69 +++++++++++++++++++++++++ 1 file changed, 69 insertions(+) diff --git a/drivers/thermal/mediatek/lvts_thermal.c b/drivers/thermal/mediatek/lvts_thermal.c index 951a4cb75ef6..2f37a175b1c6 100644 --- a/drivers/thermal/mediatek/lvts_thermal.c +++ b/drivers/thermal/mediatek/lvts_thermal.c @@ -65,6 +65,11 @@ #define LVTS_CALSCALE_CONF 0x300 #define LVTS_MONINT_CONF 0x8300318C +#define LVTS_MONINT_OFFSET_SENSOR0 0xC +#define LVTS_MONINT_OFFSET_SENSOR1 0x180 +#define LVTS_MONINT_OFFSET_SENSOR2 0x3000 +#define LVTS_MONINT_OFFSET_SENSOR3 0x3000000 + #define LVTS_INT_SENSOR0 0x0009001F #define LVTS_INT_SENSOR1 0x001203E0 #define LVTS_INT_SENSOR2 0x00247C00 @@ -111,6 +116,8 @@ struct lvts_sensor { void __iomem *base; int id; int dt_id; + int low_thresh; + int high_thresh; }; struct lvts_ctrl { @@ -120,6 +127,8 @@ struct lvts_ctrl { int num_lvts_sensor; int mode; void __iomem *base; + int low_thresh; + int high_thresh; }; struct lvts_domain { @@ -291,12 +300,66 @@ static int lvts_get_temp(struct thermal_zone_device *tz, int *temp) return 0; } +static void lvts_update_irq_mask(struct lvts_ctrl *lvts_ctrl) +{ + u32 masks[] = { + LVTS_MONINT_OFFSET_SENSOR0, + LVTS_MONINT_OFFSET_SENSOR1, + LVTS_MONINT_OFFSET_SENSOR2, + LVTS_MONINT_OFFSET_SENSOR3, + }; + u32 value = 0; + int i; + + value = readl(LVTS_MONINT(lvts_ctrl->base)); + + for (i = 0; i < ARRAY_SIZE(masks); i++) { + if (lvts_ctrl->sensors[i].high_thresh == lvts_ctrl->high_thresh + && lvts_ctrl->sensors[i].low_thresh == lvts_ctrl->low_thresh) + value |= masks[i]; + else + value &= ~masks[i]; + } + + writel(value, LVTS_MONINT(lvts_ctrl->base)); +} + +static bool lvts_should_update_thresh(struct lvts_ctrl *lvts_ctrl, int high) +{ + int i; + + if (high > lvts_ctrl->high_thresh) + return true; + + for (i = 0; i < lvts_ctrl->num_lvts_sensor; i++) + if (lvts_ctrl->sensors[i].high_thresh == lvts_ctrl->high_thresh + && lvts_ctrl->sensors[i].low_thresh == lvts_ctrl->low_thresh) + return false; + + return true; +} + static int lvts_set_trips(struct thermal_zone_device *tz, int low, int high) { struct lvts_sensor *lvts_sensor = thermal_zone_device_priv(tz); + struct lvts_ctrl *lvts_ctrl = container_of(lvts_sensor, struct lvts_ctrl, sensors[lvts_sensor->id]); void __iomem *base = lvts_sensor->base; u32 raw_low = lvts_temp_to_raw(low); u32 raw_high = lvts_temp_to_raw(high); + bool should_update_thresh; + + lvts_sensor->low_thresh = low; + lvts_sensor->high_thresh = high; + + should_update_thresh = lvts_should_update_thresh(lvts_ctrl, high); + if (should_update_thresh) { + lvts_ctrl->high_thresh = high; + lvts_ctrl->low_thresh = low; + } + lvts_update_irq_mask(lvts_ctrl); + + if (!should_update_thresh) + return 0; /* * Low offset temperature threshold @@ -527,6 +590,9 @@ static int lvts_sensor_init(struct device *dev, struct lvts_ctrl *lvts_ctrl, */ lvts_sensor[i].msr = lvts_ctrl_data->mode == LVTS_MSR_IMMEDIATE_MODE ? imm_regs[i] : msr_regs[i]; + + lvts_sensor[i].low_thresh = INT_MIN; + lvts_sensor[i].high_thresh = INT_MIN; }; lvts_ctrl->num_lvts_sensor = lvts_ctrl_data->num_lvts_sensor; @@ -721,6 +787,9 @@ static int lvts_ctrl_init(struct device *dev, struct lvts_domain *lvts_td, */ lvts_ctrl[i].hw_tshut_raw_temp = lvts_temp_to_raw(lvts_data->lvts_ctrl[i].hw_tshut_temp); + + lvts_ctrl[i].low_thresh = INT_MIN; + lvts_ctrl[i].high_thresh = INT_MIN; } /*