From patchwork Tue May 2 01:07:53 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Adam Ford X-Patchwork-Id: 89216 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a59:b0ea:0:b0:3b6:4342:cba0 with SMTP id b10csp281257vqo; Mon, 1 May 2023 18:11:28 -0700 (PDT) X-Google-Smtp-Source: ACHHUZ5bVjGD1rnvEd2DFOTRzMh5OGyFdgwkfRLwVnVP3T1zrcofZVQ6HnU5SJGed1ZvsTmmRlA6 X-Received: by 2002:a17:902:f607:b0:1a0:7156:f8d1 with SMTP id n7-20020a170902f60700b001a07156f8d1mr15346473plg.19.1682989887851; Mon, 01 May 2023 18:11:27 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1682989887; cv=none; d=google.com; s=arc-20160816; b=kKVxax0Sy2n77kiTF0IQj309d3nBtMiXlNJw4osBjhdUqfRMkHKHwP1ewZBk4jyjeN wL0EjKjdsPzLmqPtMW8ztXTTUB6Y80fBiPWCMvaT8Iu4mUtmWYiPpcUKeKRevg54d3t4 Na+gnsY5eyRHRZKIm4+wwrwoqR05TYjjoZVagyRhyJO9hcgqeFWQ5Hvl49p+h/fUOU6/ MtAsYDDmzjv4vhIp3MdqbISGzD+n/Wy+MeEbr53tgNZmAMx565c0ILqw1m1PCfMob/f7 cESe0eBIxRfEmBwl7Oya+hI5bi6CoIVzJ434zHOgU/Z78zzLVBWfELIjwdOgKacomnCN +m3w== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from :dkim-signature; bh=5CznWtXBlBAUTzPhoV/NK/Tc5LdU+0am6ActqKsQmdk=; b=prGJclJBQ2ptOvZyCHZa7l7IOv5zEOmYnDxJj09jeKGVrhj1ItMlfx1YtmK4+OL4ZT iFhWmjdDtPVcyybbdY1zCwf1/PL/ltQqB3TIIJTqLkcntPHAOy1BOgiGd5D+HOR61NK3 YCOkLnDyiZz7pa83s/33mtc/iEMwds91cDp2rXTg4/Z/HPygbWQRoqzOAPAZcPp91OUl QsW5v6kWwZzroihlg7c3Y17ys0wYWWfN+pxMTKWs/KDZvDeYjvwjj6392dcsCXCdBpro ZL07oFezC55FegytJeWfCL6SppJLs8YIZIFBZWN1QQbb3YhsflveF3tJZkQvlVmVUJv+ scVg== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@gmail.com header.s=20221208 header.b="sGjC/BfH"; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=QUARANTINE dis=NONE) header.from=gmail.com Received: from out1.vger.email (out1.vger.email. [2620:137:e000::1:20]) by mx.google.com with ESMTP id e15-20020a17090301cf00b001a6d4ec7c89si31351037plh.222.2023.05.01.18.11.14; Mon, 01 May 2023 18:11:27 -0700 (PDT) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) client-ip=2620:137:e000::1:20; Authentication-Results: mx.google.com; dkim=pass header.i=@gmail.com header.s=20221208 header.b="sGjC/BfH"; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=QUARANTINE dis=NONE) header.from=gmail.com Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S233330AbjEBBIR (ORCPT + 99 others); Mon, 1 May 2023 21:08:17 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:54202 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S233326AbjEBBIM (ORCPT ); Mon, 1 May 2023 21:08:12 -0400 Received: from mail-il1-x136.google.com (mail-il1-x136.google.com [IPv6:2607:f8b0:4864:20::136]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id DF2D211A for ; Mon, 1 May 2023 18:08:09 -0700 (PDT) Received: by mail-il1-x136.google.com with SMTP id e9e14a558f8ab-3296292e623so26521905ab.2 for ; Mon, 01 May 2023 18:08:09 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20221208; t=1682989689; x=1685581689; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=5CznWtXBlBAUTzPhoV/NK/Tc5LdU+0am6ActqKsQmdk=; b=sGjC/BfHQKk3rDUml7ijRHKM0pXWzke2GrLRzRR+xcpFrxO0uohJ0YdskPS1bMLNzh pB8XRGAmSu3fl1blwyYMaa9ezsTd87eBoM3uYUzcaAI2wJtFHff/uVkPfgQEJOhaLr3F bqfPy0oMOnM8dvJfEots5dO3NlUNuj12qD5wC5lA+RSMlHINRHgnPSTpfqfmfBQmqEP4 gJWX08PVIv/gVoNRlQFbPJ3UcHsitAPl8v77r1ER95ZAaid2gSmwZx9iOvDs1WJNSyE1 vkXH5lOe6dbeC/gtSnCREpT8JpCtMIGQqIX3gP6HYGNWkPG+3O51ZM3uOwYFY8MtBmoe kVKw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20221208; t=1682989689; x=1685581689; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=5CznWtXBlBAUTzPhoV/NK/Tc5LdU+0am6ActqKsQmdk=; b=LRjM9EDx0jRQ6OOkgqR0Z9dZY6TVdKTxvxAA71FZ5vafptWM9YuoKFr8jMcONnu9WX Zz6OCxJrArhkfT5lOLfLSgWe99ZNq94oA99b9r1q/llQyhvh52pAP4cRlpERBQe9S3pk sHx+O5sZa84iWA2LePdKB3zE3SVmJw353e+O5i+YICNAq/Bu86XbZu6I5myeVbdqBng8 6ZsYR+6QwhqVTptgYzx+5HlgJ8HAH636p8PmdHuO0pEWpaO4KbH0uG+p9bPoXROTKdWy 8Dtn+CdxuHWfdWANlcPjAjgQ3/4Dpr17BPUARp53APJYWvT/D01AlX/fDLid0L7UcOhm fbpw== X-Gm-Message-State: AC+VfDztfY8mI2xxmxrDuDBNUHWJxfPJZT4Y3APvy3XMHxhUIZooI1/U 4lcz/yDSyAkA6bv8EgzJKV0= X-Received: by 2002:a92:d84a:0:b0:32c:c418:9163 with SMTP id h10-20020a92d84a000000b0032cc4189163mr10261202ilq.5.1682989689034; Mon, 01 May 2023 18:08:09 -0700 (PDT) Received: from aford-B741.lan ([2601:447:d001:897f:8257:a536:d7fc:1919]) by smtp.gmail.com with ESMTPSA id f16-20020a056638329000b0040fb5d5429fsm4836329jav.131.2023.05.01.18.08.07 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 01 May 2023 18:08:08 -0700 (PDT) From: Adam Ford To: dri-devel@lists.freedesktop.org Cc: marex@denx.de, aford@beaconembedded.com, Lucas Stach , Adam Ford , Chen-Yu Tsai , Andrzej Hajda , Neil Armstrong , Robert Foss , Laurent Pinchart , Jonas Karlman , Jernej Skrabec , David Airlie , Daniel Vetter , Inki Dae , Jagan Teki , Marek Szyprowski , Frieder Schrempf , linux-kernel@vger.kernel.org Subject: [PATCH V3 1/7] drm: bridge: samsung-dsim: fix blanking packet size calculation Date: Mon, 1 May 2023 20:07:53 -0500 Message-Id: <20230502010759.17282-2-aford173@gmail.com> X-Mailer: git-send-email 2.39.2 In-Reply-To: <20230502010759.17282-1-aford173@gmail.com> References: <20230502010759.17282-1-aford173@gmail.com> MIME-Version: 1.0 X-Spam-Status: No, score=-1.9 required=5.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,FREEMAIL_ENVFROM_END_DIGIT, FREEMAIL_FROM,RCVD_IN_DNSWL_NONE,SPF_HELO_NONE,SPF_PASS, T_SCC_BODY_TEXT_LINE autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-getmail-retrieved-from-mailbox: =?utf-8?q?INBOX?= X-GMAIL-THRID: =?utf-8?q?1764742804340920575?= X-GMAIL-MSGID: =?utf-8?q?1764742804340920575?= From: Lucas Stach Scale the blanking packet sizes to match the ratio between HS clock and DPI interface clock. The controller seems to do internal scaling to the number of active lanes, so we don't take those into account. Signed-off-by: Lucas Stach Signed-off-by: Adam Ford Tested-by: Chen-Yu Tsai Tested-by: Frieder Schrempf --- drivers/gpu/drm/bridge/samsung-dsim.c | 18 +++++++++++++++--- 1 file changed, 15 insertions(+), 3 deletions(-) diff --git a/drivers/gpu/drm/bridge/samsung-dsim.c b/drivers/gpu/drm/bridge/samsung-dsim.c index e0a402a85787..2be3b58624c3 100644 --- a/drivers/gpu/drm/bridge/samsung-dsim.c +++ b/drivers/gpu/drm/bridge/samsung-dsim.c @@ -874,17 +874,29 @@ static void samsung_dsim_set_display_mode(struct samsung_dsim *dsi) u32 reg; if (dsi->mode_flags & MIPI_DSI_MODE_VIDEO) { + int byte_clk_khz = dsi->burst_clk_rate / 1000 / 8; + int hfp = (m->hsync_start - m->hdisplay) * byte_clk_khz / m->clock; + int hbp = (m->htotal - m->hsync_end) * byte_clk_khz / m->clock; + int hsa = (m->hsync_end - m->hsync_start) * byte_clk_khz / m->clock; + + /* remove packet overhead when possible */ + hfp = max(hfp - 6, 0); + hbp = max(hbp - 6, 0); + hsa = max(hsa - 6, 0); + + dev_dbg(dsi->dev, "calculated hfp: %u, hbp: %u, hsa: %u", + hfp, hbp, hsa); + reg = DSIM_CMD_ALLOW(0xf) | DSIM_STABLE_VFP(m->vsync_start - m->vdisplay) | DSIM_MAIN_VBP(m->vtotal - m->vsync_end); samsung_dsim_write(dsi, DSIM_MVPORCH_REG, reg); - reg = DSIM_MAIN_HFP(m->hsync_start - m->hdisplay) - | DSIM_MAIN_HBP(m->htotal - m->hsync_end); + reg = DSIM_MAIN_HFP(hfp) | DSIM_MAIN_HBP(hbp); samsung_dsim_write(dsi, DSIM_MHPORCH_REG, reg); reg = DSIM_MAIN_VSA(m->vsync_end - m->vsync_start) - | DSIM_MAIN_HSA(m->hsync_end - m->hsync_start); + | DSIM_MAIN_HSA(hsa); samsung_dsim_write(dsi, DSIM_MSYNC_REG, reg); } reg = DSIM_MAIN_HRESOL(m->hdisplay, num_bits_resol) | From patchwork Tue May 2 01:07:54 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Adam Ford X-Patchwork-Id: 89218 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a59:b0ea:0:b0:3b6:4342:cba0 with SMTP id b10csp283491vqo; Mon, 1 May 2023 18:16:46 -0700 (PDT) X-Google-Smtp-Source: ACHHUZ4hxztmvhTzRyYExbhb92yEFooxsvYuMd40MzRiYn2CZJWhVQ6N5r3C88RQzFqZFxZ31uEI X-Received: by 2002:a05:6a00:1913:b0:63d:3d2b:a7ee with SMTP id y19-20020a056a00191300b0063d3d2ba7eemr23080076pfi.18.1682990205748; Mon, 01 May 2023 18:16:45 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1682990205; cv=none; d=google.com; s=arc-20160816; b=OxC2WGmemVdFJlxuCR/wetH41ehXv0NqyTZVTtxsfMaFmAYJpjPx4B3pGg2mYiCXXY MfSdJlfbv+TXqlMok3QXjOQXcAs6W1AbdxIBpGfxhE7iNtnjZB/SeiRrwQd6JaLZtY4l KWALLMAJApODAP2S1ecSzzljOhGV8X7Rf851frmR53fPhqeHDiCgEqfC+vMGbKAfYZVp H2/kofMYPxEV0EY1LcdONxccMCXeTvVkNoO3YWgJpBCbR0B+s8ndDGl46a98HF6KDsSq i4j3cbLRVus1EFWL3y5KO05sKc2mIWmjQKC4ag1Ljrt9wWiUQZn+3+vLa2tRn+ZRJc6L +UrQ== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from :dkim-signature; bh=xTXYxsRf77C4yLC2TKlqpFtoqraoDJZ2y+9E11ns+dE=; b=tuNhVTEUWXdWgKahDchJP0GCu10llUgd+/Eil1ndtdgO9P3HpdDTWyM8mJA0TnCwXi Ja32t3fHX6QbnTOYJFNaiXLYjH74EL4szdb4KrHjYrLFlXZO8NjY/C4cyng4aOzQUjLT GCg6eve2iuXBdl78AAZtjp8JK7go1VcYufd1iQNcSF3IGZjhsUxKhGVDk7b9AbBXq45L WJ8PBpEyzPY0lF0ASXMEICdaSblzRw3yzhz1Soo0t/M+iSDa4vLxWl6kDLulOhMt/vW9 wYUfvKngNonhp6dFHvnjqPcgD0h9Tz6apBOmSmycDKbAEhfpRM9UhIymdHTNJxKwV5kz II4w== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@gmail.com header.s=20221208 header.b=cFhQRnU8; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=QUARANTINE dis=NONE) header.from=gmail.com Received: from out1.vger.email (out1.vger.email. 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This information was contradicted in other parts of the mini, nano and plus manuals. After reaching out to my NXP Rep, when confronting him about discrepencies in the Nano manual, he responded with: "Yes it is definitely wrong, the one that is part of the NOTE in MIPI_DPHY_M_PLLPMS register table against PMS_P, PMS_M and PMS_S is not correct. I will report this to Doc team, the one customer should be take into account is the Table 13-40 DPHY PLL Parameters and the Note above." These updated values also match what is used in the NXP downstream kernel. To fix this, make new variables to hold the min and max values of m and the minimum value of VCO_out, and update the PMS calculator to use these new variables instead of using hard-coded values to keep the backwards compatibility with other parts using this driver. Fixes: 4d562c70c4dc ("drm: bridge: samsung-dsim: Add i.MX8M Mini/Nano support") Signed-off-by: Adam Ford Reviewed-by: Lucas Stach Tested-by: Chen-Yu Tsai Tested-by: Frieder Schrempf Reviewed-by: Frieder Schrempf --- drivers/gpu/drm/bridge/samsung-dsim.c | 22 ++++++++++++++++++++-- include/drm/bridge/samsung-dsim.h | 3 +++ 2 files changed, 23 insertions(+), 2 deletions(-) diff --git a/drivers/gpu/drm/bridge/samsung-dsim.c b/drivers/gpu/drm/bridge/samsung-dsim.c index 2be3b58624c3..bf4b33d2de76 100644 --- a/drivers/gpu/drm/bridge/samsung-dsim.c +++ b/drivers/gpu/drm/bridge/samsung-dsim.c @@ -405,6 +405,9 @@ static const struct samsung_dsim_driver_data exynos3_dsi_driver_data = { .num_bits_resol = 11, .pll_p_offset = 13, .reg_values = reg_values, + .m_min = 41, + .m_max = 125, + .min_freq = 500, }; static const struct samsung_dsim_driver_data exynos4_dsi_driver_data = { @@ -418,6 +421,9 @@ static const struct samsung_dsim_driver_data exynos4_dsi_driver_data = { .num_bits_resol = 11, .pll_p_offset = 13, .reg_values = reg_values, + .m_min = 41, + .m_max = 125, + .min_freq = 500, }; static const struct samsung_dsim_driver_data exynos5_dsi_driver_data = { @@ -429,6 +435,9 @@ static const struct samsung_dsim_driver_data exynos5_dsi_driver_data = { .num_bits_resol = 11, .pll_p_offset = 13, .reg_values = reg_values, + .m_min = 41, + .m_max = 125, + .min_freq = 500, }; static const struct samsung_dsim_driver_data exynos5433_dsi_driver_data = { @@ -441,6 +450,9 @@ static const struct samsung_dsim_driver_data exynos5433_dsi_driver_data = { .num_bits_resol = 12, .pll_p_offset = 13, .reg_values = exynos5433_reg_values, + .m_min = 41, + .m_max = 125, + .min_freq = 500, }; static const struct samsung_dsim_driver_data exynos5422_dsi_driver_data = { @@ -453,6 +465,9 @@ static const struct samsung_dsim_driver_data exynos5422_dsi_driver_data = { .num_bits_resol = 12, .pll_p_offset = 13, .reg_values = exynos5422_reg_values, + .m_min = 41, + .m_max = 125, + .min_freq = 500, }; static const struct samsung_dsim_driver_data imx8mm_dsi_driver_data = { @@ -469,6 +484,9 @@ static const struct samsung_dsim_driver_data imx8mm_dsi_driver_data = { */ .pll_p_offset = 14, .reg_values = imx8mm_dsim_reg_values, + .m_min = 64, + .m_max = 1023, + .min_freq = 1050, }; static const struct samsung_dsim_driver_data * @@ -547,12 +565,12 @@ static unsigned long samsung_dsim_pll_find_pms(struct samsung_dsim *dsi, tmp = (u64)fout * (_p << _s); do_div(tmp, fin); _m = tmp; - if (_m < 41 || _m > 125) + if (_m < driver_data->m_min || _m > driver_data->m_max) continue; tmp = (u64)_m * fin; do_div(tmp, _p); - if (tmp < 500 * MHZ || + if (tmp < driver_data->min_freq * MHZ || tmp > driver_data->max_freq * MHZ) continue; diff --git a/include/drm/bridge/samsung-dsim.h b/include/drm/bridge/samsung-dsim.h index ba5484de2b30..a1a5b2b89a7a 100644 --- a/include/drm/bridge/samsung-dsim.h +++ b/include/drm/bridge/samsung-dsim.h @@ -54,11 +54,14 @@ struct samsung_dsim_driver_data { unsigned int has_freqband:1; unsigned int has_clklane_stop:1; unsigned int num_clks; + unsigned int min_freq; unsigned int max_freq; unsigned int wait_for_reset; unsigned int num_bits_resol; unsigned int pll_p_offset; const unsigned int *reg_values; + u16 m_min; + u16 m_max; }; struct samsung_dsim_host_ops { From patchwork Tue May 2 01:07:55 2023 Content-Type: text/plain; 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If it's present, use it to maintain backwards compatibility with existing hardware. If it is absent, read clock rate of "sclk_mipi" to determine the rate. Signed-off-by: Adam Ford Tested-by: Chen-Yu Tsai Tested-by: Frieder Schrempf Reviewed-by: Frieder Schrempf --- drivers/gpu/drm/bridge/samsung-dsim.c | 12 ++++++++++-- 1 file changed, 10 insertions(+), 2 deletions(-) diff --git a/drivers/gpu/drm/bridge/samsung-dsim.c b/drivers/gpu/drm/bridge/samsung-dsim.c index bf4b33d2de76..2dc02a9e37c0 100644 --- a/drivers/gpu/drm/bridge/samsung-dsim.c +++ b/drivers/gpu/drm/bridge/samsung-dsim.c @@ -1726,12 +1726,20 @@ static int samsung_dsim_parse_dt(struct samsung_dsim *dsi) { struct device *dev = dsi->dev; struct device_node *node = dev->of_node; + struct clk *pll_clk; int ret; ret = samsung_dsim_of_read_u32(node, "samsung,pll-clock-frequency", &dsi->pll_clk_rate); - if (ret < 0) - return ret; + + /* If it doesn't exist, read it from the clock instead of failing */ + if (ret < 0) { + pll_clk = devm_clk_get(dev, "sclk_mipi"); + if (!IS_ERR(pll_clk)) + dsi->pll_clk_rate = clk_get_rate(pll_clk); + else + return PTR_ERR(pll_clk); + } ret = samsung_dsim_of_read_u32(node, "samsung,burst-clock-frequency", &dsi->burst_clk_rate); From patchwork Tue May 2 01:07:56 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Adam Ford X-Patchwork-Id: 89220 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a59:b0ea:0:b0:3b6:4342:cba0 with SMTP id b10csp284418vqo; Mon, 1 May 2023 18:19:05 -0700 (PDT) X-Google-Smtp-Source: ACHHUZ5Rxwu8NBrwn0XLvczKn1xgGetAW8/qT46+4jPtFdPvKmBlZj4XkNqgopYlBKtIW7yJ0/Rb X-Received: by 2002:a17:902:ca0b:b0:1a6:4cbc:14dd with SMTP id w11-20020a170902ca0b00b001a64cbc14ddmr12547538pld.8.1682990344993; Mon, 01 May 2023 18:19:04 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1682990344; cv=none; d=google.com; s=arc-20160816; b=x1uvlE8WDt0B5zr6yI+PyeP4ATG7NQGZbc4dLum9yiaWfd6vGT6HzChMyjR+zIkWAM 37e+/KARIgaesaIiV79i59W6lCix3qpKDUMNVw2ewC+NbCnks3vCGSyII7ngMKhl22CJ SsT7k0JQM85NgDIr3OeRV0eKsct92SZUa/FWiRJgg0vYOradY6uCgy1i1uR/tiX3XUpT AtK067mOsOdAfwWen8XNN2zSU2Q5BfjBofUrQtYnmAtD3B8CBxMxW2AXob9bi6gAQAl2 lLQoqB5q2/8Hn+BG05XpqtivjeyqKYS1sGhwlRWhSzfQW4KkZSnAwOSwyKpojZVPct5N uA+w== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from :dkim-signature; bh=v0duPWgTIsXWR+LqC+JicpRWC9rG9dOi1hmp+K9AKt4=; b=fc3A2QerDN01e6LzHR7KuS8KZS9wv5HEOE9dQgWfesPQAgMIZ2yCWZUpMy7Q6/27W4 40UWqNWRXIJCCpxZQwhojN2rq0bkptWuVlZOXiE9DbOR2WNAeErbqtxIfbOWnTuPSTWG vL8Vnnbmz+SwhKtKgdDM6uz93DAZTVE2YCcr1w3qnNXahwJkSvsl5igIsnjSkfSgdj9J qWDtOl92yUutDfa5UIZygKSWBpYmMVABPjiMIAg3Vm7ufMnwGb9qPqFK4H0Jj4+xdTgY emxcN19pfUiYdvSvlldO62NOkhM71x8aEyK9vc45EfltSOfQ5ghAUBkrzCT3NGHMoxJV xJHA== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@gmail.com header.s=20221208 header.b=oAJ1HEpe; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=QUARANTINE dis=NONE) header.from=gmail.com Received: from out1.vger.email (out1.vger.email. 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Signed-off-by: Adam Ford Tested-by: Frieder Schrempf Reviewed-by: Frieder Schrempf --- drivers/gpu/drm/bridge/Kconfig | 1 + 1 file changed, 1 insertion(+) diff --git a/drivers/gpu/drm/bridge/Kconfig b/drivers/gpu/drm/bridge/Kconfig index f076a09afac0..82c68b042444 100644 --- a/drivers/gpu/drm/bridge/Kconfig +++ b/drivers/gpu/drm/bridge/Kconfig @@ -227,6 +227,7 @@ config DRM_SAMSUNG_DSIM select DRM_KMS_HELPER select DRM_MIPI_DSI select DRM_PANEL_BRIDGE + select GENERIC_PHY_MIPI_DPHY help The Samsung MIPI DSIM bridge controller driver. This MIPI DSIM bridge can be found it on Exynos SoCs and From patchwork Tue May 2 01:07:57 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Adam Ford X-Patchwork-Id: 89219 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a59:b0ea:0:b0:3b6:4342:cba0 with SMTP id b10csp283800vqo; Mon, 1 May 2023 18:17:26 -0700 (PDT) X-Google-Smtp-Source: ACHHUZ7BlQ4PrsdrcjmPsCPGB45hwXtVcVrYIw+X4x7wC4kdbvKnMjrlAnp8RkUhXQbCW2mPYFc3 X-Received: by 2002:a17:90a:dd8f:b0:24d:f0c6:ebb2 with SMTP id l15-20020a17090add8f00b0024df0c6ebb2mr6622710pjv.7.1682990246424; Mon, 01 May 2023 18:17:26 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1682990246; cv=none; d=google.com; s=arc-20160816; b=zsFGHg0m4tb4orORLEMh2lOoybPN6lphpUqLpJDNCebuP/UhWxxGHVMxl7Ytix5UJh wX5KLmiglrqLUDeyGwruyhvm3ybqDkWaTZvyXNAX7z8CM6S8AIXNVHqS4j/WXq+A9hw3 KHTz3HrCk2yU0qXALc0q2eFSQXUjeY94inHrCh4jf2AXZaAuWLUk7orK2OcDPU28Yzjz Zr+tYzCc64xWeBGbO/JP57T/XTXICk/P/k1YaBUKj1JC6MuYP11+/bLsmROopgIkfqEC Wf+y4rdWke/21oxLHBHmZe5m/DTWI0tQRT+5+wXT5TLg/FisMkhwkNNfa2EXA/vyFXSf fkxg== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from :dkim-signature; bh=lFK1TzRb+WofFBaYOMfgaKdiEVNH7eD9PTVjCEw9DwY=; b=EMoeh8mQ0qI3UyUaKn9ub1crkR2iFNu+CdmRn9JABhZWbTQJ26KrOYd3/tdRg7v2+6 uX0t/kU1U9wUBTTT4w9eMEMcN5ecm+/Q+421BK2FKE8bQhhNyzi/TikvTKFbnRBpOXD9 S8vWaVjokVn1r28fGVrL/SGZeX8erJM38pAKRyxkL/b7IWVAUSF0qhjMYpsDJ1i9NWE1 GlMq2TBgaljwHa1KMu8mThmUU2r38Tq6D6696ZlTsodARud0avajiLZMXtouEsSaZmND zDfh9Y4IBTpHFSG5ZJa/uUzYIIRneHdii0qCdPwNTsUdsHk+8jcwBDesRS9EbrphU3UH rcdA== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@gmail.com header.s=20221208 header.b=sbCNxbaH; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=QUARANTINE dis=NONE) header.from=gmail.com Received: from out1.vger.email (out1.vger.email. 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Since the input clock can be variable, the phy timings need to be variable too. Add an additional variable to the driver data to enable this feature to prevent breaking boards that don't support it. The phy_mipi_dphy_get_default_config function configures the DPHY timings in pico-seconds, and a small macro converts those timings into clock cycles based on the pixel clock rate. Signed-off-by: Adam Ford Tested-by: Chen-Yu Tsai Tested-by: Frieder Schrempf Reviewed-by: Frieder Schrempf Tested-by: Michael Walle --- drivers/gpu/drm/bridge/samsung-dsim.c | 79 +++++++++++++++++++++++---- include/drm/bridge/samsung-dsim.h | 1 + 2 files changed, 70 insertions(+), 10 deletions(-) diff --git a/drivers/gpu/drm/bridge/samsung-dsim.c b/drivers/gpu/drm/bridge/samsung-dsim.c index 2dc02a9e37c0..99642230a54a 100644 --- a/drivers/gpu/drm/bridge/samsung-dsim.c +++ b/drivers/gpu/drm/bridge/samsung-dsim.c @@ -18,9 +18,7 @@ #include #include #include - #include