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Acked-by: Conor Dooley Acked-by: Vladimir Georgiev Signed-off-by: Ivan Bornyakov Acked-by: Vladimir Georgiev Acked-by: Xu Yilun --- MAINTAINERS | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/MAINTAINERS b/MAINTAINERS index a81ba8328704..aab9fbb20362 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -8100,7 +8100,7 @@ F: drivers/fpga/intel-m10-bmc-sec-update.c MICROCHIP POLARFIRE FPGA DRIVERS M: Conor Dooley -R: Ivan Bornyakov +R: Vladimir Georgiev L: linux-fpga@vger.kernel.org S: Supported F: Documentation/devicetree/bindings/fpga/microchip,mpf-spi-fpga-mgr.yaml From patchwork Sat Apr 29 10:48:38 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Ivan Bornyakov X-Patchwork-Id: 88868 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a59:b0ea:0:b0:3b6:4342:cba0 with SMTP id b10csp1516444vqo; Sat, 29 Apr 2023 03:57:37 -0700 (PDT) X-Google-Smtp-Source: ACHHUZ5n9o2CoBUq7P/ZkCYy+6TzjHDOOagw1kqpriBUFjXMsew2tWXcOAa9sJBdwRLaAarFa7U3 X-Received: by 2002:a05:6a20:c18c:b0:f0:1386:2f83 with SMTP id bg12-20020a056a20c18c00b000f013862f83mr8725240pzb.49.1682765856804; Sat, 29 Apr 2023 03:57:36 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1682765856; cv=none; d=google.com; s=arc-20160816; b=ibvPoOPff0jIfJmyXfobZnEEQS+uzLVlviUw44iTtxInO2akCwAa8b6f/9a7G62zN8 sXweb2lrHt0IOD3t1jaI0Unlxal509rnpiT1He3wRDR+xXPc0lNnIKchhMWgyQ0bHV51 mf4bNBilX+sDnDAO9mgg4KnOEShVGxwmU+LqIUbSXbmYCF+q5K9hh27hawKoaiDRQYhP FKYlaVGq9Hyqh26hUr56MjsTqZOsEXDarpnjCKHHAIJZcazXsbX/Ek52Rl1LxltqyUnm 6uoVwuHBQnSJ4IriU9aAlNg33phNRxx/OYObMqu7xfJ1rauEbulGgva+spISv/vNHu7K kCyQ== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from :dkim-signature; bh=OAsC17ztPnzFqPib45NhsGdPeCUQn9wyRrtrDQ/iq4g=; b=sbxEqayxk6ib+JI1mFtNvlyxhN0sCE3MLZIxYKiTYwisiVZVGzQklfCvU20GAq5Ymy 9Ij+j1U2YKTwEc/1YID+rbtgUmP8l/uIJNNCcXwE1x1+ApGWyEvvUJt/gl7v3eHi2weo 8cK9p6SJ56wpjYAXUUP1Svf4GPECFkLiuRvMm6eFciOzEJJSm/zqqOFa220ss24Slepf +A2sQDdPIwDdh5raEu8Pc2eYoxqfGbotw37xg57iYOHLAbzs5TiRzcIWOjlAEnhxFf7I urNVcERDyp2heNTLRuxrIJiAq9o7Q6sOkIzqhRXTjv0V70uPMFGgZhqGYEeIeoVTW2UY ix9A== ARC-Authentication-Results: i=1; mx.google.com; dkim=fail header.i=@metrotek.ru header.s=mail header.b=lYG3QWLM; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: from out1.vger.email (out1.vger.email. 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Acked-by: Conor Dooley Acked-by: Vladimir Georgiev Signed-off-by: Ivan Bornyakov Acked-by: Vladimir Georgiev Acked-by: Rob Herring --- Documentation/devicetree/bindings/fpga/lattice,sysconfig.yaml | 2 +- .../devicetree/bindings/fpga/microchip,mpf-spi-fpga-mgr.yaml | 2 +- 2 files changed, 2 insertions(+), 2 deletions(-) diff --git a/Documentation/devicetree/bindings/fpga/lattice,sysconfig.yaml b/Documentation/devicetree/bindings/fpga/lattice,sysconfig.yaml index 4fb05eb84e2a..164331eb6275 100644 --- a/Documentation/devicetree/bindings/fpga/lattice,sysconfig.yaml +++ b/Documentation/devicetree/bindings/fpga/lattice,sysconfig.yaml @@ -7,7 +7,7 @@ $schema: http://devicetree.org/meta-schemas/core.yaml# title: Lattice Slave SPI sysCONFIG FPGA manager maintainers: - - Ivan Bornyakov + - Vladimir Georgiev description: | Lattice sysCONFIG port, which is used for FPGA configuration, among others, diff --git a/Documentation/devicetree/bindings/fpga/microchip,mpf-spi-fpga-mgr.yaml b/Documentation/devicetree/bindings/fpga/microchip,mpf-spi-fpga-mgr.yaml index 527532f039ce..a157eecfb5fc 100644 --- a/Documentation/devicetree/bindings/fpga/microchip,mpf-spi-fpga-mgr.yaml +++ b/Documentation/devicetree/bindings/fpga/microchip,mpf-spi-fpga-mgr.yaml @@ -7,7 +7,7 @@ $schema: http://devicetree.org/meta-schemas/core.yaml# title: Microchip Polarfire FPGA manager. maintainers: - - Ivan Bornyakov + - Vladimir Georgiev description: Device Tree Bindings for Microchip Polarfire FPGA Manager using slave SPI to