From patchwork Fri Apr 28 23:34:46 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Andrew Pinski X-Patchwork-Id: 88774 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a59:b0ea:0:b0:3b6:4342:cba0 with SMTP id b10csp1277399vqo; Fri, 28 Apr 2023 16:37:26 -0700 (PDT) X-Google-Smtp-Source: ACHHUZ4mctrH0tO5T/uzX1rRHsmibqGda6hikrpWMN9i0vU5VvdwKzh3RRJ9Z3jeAbAN9B64tDR9 X-Received: by 2002:a17:907:360a:b0:94e:6294:9d23 with SMTP id bk10-20020a170907360a00b0094e62949d23mr6580103ejc.26.1682725046070; Fri, 28 Apr 2023 16:37:26 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1682725046; cv=none; d=google.com; s=arc-20160816; b=BIB1uhArtBshOEW6XruJhcTjKrlcT6/C9QICn7lgDAk9NlQQUSTmuHI2ZRzPj8hQID fzuXv4ujYYe4FJsp20hQlpsPwm8BluApNLOLPp8RhBWGyv1zemVGYf8UVnWIeiKZjUOu n+o6jxx6glMhR0CO0Q42ifWNKHF9npIsGB0LRTFGpFuPmmVj7vWDmauSLkVGr+FyWE74 gKYcS+aGcpyEEwLKbOPJStwxAUhALLp6kh+zRY40wB2ihx4Ih1Dy7C4AigUIy1KqlgE+ ijYiWWMz54qzBBHB1wGP6AxWmm4HNB2PuWNTrBS6ewj81aCASGMyVgoTNMeTXY2l7Gi5 gx6g== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:reply-to:from:list-subscribe:list-help:list-post :list-archive:list-unsubscribe:list-id:precedence :content-transfer-encoding:mime-version:message-id:date:subject:cc :to:dmarc-filter:delivered-to:dkim-signature:dkim-filter; bh=4LAk88w0pa4LcZRfWJ+DrG1UGG0c9V0J03Pq3FL18rw=; b=eFMEnPIleFBKq7C/sdO4nJresqoBGMjNIS6R5HWYzwP/HzYQIZFVAuievWf/0d3p4w nzyaSEHTmRlA40PmY8U/yFTzm8bKM9uk5zF5B7IEfeSUnUs8/JKcextk5xvOBTuQkLW6 WuNevVCfqjQSTpBA66E0blWWJWq/tKROGAht7XY7YCX08XbsF5zGvx56uij9Q18K7RHo 1/Oa0qSc3sDFaRmxqnjkBK0kWsz/mU8qVuHZonQCZrJLK2y8aa4Fhsnym9Z+SRsPbQ7y kIWyarcfC5VL0lMANrY+P5EB2dZadn4Jc3Oa22RNrCmALIcNrl0zH4CUXP333jsdvd1E AhLg== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@gcc.gnu.org header.s=default header.b=S1D0BAbu; spf=pass (google.com: domain of gcc-patches-bounces+ouuuleilei=gmail.com@gcc.gnu.org designates 2620:52:3:1:0:246e:9693:128c as permitted sender) smtp.mailfrom="gcc-patches-bounces+ouuuleilei=gmail.com@gcc.gnu.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=gnu.org Received: from sourceware.org (server2.sourceware.org. [2620:52:3:1:0:246e:9693:128c]) by mx.google.com with ESMTPS id vh9-20020a170907d38900b0094f1e8845d5si16651653ejc.326.2023.04.28.16.37.25 for (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 28 Apr 2023 16:37:26 -0700 (PDT) Received-SPF: pass (google.com: domain of gcc-patches-bounces+ouuuleilei=gmail.com@gcc.gnu.org designates 2620:52:3:1:0:246e:9693:128c as permitted sender) client-ip=2620:52:3:1:0:246e:9693:128c; Authentication-Results: mx.google.com; dkim=pass header.i=@gcc.gnu.org header.s=default header.b=S1D0BAbu; spf=pass (google.com: domain of gcc-patches-bounces+ouuuleilei=gmail.com@gcc.gnu.org designates 2620:52:3:1:0:246e:9693:128c as permitted sender) smtp.mailfrom="gcc-patches-bounces+ouuuleilei=gmail.com@gcc.gnu.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=gnu.org Received: from server2.sourceware.org (localhost [IPv6:::1]) by sourceware.org (Postfix) with ESMTP id 5C4B43857735 for ; Fri, 28 Apr 2023 23:37:24 +0000 (GMT) DKIM-Filter: OpenDKIM Filter v2.11.0 sourceware.org 5C4B43857735 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gcc.gnu.org; s=default; t=1682725044; bh=4LAk88w0pa4LcZRfWJ+DrG1UGG0c9V0J03Pq3FL18rw=; h=To:CC:Subject:Date:List-Id:List-Unsubscribe:List-Archive: List-Post:List-Help:List-Subscribe:From:Reply-To:From; b=S1D0BAbuYp7KCB6rmu74rwA+uXwPq42NI1QlhbO5I8RU7fz85Qo0djgcdpFBvCZKP QCDHB4JtczUcppfdOOmQH5XUFcVzYjMpO6umbcH0T8+MKb9tabHElsHVC7XIqCOp56 Gflh1qwf9R7IC/vk08pS4fiEaK7XoIi0DM98JZV8= X-Original-To: gcc-patches@gcc.gnu.org Delivered-To: gcc-patches@gcc.gnu.org Received: from mx0b-0016f401.pphosted.com (mx0a-0016f401.pphosted.com [67.231.148.174]) by sourceware.org (Postfix) with ESMTPS id 8B75E3858D37 for ; Fri, 28 Apr 2023 23:35:09 +0000 (GMT) DMARC-Filter: OpenDMARC Filter v1.4.2 sourceware.org 8B75E3858D37 Received: from pps.filterd (m0045849.ppops.net [127.0.0.1]) by mx0a-0016f401.pphosted.com (8.17.1.19/8.17.1.19) with ESMTP id 33SIv3pb028051 for ; Fri, 28 Apr 2023 16:35:08 -0700 Received: from dc5-exch01.marvell.com ([199.233.59.181]) by mx0a-0016f401.pphosted.com (PPS) with ESMTPS id 3q8kv68ucv-19 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-SHA384 bits=256 verify=NOT) for ; Fri, 28 Apr 2023 16:35:08 -0700 Received: from DC5-EXCH02.marvell.com (10.69.176.39) by DC5-EXCH01.marvell.com (10.69.176.38) with Microsoft SMTP Server (TLS) id 15.0.1497.48; Fri, 28 Apr 2023 16:34:54 -0700 Received: from maili.marvell.com (10.69.176.80) by DC5-EXCH02.marvell.com (10.69.176.39) with Microsoft SMTP Server id 15.0.1497.48 via Frontend Transport; Fri, 28 Apr 2023 16:34:54 -0700 Received: from vpnclient.wrightpinski.org.com (unknown [10.69.242.187]) by maili.marvell.com (Postfix) with ESMTP id E77703F7089; Fri, 28 Apr 2023 16:34:53 -0700 (PDT) To: CC: Andrew Pinski Subject: [PATCH] target: [PR109657] (a ? -1 : 0) | b could be optimized better for aarch64 Date: Fri, 28 Apr 2023 16:34:46 -0700 Message-ID: <20230428233446.688570-1-apinski@marvell.com> X-Mailer: git-send-email 2.31.1 MIME-Version: 1.0 X-Proofpoint-GUID: E-vFBryZRfhmggg-2mDL5P25pHBqvxVu X-Proofpoint-ORIG-GUID: E-vFBryZRfhmggg-2mDL5P25pHBqvxVu X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.254,Aquarius:18.0.942,Hydra:6.0.573,FMLib:17.11.170.22 definitions=2023-04-28_08,2023-04-27_01,2023-02-09_01 X-Spam-Status: No, score=-14.3 required=5.0 tests=BAYES_00, DKIM_SIGNED, DKIM_VALID, DKIM_VALID_AU, DKIM_VALID_EF, GIT_PATCH_0, KAM_NUMSUBJECT, KAM_SHORT, RCVD_IN_DNSWL_LOW, SPF_HELO_NONE, SPF_NONE, TXREP, T_SCC_BODY_TEXT_LINE autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on server2.sourceware.org X-BeenThere: gcc-patches@gcc.gnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Gcc-patches mailing list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-Patchwork-Original-From: Andrew Pinski via Gcc-patches From: Andrew Pinski Reply-To: Andrew Pinski Errors-To: gcc-patches-bounces+ouuuleilei=gmail.com@gcc.gnu.org Sender: "Gcc-patches" X-getmail-retrieved-from-mailbox: =?utf-8?q?INBOX?= X-GMAIL-THRID: =?utf-8?q?1764465097766025437?= X-GMAIL-MSGID: =?utf-8?q?1764465097766025437?= There is no canonical form for this case defined. So the aarch64 backend needs a pattern to match both of these forms. The forms are: (set (reg/i:SI 0 x0) (if_then_else:SI (eq (reg:CC 66 cc) (const_int 0 [0])) (reg:SI 97) (const_int -1 [0xffffffffffffffff]))) and (set (reg/i:SI 0 x0) (ior:SI (neg:SI (ne:SI (reg:CC 66 cc) (const_int 0 [0]))) (reg:SI 102))) Currently the aarch64 backend matches the first form so this patch adds a insn_and_split to match the second form and convert it to the first form. OK? Bootstrapped and tested on aarch64-linux-gnu with no regressions PR target/109657 gcc/ChangeLog: * config/aarch64/aarch64.md (*cmov_insn_m1): New insn_and_split pattern. gcc/testsuite/ChangeLog: * gcc.target/aarch64/csinv-2.c: New test. --- gcc/config/aarch64/aarch64.md | 20 +++++++++++++++++ gcc/testsuite/gcc.target/aarch64/csinv-2.c | 26 ++++++++++++++++++++++ 2 files changed, 46 insertions(+) create mode 100644 gcc/testsuite/gcc.target/aarch64/csinv-2.c diff --git a/gcc/config/aarch64/aarch64.md b/gcc/config/aarch64/aarch64.md index e1a2b265b20..57fe5601350 100644 --- a/gcc/config/aarch64/aarch64.md +++ b/gcc/config/aarch64/aarch64.md @@ -4194,6 +4194,26 @@ (define_insn "*cmovsi_insn_uxtw" [(set_attr "type" "csel, csel, csel, csel, csel, mov_imm, mov_imm")] ) +;; There are two canonical forms for `cmp ? -1 : a`. +;; This is the second form and is here to help combine. +;; Support `-(cmp) | a` into `cmp ? -1 : a` to be canonical in the backend. +(define_insn_and_split "*cmov_insn_m1" + [(set (match_operand:GPI 0 "register_operand" "=r") + (ior:GPI + (neg:GPI + (match_operator:GPI 1 "aarch64_comparison_operator" + [(match_operand 2 "cc_register" "") (const_int 0)])) + (match_operand 3 "register_operand" "r")))] + "" + "#" + "&& true" + [(set (match_dup 0) + (if_then_else:GPI (match_dup 1) + (const_int -1) (match_dup 3)))] + {} + [(set_attr "type" "csel")] +) + (define_insn "*cmovdi_insn_uxtw" [(set (match_operand:DI 0 "register_operand" "=r") (if_then_else:DI diff --git a/gcc/testsuite/gcc.target/aarch64/csinv-2.c b/gcc/testsuite/gcc.target/aarch64/csinv-2.c new file mode 100644 index 00000000000..89132acb713 --- /dev/null +++ b/gcc/testsuite/gcc.target/aarch64/csinv-2.c @@ -0,0 +1,26 @@ +/* { dg-do compile } */ +/* { dg-options "-O2" } */ +/* PR target/109657: (a ? -1 : 0) | b could be better */ + +/* Both functions should have the same assembly of: + cmp w1, 0 + csinv w0, w0, wzr, eq + + We should not get: + cmp w1, 0 + csetm w1, ne + orr w0, w1, w0 + */ +/* { dg-final { scan-assembler-times "csinv\tw\[0-9\]" 2 } } */ +/* { dg-final { scan-assembler-not "csetm\tw\[0-9\]" } } */ +unsigned b(unsigned a, unsigned b) +{ + if(b) + return -1; + return a; +} +unsigned b1(unsigned a, unsigned b) +{ + unsigned t = b ? -1 : 0; + return a | t; +}