From patchwork Thu Apr 27 12:09:56 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Linus Walleij X-Patchwork-Id: 88245 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a59:b0ea:0:b0:3b6:4342:cba0 with SMTP id b10csp233675vqo; Thu, 27 Apr 2023 05:34:21 -0700 (PDT) X-Google-Smtp-Source: ACHHUZ7ow74wTEqgfGTiBRUR15js/J+ZZGJjSxF5vK9XM2SFnKJoXBF29xb9+z5Sqi9zvIHCAMg+ X-Received: by 2002:a05:6a00:179a:b0:63f:18ae:1d5f with SMTP id s26-20020a056a00179a00b0063f18ae1d5fmr2494354pfg.29.1682598860787; Thu, 27 Apr 2023 05:34:20 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1682598860; cv=none; d=google.com; s=arc-20160816; b=nLYVZ3AJruJFaRkm3xIb/NXqh/ix+5/TopbKCGGhMxqX41luzX/yJ40IiQxZl4MC0r 33wYJcgTX9YosHr1BOcOaq+0HLXameh0xhsTKQlMrZfnDku75C9Kcdpcxh60+ObMN7NE QPnlpuIl1iS1L6MquOrDNJoXpYpA31iOmt8egf4v7AyDHNnGDMj68tQdLmiMxi2xdKGI +aqW3vxY7VcKACzIxx2oLf1GChl+429p/i0syE2CV6JMBScWvEAY6IvPYKlhSA9xXl3F zMiTyS9LxpUqgQPtVNKobTOksOlHvceiaz1FpC6h1LVHB+3wX6JVRQv5t/PPEmYBy7RW JpTQ== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:cc:to:in-reply-to:references:message-id :content-transfer-encoding:mime-version:subject:date:from :dkim-signature; bh=nBQqau5zd2jC+LHz8Ur60RWpH4I9DwzbI/d1n0X/hZQ=; b=livXQ2ukIthwLgHYpb/JnoPjUCJawaA3EfVZDXsy05pmR9URjrNTs4f5vSCoGNM21p BApwQiWEQuV5NZOaqcODGY8qg3k9x8M6sZKc1tmA6pqI6rgdEIKUt60FZ55xWmEGbBBC TWyvCuVmApy5uP5mcv2MOW7qFnj7zMaGrSYiKQjAZNRtKcVUrUI5siKdqc57vwL0WL92 DD/Efwz9vMq8lLdWEZmmEN14rqr8FIrhXElUr8JIHApQek+niCJoTMImTdtJs6K0dX36 Q7t6LPrGGAN2UFUubNs+EuXPWV7XJLv5wC7TWxopFcRNaZn7sfhsm+yU3MTdSnS60hUY yDJg== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=Zd61UDiv; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: from out1.vger.email (out1.vger.email. [2620:137:e000::1:20]) by mx.google.com with ESMTP id x24-20020aa79ad8000000b0063b6cccb40fsi18576421pfp.188.2023.04.27.05.34.06; Thu, 27 Apr 2023 05:34:20 -0700 (PDT) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) client-ip=2620:137:e000::1:20; Authentication-Results: mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=Zd61UDiv; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S243780AbjD0MKI (ORCPT + 99 others); Thu, 27 Apr 2023 08:10:08 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:54770 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S243401AbjD0MKD (ORCPT ); Thu, 27 Apr 2023 08:10:03 -0400 Received: from mail-lf1-x12d.google.com (mail-lf1-x12d.google.com [IPv6:2a00:1450:4864:20::12d]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 8BE5349D8 for ; Thu, 27 Apr 2023 05:10:01 -0700 (PDT) Received: by mail-lf1-x12d.google.com with SMTP id 2adb3069b0e04-4ec9c7c6986so8910563e87.0 for ; Thu, 27 Apr 2023 05:10:01 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; t=1682597400; x=1685189400; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:from:to:cc:subject:date:message-id :reply-to; bh=nBQqau5zd2jC+LHz8Ur60RWpH4I9DwzbI/d1n0X/hZQ=; b=Zd61UDivIru9nOswRX6lsNoYqxwEl+I+DUHIDb8GWzVmNWoEUI2Ct2DrHWg9DgZafp Lw7RrqH9wN+oMynZKtNQNGOlU/bMLOOmcjnVHXgr73KRBeWWYVIf1IIDmUcKPg8TNE7n 3w2vfTJcH+0DToR2mAPz7h3aZDnYawiOH/IcVo8trEHOOCz9/Tj9I3Do5o1m3RAWNoIG vcdCTK71+1piDsR+35+mcyY5o25eSBvXqq4bOabRYHGLY+WEQmgyx930xXnVHJmwRR/V du5vY0AMFm1fZdIudbqXPhJiSWLipjYKuS4EM/NEyNGFVyMFXGhY8BoOJKs4L5ywp/05 Z/OA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20221208; t=1682597400; x=1685189400; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=nBQqau5zd2jC+LHz8Ur60RWpH4I9DwzbI/d1n0X/hZQ=; b=MU7V6AZ9x57iXzKvs8qL5gGMiGhuzTLNQ2xeG1fG4lY2vr87SuMMuqU1hFUUWNd+n/ bvKlmzs/pbSXoF+GBeUea/WwQkd1EVHDaWm3GHp60kCW274lJmjMdl7pU3lR9OyMhP10 5sgtDeyCZxl0NR8Hx4TLzl2A1ny7//xnWUvgCO9xM79eOYifb4pn8+8lA56F0eH362WM sAIfs6bNY2+lzHTJ+cxd2HGhi/Q20yqOfJlgmILk74cmX0vpH9gN59PJp66LaJizfwCg TlqV8jTPM52bG0c9LJ/roKB+T6ec6BjmNe0JbLquXuE1euznmDLyiRWc0BfIFCDNzrrl XmoQ== X-Gm-Message-State: AC+VfDwBZfhCKuxJUE7WylR5gyeBFN2DajUp4S54HJe6RGS4SthNlgfL 8Dr9dRSaBm2LrxV93wDgCsd+nQ== X-Received: by 2002:ac2:5691:0:b0:4e8:46a1:21a9 with SMTP id 17-20020ac25691000000b004e846a121a9mr553592lfr.49.1682597399823; Thu, 27 Apr 2023 05:09:59 -0700 (PDT) Received: from [192.168.1.2] (c-05d8225c.014-348-6c756e10.bbcust.telenor.se. [92.34.216.5]) by smtp.gmail.com with ESMTPSA id e7-20020ac25467000000b004d4d7fb0e07sm2892044lfn.216.2023.04.27.05.09.58 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 27 Apr 2023 05:09:59 -0700 (PDT) From: Linus Walleij Date: Thu, 27 Apr 2023 14:09:56 +0200 Subject: [PATCH v2 1/8] dt-bindings: dma: dma40: Prefer to pass sram through phandle MIME-Version: 1.0 Message-Id: <20230417-ux500-dma40-cleanup-v2-1-cdaa68a4b863@linaro.org> References: <20230417-ux500-dma40-cleanup-v2-0-cdaa68a4b863@linaro.org> In-Reply-To: <20230417-ux500-dma40-cleanup-v2-0-cdaa68a4b863@linaro.org> To: Vinod Koul , Rob Herring , Krzysztof Kozlowski Cc: dmaengine@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, Linus Walleij X-Mailer: b4 0.12.2 X-Spam-Status: No, score=-2.1 required=5.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,RCVD_IN_DNSWL_NONE, SPF_HELO_NONE,SPF_PASS,T_SCC_BODY_TEXT_LINE autolearn=unavailable autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-getmail-retrieved-from-mailbox: =?utf-8?q?INBOX?= X-GMAIL-THRID: =?utf-8?q?1764332782565159500?= X-GMAIL-MSGID: =?utf-8?q?1764332782565159500?= Extend the DMA40 bindings so that we can pass two SRAM segments as phandles instead of directly referring to the memory address in the second reg cell. This enables more granular control over the SRAM, and adds the optiona LCLA SRAM segment as well. Deprecate the old way of passing LCPA as a second reg cell, make sram compulsory. Signed-off-by: Linus Walleij Reviewed-by: Rob Herring --- ChangeLog v1->v2: - Enumerate phandles using inner and outer maxItems as specified by Rob. - Drop quotes around reference. --- .../devicetree/bindings/dma/stericsson,dma40.yaml | 36 +++++++++++++++++----- 1 file changed, 28 insertions(+), 8 deletions(-) diff --git a/Documentation/devicetree/bindings/dma/stericsson,dma40.yaml b/Documentation/devicetree/bindings/dma/stericsson,dma40.yaml index 64845347f44d..1e5752b19a49 100644 --- a/Documentation/devicetree/bindings/dma/stericsson,dma40.yaml +++ b/Documentation/devicetree/bindings/dma/stericsson,dma40.yaml @@ -112,14 +112,23 @@ properties: - const: stericsson,dma40 reg: - items: - - description: DMA40 memory base - - description: LCPA memory base + oneOf: + - items: + - description: DMA40 memory base + - items: + - description: DMA40 memory base + - description: LCPA memory base, deprecated, use eSRAM pool instead + deprecated: true + reg-names: - items: - - const: base - - const: lcpa + oneOf: + - items: + - const: base + - items: + - const: base + - const: lcpa + deprecated: true interrupts: maxItems: 1 @@ -127,6 +136,15 @@ properties: clocks: maxItems: 1 + sram: + $ref: /schemas/types.yaml#/definitions/phandle-array + description: A phandle array with inner size 1 (no arg cells). + First phandle is the LCPA (Logical Channel Parameter Address) memory. + Second phandle is the LCLA (Logical Channel Link base Address) memory. + maxItems: 2 + items: + maxItems: 1 + memcpy-channels: $ref: /schemas/types.yaml#/definitions/uint32-array description: Array of u32 elements indicating which channels on the DMA @@ -138,6 +156,7 @@ required: - reg - interrupts - clocks + - sram - memcpy-channels additionalProperties: false @@ -149,8 +168,9 @@ examples: #include dma-controller@801c0000 { compatible = "stericsson,db8500-dma40", "stericsson,dma40"; - reg = <0x801c0000 0x1000>, <0x40010000 0x800>; - reg-names = "base", "lcpa"; + reg = <0x801c0000 0x1000>; + reg-names = "base"; + sram = <&lcpa>, <&lcla>; interrupts = ; #dma-cells = <3>; memcpy-channels = <56 57 58 59 60>; From patchwork Thu Apr 27 12:09:57 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Linus Walleij X-Patchwork-Id: 88227 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a59:b0ea:0:b0:3b6:4342:cba0 with SMTP id b10csp219721vqo; Thu, 27 Apr 2023 05:11:27 -0700 (PDT) X-Google-Smtp-Source: ACHHUZ5tY1hMxc6MkH4kvYcooPoL57c1U25LGzH5cvJzfLm6RUVuOwzUNy+wLW97fm+/5l0JiZrP X-Received: by 2002:a05:6a00:c88:b0:63b:8a00:4580 with SMTP id a8-20020a056a000c8800b0063b8a004580mr2252692pfv.0.1682597487366; Thu, 27 Apr 2023 05:11:27 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1682597487; cv=none; d=google.com; s=arc-20160816; b=qOsCS2nELr3X8xfjqmfuNK7WYFfp1i/wc9isFl7eHa0OCkG3j7LCq184HT6regN2+H icW2vu3L4xyOaR0Slz6CJy9U7ryW9u5DzaIqu7h4MEdB+ZhDV9rAyJN+5hO66alCRflJ V0IRNsqpvnIHl4WFpRIJRH1jK48O59RfhYHODcHnYQfa/euTuxNlKFvFneAsjVfmP5+Z CiezC3SnXhWmxg794csqqYC1LbN7ueq7eXHeP/ebxDKTiyZRUXEqfG9plrYktieEuyrb VnBcU+KEt+rA0+f5sRc6XgQtTjKCkQEesAR4dSNnRbs7JwYKCecBya+z6+WXfZqzx1t8 mikg== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:cc:to:in-reply-to:references:message-id :content-transfer-encoding:mime-version:subject:date:from :dkim-signature; bh=aWTuvneH8OCx2P81Wc3vASVRb7SduL7aaPSfgRD/SAs=; b=y3g+ktyu8LZ7P26EQteEofUm0hr0ljCGCsgV4f7O9KYn3l1/ZbEqUdvjXEFrP8cnD4 O8reJfwfsgI65LN0Q5PmSHVB77Bl4yjiPtKvhQmfGqYoJVwLTwflyPbNa1JUHNEq1uYN IVtOPitUiZV7vbd73ZvVnw3KLx/74uaZoNd2AsB27jptdjDcIg3vKUce6zw5jvgfy5eL INJSb1r8KV2bturjSYGNvZ5KSyqjA0mO1ZZPLbB0CUbIpS1YOplGS/kD4bz9nhJDS68y TPQAXST39qDtgVJoZ90cUz+ksV8gnLZ9EASqvAVvI6iVUN8YHKR9sJBaof/bO5ZMaAeT 0bWA== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=om4ZJrub; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: from out1.vger.email (out1.vger.email. [2620:137:e000::1:20]) by mx.google.com with ESMTP id k28-20020aa7973c000000b0063d37ae9543si18982441pfg.28.2023.04.27.05.11.12; Thu, 27 Apr 2023 05:11:27 -0700 (PDT) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) client-ip=2620:137:e000::1:20; Authentication-Results: mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=om4ZJrub; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S243743AbjD0MKL (ORCPT + 99 others); Thu, 27 Apr 2023 08:10:11 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:54774 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S243638AbjD0MKE (ORCPT ); Thu, 27 Apr 2023 08:10:04 -0400 Received: from mail-lf1-x12d.google.com (mail-lf1-x12d.google.com [IPv6:2a00:1450:4864:20::12d]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 7A66F49DC for ; Thu, 27 Apr 2023 05:10:02 -0700 (PDT) Received: by mail-lf1-x12d.google.com with SMTP id 2adb3069b0e04-4ec816c9d03so9317432e87.2 for ; Thu, 27 Apr 2023 05:10:02 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; t=1682597401; x=1685189401; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:from:to:cc:subject:date:message-id :reply-to; bh=aWTuvneH8OCx2P81Wc3vASVRb7SduL7aaPSfgRD/SAs=; b=om4ZJrubqvm9fw2ZalUk1RT0azz39OuLOId41AYD0LfTb5dlZ9LX3jCwDrBZKOO++e uA1mRFlnjWE2DTzo+ZEKqXtcuZhYON83NYKG5peLU1pizGZ1Gwa7SJipGmrVJEUf4upi yp9LH5iTxIqy8l15MjffFKXm4jfGcp+XPj97cRTp1hrQUnEb4HAFaYn+P1uhVDxlxWo/ WD1ZR1HVW5/REtdxhNkQnjbS02c9El/JOTgMDHdVZpQ+wH3rYf50S403y6n1slz289eO mNT+SaaGh+DDOzJ0okF99kSR/kGGc5YehVHI8N8wPHUz6/1ivOHPM+jRdU4uS+zRsBOq AvmQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20221208; t=1682597401; x=1685189401; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=aWTuvneH8OCx2P81Wc3vASVRb7SduL7aaPSfgRD/SAs=; b=itVlUeI6EA9Q8h2MakiHOyEm+E6tK5MS/Mq/9jV9lSbQgECqOubX6YbYnTEZZCZMX9 8EgvAZkaqA7+7YROIYFA0YN8EreoUG3iar+1zLDeq14fud2ezoBYiVVMgm7vFgug5iZY OCv4iAagQjT9SMZodeGNsR/ljIDxAvCAxieiOU/DRGXihR+0XA1DsILhGM173/9qdmeY kk7r2WmtNNVjVKEL3HhHkx8sgLVu9Q7hWTG+osBpjCglwkd6u8DmqEf7UutH0YS5cZI2 guCY33BoW1lMiD1i/72Ftdf96jau/InjAS5MdVXjqwiEYGnf7E+/FvPWu56EzGV5HTAN Lpxg== X-Gm-Message-State: AC+VfDzq+7S/lo6eSyhLD97KeLpfcyWGaqO10Z2ovHfjB6vrl+5Z/Q9e gUgJLgnrLSHXuCslEX2mIgQBXw== X-Received: by 2002:a05:6512:3cc:b0:4ed:cc6d:1da1 with SMTP id w12-20020a05651203cc00b004edcc6d1da1mr433433lfp.36.1682597400855; Thu, 27 Apr 2023 05:10:00 -0700 (PDT) Received: from [192.168.1.2] (c-05d8225c.014-348-6c756e10.bbcust.telenor.se. [92.34.216.5]) by smtp.gmail.com with ESMTPSA id e7-20020ac25467000000b004d4d7fb0e07sm2892044lfn.216.2023.04.27.05.09.59 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 27 Apr 2023 05:10:00 -0700 (PDT) From: Linus Walleij Date: Thu, 27 Apr 2023 14:09:57 +0200 Subject: [PATCH v2 2/8] dmaengine: ste_dma40: Get LCPA SRAM from SRAM node MIME-Version: 1.0 Message-Id: <20230417-ux500-dma40-cleanup-v2-2-cdaa68a4b863@linaro.org> References: <20230417-ux500-dma40-cleanup-v2-0-cdaa68a4b863@linaro.org> In-Reply-To: <20230417-ux500-dma40-cleanup-v2-0-cdaa68a4b863@linaro.org> To: Vinod Koul , Rob Herring , Krzysztof Kozlowski Cc: dmaengine@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, Linus Walleij X-Mailer: b4 0.12.2 X-Spam-Status: No, score=-2.1 required=5.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,RCVD_IN_DNSWL_NONE, SPF_HELO_NONE,SPF_PASS,T_SCC_BODY_TEXT_LINE autolearn=unavailable autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-getmail-retrieved-from-mailbox: =?utf-8?q?INBOX?= X-GMAIL-THRID: =?utf-8?q?1764331343163637082?= X-GMAIL-MSGID: =?utf-8?q?1764331343163637082?= Instead of passing the reserved SRAM as a "reg" field look for a phandle to the LCPA SRAM memory so we can use the proper SRAM device tree bindings for the SRAM. Signed-off-by: Linus Walleij --- drivers/dma/Kconfig | 1 + drivers/dma/ste_dma40.c | 47 ++++++++++++++++++++++++----------------------- 2 files changed, 25 insertions(+), 23 deletions(-) diff --git a/drivers/dma/Kconfig b/drivers/dma/Kconfig index fb7073fc034f..37db3dc9a92a 100644 --- a/drivers/dma/Kconfig +++ b/drivers/dma/Kconfig @@ -553,6 +553,7 @@ config STE_DMA40 bool "ST-Ericsson DMA40 support" depends on ARCH_U8500 select DMA_ENGINE + select SRAM help Support for ST-Ericsson DMA40 controller diff --git a/drivers/dma/ste_dma40.c b/drivers/dma/ste_dma40.c index f093e08c23b1..236269d35a53 100644 --- a/drivers/dma/ste_dma40.c +++ b/drivers/dma/ste_dma40.c @@ -19,6 +19,7 @@ #include #include #include +#include #include #include #include @@ -3506,9 +3507,11 @@ static int __init d40_probe(struct platform_device *pdev) { struct stedma40_platform_data *plat_data = dev_get_platdata(&pdev->dev); struct device_node *np = pdev->dev.of_node; + struct device_node *np_lcpa; int ret = -ENOENT; struct d40_base *base; struct resource *res; + struct resource res_lcpa; int num_reserved_chans; u32 val; @@ -3535,37 +3538,37 @@ static int __init d40_probe(struct platform_device *pdev) spin_lock_init(&base->interrupt_lock); spin_lock_init(&base->execmd_lock); - /* Get IO for logical channel parameter address */ - res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "lcpa"); - if (!res) { - ret = -ENOENT; - d40_err(&pdev->dev, "No \"lcpa\" memory resource\n"); - goto destroy_cache; + /* Get IO for logical channel parameter address (LCPA) */ + np_lcpa = of_parse_phandle(np, "sram", 0); + if (!np_lcpa) { + dev_err(&pdev->dev, "no LCPA SRAM node\n"); + goto report_failure; } - base->lcpa_size = resource_size(res); - base->phy_lcpa = res->start; - - if (request_mem_region(res->start, resource_size(res), - D40_NAME " I/O lcpa") == NULL) { - ret = -EBUSY; - d40_err(&pdev->dev, "Failed to request LCPA region %pR\n", res); - goto destroy_cache; + /* This is no device so read the address directly from the node */ + ret = of_address_to_resource(np_lcpa, 0, &res_lcpa); + if (ret) { + dev_err(&pdev->dev, "no LCPA SRAM resource\n"); + goto report_failure; } + base->lcpa_size = resource_size(&res_lcpa); + base->phy_lcpa = res_lcpa.start; + dev_info(&pdev->dev, "found LCPA SRAM at 0x%08x, size 0x%08x\n", + base->phy_lcpa, base->lcpa_size); /* We make use of ESRAM memory for this. */ val = readl(base->virtbase + D40_DREG_LCPA); - if (res->start != val && val != 0) { + if (base->phy_lcpa != val && val != 0) { dev_warn(&pdev->dev, - "[%s] Mismatch LCPA dma 0x%x, def %pa\n", - __func__, val, &res->start); + "[%s] Mismatch LCPA dma 0x%x, def %08x\n", + __func__, val, base->phy_lcpa); } else - writel(res->start, base->virtbase + D40_DREG_LCPA); + writel(base->phy_lcpa, base->virtbase + D40_DREG_LCPA); - base->lcpa_base = ioremap(res->start, resource_size(res)); + base->lcpa_base = ioremap(base->phy_lcpa, base->lcpa_size); if (!base->lcpa_base) { ret = -ENOMEM; d40_err(&pdev->dev, "Failed to ioremap LCPA region\n"); - goto destroy_cache; + goto release_base; } /* If lcla has to be located in ESRAM we don't need to allocate */ if (base->plat_data->use_esram_lcla) { @@ -3678,9 +3681,7 @@ static int __init d40_probe(struct platform_device *pdev) if (base->lcpa_base) iounmap(base->lcpa_base); - if (base->phy_lcpa) - release_mem_region(base->phy_lcpa, - base->lcpa_size); +release_base: if (base->phy_start) release_mem_region(base->phy_start, base->phy_size); From patchwork Thu Apr 27 12:09:58 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Linus Walleij X-Patchwork-Id: 88228 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a59:b0ea:0:b0:3b6:4342:cba0 with SMTP id b10csp219883vqo; Thu, 27 Apr 2023 05:11:44 -0700 (PDT) X-Google-Smtp-Source: ACHHUZ7petZVQf9193zDOCJAurincdxsQ0Rw8Jiy+lXw0qpFBaXwWd/7bJ4m4ZW5YnJDqJ7Pu1Ik X-Received: by 2002:a17:902:db09:b0:1a6:8405:f709 with SMTP id m9-20020a170902db0900b001a68405f709mr1672718plx.20.1682597504105; Thu, 27 Apr 2023 05:11:44 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1682597504; cv=none; d=google.com; s=arc-20160816; b=MbrKDEqFkCaPTocNatk/MB3PueeBnBhHxqRlUhciHjEDIbQhqCpFtQ+eQe0ZAykz/y 7u1Ks/bbsb2QFcx5tQmGF4+slCFp4iabfNRAgeDTwGP+EmHOrJIe2hySpwnAonms/pAW wxdD9Bxf6Y8FVnEOCU8Hr6BikGh2M+MqA5ylmSXqwK8+VAORWGgsu7h9Fd7jjHyrruFB PS+PzPfcaektjrb0xppQZYOJVJtKCD0BJe2aNaThiUqtmYzP7myq7icXa9Wlfvrj21GZ lGK99m0FTMJyH0HgS8ks71+HFyHP4G+ewVRJGx9TVqLAEOtzA+msRFMajIHMJTpLg01j YRFQ== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:cc:to:in-reply-to:references:message-id :content-transfer-encoding:mime-version:subject:date:from :dkim-signature; bh=6dzjqDUqhlpwIVqCpt+cUtHh+EAeuNijiG89uyJMVyE=; b=lQj+4tujIB7DJ8oOnLbCkOG9xVfMYc2nG6tgG3zYTqD/obcWgQfwTVLJ7XY8cI7JPd fBbJ92v8I5R1++QJ+7x2tZJurVujmlgCS8271MhZdvRVOd8NGjrGHa85BJKLdb+nmNZK I3IzdHyyBu2F2/hx1MTFZJpznkejYFbj2/wTj8KH4RgAcR2iDQmyo0fwMThwCxqAP6NS URTJEK4PV/IRAQnDBD7g32qxArpidOmruxfL1z+br3NGPbGEa9K7+4HKNS5jD67me976 pxlD3TrcQ42rit2xGuTHuVr5mS3FALe5EAHwU6Dm7fTiOTaAtBJKaYx/UKQ3B/JqfFQS IMxw== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=GE0B2hlf; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: from out1.vger.email (out1.vger.email. [2620:137:e000::1:20]) by mx.google.com with ESMTP id jw20-20020a170903279400b001a63bb1497dsi18446979plb.376.2023.04.27.05.11.27; Thu, 27 Apr 2023 05:11:44 -0700 (PDT) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) client-ip=2620:137:e000::1:20; Authentication-Results: mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=GE0B2hlf; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S243802AbjD0MKO (ORCPT + 99 others); Thu, 27 Apr 2023 08:10:14 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:54768 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S243710AbjD0MKE (ORCPT ); Thu, 27 Apr 2023 08:10:04 -0400 Received: from mail-lf1-x12e.google.com (mail-lf1-x12e.google.com [IPv6:2a00:1450:4864:20::12e]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 8C80E4692 for ; Thu, 27 Apr 2023 05:10:02 -0700 (PDT) Received: by mail-lf1-x12e.google.com with SMTP id 2adb3069b0e04-4f004cc54f4so2418621e87.3 for ; Thu, 27 Apr 2023 05:10:02 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; t=1682597402; x=1685189402; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:from:to:cc:subject:date:message-id :reply-to; bh=6dzjqDUqhlpwIVqCpt+cUtHh+EAeuNijiG89uyJMVyE=; b=GE0B2hlfsZ7HsdMx37vjGXXwJpLwp2GmtgxQ5XGC/Yt42Zf7fMYnoGrpZjrQ816WGx uS2GsUFIQ7JfTyPqqtUtIJsbwf+Zpnv6h6T/mrldPoS8Bs3eqXhNqPAl9rUpw5vaW7Uh ac7e7w3is/Hs3OpG+qgCF6njW2jqWCXVIoYFQKZj1hihJn6pajlGktWxvh0XmFZg0HYI B6SdtgNUysjD007W03YANvqTvbis+Vu0HZuVFhJ78TEmfJwB7IDByYpeqNhHUi96UgFe PygZqGV+cX15zJ4CPc7dcibKAxZBEbQlxYg8elm4f4rHq96LU1DaEYLhTC45Ra64yGFq SY8g== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20221208; t=1682597402; x=1685189402; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=6dzjqDUqhlpwIVqCpt+cUtHh+EAeuNijiG89uyJMVyE=; b=e7Ae+wPwpExuA+vs3qr5vaLbv7kQnBZR0H1wKbCchMFjU8KCe29o9FNxI5tbsFRwyc kOKvLUk27kkPYGwP+SxFktLYpuBfVbRzX9oo8XztDhWTpToB2wDkFw9CG3ZAKPj044lz egZe70njsIOj6zukMQ4MHZpPpCl0F5Szm2T+KJ8M2NXZ6NWih/SMTfofhOzsEb3V/7Ic Stfl/UwbTXq8/QsXK9a+ryEpoZlFoLnX+Nqf7UENnckFnIZ194Jg0bbkZueozkOk61S/ UwKdDvRguXV/r69Xl5+VDpNuNcNiJOVdFI/iqUAqSipRXtGlmQEETiX15wzwUVPoa7LR oQdA== X-Gm-Message-State: AC+VfDzeC+3/pC9fCNZn7Iwnwg2bBtp+DJgqvWeW5p08/0KdFw6DHM/C t8dtiNxPUKGyC5pmMkPQrnjlkw== X-Received: by 2002:ac2:5616:0:b0:4ee:d8f3:1398 with SMTP id v22-20020ac25616000000b004eed8f31398mr465560lfd.68.1682597401956; Thu, 27 Apr 2023 05:10:01 -0700 (PDT) Received: from [192.168.1.2] (c-05d8225c.014-348-6c756e10.bbcust.telenor.se. [92.34.216.5]) by smtp.gmail.com with ESMTPSA id e7-20020ac25467000000b004d4d7fb0e07sm2892044lfn.216.2023.04.27.05.10.00 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 27 Apr 2023 05:10:01 -0700 (PDT) From: Linus Walleij Date: Thu, 27 Apr 2023 14:09:58 +0200 Subject: [PATCH v2 3/8] dmaengine: ste_dma40: Add dev helper variable MIME-Version: 1.0 Message-Id: <20230417-ux500-dma40-cleanup-v2-3-cdaa68a4b863@linaro.org> References: <20230417-ux500-dma40-cleanup-v2-0-cdaa68a4b863@linaro.org> In-Reply-To: <20230417-ux500-dma40-cleanup-v2-0-cdaa68a4b863@linaro.org> To: Vinod Koul , Rob Herring , Krzysztof Kozlowski Cc: dmaengine@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, Linus Walleij X-Mailer: b4 0.12.2 X-Spam-Status: No, score=-2.1 required=5.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,RCVD_IN_DNSWL_NONE, SPF_HELO_NONE,SPF_PASS,T_SCC_BODY_TEXT_LINE autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-getmail-retrieved-from-mailbox: =?utf-8?q?INBOX?= X-GMAIL-THRID: =?utf-8?q?1764331360788220095?= X-GMAIL-MSGID: =?utf-8?q?1764331360788220095?= The &pdev->dev device pointer is used so many times in the probe() and d40_hw_detect_init() functions that a local *dev variable makes the code way easier to read. Signed-off-by: Linus Walleij --- drivers/dma/ste_dma40.c | 50 +++++++++++++++++++++++++------------------------ 1 file changed, 26 insertions(+), 24 deletions(-) diff --git a/drivers/dma/ste_dma40.c b/drivers/dma/ste_dma40.c index 236269d35a53..ef2a2fdaa82e 100644 --- a/drivers/dma/ste_dma40.c +++ b/drivers/dma/ste_dma40.c @@ -3104,6 +3104,7 @@ static int __init d40_phy_res_init(struct d40_base *base) static struct d40_base * __init d40_hw_detect_init(struct platform_device *pdev) { struct stedma40_platform_data *plat_data = dev_get_platdata(&pdev->dev); + struct device *dev = &pdev->dev; struct clk *clk; void __iomem *virtbase; struct resource *res; @@ -3117,15 +3118,15 @@ static struct d40_base * __init d40_hw_detect_init(struct platform_device *pdev) u32 cid; u8 rev; - clk = clk_get(&pdev->dev, NULL); + clk = clk_get(dev, NULL); if (IS_ERR(clk)) { - d40_err(&pdev->dev, "No matching clock found\n"); + d40_err(dev, "No matching clock found\n"); goto check_prepare_enabled; } clk_ret = clk_prepare_enable(clk); if (clk_ret) { - d40_err(&pdev->dev, "Failed to prepare/enable clock\n"); + d40_err(dev, "Failed to prepare/enable clock\n"); goto disable_unprepare; } @@ -3151,11 +3152,11 @@ static struct d40_base * __init d40_hw_detect_init(struct platform_device *pdev) & 255) << (i * 8); if (cid != AMBA_CID) { - d40_err(&pdev->dev, "Unknown hardware! No PrimeCell ID\n"); + d40_err(dev, "Unknown hardware! No PrimeCell ID\n"); goto unmap_io; } if (AMBA_MANF_BITS(pid) != AMBA_VENDOR_ST) { - d40_err(&pdev->dev, "Unknown designer! Got %x wanted %x\n", + d40_err(dev, "Unknown designer! Got %x wanted %x\n", AMBA_MANF_BITS(pid), AMBA_VENDOR_ST); goto unmap_io; @@ -3171,7 +3172,7 @@ static struct d40_base * __init d40_hw_detect_init(struct platform_device *pdev) */ rev = AMBA_REV_BITS(pid); if (rev < 2) { - d40_err(&pdev->dev, "hardware revision: %d is not supported", rev); + d40_err(dev, "hardware revision: %d is not supported", rev); goto unmap_io; } @@ -3189,7 +3190,7 @@ static struct d40_base * __init d40_hw_detect_init(struct platform_device *pdev) num_log_chans = num_phy_chans * D40_MAX_LOG_CHAN_PER_PHY; - dev_info(&pdev->dev, + dev_info(dev, "hardware rev: %d @ %pa with %d physical and %d logical channels\n", rev, &res->start, num_phy_chans, num_log_chans); @@ -3209,7 +3210,7 @@ static struct d40_base * __init d40_hw_detect_init(struct platform_device *pdev) base->phy_size = resource_size(res); base->virtbase = virtbase; base->plat_data = plat_data; - base->dev = &pdev->dev; + base->dev = dev; base->phy_chans = ((void *)base) + ALIGN(sizeof(struct d40_base), 4); base->log_chans = &base->phy_chans[num_phy_chans]; @@ -3505,7 +3506,8 @@ static int __init d40_of_probe(struct platform_device *pdev, static int __init d40_probe(struct platform_device *pdev) { - struct stedma40_platform_data *plat_data = dev_get_platdata(&pdev->dev); + struct device *dev = &pdev->dev; + struct stedma40_platform_data *plat_data = dev_get_platdata(dev); struct device_node *np = pdev->dev.of_node; struct device_node *np_lcpa; int ret = -ENOENT; @@ -3522,7 +3524,7 @@ static int __init d40_probe(struct platform_device *pdev) goto report_failure; } } else { - d40_err(&pdev->dev, "No pdata or Device Tree provided\n"); + d40_err(dev, "No pdata or Device Tree provided\n"); goto report_failure; } } @@ -3541,24 +3543,24 @@ static int __init d40_probe(struct platform_device *pdev) /* Get IO for logical channel parameter address (LCPA) */ np_lcpa = of_parse_phandle(np, "sram", 0); if (!np_lcpa) { - dev_err(&pdev->dev, "no LCPA SRAM node\n"); + dev_err(dev, "no LCPA SRAM node\n"); goto report_failure; } /* This is no device so read the address directly from the node */ ret = of_address_to_resource(np_lcpa, 0, &res_lcpa); if (ret) { - dev_err(&pdev->dev, "no LCPA SRAM resource\n"); + dev_err(dev, "no LCPA SRAM resource\n"); goto report_failure; } base->lcpa_size = resource_size(&res_lcpa); base->phy_lcpa = res_lcpa.start; - dev_info(&pdev->dev, "found LCPA SRAM at 0x%08x, size 0x%08x\n", + dev_info(dev, "found LCPA SRAM at 0x%08x, size 0x%08x\n", base->phy_lcpa, base->lcpa_size); /* We make use of ESRAM memory for this. */ val = readl(base->virtbase + D40_DREG_LCPA); if (base->phy_lcpa != val && val != 0) { - dev_warn(&pdev->dev, + dev_warn(dev, "[%s] Mismatch LCPA dma 0x%x, def %08x\n", __func__, val, base->phy_lcpa); } else @@ -3567,7 +3569,7 @@ static int __init d40_probe(struct platform_device *pdev) base->lcpa_base = ioremap(base->phy_lcpa, base->lcpa_size); if (!base->lcpa_base) { ret = -ENOMEM; - d40_err(&pdev->dev, "Failed to ioremap LCPA region\n"); + d40_err(dev, "Failed to ioremap LCPA region\n"); goto release_base; } /* If lcla has to be located in ESRAM we don't need to allocate */ @@ -3576,7 +3578,7 @@ static int __init d40_probe(struct platform_device *pdev) "lcla_esram"); if (!res) { ret = -ENOENT; - d40_err(&pdev->dev, + d40_err(dev, "No \"lcla_esram\" memory resource\n"); goto destroy_cache; } @@ -3584,7 +3586,7 @@ static int __init d40_probe(struct platform_device *pdev) resource_size(res)); if (!base->lcla_pool.base) { ret = -ENOMEM; - d40_err(&pdev->dev, "Failed to ioremap LCLA region\n"); + d40_err(dev, "Failed to ioremap LCLA region\n"); goto destroy_cache; } writel(res->start, base->virtbase + D40_DREG_LCLA); @@ -3592,7 +3594,7 @@ static int __init d40_probe(struct platform_device *pdev) } else { ret = d40_lcla_allocate(base); if (ret) { - d40_err(&pdev->dev, "Failed to allocate LCLA area\n"); + d40_err(dev, "Failed to allocate LCLA area\n"); goto destroy_cache; } } @@ -3603,7 +3605,7 @@ static int __init d40_probe(struct platform_device *pdev) ret = request_irq(base->irq, d40_handle_interrupt, 0, D40_NAME, base); if (ret) { - d40_err(&pdev->dev, "No IRQ defined\n"); + d40_err(dev, "No IRQ defined\n"); goto destroy_cache; } @@ -3611,7 +3613,7 @@ static int __init d40_probe(struct platform_device *pdev) base->lcpa_regulator = regulator_get(base->dev, "lcla_esram"); if (IS_ERR(base->lcpa_regulator)) { - d40_err(&pdev->dev, "Failed to get lcpa_regulator\n"); + d40_err(dev, "Failed to get lcpa_regulator\n"); ret = PTR_ERR(base->lcpa_regulator); base->lcpa_regulator = NULL; goto destroy_cache; @@ -3619,7 +3621,7 @@ static int __init d40_probe(struct platform_device *pdev) ret = regulator_enable(base->lcpa_regulator); if (ret) { - d40_err(&pdev->dev, + d40_err(dev, "Failed to enable lcpa_regulator\n"); regulator_put(base->lcpa_regulator); base->lcpa_regulator = NULL; @@ -3642,7 +3644,7 @@ static int __init d40_probe(struct platform_device *pdev) ret = dma_set_max_seg_size(base->dev, STEDMA40_MAX_SEG_SIZE); if (ret) { - d40_err(&pdev->dev, "Failed to set dma max seg size\n"); + d40_err(dev, "Failed to set dma max seg size\n"); goto destroy_cache; } @@ -3651,7 +3653,7 @@ static int __init d40_probe(struct platform_device *pdev) if (np) { ret = of_dma_controller_register(np, d40_xlate, NULL); if (ret) - dev_err(&pdev->dev, + dev_err(dev, "could not register of_dma_controller\n"); } @@ -3701,7 +3703,7 @@ static int __init d40_probe(struct platform_device *pdev) kfree(base->phy_res); kfree(base); report_failure: - d40_err(&pdev->dev, "probe failed\n"); + d40_err(dev, "probe failed\n"); return ret; } From patchwork Thu Apr 27 12:09:59 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Linus Walleij X-Patchwork-Id: 88229 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a59:b0ea:0:b0:3b6:4342:cba0 with SMTP id b10csp219933vqo; Thu, 27 Apr 2023 05:11:49 -0700 (PDT) X-Google-Smtp-Source: ACHHUZ7v8iW3HfqyXQxKtTvSVbOtFwp7pV+iVGPxyqo6aub7gaYFC+I38faSV6B2x5LSnzxZXMCd X-Received: by 2002:a17:902:ce81:b0:1a6:b971:faf6 with SMTP id f1-20020a170902ce8100b001a6b971faf6mr1504647plg.35.1682597508675; Thu, 27 Apr 2023 05:11:48 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1682597508; cv=none; d=google.com; s=arc-20160816; b=Zh0/D+bhUJF2Jkgi6yh1NHQLNo/V6EeF/WxmeCGPxc25rU/dU+ryy90e2Ug2+fZiA/ uWoaIEGbZACrLHJc6zFrWaOckQ7M3nJKbf/VsUzpxHfdjcXz9jECJOoWOoRmwlTtC46s 3kShM1bkSKtrLhOroJDgMDPDnMDlUfdIGurgeCgYCJLjXbuU6/WsMTm4VdXfMSbWxoDJ NPY7ADmEUTu/AU7eYEgdD9WacE2vrx/k/oGowj34Pc/SHpFcMsLrMZlGKDFmcJb6eTjA 2NKN6PVfOXDd58G5fuSQf0F34Nr6g75WQeKS0tOCYCUXCFVkoG25L4brx1lwEL3Na2fR dxwQ== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:cc:to:in-reply-to:references:message-id :content-transfer-encoding:mime-version:subject:date:from :dkim-signature; bh=16sZ2YhEqcAT3vEUuYnQSOpaLyx08pK+uCVG1ZL4MiQ=; b=SUeS25K1gADowR5ocmaelaXzC66/jwEm08QfQH2X8rcNT+gEgGM+KbQTkiYt7BIpDk f5198o8g5AdsERW86HK2QzKCySEtyhR/52V3Y9hAcNp7QwYzdBiNwftNrnsDriEyHsmq d21WoFJRh/s8yiFC4m7StoMKfLWYra3sFyzvCrYF6VW+ix/2EGoD8G9EBAz8w9Pi2Uun o4g0OWX6ikHWUOWhf1K2WQAdGjxNbJuL0C3/nIYLrlB6Xv0A6hKJeofq0ekgo2EzTioG 1piZUHgfg5+52Gu3mdSw/32sAXzlgSMUnTHlgt1B6E2T8V/jKekW2YdvJrO6OvVpXZLR jk6g== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=vz4AHlEp; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: from out1.vger.email (out1.vger.email. [2620:137:e000::1:20]) by mx.google.com with ESMTP id ik25-20020a170902ab1900b001a682651e99si18869803plb.99.2023.04.27.05.11.33; Thu, 27 Apr 2023 05:11:48 -0700 (PDT) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) client-ip=2620:137:e000::1:20; Authentication-Results: mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=vz4AHlEp; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S243657AbjD0MKR (ORCPT + 99 others); Thu, 27 Apr 2023 08:10:17 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:54776 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S243768AbjD0MKH (ORCPT ); Thu, 27 Apr 2023 08:10:07 -0400 Received: from mail-lj1-x232.google.com (mail-lj1-x232.google.com [IPv6:2a00:1450:4864:20::232]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id E17594C24 for ; Thu, 27 Apr 2023 05:10:04 -0700 (PDT) Received: by mail-lj1-x232.google.com with SMTP id 38308e7fff4ca-2a8b3ecf59fso84226151fa.0 for ; Thu, 27 Apr 2023 05:10:04 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; t=1682597403; x=1685189403; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:from:to:cc:subject:date:message-id :reply-to; bh=16sZ2YhEqcAT3vEUuYnQSOpaLyx08pK+uCVG1ZL4MiQ=; b=vz4AHlEp+QE62eG7yxVJKxoQ73/JvVqDz/IXtIbajgj8wiHd72Tr2WBKK5AptGPVqm FSVSijVwvZnrIFX3HS+d4MRjqpKaQF6oo1ubnD2G+5rqUZS7gEi/9swWCJo2pUf7dW1v NWiHG9/k0visOcEE0ZUaHmEmL1c6+y1zorWWCpJpJGotzEh7xnbM0RatFoFQkDZOu8m1 0pHP5dxP8BHN3anOheXz8bWrdGMMOFMd1Z/MMFK1ESWG8OQDu459YRFYL1LBI3dcMzWq nB7TJNBxzBIGlS/e7obrPDYqJcYpPhNq7vcH6Rcc9b7PZ7lySXs/CLCdk084XV93KDhl KVlg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20221208; t=1682597403; x=1685189403; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=16sZ2YhEqcAT3vEUuYnQSOpaLyx08pK+uCVG1ZL4MiQ=; b=PXODMYjcOdGcKxvCtaeBGfJMQbCimdput9Ie4IDiNWJlgPBdqVz5CN5OUO0sF4jPbe rqznOPDzXnOIoUUadFx8ISMjDhdAgsfr+s2YbXaeKVKKAGckuFNbMb4d/6y2zCPwoPU2 cfbJGtOLNlAr9SzQcCEfKGBPxA6VRuI1pqWhKIe+LIdZdh9F+ZupG0ZIZBjwGAOFhF1X pgnGHS03jk4Pk35B/BZAXweufJsER6Bp7SPQ7bW4DHPTnZke93RCjVk5d648H6wLMijp urwPpjfoY2AjEBIh+n+yHlPo2SGeab2h609GUKBa0hHazXgfGkiRzP7ccFV+e6eHp3NL qpTg== X-Gm-Message-State: AC+VfDwmKPep982pSe2jwwkamuxjn5jfMl5j5VewDCmL7vyjmhpIdVRI TyjcUaeIioLHbMo3NRerXk0JNQ== X-Received: by 2002:a05:6512:3743:b0:4eb:341c:ecc5 with SMTP id a3-20020a056512374300b004eb341cecc5mr557696lfs.12.1682597403118; Thu, 27 Apr 2023 05:10:03 -0700 (PDT) Received: from [192.168.1.2] (c-05d8225c.014-348-6c756e10.bbcust.telenor.se. [92.34.216.5]) by smtp.gmail.com with ESMTPSA id e7-20020ac25467000000b004d4d7fb0e07sm2892044lfn.216.2023.04.27.05.10.02 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 27 Apr 2023 05:10:02 -0700 (PDT) From: Linus Walleij Date: Thu, 27 Apr 2023 14:09:59 +0200 Subject: [PATCH v2 4/8] dmaengine: ste_dma40: Remove platform data MIME-Version: 1.0 Message-Id: <20230417-ux500-dma40-cleanup-v2-4-cdaa68a4b863@linaro.org> References: <20230417-ux500-dma40-cleanup-v2-0-cdaa68a4b863@linaro.org> In-Reply-To: <20230417-ux500-dma40-cleanup-v2-0-cdaa68a4b863@linaro.org> To: Vinod Koul , Rob Herring , Krzysztof Kozlowski Cc: dmaengine@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, Linus Walleij X-Mailer: b4 0.12.2 X-Spam-Status: No, score=-2.1 required=5.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,RCVD_IN_DNSWL_NONE, SPF_HELO_NONE,SPF_PASS,T_SCC_BODY_TEXT_LINE autolearn=unavailable autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-getmail-retrieved-from-mailbox: =?utf-8?q?INBOX?= X-GMAIL-THRID: =?utf-8?q?1764331365200768202?= X-GMAIL-MSGID: =?utf-8?q?1764331365200768202?= The Ux500 is device tree-only since ages. Delete the platform data header and push it into or next to the driver instead. Drop the non-DT probe path since this will not happen. Signed-off-by: Linus Walleij --- drivers/dma/ste_dma40.c | 56 ++++++++---- .../dma-ste-dma40.h => drivers/dma/ste_dma40.h | 101 +-------------------- drivers/dma/ste_dma40_ll.c | 3 +- 3 files changed, 41 insertions(+), 119 deletions(-) diff --git a/drivers/dma/ste_dma40.c b/drivers/dma/ste_dma40.c index ef2a2fdaa82e..e5df28cdc4c8 100644 --- a/drivers/dma/ste_dma40.c +++ b/drivers/dma/ste_dma40.c @@ -23,11 +23,39 @@ #include #include #include -#include #include "dmaengine.h" +#include "ste_dma40.h" #include "ste_dma40_ll.h" +/** + * struct stedma40_platform_data - Configuration struct for the dma device. + * + * @dev_tx: mapping between destination event line and io address + * @dev_rx: mapping between source event line and io address + * @disabled_channels: A vector, ending with -1, that marks physical channels + * that are for different reasons not available for the driver. + * @soft_lli_chans: A vector, that marks physical channels will use LLI by SW + * which avoids HW bug that exists in some versions of the controller. + * SoftLLI introduces relink overhead that could impact performace for + * certain use cases. + * @num_of_soft_lli_chans: The number of channels that needs to be configured + * to use SoftLLI. + * @use_esram_lcla: flag for mapping the lcla into esram region + * @num_of_memcpy_chans: The number of channels reserved for memcpy. + * @num_of_phy_chans: The number of physical channels implemented in HW. + * 0 means reading the number of channels from DMA HW but this is only valid + * for 'multiple of 4' channels, like 8. + */ +struct stedma40_platform_data { + int disabled_channels[STEDMA40_MAX_PHYS]; + int *soft_lli_chans; + int num_of_soft_lli_chans; + bool use_esram_lcla; + int num_of_memcpy_chans; + int num_of_phy_chans; +}; + #define D40_NAME "dma40" #define D40_PHY_CHAN -1 @@ -2269,7 +2297,7 @@ d40_prep_sg(struct dma_chan *dchan, struct scatterlist *sg_src, return NULL; } -bool stedma40_filter(struct dma_chan *chan, void *data) +static bool stedma40_filter(struct dma_chan *chan, void *data) { struct stedma40_chan_cfg *info = data; struct d40_chan *d40c = @@ -2288,7 +2316,6 @@ bool stedma40_filter(struct dma_chan *chan, void *data) return err == 0; } -EXPORT_SYMBOL(stedma40_filter); static void __d40_set_prio_rt(struct d40_chan *d40c, int dev_type, bool src) { @@ -3517,16 +3544,9 @@ static int __init d40_probe(struct platform_device *pdev) int num_reserved_chans; u32 val; - if (!plat_data) { - if (np) { - if (d40_of_probe(pdev, np)) { - ret = -ENOMEM; - goto report_failure; - } - } else { - d40_err(dev, "No pdata or Device Tree provided\n"); - goto report_failure; - } + if (d40_of_probe(pdev, np)) { + ret = -ENOMEM; + goto report_failure; } base = d40_hw_detect_init(pdev); @@ -3650,11 +3670,11 @@ static int __init d40_probe(struct platform_device *pdev) d40_hw_init(base); - if (np) { - ret = of_dma_controller_register(np, d40_xlate, NULL); - if (ret) - dev_err(dev, - "could not register of_dma_controller\n"); + ret = of_dma_controller_register(np, d40_xlate, NULL); + if (ret) { + dev_err(dev, + "could not register of_dma_controller\n"); + goto destroy_cache; } dev_info(base->dev, "initialized\n"); diff --git a/include/linux/platform_data/dma-ste-dma40.h b/drivers/dma/ste_dma40.h similarity index 51% rename from include/linux/platform_data/dma-ste-dma40.h rename to drivers/dma/ste_dma40.h index 10641633facc..c697bfe16a01 100644 --- a/include/linux/platform_data/dma-ste-dma40.h +++ b/drivers/dma/ste_dma40.h @@ -1,19 +1,8 @@ /* SPDX-License-Identifier: GPL-2.0-only */ -/* - * Copyright (C) ST-Ericsson SA 2007-2010 - * Author: Per Forlin for ST-Ericsson - * Author: Jonas Aaberg for ST-Ericsson - */ - #ifndef STE_DMA40_H #define STE_DMA40_H -#include -#include -#include -#include - /* * Maxium size for a single dma descriptor * Size is limited to 16 bits. @@ -118,92 +107,4 @@ struct stedma40_chan_cfg { int phy_channel; }; -/** - * struct stedma40_platform_data - Configuration struct for the dma device. - * - * @dev_tx: mapping between destination event line and io address - * @dev_rx: mapping between source event line and io address - * @disabled_channels: A vector, ending with -1, that marks physical channels - * that are for different reasons not available for the driver. - * @soft_lli_chans: A vector, that marks physical channels will use LLI by SW - * which avoids HW bug that exists in some versions of the controller. - * SoftLLI introduces relink overhead that could impact performace for - * certain use cases. - * @num_of_soft_lli_chans: The number of channels that needs to be configured - * to use SoftLLI. - * @use_esram_lcla: flag for mapping the lcla into esram region - * @num_of_memcpy_chans: The number of channels reserved for memcpy. - * @num_of_phy_chans: The number of physical channels implemented in HW. - * 0 means reading the number of channels from DMA HW but this is only valid - * for 'multiple of 4' channels, like 8. - */ -struct stedma40_platform_data { - int disabled_channels[STEDMA40_MAX_PHYS]; - int *soft_lli_chans; - int num_of_soft_lli_chans; - bool use_esram_lcla; - int num_of_memcpy_chans; - int num_of_phy_chans; -}; - -#ifdef CONFIG_STE_DMA40 - -/** - * stedma40_filter() - Provides stedma40_chan_cfg to the - * ste_dma40 dma driver via the dmaengine framework. - * does some checking of what's provided. - * - * Never directly called by client. It used by dmaengine. - * @chan: dmaengine handle. - * @data: Must be of type: struct stedma40_chan_cfg and is - * the configuration of the framework. - * - * - */ - -bool stedma40_filter(struct dma_chan *chan, void *data); - -/** - * stedma40_slave_mem() - Transfers a raw data buffer to or from a slave - * (=device) - * - * @chan: dmaengine handle - * @addr: source or destination physicall address. - * @size: bytes to transfer - * @direction: direction of transfer - * @flags: is actually enum dma_ctrl_flags. See dmaengine.h - */ - -static inline struct -dma_async_tx_descriptor *stedma40_slave_mem(struct dma_chan *chan, - dma_addr_t addr, - unsigned int size, - enum dma_transfer_direction direction, - unsigned long flags) -{ - struct scatterlist sg; - sg_init_table(&sg, 1); - sg.dma_address = addr; - sg.length = size; - - return dmaengine_prep_slave_sg(chan, &sg, 1, direction, flags); -} - -#else -static inline bool stedma40_filter(struct dma_chan *chan, void *data) -{ - return false; -} - -static inline struct -dma_async_tx_descriptor *stedma40_slave_mem(struct dma_chan *chan, - dma_addr_t addr, - unsigned int size, - enum dma_transfer_direction direction, - unsigned long flags) -{ - return NULL; -} -#endif - -#endif +#endif /* STE_DMA40_H */ diff --git a/drivers/dma/ste_dma40_ll.c b/drivers/dma/ste_dma40_ll.c index b5287c661eb7..4c489b126cb2 100644 --- a/drivers/dma/ste_dma40_ll.c +++ b/drivers/dma/ste_dma40_ll.c @@ -6,8 +6,9 @@ */ #include -#include +#include +#include "ste_dma40.h" #include "ste_dma40_ll.h" static u8 d40_width_to_bits(enum dma_slave_buswidth width) From patchwork Thu Apr 27 12:10:00 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Linus Walleij X-Patchwork-Id: 88232 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a59:b0ea:0:b0:3b6:4342:cba0 with SMTP id b10csp224001vqo; Thu, 27 Apr 2023 05:18:03 -0700 (PDT) X-Google-Smtp-Source: ACHHUZ5DVsQN7tL/3kl6Kg3B47bSlVKH+BKM4LjhEZLIbY5/HgzaOpb8+UEcFNuWgwM53Iv5NVTR X-Received: by 2002:a05:6a20:6f03:b0:f5:a437:26f with SMTP id gt3-20020a056a206f0300b000f5a437026fmr1617949pzb.18.1682597883396; Thu, 27 Apr 2023 05:18:03 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1682597883; cv=none; d=google.com; s=arc-20160816; b=UA4Cs+hM8q2mTvx03Ys1X+WaCbz0BZoBFX4Xl5QzcASM1eEvUuuq0zc5O+vVSmrDSh Y4dgPjSBQ2EUCdq1Rlnz3iaiGr/1LhcMzKnzlklvomNT4nizRgCmOpFfjYE4OXNEtdyW 0da0n9aFgv2jousgo4akj2+I/EamwPUSTu+wd3pqMCpJltdpI8Yn/P9ic/kino/HDocf b1a5hEZbS4CMgru5Sl+4SntH6hOAvEWL3qlTegpH6jNzWH8lZ94HOLnjEsezV94kxKq5 dKo4s5iVyBojBu0Lb+WfgtGiZYOmbriwZk4ezDWzLE2XbQPXZgY+Sn/T3j2e0+v+o50Q AOaw== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:cc:to:in-reply-to:references:message-id :content-transfer-encoding:mime-version:subject:date:from :dkim-signature; bh=pNvCCMPMF278Wqr3jAy5GhuoPQm5kPBgkMVcgaYk7hs=; b=b8gf+Te7rrt+jf12wGu86QpzabgpKioLauBIvIee5Hnh75Br4hyQ4mpgBjUbrThsWX lodra1xc5/dv28GwpLobAqbrTdL7j0MiJbUDEGo0O9qdKCpZ+whN4+l9pHNaZ9zv560b OM4AzjauvOi9+jccMVCHUS0gHgkZB+SQ8syvAr+vPSxqIwehNFI0pYNZ6YbAU1NK0nq2 bTMf3pwm2gmE/3ElsJP8WHqA7Dr3DHy7XpiM5BTOU1SUexQABrAhtWeDGR5HyRVtcAbp 8fv6ZVbtNp8zVuQ/27pg98iaLE0/OqNqSR3Mne/c8iqYG4Vg9bONazwaUDhR4IW401v7 eq4A== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=kzyVHrQB; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: from out1.vger.email (out1.vger.email. [2620:137:e000::1:20]) by mx.google.com with ESMTP id w5-20020a63fb45000000b0051453dfd139si18595682pgj.613.2023.04.27.05.17.50; Thu, 27 Apr 2023 05:18:03 -0700 (PDT) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) client-ip=2620:137:e000::1:20; Authentication-Results: mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=kzyVHrQB; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S243821AbjD0MKU (ORCPT + 99 others); Thu, 27 Apr 2023 08:10:20 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:54778 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S243754AbjD0MKH (ORCPT ); Thu, 27 Apr 2023 08:10:07 -0400 Received: from mail-lf1-x12e.google.com (mail-lf1-x12e.google.com [IPv6:2a00:1450:4864:20::12e]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id CEC32524F for ; Thu, 27 Apr 2023 05:10:05 -0700 (PDT) Received: by mail-lf1-x12e.google.com with SMTP id 2adb3069b0e04-4f004943558so2404685e87.3 for ; Thu, 27 Apr 2023 05:10:05 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; t=1682597404; x=1685189404; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:from:to:cc:subject:date:message-id :reply-to; bh=pNvCCMPMF278Wqr3jAy5GhuoPQm5kPBgkMVcgaYk7hs=; b=kzyVHrQBPyLbh7Z7H9tNdb7DTY2g7oozYbJpteZq3a4GM52Ed4wUr0jSg76ineFNmB 8Fd3VSBeUZoQbr4P25HBYfhnF8E24xT7KYf+OCFoXfO3hgdXAktHyrLzP290wxZLmxIL tCdiCoA5hdLspOIEMV/a9m+iKX/2Dww3tsGq7X5ZDH0PO7aql7YKmuwuBrVklRER6xO/ NjDtuX2NNZwTNy1sQ5rqxB4uaf5zoI6Z7f1PDf7R/sHfqzFy5u+Cdw3WFhEn3XiZmVCG CCJ1e1uIA3BVYj8cTRWJEmaPpTNyb9nvTM5lBG9cpQ4shI1iR9DiTSDUUDG38d/EE9Yo x2IQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20221208; t=1682597404; x=1685189404; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=pNvCCMPMF278Wqr3jAy5GhuoPQm5kPBgkMVcgaYk7hs=; b=VtjOlg19s64rgtHVho4wmx+yx9shmhrWlq2nyOJY87ibGP2kQYsjoKN0tXJ+bZeQxB kKQDvjf6iKa1KQ3VLE4pVROv+kO3ngHwxcmGDDiAFF95fsZygZqp/Go+CpusGaAHORlg ikzb3RvwtCZee1pr9MhwwflEJA3hjf8QHhsEVd3brTUVrHF132uEAUjuop3FBCYaBH0O 1tLKalk9LtYTPWupchnm99ld2zQ49V7KuDCRz+PA/ktCfP4zz90zZCBu1guzqmWbDJf7 j86enqXAAog4l0CVHOiLJ9e0d9ZpYVQpUu66kNdlVUjTcyou9u2nd5C92V2g9SBLBX71 T3AA== X-Gm-Message-State: AC+VfDxG9dNc0NkIcZpCLTzhRJKfj2bxtd0QxdQw15efVquZuVV9GqiS f/r0gEmdVl8j4RjhL0NCy2nJSQ== X-Received: by 2002:ac2:48b3:0:b0:4ef:f630:5c1e with SMTP id u19-20020ac248b3000000b004eff6305c1emr491617lfg.51.1682597404231; Thu, 27 Apr 2023 05:10:04 -0700 (PDT) Received: from [192.168.1.2] (c-05d8225c.014-348-6c756e10.bbcust.telenor.se. [92.34.216.5]) by smtp.gmail.com with ESMTPSA id e7-20020ac25467000000b004d4d7fb0e07sm2892044lfn.216.2023.04.27.05.10.03 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 27 Apr 2023 05:10:03 -0700 (PDT) From: Linus Walleij Date: Thu, 27 Apr 2023 14:10:00 +0200 Subject: [PATCH v2 5/8] dmaengine: ste_dma40: Pass dev to OF function MIME-Version: 1.0 Message-Id: <20230417-ux500-dma40-cleanup-v2-5-cdaa68a4b863@linaro.org> References: <20230417-ux500-dma40-cleanup-v2-0-cdaa68a4b863@linaro.org> In-Reply-To: <20230417-ux500-dma40-cleanup-v2-0-cdaa68a4b863@linaro.org> To: Vinod Koul , Rob Herring , Krzysztof Kozlowski Cc: dmaengine@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, Linus Walleij X-Mailer: b4 0.12.2 X-Spam-Status: No, score=-2.1 required=5.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,RCVD_IN_DNSWL_NONE, SPF_HELO_NONE,SPF_PASS,T_SCC_BODY_TEXT_LINE autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-getmail-retrieved-from-mailbox: =?utf-8?q?INBOX?= X-GMAIL-THRID: =?utf-8?q?1764331757792701503?= X-GMAIL-MSGID: =?utf-8?q?1764331757792701503?= The OF platform data population function only wants to use struct device *dev, so pass that instead. This change makes the compiler realize that the local platform data variable is unused, so drop that too. Signed-off-by: Linus Walleij --- drivers/dma/ste_dma40.c | 13 ++++++------- 1 file changed, 6 insertions(+), 7 deletions(-) diff --git a/drivers/dma/ste_dma40.c b/drivers/dma/ste_dma40.c index e5df28cdc4c8..fe98f12b8130 100644 --- a/drivers/dma/ste_dma40.c +++ b/drivers/dma/ste_dma40.c @@ -3480,14 +3480,14 @@ static int __init d40_lcla_allocate(struct d40_base *base) return ret; } -static int __init d40_of_probe(struct platform_device *pdev, +static int __init d40_of_probe(struct device *dev, struct device_node *np) { struct stedma40_platform_data *pdata; int num_phy = 0, num_memcpy = 0, num_disabled = 0; const __be32 *list; - pdata = devm_kzalloc(&pdev->dev, sizeof(*pdata), GFP_KERNEL); + pdata = devm_kzalloc(dev, sizeof(*pdata), GFP_KERNEL); if (!pdata) return -ENOMEM; @@ -3500,7 +3500,7 @@ static int __init d40_of_probe(struct platform_device *pdev, num_memcpy /= sizeof(*list); if (num_memcpy > D40_MEMCPY_MAX_CHANS || num_memcpy <= 0) { - d40_err(&pdev->dev, + d40_err(dev, "Invalid number of memcpy channels specified (%d)\n", num_memcpy); return -EINVAL; @@ -3515,7 +3515,7 @@ static int __init d40_of_probe(struct platform_device *pdev, num_disabled /= sizeof(*list); if (num_disabled >= STEDMA40_MAX_PHYS || num_disabled < 0) { - d40_err(&pdev->dev, + d40_err(dev, "Invalid number of disabled channels specified (%d)\n", num_disabled); return -EINVAL; @@ -3526,7 +3526,7 @@ static int __init d40_of_probe(struct platform_device *pdev, num_disabled); pdata->disabled_channels[num_disabled] = -1; - pdev->dev.platform_data = pdata; + dev->platform_data = pdata; return 0; } @@ -3534,7 +3534,6 @@ static int __init d40_of_probe(struct platform_device *pdev, static int __init d40_probe(struct platform_device *pdev) { struct device *dev = &pdev->dev; - struct stedma40_platform_data *plat_data = dev_get_platdata(dev); struct device_node *np = pdev->dev.of_node; struct device_node *np_lcpa; int ret = -ENOENT; @@ -3544,7 +3543,7 @@ static int __init d40_probe(struct platform_device *pdev) int num_reserved_chans; u32 val; - if (d40_of_probe(pdev, np)) { + if (d40_of_probe(dev, np)) { ret = -ENOMEM; goto report_failure; } From patchwork Thu Apr 27 12:10:01 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Linus Walleij X-Patchwork-Id: 88244 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a59:b0ea:0:b0:3b6:4342:cba0 with SMTP id b10csp233532vqo; Thu, 27 Apr 2023 05:34:07 -0700 (PDT) X-Google-Smtp-Source: ACHHUZ5oVoMw/iY1WU0dLT69UG33eG5xh7bZngqcGVgvuFl7v6ESwWYMjCRzz8Ci0qiDgvpGCXW/ X-Received: by 2002:a05:6a00:1591:b0:639:a518:3842 with SMTP id u17-20020a056a00159100b00639a5183842mr2527762pfk.7.1682598847022; Thu, 27 Apr 2023 05:34:07 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1682598847; cv=none; d=google.com; s=arc-20160816; b=JNt2R8A+HEkmoUSTJQ9lEjqoopDsN+WVXPXaNXF+T5h5joxtahCH0yUFIbc/Kj75+X OlB3R8SAEPsvt3AG+IBg2MEerXQBvqVxFEjkBpG1w97GYSSVwHFewdmLsCXkGtnTHIgZ TBPCmRa4JI2v7mWPGzbmMR7WTXnrj+N9MNVRi4C1iH/KY8pJ/PnZvjcRAA/4jIvRvcqf 4yMxcbf0PEs+Stb6PchJOozYcdcInTBQNT1PlP2cIF9fqQQVaiNXoF6qZTadkAsyi7TQ +526+trNJEtLiZPczm4X5CXikXxeP5nkk01Sc1Z4a6J8B+A8+gOlMoWzWf15bpjFqdC/ 8MxQ== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:cc:to:in-reply-to:references:message-id :content-transfer-encoding:mime-version:subject:date:from :dkim-signature; bh=vNVAexPIh/sHv/lvxik7B3SVOHh9Va7Le+Py7GRZYJo=; b=K+xGcBu7aThtYm42ifvGtoeXrqY1ucK1Jpho/4l5aUSJAZfuEhAbKEd/DPL33Ouny8 gfTSy0FqQcew7yYqp5DLM9L55sOXsek97r9Mhnx9g3AHWAIddQC2FT79fP4ga/SYvowp 8eL4Lx6fiDjzn1BF88pZx95lFvFLLdKnkG41C/3dsXq94h/wdjuJfvKV1H+mGAemuz5S cm8G/iguX9LHYjOqNLYiUXGidyIvGECNWVtIHT+HhYjNYmD2eG3rsTBk1i0MX8WUFM+3 fBcG/Wi6FwX4zOl4UdZhHsUdChdiWvK11Ixwt0vaKhdJgBSFnQlUAaKOyPMY6X31pUvr CDGA== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=vDE89jr5; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: from out1.vger.email (out1.vger.email. [2620:137:e000::1:20]) by mx.google.com with ESMTP id a28-20020aa78e9c000000b0063d26262efasi19056788pfr.187.2023.04.27.05.33.52; Thu, 27 Apr 2023 05:34:06 -0700 (PDT) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) client-ip=2620:137:e000::1:20; Authentication-Results: mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=vDE89jr5; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S243827AbjD0MKX (ORCPT + 99 others); Thu, 27 Apr 2023 08:10:23 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:55028 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S243790AbjD0MKL (ORCPT ); Thu, 27 Apr 2023 08:10:11 -0400 Received: from mail-lf1-x132.google.com (mail-lf1-x132.google.com [IPv6:2a00:1450:4864:20::132]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 0553F55A2 for ; Thu, 27 Apr 2023 05:10:07 -0700 (PDT) Received: by mail-lf1-x132.google.com with SMTP id 2adb3069b0e04-4f00d41df22so3456900e87.1 for ; Thu, 27 Apr 2023 05:10:06 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; t=1682597405; x=1685189405; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:from:to:cc:subject:date:message-id :reply-to; bh=vNVAexPIh/sHv/lvxik7B3SVOHh9Va7Le+Py7GRZYJo=; b=vDE89jr5SAeieEkm2ahfOYylaMZLCmUqUPyd0upykNRsggCTr7cdb0C2JfhiuGN2cb JaefAw410v2nBgwHzZAziXKeSKZzfGjHWG7fz3pDb6c5TfwXHf/BzF0DVB/B91j61XYL sANizLZ7Pw13rM7TveROmPXpS3lrBgyxDJpKCsRmfVWXwbKaxm/K5RVSO42mIo82GAnc D8t1QCh3FQqhz4IOkAelkuAGf93BWLVw2IzItzpml4x5Kj8SYPt1I7Et1ne/rSiFvhHO Jo7x1jh+HVchIw2901ZGuOiNG4b++v1wWZJCnHUULl6cqqeE/g1fwtTRQP9LwL91zHIc tuWg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20221208; t=1682597405; x=1685189405; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=vNVAexPIh/sHv/lvxik7B3SVOHh9Va7Le+Py7GRZYJo=; b=jvpyG6oL6KGDiq66tG843NcsqBbyn0COojpis5zLSc8RvsLI09fpFpJnGgROpawvra SNYB2brosZXH6cs94GreBiTWxLz4JBZQnBNVHPutOyCemHQ2KDYe1goiQRQw4xh2Ica6 7TMs3YGEXICHCPdinsi3bwrrgYYDEE3EDoTrlQNdFiYnmfms78tyUV6dGbm+QYkughke VYQP41j801Ju1zbNDbqvP7+yp7SzJAKrkkw4c0IFdvZr4ds20Lpi0sM1FxXmgP4agB7t OfSmCPiR0LU8ISVYFGAQizDsOtD3y5DA5GzLqX0Noj+ESXswmIGUrSyOZuy+iPnvY8li qG9g== X-Gm-Message-State: AC+VfDw5u97IWD0yJWBnHJ5qZv4HbIWNhzJJAGm63nY7y9PvklhebeDi LYzZlibkwLufB+4SXUEdeK6Y+A== X-Received: by 2002:a05:6512:230d:b0:4ef:ee59:d28d with SMTP id o13-20020a056512230d00b004efee59d28dmr1395541lfu.7.1682597405194; Thu, 27 Apr 2023 05:10:05 -0700 (PDT) Received: from [192.168.1.2] (c-05d8225c.014-348-6c756e10.bbcust.telenor.se. [92.34.216.5]) by smtp.gmail.com with ESMTPSA id e7-20020ac25467000000b004d4d7fb0e07sm2892044lfn.216.2023.04.27.05.10.04 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 27 Apr 2023 05:10:04 -0700 (PDT) From: Linus Walleij Date: Thu, 27 Apr 2023 14:10:01 +0200 Subject: [PATCH v2 6/8] dmaengine: ste_dma40: Use managed resources MIME-Version: 1.0 Message-Id: <20230417-ux500-dma40-cleanup-v2-6-cdaa68a4b863@linaro.org> References: <20230417-ux500-dma40-cleanup-v2-0-cdaa68a4b863@linaro.org> In-Reply-To: <20230417-ux500-dma40-cleanup-v2-0-cdaa68a4b863@linaro.org> To: Vinod Koul , Rob Herring , Krzysztof Kozlowski Cc: dmaengine@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, Linus Walleij X-Mailer: b4 0.12.2 X-Spam-Status: No, score=-2.1 required=5.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,RCVD_IN_DNSWL_NONE, SPF_HELO_NONE,SPF_PASS,T_SCC_BODY_TEXT_LINE autolearn=unavailable autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-getmail-retrieved-from-mailbox: =?utf-8?q?INBOX?= X-GMAIL-THRID: =?utf-8?q?1764332769069103368?= X-GMAIL-MSGID: =?utf-8?q?1764332769069103368?= This switches the DMA40 driver to use a bunch of managed resources and strip down the errorpath. The result is pretty neat and makes the driver way more readable. Signed-off-by: Linus Walleij --- drivers/dma/ste_dma40.c | 180 ++++++++++++++++-------------------------------- 1 file changed, 61 insertions(+), 119 deletions(-) diff --git a/drivers/dma/ste_dma40.c b/drivers/dma/ste_dma40.c index fe98f12b8130..c5991009d3e4 100644 --- a/drivers/dma/ste_dma40.c +++ b/drivers/dma/ste_dma40.c @@ -554,8 +554,6 @@ struct d40_gen_dmac { * @virtbase: The virtual base address of the DMA's register. * @rev: silicon revision detected. * @clk: Pointer to the DMA clock structure. - * @phy_start: Physical memory start of the DMA registers. - * @phy_size: Size of the DMA register map. * @irq: The IRQ number. * @num_memcpy_chans: The number of channels used for memcpy (mem-to-mem * transfers). @@ -599,8 +597,6 @@ struct d40_base { void __iomem *virtbase; u8 rev:4; struct clk *clk; - phys_addr_t phy_start; - resource_size_t phy_size; int irq; int num_memcpy_chans; int num_phy_chans; @@ -3128,65 +3124,58 @@ static int __init d40_phy_res_init(struct d40_base *base) return num_phy_chans_avail; } +/* Called from the registered devm action */ +static void d40_drop_kmem_cache_action(void *d) +{ + struct kmem_cache *desc_slab = d; + + kmem_cache_destroy(desc_slab); +} + static struct d40_base * __init d40_hw_detect_init(struct platform_device *pdev) { struct stedma40_platform_data *plat_data = dev_get_platdata(&pdev->dev); struct device *dev = &pdev->dev; struct clk *clk; void __iomem *virtbase; - struct resource *res; struct d40_base *base; int num_log_chans; int num_phy_chans; int num_memcpy_chans; - int clk_ret = -EINVAL; int i; u32 pid; u32 cid; u8 rev; + int ret; - clk = clk_get(dev, NULL); - if (IS_ERR(clk)) { - d40_err(dev, "No matching clock found\n"); - goto check_prepare_enabled; - } - - clk_ret = clk_prepare_enable(clk); - if (clk_ret) { - d40_err(dev, "Failed to prepare/enable clock\n"); - goto disable_unprepare; - } + clk = devm_clk_get_enabled(dev, NULL); + if (IS_ERR(clk)) + return NULL; /* Get IO for DMAC base address */ - res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "base"); - if (!res) - goto disable_unprepare; - - if (request_mem_region(res->start, resource_size(res), - D40_NAME " I/O base") == NULL) - goto release_region; - - virtbase = ioremap(res->start, resource_size(res)); - if (!virtbase) - goto release_region; + virtbase = devm_platform_ioremap_resource_byname(pdev, "base"); + if (IS_ERR(virtbase)) { + dev_err(dev, "No IO base defined\n"); + return NULL; + } /* This is just a regular AMBA PrimeCell ID actually */ for (pid = 0, i = 0; i < 4; i++) - pid |= (readl(virtbase + resource_size(res) - 0x20 + 4 * i) + pid |= (readl(virtbase + SZ_4K - 0x20 + 4 * i) & 255) << (i * 8); for (cid = 0, i = 0; i < 4; i++) - cid |= (readl(virtbase + resource_size(res) - 0x10 + 4 * i) + cid |= (readl(virtbase + SZ_4K - 0x10 + 4 * i) & 255) << (i * 8); if (cid != AMBA_CID) { d40_err(dev, "Unknown hardware! No PrimeCell ID\n"); - goto unmap_io; + return NULL; } if (AMBA_MANF_BITS(pid) != AMBA_VENDOR_ST) { d40_err(dev, "Unknown designer! Got %x wanted %x\n", AMBA_MANF_BITS(pid), AMBA_VENDOR_ST); - goto unmap_io; + return NULL; } /* * HW revision: @@ -3200,7 +3189,7 @@ static struct d40_base * __init d40_hw_detect_init(struct platform_device *pdev) rev = AMBA_REV_BITS(pid); if (rev < 2) { d40_err(dev, "hardware revision: %d is not supported", rev); - goto unmap_io; + return NULL; } /* The number of physical channels on this HW */ @@ -3218,23 +3207,22 @@ static struct d40_base * __init d40_hw_detect_init(struct platform_device *pdev) num_log_chans = num_phy_chans * D40_MAX_LOG_CHAN_PER_PHY; dev_info(dev, - "hardware rev: %d @ %pa with %d physical and %d logical channels\n", - rev, &res->start, num_phy_chans, num_log_chans); + "hardware rev: %d with %d physical and %d logical channels\n", + rev, num_phy_chans, num_log_chans); - base = kzalloc(ALIGN(sizeof(struct d40_base), 4) + - (num_phy_chans + num_log_chans + num_memcpy_chans) * - sizeof(struct d40_chan), GFP_KERNEL); + base = devm_kzalloc(dev, + ALIGN(sizeof(struct d40_base), 4) + + (num_phy_chans + num_log_chans + num_memcpy_chans) * + sizeof(struct d40_chan), GFP_KERNEL); - if (base == NULL) - goto unmap_io; + if (!base) + return NULL; base->rev = rev; base->clk = clk; base->num_memcpy_chans = num_memcpy_chans; base->num_phy_chans = num_phy_chans; base->num_log_chans = num_log_chans; - base->phy_start = res->start; - base->phy_size = resource_size(res); base->virtbase = virtbase; base->plat_data = plat_data; base->dev = dev; @@ -3271,76 +3259,55 @@ static struct d40_base * __init d40_hw_detect_init(struct platform_device *pdev) base->gen_dmac.init_reg_size = ARRAY_SIZE(dma_init_reg_v4a); } - base->phy_res = kcalloc(num_phy_chans, - sizeof(*base->phy_res), - GFP_KERNEL); + base->phy_res = devm_kcalloc(dev, num_phy_chans, + sizeof(*base->phy_res), + GFP_KERNEL); if (!base->phy_res) - goto free_base; + return NULL; - base->lookup_phy_chans = kcalloc(num_phy_chans, - sizeof(*base->lookup_phy_chans), - GFP_KERNEL); + base->lookup_phy_chans = devm_kcalloc(dev, num_phy_chans, + sizeof(*base->lookup_phy_chans), + GFP_KERNEL); if (!base->lookup_phy_chans) - goto free_phy_res; + return NULL; - base->lookup_log_chans = kcalloc(num_log_chans, - sizeof(*base->lookup_log_chans), - GFP_KERNEL); + base->lookup_log_chans = devm_kcalloc(dev, num_log_chans, + sizeof(*base->lookup_log_chans), + GFP_KERNEL); if (!base->lookup_log_chans) - goto free_phy_chans; + return NULL; - base->reg_val_backup_chan = kmalloc_array(base->num_phy_chans, + base->reg_val_backup_chan = devm_kmalloc_array(dev, base->num_phy_chans, sizeof(d40_backup_regs_chan), GFP_KERNEL); if (!base->reg_val_backup_chan) - goto free_log_chans; + return NULL; - base->lcla_pool.alloc_map = kcalloc(num_phy_chans + base->lcla_pool.alloc_map = devm_kcalloc(dev, num_phy_chans * D40_LCLA_LINK_PER_EVENT_GRP, sizeof(*base->lcla_pool.alloc_map), GFP_KERNEL); if (!base->lcla_pool.alloc_map) - goto free_backup_chan; + return NULL; - base->regs_interrupt = kmalloc_array(base->gen_dmac.il_size, + base->regs_interrupt = devm_kmalloc_array(dev, base->gen_dmac.il_size, sizeof(*base->regs_interrupt), GFP_KERNEL); if (!base->regs_interrupt) - goto free_map; + return NULL; base->desc_slab = kmem_cache_create(D40_NAME, sizeof(struct d40_desc), 0, SLAB_HWCACHE_ALIGN, NULL); - if (base->desc_slab == NULL) - goto free_regs; + if (!base->desc_slab) + return NULL; + ret = devm_add_action_or_reset(dev, d40_drop_kmem_cache_action, + base->desc_slab); + if (ret) + return NULL; return base; - free_regs: - kfree(base->regs_interrupt); - free_map: - kfree(base->lcla_pool.alloc_map); - free_backup_chan: - kfree(base->reg_val_backup_chan); - free_log_chans: - kfree(base->lookup_log_chans); - free_phy_chans: - kfree(base->lookup_phy_chans); - free_phy_res: - kfree(base->phy_res); - free_base: - kfree(base); - unmap_io: - iounmap(virtbase); - release_region: - release_mem_region(res->start, resource_size(res)); - check_prepare_enabled: - if (!clk_ret) - disable_unprepare: - clk_disable_unprepare(clk); - if (!IS_ERR(clk)) - clk_put(clk); - return NULL; } static void __init d40_hw_init(struct d40_base *base) @@ -3585,11 +3552,11 @@ static int __init d40_probe(struct platform_device *pdev) } else writel(base->phy_lcpa, base->virtbase + D40_DREG_LCPA); - base->lcpa_base = ioremap(base->phy_lcpa, base->lcpa_size); + base->lcpa_base = devm_ioremap(dev, base->phy_lcpa, base->lcpa_size); if (!base->lcpa_base) { ret = -ENOMEM; d40_err(dev, "Failed to ioremap LCPA region\n"); - goto release_base; + goto report_failure; } /* If lcla has to be located in ESRAM we don't need to allocate */ if (base->plat_data->use_esram_lcla) { @@ -3599,14 +3566,14 @@ static int __init d40_probe(struct platform_device *pdev) ret = -ENOENT; d40_err(dev, "No \"lcla_esram\" memory resource\n"); - goto destroy_cache; + goto report_failure; } - base->lcla_pool.base = ioremap(res->start, - resource_size(res)); + base->lcla_pool.base = devm_ioremap(dev, res->start, + resource_size(res)); if (!base->lcla_pool.base) { ret = -ENOMEM; d40_err(dev, "Failed to ioremap LCLA region\n"); - goto destroy_cache; + goto report_failure; } writel(res->start, base->virtbase + D40_DREG_LCLA); @@ -3678,16 +3645,8 @@ static int __init d40_probe(struct platform_device *pdev) dev_info(base->dev, "initialized\n"); return 0; - destroy_cache: - kmem_cache_destroy(base->desc_slab); - if (base->virtbase) - iounmap(base->virtbase); - - if (base->lcla_pool.base && base->plat_data->use_esram_lcla) { - iounmap(base->lcla_pool.base); - base->lcla_pool.base = NULL; - } + destroy_cache: if (base->lcla_pool.dma_addr) dma_unmap_single(base->dev, base->lcla_pool.dma_addr, SZ_1K * base->num_phy_chans, @@ -3699,28 +3658,11 @@ static int __init d40_probe(struct platform_device *pdev) kfree(base->lcla_pool.base_unaligned); - if (base->lcpa_base) - iounmap(base->lcpa_base); - -release_base: - if (base->phy_start) - release_mem_region(base->phy_start, - base->phy_size); - if (base->clk) { - clk_disable_unprepare(base->clk); - clk_put(base->clk); - } - if (base->lcpa_regulator) { regulator_disable(base->lcpa_regulator); regulator_put(base->lcpa_regulator); } - kfree(base->lcla_pool.alloc_map); - kfree(base->lookup_log_chans); - kfree(base->lookup_phy_chans); - kfree(base->phy_res); - kfree(base); report_failure: d40_err(dev, "probe failed\n"); return ret; From patchwork Thu Apr 27 12:10:02 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Linus Walleij X-Patchwork-Id: 88231 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a59:b0ea:0:b0:3b6:4342:cba0 with SMTP id b10csp223801vqo; Thu, 27 Apr 2023 05:17:48 -0700 (PDT) X-Google-Smtp-Source: ACHHUZ54OQ7oRn4wus4Nwd6bpMY1O5F8/rFNfTXgxeGR9vfL7LaJdvSGWUGlqnnBrUUEhBJdOc6H X-Received: by 2002:a05:6a20:3d84:b0:f5:3f3e:b716 with SMTP id s4-20020a056a203d8400b000f53f3eb716mr1794288pzi.28.1682597868254; Thu, 27 Apr 2023 05:17:48 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1682597868; cv=none; d=google.com; s=arc-20160816; b=l62FYqA1ewGU7eJ4vpEbq/EX7+axfZ7/AKMcTqNTn7NxiDzfhSSHUzx1BM6GEp6OVA PCf3xCH4fk/elCDmIdu3JLMtRSutR1ddxvmp+kxRS5nJ32Z6so4kVxjFbGhFAonOg782 hZc155x5CMMDUdfe5Xb28YeA8LhhnoN3z1ayf2Xo1QO+d1P2aspnJrDzGR7NpCvBZCZW qKhbAHm+y5wz+LhbJUJynHS0IDAlN50/esXmp8j48YwkrV7TvSFc3BpayoRPX4+NLuHe RVHAdHOOQjrQKqNFU1Ww5B+ByBMDaD4PgpBhqBdGMRiEEpCslhJOgErpYHUjkTK4qyC8 EuHA== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:cc:to:in-reply-to:references:message-id :content-transfer-encoding:mime-version:subject:date:from :dkim-signature; bh=iexne6KWiUZLuVlw3N1v+wyJfKESkTIo0maZTpTI9HE=; b=mufkWSiHdu9AKrx7+XmaX+K8uXAI+B35b5xlupe4NeNWP0Qb2vbDgBX0eELdiqkO4v VP94wbNFNki/oqzIwIFYj9cw565ket3/2hvZEDgVHr5Grg82VfAiSSmcbda8SoCcRwJV B+5wbETqBJY/rc8AkzrIwTUWGpqNezljFiqnMdbsGqzG3QweXiNiBylUXa2wBnClD/cr LfoNO2SP2Y90JZKr9KfqL1BucroYTgaaqyODsHvMDBeV3ZvzQuadYKiKTZUeC7fltxG5 fBNfi7ergMXqm0GLiGdxbQasSPzE/YBq5/sxrgRByApGUcx3M4SiwxnLs8eritNM7Xpk KvNg== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=Xaqgjtwd; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: from out1.vger.email (out1.vger.email. [2620:137:e000::1:20]) by mx.google.com with ESMTP id t184-20020a6381c1000000b0050bf5a43800si2018528pgd.242.2023.04.27.05.17.31; Thu, 27 Apr 2023 05:17:48 -0700 (PDT) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) client-ip=2620:137:e000::1:20; Authentication-Results: mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=Xaqgjtwd; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S243836AbjD0MK1 (ORCPT + 99 others); Thu, 27 Apr 2023 08:10:27 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:55030 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S243791AbjD0MKL (ORCPT ); Thu, 27 Apr 2023 08:10:11 -0400 Received: from mail-lf1-x133.google.com (mail-lf1-x133.google.com [IPv6:2a00:1450:4864:20::133]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 0D8E04C18 for ; Thu, 27 Apr 2023 05:10:08 -0700 (PDT) Received: by mail-lf1-x133.google.com with SMTP id 2adb3069b0e04-4efec123b28so6464076e87.1 for ; Thu, 27 Apr 2023 05:10:07 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; t=1682597406; x=1685189406; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:from:to:cc:subject:date:message-id :reply-to; bh=iexne6KWiUZLuVlw3N1v+wyJfKESkTIo0maZTpTI9HE=; b=XaqgjtwdVcU9AORsU7T2pzMxrCU/fNdtM41WtrStcjjTPpM0aNsN6ppeQoIqFt+2Gw 2SK67wMAlpVUnZsUXL1dtd1AhBD8LRxoxNEO57x0yU3n2VIZJ1A+IP6kfuSNGYPQ1LJO U3WbHmJpomEX22tZDK4qNz6IGNU3FfHUaL0Br8mMPNYBkrUVZHt+08Qfb3eoAfGi9urB 0SI5cVXbSpulLmYfpXyQO3+X0pcwg9gtHtWZkuekXYSh91Kuzfgh2Hf8QKKPdMdRovwc 5cxXb+x76KIFoL80aiLc6wETFBSX7+zsH5GWUfa9WJ2CIaRMCfDlCQgOI05CnAFqsg5q p3pw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20221208; t=1682597406; x=1685189406; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=iexne6KWiUZLuVlw3N1v+wyJfKESkTIo0maZTpTI9HE=; b=fcCObJiDKjiAqHKE4h+EmIESaowR7o0hbVm8a/qqr1AgNaoU3vkrTt+FjQF/hhHlC9 f5iyH8mlo0WQ4zE+PpWgGDdIVKYDj3Yae2WMq3N+54bFdmH6p27MQvEDkH+PgYjW4Vmy ujWxH+nswwvILg1C0Pim9wHIjzDYc73AN7fdEg0c8iZ5TJD00ilBDZlREf0X6vTRUDH8 qgFwbOT+A9xnE8x2rRyVV7kbFYIzMSI1d6DQnKIRMpH6xUuk2sjOkHXJAYAH/yDHxSlT zooZ09byl8F3ThFMbCQ18fC1VbD6uv0ViF+FFZK8K+Th/O09KvSpWkYTdFSc/tvU0Q60 L7Sg== X-Gm-Message-State: AC+VfDylB/wxMLVu/4V35qv5TZlng7oRQ7o43e54ZVxWgA+XhcCfaa3A 9YRGRHRF04yomCZGedG37sjIqw== X-Received: by 2002:a19:f70c:0:b0:4ef:e7cb:b0ef with SMTP id z12-20020a19f70c000000b004efe7cbb0efmr541074lfe.31.1682597406393; Thu, 27 Apr 2023 05:10:06 -0700 (PDT) Received: from [192.168.1.2] (c-05d8225c.014-348-6c756e10.bbcust.telenor.se. [92.34.216.5]) by smtp.gmail.com with ESMTPSA id e7-20020ac25467000000b004d4d7fb0e07sm2892044lfn.216.2023.04.27.05.10.05 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 27 Apr 2023 05:10:05 -0700 (PDT) From: Linus Walleij Date: Thu, 27 Apr 2023 14:10:02 +0200 Subject: [PATCH v2 7/8] dmaengine: ste_dma40: Return error codes properly MIME-Version: 1.0 Message-Id: <20230417-ux500-dma40-cleanup-v2-7-cdaa68a4b863@linaro.org> References: <20230417-ux500-dma40-cleanup-v2-0-cdaa68a4b863@linaro.org> In-Reply-To: <20230417-ux500-dma40-cleanup-v2-0-cdaa68a4b863@linaro.org> To: Vinod Koul , Rob Herring , Krzysztof Kozlowski Cc: dmaengine@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, Linus Walleij X-Mailer: b4 0.12.2 X-Spam-Status: No, score=-2.1 required=5.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,RCVD_IN_DNSWL_NONE, SPF_HELO_NONE,SPF_PASS,T_SCC_BODY_TEXT_LINE autolearn=unavailable autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-getmail-retrieved-from-mailbox: =?utf-8?q?INBOX?= X-GMAIL-THRID: =?utf-8?q?1764331742292786383?= X-GMAIL-MSGID: =?utf-8?q?1764331742292786383?= This makes the probe() and its subfunction d40_hw_detect_init() return proper error codes. One effect of this is that deferred probe, e.g from the clock, will start to work, would it happen. Also it is better design. Signed-off-by: Linus Walleij --- drivers/dma/ste_dma40.c | 46 ++++++++++++++++++++++++---------------------- 1 file changed, 24 insertions(+), 22 deletions(-) diff --git a/drivers/dma/ste_dma40.c b/drivers/dma/ste_dma40.c index c5991009d3e4..2911017265cf 100644 --- a/drivers/dma/ste_dma40.c +++ b/drivers/dma/ste_dma40.c @@ -3132,7 +3132,8 @@ static void d40_drop_kmem_cache_action(void *d) kmem_cache_destroy(desc_slab); } -static struct d40_base * __init d40_hw_detect_init(struct platform_device *pdev) +static int __init d40_hw_detect_init(struct platform_device *pdev, + struct d40_base **retbase) { struct stedma40_platform_data *plat_data = dev_get_platdata(&pdev->dev); struct device *dev = &pdev->dev; @@ -3150,14 +3151,12 @@ static struct d40_base * __init d40_hw_detect_init(struct platform_device *pdev) clk = devm_clk_get_enabled(dev, NULL); if (IS_ERR(clk)) - return NULL; + return PTR_ERR(clk); /* Get IO for DMAC base address */ virtbase = devm_platform_ioremap_resource_byname(pdev, "base"); - if (IS_ERR(virtbase)) { - dev_err(dev, "No IO base defined\n"); - return NULL; - } + if (IS_ERR(virtbase)) + return PTR_ERR(virtbase); /* This is just a regular AMBA PrimeCell ID actually */ for (pid = 0, i = 0; i < 4; i++) @@ -3169,13 +3168,13 @@ static struct d40_base * __init d40_hw_detect_init(struct platform_device *pdev) if (cid != AMBA_CID) { d40_err(dev, "Unknown hardware! No PrimeCell ID\n"); - return NULL; + return -EINVAL; } if (AMBA_MANF_BITS(pid) != AMBA_VENDOR_ST) { d40_err(dev, "Unknown designer! Got %x wanted %x\n", AMBA_MANF_BITS(pid), AMBA_VENDOR_ST); - return NULL; + return -EINVAL; } /* * HW revision: @@ -3189,7 +3188,7 @@ static struct d40_base * __init d40_hw_detect_init(struct platform_device *pdev) rev = AMBA_REV_BITS(pid); if (rev < 2) { d40_err(dev, "hardware revision: %d is not supported", rev); - return NULL; + return -EINVAL; } /* The number of physical channels on this HW */ @@ -3216,7 +3215,7 @@ static struct d40_base * __init d40_hw_detect_init(struct platform_device *pdev) sizeof(struct d40_chan), GFP_KERNEL); if (!base) - return NULL; + return -ENOMEM; base->rev = rev; base->clk = clk; @@ -3263,51 +3262,53 @@ static struct d40_base * __init d40_hw_detect_init(struct platform_device *pdev) sizeof(*base->phy_res), GFP_KERNEL); if (!base->phy_res) - return NULL; + return -ENOMEM; base->lookup_phy_chans = devm_kcalloc(dev, num_phy_chans, sizeof(*base->lookup_phy_chans), GFP_KERNEL); if (!base->lookup_phy_chans) - return NULL; + return -ENOMEM; base->lookup_log_chans = devm_kcalloc(dev, num_log_chans, sizeof(*base->lookup_log_chans), GFP_KERNEL); if (!base->lookup_log_chans) - return NULL; + return -ENOMEM; base->reg_val_backup_chan = devm_kmalloc_array(dev, base->num_phy_chans, sizeof(d40_backup_regs_chan), GFP_KERNEL); if (!base->reg_val_backup_chan) - return NULL; + return -ENOMEM; base->lcla_pool.alloc_map = devm_kcalloc(dev, num_phy_chans * D40_LCLA_LINK_PER_EVENT_GRP, sizeof(*base->lcla_pool.alloc_map), GFP_KERNEL); if (!base->lcla_pool.alloc_map) - return NULL; + return -ENOMEM; base->regs_interrupt = devm_kmalloc_array(dev, base->gen_dmac.il_size, sizeof(*base->regs_interrupt), GFP_KERNEL); if (!base->regs_interrupt) - return NULL; + return -ENOMEM; base->desc_slab = kmem_cache_create(D40_NAME, sizeof(struct d40_desc), 0, SLAB_HWCACHE_ALIGN, NULL); if (!base->desc_slab) - return NULL; + return -ENOMEM; ret = devm_add_action_or_reset(dev, d40_drop_kmem_cache_action, base->desc_slab); if (ret) - return NULL; + return ret; + + *retbase = base; - return base; + return 0; } static void __init d40_hw_init(struct d40_base *base) @@ -3503,20 +3504,20 @@ static int __init d40_probe(struct platform_device *pdev) struct device *dev = &pdev->dev; struct device_node *np = pdev->dev.of_node; struct device_node *np_lcpa; - int ret = -ENOENT; struct d40_base *base; struct resource *res; struct resource res_lcpa; int num_reserved_chans; u32 val; + int ret; if (d40_of_probe(dev, np)) { ret = -ENOMEM; goto report_failure; } - base = d40_hw_detect_init(pdev); - if (!base) + ret = d40_hw_detect_init(pdev, &base); + if (ret) goto report_failure; num_reserved_chans = d40_phy_res_init(base); @@ -3530,6 +3531,7 @@ static int __init d40_probe(struct platform_device *pdev) np_lcpa = of_parse_phandle(np, "sram", 0); if (!np_lcpa) { dev_err(dev, "no LCPA SRAM node\n"); + ret = -EINVAL; goto report_failure; } /* This is no device so read the address directly from the node */ From patchwork Thu Apr 27 12:10:03 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Linus Walleij X-Patchwork-Id: 88230 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a59:b0ea:0:b0:3b6:4342:cba0 with SMTP id b10csp221116vqo; Thu, 27 Apr 2023 05:13:35 -0700 (PDT) X-Google-Smtp-Source: ACHHUZ5EIJvB9Mi3+G9P9Y/st4BiAgCHY7/DqJCdPMJdWo/pAMLO3OuluCI/eNpN3qPXkjdd7g3O X-Received: by 2002:a17:903:22c1:b0:1a9:57b4:9d5a with SMTP id y1-20020a17090322c100b001a957b49d5amr2000603plg.31.1682597614931; Thu, 27 Apr 2023 05:13:34 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1682597614; cv=none; d=google.com; s=arc-20160816; b=uoFjNC2vbaR5JR4meYw/B0FtwtUFLOGv2VLwf0+8vngLn1bmL2rgMJOxYpxncMmghm UhoeJUQJI2Qnk1EQLZ/ppzAVjdZoCk+Gxg9P8f0bJaO1EH2kJARKkTpRLvXApLnlzfEh yMzpE8s0M6oQ8U5N/oljvm9QUlQB7Dhm1XhGwLe4r1KzzTLnnNtlYRSgxsG3sYisVSX3 cgstEwpJJ928d2PG8GxiQOQKhLACws0xFJHwQjssS6L04/imXp2kd8AlonbjCyb04yto 9PbRrKuUOBGfpz1Jid/6X1IJzdweEt4pwcEbWUaWIZ3RfTLXQ5LZFOanGuyizG6KCs0T awaw== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:cc:to:in-reply-to:references:message-id :content-transfer-encoding:mime-version:subject:date:from :dkim-signature; bh=fQ8qe1BB0G+HYjEpOfPBNu0NP3ENE9SOB00+nySsnF0=; b=jjfO2elqrazd2/HnMgdzo4KrQvkTBzDEh6sAVBB05ELWV7TFl7X9v85nL+nmRKgNvH UDjNjofq+FGhq54B6ngcAfkMhyvzoKMuu8y+vk6G74A7f+d6MQxJC5GWIT3Tix6po/R2 AzfRXPWfPuTeZLgS++2vI4U9qAhBA5zMlU5MffIKjckdQzpM+53RIpZrv7lvIrZwh/J/ VdWlSpCCBx3klqasuDkw+wh1hQblOEV/qU/9D35AJgCBoWcB9yZFDxxVVMlrSaxE5Rlu bKjV5CERlOkkABIEWxT5cEtu5Qgr+XZqQvONpAIl0c4ZiCnavTt18aS5LuWq9ONzMU0g QMfA== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=EFjdq6km; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: from out1.vger.email (out1.vger.email. [2620:137:e000::1:20]) by mx.google.com with ESMTP id g10-20020a170902d1ca00b0019ce4e2be99si16055109plb.193.2023.04.27.05.13.19; Thu, 27 Apr 2023 05:13:34 -0700 (PDT) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) client-ip=2620:137:e000::1:20; Authentication-Results: mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=EFjdq6km; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S243841AbjD0MKa (ORCPT + 99 others); Thu, 27 Apr 2023 08:10:30 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:55100 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S243797AbjD0MKN (ORCPT ); Thu, 27 Apr 2023 08:10:13 -0400 Received: from mail-lf1-x12d.google.com (mail-lf1-x12d.google.com [IPv6:2a00:1450:4864:20::12d]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 95F2E5BAB for ; Thu, 27 Apr 2023 05:10:09 -0700 (PDT) Received: by mail-lf1-x12d.google.com with SMTP id 2adb3069b0e04-4effb818c37so3603674e87.3 for ; Thu, 27 Apr 2023 05:10:09 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; t=1682597407; x=1685189407; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:from:to:cc:subject:date:message-id :reply-to; bh=fQ8qe1BB0G+HYjEpOfPBNu0NP3ENE9SOB00+nySsnF0=; b=EFjdq6kmO3IwygYJjSnuPpG6tNJw3gUimlSwdstfajLcMooVt+zwCL1bDjZdgYGHTf Q682KOpEDxp4ye/cWuCO2P8ylg+7WdkE3xiiO7tNruzmgkdt0HUjjWa/o48ro3GLAmPh m0woCLrad3IJ5sEFZi9ZYKSr0idyDCJ20a+fXOOv4U4SWlgP063t4hd14lCHSWRuDeoh BI5ey7exdfdMtAtYeQ/NKgjmMXdQlfIDliPzF91hD9ErrkPlzfFfjYsbdIPqvc9FvV2J sPThNVpr3BtSxwpHhELKHSG0BkZSzruUtu6QearonKlGqi1mxHGEnTVSykvSAxZA0Agk Rp8Q== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20221208; t=1682597407; x=1685189407; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=fQ8qe1BB0G+HYjEpOfPBNu0NP3ENE9SOB00+nySsnF0=; b=Uf505zL1dmRDTze8p2ODR2YKFiTXinIEaOYAlbD4phPPJGpioYdnlVow9Enqq+pEYG ogSoJU/DhhRW2darJgpqyKrVhE3KmAxQEXlghwDgpl8NFlxKpcjUhLQ4NFXbSmC60bm4 8SecDWVDDnJFSab2zLdsYxsvmQiHC3Tfs6LA2HP5WYQhiquUadsWQdB3/2jlFCxN+8PQ ZGnW+xAIgm1SfdN2kURZZpdWbBh589+3XttbMUqHpSYx2MM3NjUjJVDXRXCr7mgmMTXo 5mikct2Gg005Mp6UV9ppzowVcYrEdr709cmdhxX0rkdIYSnurWxfECwaGkcrWUUQ23oW JH7Q== X-Gm-Message-State: AC+VfDziSynn5nPRibA2RXWqTIVYqlfEpDQuXvrcLAybpPHNp2lN04LW 7IgkQF0AaEPwpG0AulDjMC4MEw== X-Received: by 2002:ac2:5549:0:b0:4ea:e0e7:d12d with SMTP id l9-20020ac25549000000b004eae0e7d12dmr472076lfk.1.1682597407485; Thu, 27 Apr 2023 05:10:07 -0700 (PDT) Received: from [192.168.1.2] (c-05d8225c.014-348-6c756e10.bbcust.telenor.se. [92.34.216.5]) by smtp.gmail.com with ESMTPSA id e7-20020ac25467000000b004d4d7fb0e07sm2892044lfn.216.2023.04.27.05.10.06 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 27 Apr 2023 05:10:06 -0700 (PDT) From: Linus Walleij Date: Thu, 27 Apr 2023 14:10:03 +0200 Subject: [PATCH v2 8/8] ARM: dts: ux500: Add eSRAM nodes MIME-Version: 1.0 Message-Id: <20230417-ux500-dma40-cleanup-v2-8-cdaa68a4b863@linaro.org> References: <20230417-ux500-dma40-cleanup-v2-0-cdaa68a4b863@linaro.org> In-Reply-To: <20230417-ux500-dma40-cleanup-v2-0-cdaa68a4b863@linaro.org> To: Vinod Koul , Rob Herring , Krzysztof Kozlowski Cc: dmaengine@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, Linus Walleij X-Mailer: b4 0.12.2 X-Spam-Status: No, score=-2.1 required=5.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,RCVD_IN_DNSWL_NONE, SPF_HELO_NONE,SPF_PASS,T_SCC_BODY_TEXT_LINE autolearn=unavailable autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-getmail-retrieved-from-mailbox: =?utf-8?q?INBOX?= X-GMAIL-THRID: =?utf-8?q?1764331476719347762?= X-GMAIL-MSGID: =?utf-8?q?1764331476719347762?= The U8500 has 640 KB of eSRAM, split into 5 banks of 128 KB each. Add this to the device tree, with ESRAM 0, 1+2 and 3+4 as separate devices, since these have different power domains. Signed-off-by: Linus Walleij --- arch/arm/boot/dts/ste-dbx5x0.dtsi | 73 +++++++++++++++++++++++++++++++++++++-- 1 file changed, 71 insertions(+), 2 deletions(-) diff --git a/arch/arm/boot/dts/ste-dbx5x0.dtsi b/arch/arm/boot/dts/ste-dbx5x0.dtsi index fead7afd5517..c34ccde04600 100644 --- a/arch/arm/boot/dts/ste-dbx5x0.dtsi +++ b/arch/arm/boot/dts/ste-dbx5x0.dtsi @@ -110,6 +110,74 @@ soc { interrupt-parent = <&intc>; ranges; + /* + * 640KB ESRAM (embedded static random access memory), divided + * into 5 banks of 128 KB each. This is a fast memory usually + * used by different accelerators. We group these according to + * their power domains: ESRAM0 (always on) ESRAM 1+2 and + * ESRAM 3+4. + */ + sram@40000000 { + /* The first (always on) ESRAM 0, 128 KB */ + compatible = "mmio-sram"; + reg = <0x40000000 0x20000>; + #address-cells = <1>; + #size-cells = <1>; + ranges = <0 0x40000000 0x20000>; + + sram@0 { + compatible = "stericsson,u8500-esram"; + reg = <0x0 0x10000>; + pool; + }; + lcpa: sram@10000 { + /* + * This eSRAM is used by the DMA40 DMA controller + * for Logical Channel Paramers (LCP), the address + * where these parameters are stored is called "LCPA". + * This is addressed directly by the driver so no + * pool is used. + */ + compatible = "stericsson,u8500-esram"; + label = "DMA40-LCPA"; + reg = <0x10000 0x800>; + }; + sram@10800 { + compatible = "stericsson,u8500-esram"; + reg = <0x10800 0xf800>; + pool; + }; + }; + sram@40020000 { + /* ESRAM 1+2, 256 KB */ + compatible = "mmio-sram"; + reg = <0x40020000 0x40000>; + #address-cells = <1>; + #size-cells = <1>; + ranges = <0 0x40020000 0x40000>; + }; + sram@40060000 { + /* ESRAM 3+4, 256 KB */ + compatible = "mmio-sram"; + reg = <0x40060000 0x40000>; + #address-cells = <1>; + #size-cells = <1>; + ranges = <0 0x40060000 0x40000>; + + lcla: sram@20000 { + /* + * This eSRAM is used by the DMA40 DMA controller + * for Logical Channel Logical Addresses (LCLA), the address + * where these parameters are stored is called "LCLA". + * This is addressed directly by the driver so no + * pool is used. + */ + compatible = "stericsson,u8500-esram"; + label = "DMA40-LCLA"; + reg = <0x20000 0x2000>; + }; + }; + ptm@801ae000 { compatible = "arm,coresight-etm3x", "arm,primecell"; reg = <0x801ae000 0x1000>; @@ -536,9 +604,10 @@ usb_per5@a03e0000 { dma: dma-controller@801C0000 { compatible = "stericsson,db8500-dma40", "stericsson,dma40"; - reg = <0x801C0000 0x1000 0x40010000 0x800>; - reg-names = "base", "lcpa"; + reg = <0x801C0000 0x1000>; + reg-names = "base"; interrupts = ; + sram = <&lcpa>, <&lcla>; #dma-cells = <3>; memcpy-channels = <56 57 58 59 60>;