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Marchesi via Binutils" From: "Jose E. Marchesi" Reply-To: "Jose E. Marchesi" Errors-To: binutils-bounces+ouuuleilei=gmail.com@sourceware.org Sender: "Binutils" X-getmail-retrieved-from-mailbox: =?utf-8?q?INBOX?= X-GMAIL-THRID: =?utf-8?q?1764260910304685480?= X-GMAIL-MSGID: =?utf-8?q?1764260910304685480?= This patch adds support to the GNU assembler for an alternative assembly syntax used in BPF. This syntax is C-like and very unconventional for an assembly language, but it is generated by clang/llvm and is also used in inline asm templates in kernel code, so we ought to support it. After this patch, the assembler is able to parse instructions in both supported syntax: the normal assembly-like syntax and the pseudo-C syntax. Instruction formats can be mixed in the source program: the assembler recognizes the right syntax to use. gas/ChangeLog: 2023-04-20 Guillermo E. Martinez PR gas/29728 * config/tc-bpf.h (TC_EQUAL_IN_INSN): Define. * config/tc-bpf.c (LEX_IS_SYMBOL_COMPONENT): Define. (LEX_IS_WHITESPACE): Likewise. (LEX_IS_NEWLINE): Likewise. (LEX_IS_ARITHM_OP): Likewise. (LEX_IS_STAR): Likewise. (LEX_IS_CLSE_BR): Likewise. (LEX_IS_OPEN_BR): Likewise. (LEX_IS_EQUAL): Likewise. (LEX_IS_EXCLA): Likewise. (ST_EOI): Likewise. (MAX_TOKEN_SZ): Likewise. (init_pseudoc_lex): New function. (md_begin): Call init_pseudoc_lex. (valid_expr): New function. (build_bpf_non_generic_load): Likewise. (build_bpf_atomic_insn): Likewise. (build_bpf_jmp_insn): Likewise. (build_bpf_arithm_insn): Likewise. (build_bpf_endianness): Likewise. (build_bpf_load_store_insn): Likewise. (look_for_reserved_word): Likewise. (is_register): Likewise. (is_cast): Likewise. (get_token): Likewise. (bpf_pseudoc_to_normal_syntax): Likewise. (md_assemble): Try pseudo-C syntax if an instruction cannot be parsed. --- gas/ChangeLog | 32 + gas/config/tc-bpf.c | 1521 ++++++++++++++++++++++++++++++++++++++++++- gas/config/tc-bpf.h | 2 + 3 files changed, 1551 insertions(+), 4 deletions(-) diff --git a/gas/ChangeLog b/gas/ChangeLog index 80548d24ba6..e1cfcec4abf 100644 --- a/gas/ChangeLog +++ b/gas/ChangeLog @@ -1,3 +1,35 @@ +2023-04-20 Guillermo E. Martinez + + PR gas/29728 + * config/tc-bpf.h (TC_EQUAL_IN_INSN): Define. + * config/tc-bpf.c (LEX_IS_SYMBOL_COMPONENT): Define. + (LEX_IS_WHITESPACE): Likewise. + (LEX_IS_NEWLINE): Likewise. + (LEX_IS_ARITHM_OP): Likewise. + (LEX_IS_STAR): Likewise. + (LEX_IS_CLSE_BR): Likewise. + (LEX_IS_OPEN_BR): Likewise. + (LEX_IS_EQUAL): Likewise. + (LEX_IS_EXCLA): Likewise. + (ST_EOI): Likewise. + (MAX_TOKEN_SZ): Likewise. + (init_pseudoc_lex): New function. + (md_begin): Call init_pseudoc_lex. + (valid_expr): New function. + (build_bpf_non_generic_load): Likewise. + (build_bpf_atomic_insn): Likewise. + (build_bpf_jmp_insn): Likewise. + (build_bpf_arithm_insn): Likewise. + (build_bpf_endianness): Likewise. + (build_bpf_load_store_insn): Likewise. + (look_for_reserved_word): Likewise. + (is_register): Likewise. + (is_cast): Likewise. + (get_token): Likewise. + (bpf_pseudoc_to_normal_syntax): Likewise. + (md_assemble): Try pseudo-C syntax if an instruction cannot be + parsed. + 2023-04-18 mengqinggang * config/tc-loongarch.c (loongarch_fix_adjustable): Symbols with diff --git a/gas/config/tc-bpf.c b/gas/config/tc-bpf.c index 1f8b0cc2ede..171fc682806 100644 --- a/gas/config/tc-bpf.c +++ b/gas/config/tc-bpf.c @@ -28,13 +28,36 @@ #include "elf/common.h" #include "elf/bpf.h" #include "dwarf2dbg.h" +#include const char comment_chars[] = ";"; -const char line_comment_chars[] = "#"; +const char line_comment_chars[] = "#"; const char line_separator_chars[] = "`"; const char EXP_CHARS[] = "eE"; const char FLT_CHARS[] = "fFdD"; +static const char *invalid_expression; +static char pseudoc_lex[256]; +static const char symbol_chars[] = +"_ABCDEFGHIJKLMNOPQRSTUVWXYZabcdefghijklmnopqrstuvwxyz0123456789"; + +static const char arithm_op[] = "+-/<>%&|^"; + +static void init_pseudoc_lex (void); + +#define LEX_IS_SYMBOL_COMPONENT 1 +#define LEX_IS_WHITESPACE 2 +#define LEX_IS_NEWLINE 3 +#define LEX_IS_ARITHM_OP 4 +#define LEX_IS_STAR 6 +#define LEX_IS_CLSE_BR 7 +#define LEX_IS_OPEN_BR 8 +#define LEX_IS_EQUAL 9 +#define LEX_IS_EXCLA 10 + +#define ST_EOI 100 +#define MAX_TOKEN_SZ 100 + /* Like s_lcomm_internal in gas/read.c but the alignment string is allowed to be optional. */ @@ -158,6 +181,32 @@ md_show_usage (FILE * stream) } + +static void +init_pseudoc_lex (void) +{ + const char *p; + + for (p = symbol_chars; *p; ++p) + pseudoc_lex[(unsigned char) *p] = LEX_IS_SYMBOL_COMPONENT; + + pseudoc_lex[' '] = LEX_IS_WHITESPACE; + pseudoc_lex['\t'] = LEX_IS_WHITESPACE; + pseudoc_lex['\r'] = LEX_IS_WHITESPACE; + pseudoc_lex['\n'] = LEX_IS_NEWLINE; + pseudoc_lex['*'] = LEX_IS_STAR; + pseudoc_lex[')'] = LEX_IS_CLSE_BR; + pseudoc_lex['('] = LEX_IS_OPEN_BR; + pseudoc_lex[']'] = LEX_IS_CLSE_BR; + pseudoc_lex['['] = LEX_IS_OPEN_BR; + + for (p = arithm_op; *p; ++p) + pseudoc_lex[(unsigned char) *p] = LEX_IS_ARITHM_OP; + + pseudoc_lex['='] = LEX_IS_EQUAL; + pseudoc_lex['!'] = LEX_IS_EXCLA; +} + void md_begin (void) { @@ -196,6 +245,9 @@ md_begin (void) cgen_bitset_set (bpf_isa, ISA_EBPFLE); } + /* Ensure that lines can begin with '*' in BPF store pseudoc instruction. */ + lex_type['*'] |= LEX_BEGIN_NAME; + /* Set the machine number and endian. */ gas_cgen_cpu_desc = bpf_cgen_cpu_open (CGEN_CPU_OPEN_ENDIAN, target_big_endian ? @@ -212,6 +264,7 @@ md_begin (void) /* Set the machine type. */ bfd_default_set_arch_mach (stdoutput, bfd_arch_bpf, bfd_mach_bpf); + init_pseudoc_lex(); } valueT @@ -362,12 +415,1456 @@ md_apply_fix (fixS *fixP, valueT *valP, segT seg) gas_cgen_md_apply_fix (fixP, valP, seg); } +/* + The BPF pseudo grammar: + + instruction : bpf_alu_insn + | bpf_alu32_insn + | bpf_jump_insn + | bpf_load_store_insn + | bpf_load_store32_insn + | bpf_non_generic_load + | bpf_endianness_conv_insn + | bpf_64_imm_load_insn + | bpf_atomic_insn + ; + + bpf_alu_insn : BPF_REG bpf_alu_operator register_or_imm32 + ; + + bpf_alu32_insn : BPF_REG32 bpf_alu_operator register32_or_imm32 + ; + + bpf_jump_insn : BPF_JA offset + | IF BPF_REG bpf_jump_operator register_or_imm32 BPF_JA offset + | IF BPF_REG32 bpf_jump_operator register_or_imm32 BPF_JA offset + | BPF_CALL offset + | BPF_EXIT + ; + + bpf_load_store_insn : BPF_REG CHR_EQUAL bpf_size_cast BPF_CHR_OPEN_BR \ + register_and_offset BPF_CHR_CLSE_BR + | bpf_size_cast register_and_offset CHR_EQUAL BPF_REG + ; + + bpf_load_store32_insn : BPF_REG CHR_EQUAL bpf_size_cast BPF_CHR_OPEN_BR \ + register32_and_offset BPF_CHR_CLSE_BR + | bpf_size_cast register_and_offset CHR_EQUAL BPF_REG32 + ; + + bpf_non_generic_load : BPF_REG_R0 CHR_EQUAL bpf_size_cast BPF_LD BPF_CHR_OPEN_BR \ + imm32 BPF_CHR_CLSE_BR + ; + + bpf_endianness_conv_insn : BPF_REG_N bpf_endianness_mnem BPF_REG_N + ; + + bpf_64_imm_load_insn : BPF_REG imm64 BPF_LL + ; + + bpf_atomic_insn : BPF_LOCK bpf_size_cast_32_64 register_and_offset BPF_ADD BPF_REG + + register_and_offset : BPF_CHR_OPEN_BR BPF_REG offset BPF_CHR_CLSE_BR + ; + + register32_and_offset : BPF_CHR_OPEN_BR BPF_REG32 offset BPF_CHR_CLSE_BR + ; + + bpf_size_cast : CHR_START BPF_CHR_OPEN_BR bpf_size CHR_START BPF_CHR_CLSE_BR + ; + + bpf_size_cast_32_64 : CHR_START BPF_CHR_OPEN_BR bpf_size_cast_32_64 CHR_STAR BPF_CHR_CLSE_BR + ; + + bpf_size_32_64 : BPF_CAST_U32 + | BPF_CAST_U64 + ; + + bpf_size : BPF_CAST_U8 + | BPF_CAST_U16 + | BPF_CAST_U32 + | BPF_CAST_U64 + ; + + bpf_jump_operator : BPF_JEQ + | BPF_JGT + | BPF_JGE + | BPF_JNE + | BPF_JSGT + | BPF_JSGE + | BPF_JLT + | BPF_JLE + | BPF_JSLT + | BPF_JSLE + ; + + bpf_alu_operator : BPF_ADD + | BPF_SUB + | BPF_MUL + | BPF_DIV + | BPF_OR + | BPF_AND + | BPF_LSH + | BPF_RSH + | BPF_NEG + | BPF_MOD + | BPF_XOR + | BPF_ARSH + | CHR_EQUAL + ; + + bpf_endianness_mnem : BPF_LE16 + | BPF_LE32 + | BPF_LE64 + | BPF_BE16 + | BPF_BE32 + | BPF_BE64 + ; + + offset : BPF_EXPR + | BPF_SYMBOL + ; + + register_or_imm32 : BPF_REG + | expression + ; + + register32_or_imm32 : BPF_REG32 + | expression + ; + + imm32 : BPF_EXPR + | BPF_SYMBOL + ; + + imm64 : BPF_EXPR + | BPF_SYMBOL + ; + + register_or_expression : BPF_EXPR + | BPF_REG + ; + + BPF_EXPR : GAS_EXPR + +*/ + +enum bpf_token_type + { + /* Keep grouped to quickly access. */ + BPF_ADD, + BPF_SUB, + BPF_MUL, + BPF_DIV, + BPF_OR, + BPF_AND, + BPF_LSH, + BPF_RSH, + BPF_MOD, + BPF_XOR, + BPF_MOV, + BPF_ARSH, + BPF_NEG, + + BPF_REG, + + BPF_IF, + BPF_GOTO, + + /* Keep grouped to quickly access. */ + BPF_JEQ, + BPF_JGT, + BPF_JGE, + BPF_JLT, + BPF_JLE, + BPF_JSET, + BPF_JNE, + BPF_JSGT, + BPF_JSGE, + BPF_JSLT, + BPF_JSLE, + + BPF_SYMBOL, + BPF_CHR_CLSE_BR, + BPF_CHR_OPEN_BR, + + /* Keep grouped to quickly access. */ + BPF_CAST_U8, + BPF_CAST_U16, + BPF_CAST_U32, + BPF_CAST_U64, + + /* Keep grouped to quickly access. */ + BPF_LE16, + BPF_LE32, + BPF_LE64, + BPF_BE16, + BPF_BE32, + BPF_BE64, + + BPF_LOCK, + + BPF_IND_CALL, + BPF_LD, + BPF_LL, + BPF_EXPR, + BPF_UNKNOWN, + }; + +static int +valid_expr (const char *e, const char **end_expr) +{ + invalid_expression = NULL; + char *hold = input_line_pointer; + expressionS exp; + + input_line_pointer = (char *) e; + deferred_expression (&exp); + *end_expr = input_line_pointer; + input_line_pointer = hold; + + return invalid_expression == NULL; +} + +static char * +build_bpf_non_generic_load (char *src, enum bpf_token_type cast, + const char *imm32) +{ + char *bpf_insn; + static const char *cast_rw[] = {"b", "h", "w", "dw"}; + + bpf_insn = xasprintf ("%s%s%s %s%s%s%s", + "ld", + src ? "ind" : "abs", + cast_rw[cast - BPF_CAST_U8], + src ? "%" : "", + src ? src : "", + src ? "," : "", + imm32); + return bpf_insn; +} + +static char * +build_bpf_atomic_insn (char *dst, char *src, + enum bpf_token_type atomic_insn, + enum bpf_token_type cast, + const char *offset) +{ + char *bpf_insn; + static const char *cast_rw[] = {"w", "dw"}; + static const char *mnem[] = {"xadd"}; + + bpf_insn = xasprintf ("%s%s [%%%s%s%s],%%%s", mnem[atomic_insn - BPF_ADD], + cast_rw[cast - BPF_CAST_U32], dst, + *offset != '+' ? "+" : "", + offset, src); + return bpf_insn; +} + +static char * +build_bpf_jmp_insn (char *dst, char *src, + char *imm32, enum bpf_token_type op, + const char *sym, const char *offset) +{ + char *bpf_insn; + static const char *mnem[] = + { + "jeq", "jgt", "jge", "jlt", + "jle", "jset", "jne", "jsgt", + "jsge", "jslt", "jsle" + }; + + const char *in32 = (*dst == 'w' ? "32" : ""); + + *dst = 'r'; + if (src) + *src = 'r'; + + bpf_insn = xasprintf ("%s%s %%%s,%s%s,%s", + mnem[op - BPF_JEQ], in32, dst, + src ? "%" : "", + src ? src : imm32, + offset ? offset : sym); + return bpf_insn; +} + +static char * +build_bpf_arithm_insn (char *dst, char *src, + int load64, const char *imm32, + enum bpf_token_type type) +{ + char *bpf_insn; + static const char *mnem[] = + { + "add", "sub", "mul", "div", + "or", "and", "lsh", "rsh", + "mod", "xor", "mov", "arsh", + "neg", + }; + const char *in32 = (*dst == 'w' ? "32" : ""); + + *dst = 'r'; + if (src) + *src = 'r'; + + if (type == BPF_NEG) + bpf_insn = xasprintf ("%s%s %%%s", mnem[type - BPF_ADD], in32, dst); + else if (load64) + bpf_insn = xasprintf ("%s %%%s,%s", "lddw", dst, imm32); + else + bpf_insn = xasprintf ("%s%s %%%s,%s%s", mnem[type - BPF_ADD], + in32, dst, + src ? "%" : "", + src ? src: imm32); + return bpf_insn; +} + +static char * +build_bpf_endianness (char *dst, enum bpf_token_type endianness) +{ + char *bpf_insn; + static const char *size[] = {"16", "32", "64"}; + int be = 1; + + if (endianness == BPF_LE16 + || endianness == BPF_LE32 + || endianness == BPF_LE64) + be = 0; + + bpf_insn = xasprintf ("%s %%%s,%s", be ? "endbe" : "endle", + dst, be ? size[endianness - BPF_BE16] : size[endianness - BPF_LE16]); + return bpf_insn; +} + +static char * +build_bpf_load_store_insn (char *dst, char *src, + enum bpf_token_type cast, + const char *offset, int isload) +{ + char *bpf_insn; + static const char *cast_rw[] = {"b", "h", "w", "dw"}; + + *dst = *src = 'r'; + if (isload) + bpf_insn = xasprintf ("%s%s %%%s,[%%%s%s%s]", "ldx", + cast_rw[cast - BPF_CAST_U8], dst, src, + *offset != '+' ? "+" : "", + offset); + else + bpf_insn = xasprintf ("%s%s [%%%s%s%s],%%%s", "stx", + cast_rw[cast - BPF_CAST_U8], dst, + *offset != '+' ? "+" : "", + offset, src); + return bpf_insn; +} + +static int +look_for_reserved_word (const char *token, enum bpf_token_type *type) +{ + int i; + static struct + { + const char *name; + enum bpf_token_type type; + } reserved_words[] = + { + { + .name = "if", + .type = BPF_IF + }, + { + .name = "goto", + .type = BPF_GOTO + }, + { + .name = "le16", + .type = BPF_LE16 + }, + { + .name = "le32", + .type = BPF_LE32 + }, + { + .name = "le64", + .type = BPF_LE64 + }, + { + .name = "be16", + .type = BPF_BE16 + }, + { + .name = "be32", + .type = BPF_BE32 + }, + { + .name = "be64", + .type = BPF_BE64 + }, + { + .name = "lock", + .type = BPF_LOCK + }, + { + .name = "callx", + .type = BPF_IND_CALL + }, + { + .name = "skb", + .type = BPF_LD + }, + { + .name = "ll", + .type = BPF_LL + }, + { + .name = NULL, + } + }; + + for (i = 0; reserved_words[i].name; ++i) + if (*reserved_words[i].name == *token + && !strcmp (reserved_words[i].name, token)) + { + *type = reserved_words[i].type; + return 1; + } + + return 0; +} + +static int +is_register (const char *token, int len) +{ + if (token[0] == 'r' || token[0] == 'w') + if ((len == 2 && isdigit (token[1])) + || (len == 3 && token[1] == '1' && token[2] == '0')) + return 1; + + return 0; +} + +static enum bpf_token_type +is_cast (const char *token) +{ + static const char *cast_rw[] = {"u8", "u16", "u32", "u64"}; + unsigned int i; + + for (i = 0; i < ARRAY_SIZE (cast_rw); ++i) + if (!strcmp (token, cast_rw[i])) + return BPF_CAST_U8 + i; + + return BPF_UNKNOWN; +} + +static enum bpf_token_type +get_token (const char **insn, char *token, size_t *tlen) +{ +#define GET() \ + (*str == '\0' \ + ? EOF \ + : *(unsigned char *)(str++)) + +#define UNGET() (--str) + +#define START_EXPR() \ + do \ + { \ + if (expr == NULL) \ + expr = str - 1; \ + } while (0) + +#define SCANNER_SKIP_WHITESPACE() \ + do \ + { \ + do \ + ch = GET (); \ + while (ch != EOF \ + && ((ch) == ' ' || (ch) == '\t')); \ + if (ch != EOF) \ + UNGET (); \ + } while (0) + + const char *str = *insn; + char ch, ch2 = 0; + enum bpf_token_type ttype = BPF_UNKNOWN; + size_t len = 0; + const char *expr = NULL; + const char *end_expr = NULL; + int state = 0; + int return_token = 0; + + while (1) + { + ch = GET (); + + if (ch == EOF || len > MAX_TOKEN_SZ) + break; + + switch (pseudoc_lex[(unsigned char) ch]) + { + case LEX_IS_WHITESPACE: + SCANNER_SKIP_WHITESPACE (); + return_token = 1; + + switch (state) + { + case 12: /* >' ' */ + ttype = BPF_JGT; + break; + + case 17: /* ==' ' */ + ttype = BPF_JEQ; + break; + + case 18: /* <' ' */ + ttype = BPF_JLT; + break; + + case 20: /* &' ' */ + ttype = BPF_JSET; + break; + + case 22: /* s<' '*/ + ttype = BPF_JSLT; + break; + + case 14: /* s> ' ' */ + ttype = BPF_JSGT; + break; + + case 16: /* =' ' */ + ttype = BPF_MOV; + break; + + default: + return_token = 0; + } + break; + + case LEX_IS_EXCLA: + token[len++] = ch; + state = 21; + break; + + case LEX_IS_ARITHM_OP: + if (state == 16) + { + /* ='-' is handle as '=' */ + UNGET (); + ttype = BPF_MOV; + return_token = 1; + break; + } + + START_EXPR(); + token[len++] = ch; + switch (ch) + { +#define BPF_ARITHM_OP(op, type) \ + case (op): \ + state = 6; \ + ttype = (type); \ + break; + + BPF_ARITHM_OP('+', BPF_ADD); + BPF_ARITHM_OP('-', BPF_SUB); + BPF_ARITHM_OP('*', BPF_MUL); + BPF_ARITHM_OP('/', BPF_DIV); + BPF_ARITHM_OP('|', BPF_OR); + BPF_ARITHM_OP('%', BPF_MOD); + BPF_ARITHM_OP('^', BPF_XOR); + + case '&': + state = 20; /* '&' */ + break; + + case '<': + switch (state) + { + case 0: + state = 18; /* '<' */ + break; + + case 18: + state = 19; /* <'<' */ + break; + + case 8: + state = 22; /* s'<' */ + break; + } + break; + + case '>': + switch (state) + { + case 0: + state = 12; /* '>' */ + break; + + case 12: + state = 13; /* >'>' */ + break; + + case 8: + state = 14; /* s'>' */ + break; + + case 14: + state = 15; /* s>'>' */ + break; + } + break; + } + break; + + case LEX_IS_STAR: + switch (state) + { + case 0: + token[len++] = ch; + START_EXPR (); + state = 2; /* '*', It could be the fist cast char. */ + break; + + case 16: /* ='*' Not valid token. */ + ttype = BPF_MOV; + return_token = 1; + UNGET (); + break; + + case 4: /* *(uXX'*' */ + token[len++] = ch; + state = 5; + break; + } + break; + + case LEX_IS_OPEN_BR: + START_EXPR (); + token[len++] = ch; + return_token = 1; + + switch (state) + { + case 2: + state = 3; /* *'(' second char of a cast or expr. */ + return_token = 0; + break; + + case 6: + if (valid_expr (expr, &end_expr)) + { + len = end_expr - expr; + memcpy (token, expr, len); + ttype = BPF_EXPR; + str = end_expr; + } + else + { + len = 0; + while (*invalid_expression) + token[len++] = *invalid_expression++; + + token[len] = 0; + ttype = BPF_UNKNOWN; + } + break; + + default: + ttype = BPF_CHR_OPEN_BR; + SCANNER_SKIP_WHITESPACE (); + ch2 = GET (); + + if ((isdigit (ch2) || ch2 == '(') + && valid_expr (expr, &end_expr)) + { + len = end_expr - expr; + memcpy (token, expr, len); + ttype = BPF_EXPR; + str = end_expr; + } + else + UNGET (); + } + break; + + case LEX_IS_CLSE_BR: + token[len++] = ch; + + if (state == 0) + { + ttype = BPF_CHR_CLSE_BR; + return_token = 1; + } + else if (state == 5) /* *(uXX*')' */ + return_token = 1; + break; + + case LEX_IS_EQUAL: + token[len++] = ch; + return_token = 1; + + switch (state) + { + case 0: + state = 16; /* '=' */ + return_token = 0; + break; + + case 16: + state = 17; /* ='=' */ + return_token = 0; + break; + + case 2: /* *'=' */ + ttype = BPF_MUL; + break; + + case 10: /* s>>'=' */ + ttype = BPF_ARSH; + break; + + case 12: /* >'=' */ + ttype = BPF_JGE; + break; + + case 13: /* >>'=' */ + ttype = BPF_RSH; + break; + + case 14: /* s>'=' */ + ttype = BPF_JSGE; + break; + + case 15: /* s>>'=' */ + ttype = BPF_ARSH; + break; + + case 18: /* <'=' */ + ttype = BPF_JLE; + break; + + case 19: /* <<'=' */ + ttype = BPF_LSH; + break; + + case 20: /* &'=' */ + ttype = BPF_AND; + break; + + case 21: /* !'=' */ + ttype = BPF_JNE; + break; + + case 22: /* s<'=' */ + ttype = BPF_JSLE; + break; + } + break; + + case LEX_IS_SYMBOL_COMPONENT: + return_token = 1; + + switch (state) + { + case 17: /* =='sym' */ + ttype = BPF_JEQ; + break; + + case 12: /* >'sym' */ + ttype = BPF_JGT; + break; + + case 18: /* <'sym' */ + ttype = BPF_JLT; + break; + + case 20: /* &'sym' */ + ttype = BPF_JSET; + break; + + case 14: /*s>'sym' */ + ttype = BPF_JSGT; + break; + + case 22: /* s<'sym' */ + ttype = BPF_JSLT; + break; + + case 16: /* ='sym' */ + ttype = BPF_MOV; + break; + + default: + return_token = 0; + } + + if (return_token) + { + UNGET (); + break; + } + + START_EXPR (); + token[len++] = ch; + + while ((ch2 = GET ()) != EOF) + { + int type; + + type = pseudoc_lex[(unsigned char) ch2]; + if (type != LEX_IS_SYMBOL_COMPONENT) + break; + token[len++] = ch2; + } + + if (ch2 != EOF) + UNGET (); + + if (state == 0) + { + if (len == 1 && ch == 's') + state = 8; /* signed instructions: 's' */ + else + { + ttype = BPF_SYMBOL; + if (is_register (token, len)) + ttype = BPF_REG; + else if (look_for_reserved_word (token, &ttype)) + ; + else if ((pseudoc_lex[(unsigned char) *token] == LEX_IS_ARITHM_OP + || *token == '(' || isdigit(*token)) + && valid_expr (expr, &end_expr)) + { + len = end_expr - expr; + token[len] = '\0'; + ttype = BPF_EXPR; + str = end_expr; + } + + return_token = 1; + } + } + else if (state == 3) /* *('sym' */ + { + if ((ttype = is_cast (&token[2])) != BPF_UNKNOWN) + state = 4; /* *('uXX' */ + else + { + ttype = BPF_EXPR; + return_token = 1; + } + } + else if (state == 6) + { + if (ttype == BPF_SUB) /* neg */ + { + if (is_register (&token[1], len - 1)) + ttype = BPF_NEG; + else if (valid_expr(expr, &end_expr)) + { + len = end_expr - expr; + memcpy(token, expr, len); + ttype = BPF_EXPR; + str = end_expr; + } + else + { + len = 0; + while (*invalid_expression) + token[len++] = *invalid_expression++; + token[len] = 0; + ttype = BPF_UNKNOWN; + } + } + else if (valid_expr (expr, &end_expr)) + { + len = end_expr - expr; + memcpy(token, expr, len); + ttype = BPF_EXPR; + str = end_expr; + } + else + ttype = BPF_UNKNOWN; + + return_token = 1; + } + break; + } + + if (return_token) + { + *tlen = len; + *insn = str; + break; + } + } + + return ttype; + +#undef GET +#undef UNGET +#undef START_EXPR +#undef SCANNER_SKIP_WHITESPACE +#undef BPF_ARITHM_OP +} + +/* + The parser represent a FSM for the grammar described above. So for example + the following rule: + + ` bpf_alu_insn : BPF_REG bpf_alu_operator register_or_imm32' + + Is parser as follows: + + 1. It starts in state 0. + + 2. Consumes next token, e.g: `BPF_REG' and set `state' variable to a + particular state to helps to identify, in this case, that a register + token has been read, a comment surrounded by a single quote in the + pseudo-c token is added along with the new `state' value to indicate + what the scanner has read, e.g.: + + state = 6; // dst_reg = str_cast ( 'src_reg' + + So, in `state 6' the scanner has consumed: a destination register + (BPF_REG), an equal character (BPF_MOV), a cast token (BPF_CAST), an + open parenthesis (BPF_CHR_OPEN_BR) and the source register (BPF_REG). + + 3. If the accumulated tokens represent a complete BPF pseudo-c syntax + instruction then, a validation of the terms is made, for example: if + the registers have the same sizes (32/64 bits), if a specific + destination register must be used, etc., after that, a builder: + build_bfp_{non_generic_load,atomic_insn,jmp_insn,arithm_insn,endianness,load_store_insn} + is invoked, internally, it translates the BPF pseudo-c instruction to + a BPF GAS instruction using the previous terms recollected by the + scanner. + + 4. If a successful build of BPF GAS instruction was done, a final + state is set to `ST_EOI' (End Of Instruction) meaning that is not + expecting for more tokens in such instruction. Otherwise if the + conditions to calling builder are not satisfied an error is emitted + and `parse_err' is set. +*/ + +static char * +bpf_pseudoc_to_normal_syntax (const char *str, char **errmsg) +{ +#define syntax_err(format, ...) \ + do \ + { \ + if (! parse_err) \ + { \ + parse_err = 1; \ + errbuf = xasprintf (format, ##__VA_ARGS__); \ + } \ + } while (0) + + enum bpf_token_type ttype; + enum bpf_token_type bpf_endianness, + bpf_atomic_insn; + enum bpf_token_type bpf_jmp_op = BPF_JEQ; /* Arbitrary. */ + enum bpf_token_type bpf_cast = BPF_CAST_U8; /* Arbitrary. */ + enum bpf_token_type bpf_arithm_op = BPF_ADD; /* Arbitrary. */ + char *bpf_insn = NULL; + char *errbuf = NULL; + char src_reg[3] = {0}; + char dst_reg[3] = {0}; + char str_imm32[40] = {0}; + char str_offset[40] = {0}; + char str_symbol[MAX_TOKEN_SZ] = {0}; + char token[MAX_TOKEN_SZ] = {0}; + int state = 0; + int parse_err = 0; + size_t tlen; + + while (*str) + { + ttype = get_token (&str, token, &tlen); + if (ttype == BPF_UNKNOWN || state == ST_EOI) + { + syntax_err ("unexpected token: '%s'", token); + break; + } + + switch (ttype) + { + case BPF_UNKNOWN: + case BPF_LL: + break; + + case BPF_REG: + switch (state) + { + case 0: + memcpy (dst_reg, token, tlen); + state = 1; /* 'dst_reg' */ + break; + + case 3: + /* dst_reg bpf_op 'src_reg' */ + memcpy (src_reg, token, tlen); + if (*dst_reg == *src_reg) + bpf_insn = build_bpf_arithm_insn (dst_reg, src_reg, 0, + NULL, bpf_arithm_op); + else + { + syntax_err ("different register sizes: '%s', '%s'", + dst_reg, src_reg); + break; + } + state = ST_EOI; + break; + + case 5: + memcpy (src_reg, token, tlen); + state = 6; /* dst_reg = str_cast ( 'src_reg' */ + break; + + case 9: + memcpy (dst_reg, token, tlen); + state = 10; /* str_cast ( 'dst_reg' */ + break; + + case 11: + /* str_cast ( dst_reg offset ) = 'src_reg' */ + memcpy (src_reg, token, tlen); + bpf_insn = build_bpf_load_store_insn (dst_reg, src_reg, + bpf_cast, str_offset, 0); + state = ST_EOI; + break; + + case 14: + memcpy (dst_reg, token, tlen); + state = 15; /* if 'dst_reg' */ + break; + + case 16: + memcpy (src_reg, token, tlen); + state = 17; /* if dst_reg jmp_op 'src_reg' */ + break; + + case 24: + /* dst_reg = endianness src_reg */ + memcpy (src_reg, token, tlen); + if (*dst_reg == 'r' && !strcmp (dst_reg, src_reg)) + bpf_insn = build_bpf_endianness (dst_reg, bpf_endianness); + else + syntax_err ("invalid operand for instruction: '%s'", token); + + state = ST_EOI; + break; + + case 28: + memcpy (dst_reg, token, tlen); + state = 29; /* lock str_cast ( 'dst_reg' */ + break; + + case 32: + { + /* lock str_cast ( dst_reg offset ) atomic_insn 'src_reg' */ + int with_offset = *str_offset != '\0'; + + memcpy (src_reg, token, tlen); + if ((bpf_cast != BPF_CAST_U32 + && bpf_cast != BPF_CAST_U64) + || *dst_reg != 'r' + || *src_reg != 'r') + syntax_err ("invalid wide atomic instruction"); + else + bpf_insn = build_bpf_atomic_insn (dst_reg, src_reg, bpf_atomic_insn, + bpf_cast, with_offset ? str_offset : str_symbol); + } + + state = ST_EOI; + break; + + case 33: + /* callx 'dst_reg' */ + bpf_insn = xasprintf ("%s %%%s", "call", token); + state = ST_EOI; + break; + + case 35: + memcpy (src_reg, token, tlen); + state = 36; /* dst_reg = str_cast skb [ 'src_reg' */ + break; + } + break; + + case BPF_MOV: + case BPF_ADD: + case BPF_SUB: + case BPF_MUL: + case BPF_DIV: + case BPF_OR: + case BPF_AND: + case BPF_LSH: + case BPF_RSH: + case BPF_MOD: + case BPF_XOR: + case BPF_ARSH: + case BPF_NEG: + switch (state) + { + case 1: + state = 3; /* dst_reg 'arith_op' */ + bpf_arithm_op = ttype; + break; + + case 3: + if (ttype == BPF_NEG) + { + /* reg = -reg */ + bpf_arithm_op = ttype; + memcpy (src_reg, token + 1, tlen - 1); + if (strcmp (dst_reg, src_reg)) + { + syntax_err ("found: '%s', expected: -%s", token, dst_reg); + break; + } + + bpf_insn = build_bpf_arithm_insn (dst_reg, src_reg, 0, + NULL, bpf_arithm_op); + state = ST_EOI; + } + break; + + case 23: + memcpy (src_reg, token, tlen); + state = 11; /* str_cast ( dst_reg offset ) '=' */ + break; + + case 12: + if (ttype == BPF_MOV) + state = 13; /* str_cast ( dst_reg offset ) '=' */ + break; + + case 31: + bpf_atomic_insn = ttype; + state = 32; /* lock str_cast ( dst_reg offset ) 'atomic_insn' */ + break; + + default: + syntax_err ("unexpected '%s'", token); + state = ST_EOI; + } + break; + + case BPF_CAST_U8: + case BPF_CAST_U16: + case BPF_CAST_U32: + case BPF_CAST_U64: + bpf_cast = ttype; + switch (state) + { + case 3: + state = 4; /* dst_reg = 'str_cast' */ + break; + + case 0: + state = 8; /* 'str_cast' */ + break; + + case 26: + state = 27; /* lock 'str_cast' */ + break; + } + break; + + case BPF_CHR_OPEN_BR: + switch (state) + { + case 4: + state = 5; /* dst_reg = str_cast '(' */ + break; + + case 8: + state = 9; /* str_cast '(' */ + break; + + case 27: + state = 28; /* lock str_cast '(' */ + break; + + case 34: + state = 35; /* dst_reg = str_cast skb '[' */ + break; + } + break; + + case BPF_CHR_CLSE_BR: + switch (state) + { + case 7: + /* dst_reg = str_cast ( imm32 ')' */ + bpf_insn = build_bpf_load_store_insn (dst_reg, src_reg, + bpf_cast, str_imm32, 1); + state = ST_EOI; + break; + + case 11: + state = 12; /* str_cast ( dst_reg imm32 ')' */ + break; + + case 21: + /* dst_reg = str_cast ( src_reg offset ')' */ + bpf_insn = build_bpf_load_store_insn (dst_reg, src_reg, + bpf_cast, str_offset, 1); + state = ST_EOI; + break; + + case 22: + state = 23; /* str_cast ( dst_reg offset ')' */ + break; + + case 30: + state = 31; /* lock str_cast ( dst_reg offset ')' */ + break; + + case 37: + /* dst_reg = str_cast skb [ src_reg imm32 ']' */ + if (*dst_reg != 'w' && !strcmp ("r0", dst_reg)) + bpf_insn = build_bpf_non_generic_load (*src_reg != '\0' ? src_reg : NULL, + bpf_cast, str_imm32); + else + syntax_err ("invalid register operand: '%s'", dst_reg); + + state = ST_EOI; + break; + } + break; + + case BPF_EXPR: + switch (state) + { + case 3: + { + /* dst_reg bpf_arithm_op 'imm32' */ + int load64 = 0; + + memcpy (str_imm32, token, tlen); + memset (token, 0, tlen); + + if ((ttype = get_token (&str, token, &tlen)) == BPF_LL + && bpf_arithm_op == BPF_MOV) + load64 = 1; + else if (ttype != BPF_UNKNOWN) + syntax_err ("unexpected token: '%s'", token); + + if (load64 && *dst_reg == 'w') + syntax_err ("unexpected register size: '%s'", dst_reg); + + if (! parse_err) + bpf_insn = build_bpf_arithm_insn (dst_reg, NULL, load64, + str_imm32, bpf_arithm_op); + state = ST_EOI; + } + break; + + case 18: + { + /* if dst_reg jmp_op src_reg goto 'offset' */ + int with_src = *src_reg != '\0'; + + memcpy (str_offset, token, tlen); + if (with_src && *dst_reg != *src_reg) + syntax_err ("different register size: '%s', '%s'", + dst_reg, src_reg); + else + bpf_insn = build_bpf_jmp_insn (dst_reg, with_src ? src_reg : NULL, + with_src ? NULL: str_imm32, + bpf_jmp_op, NULL, str_offset); + state = ST_EOI; + } + break; + + case 19: + /* goto 'offset' */ + memcpy (str_offset, token, tlen); + bpf_insn = xasprintf ("%s %s", "ja", str_offset); + state = ST_EOI; + break; + + case 6: + memcpy (str_offset, token, tlen); + state = 21; /* dst_reg = str_cast ( src_reg 'offset' */ + break; + + case 10: + memcpy (str_offset, token, tlen); + state = 22; /* str_cast ( dst_reg 'offset' */ + break; + + case 16: + memcpy (str_imm32, token, tlen); + state = 25; /* if dst_reg jmp_op 'imm32' */ + break; + + case 29: + memcpy (str_offset, token, tlen); + state = 30; /* lock str_cast ( dst_reg 'offset' */ + break; + + case 34: + /* dst_reg = str_cast skb 'imm32' */ + if (*dst_reg != 'w' && !strcmp ("r0", dst_reg)) + { + memcpy (str_imm32, token, tlen); + bpf_insn = build_bpf_non_generic_load (*src_reg != '\0' ? src_reg : NULL, + bpf_cast, str_imm32); + } + else + syntax_err ("invalid register operand: '%s'", dst_reg); + + state = ST_EOI; + break; + + case 36: + memcpy (str_imm32, token, tlen); + state = 37; /* dst_reg = str_cast skb [ src_reg 'imm32' */ + break; + } + break; + + case BPF_IF: + if (state == 0) + state = 14; + break; + + case BPF_JSGT: + case BPF_JSLT: + case BPF_JSLE: + case BPF_JSGE: + case BPF_JGT: + case BPF_JGE: + case BPF_JLE: + case BPF_JSET: + case BPF_JNE: + case BPF_JLT: + case BPF_JEQ: + if (state == 15) + { + bpf_jmp_op = ttype; + state = 16; /* if dst_reg 'jmp_op' */ + } + break; + + case BPF_GOTO: + switch (state) + { + case 17: + case 25: + state = 18; /* if dst_reg jmp_op src_reg|imm32 'goto' */ + break; + + case 0: + state = 19; + break; + } + break; + + case BPF_SYMBOL: + switch (state) + { + case 18: + { + /* if dst_reg jmp_op src_reg goto 'sym' */ + int with_src = *src_reg != '\0'; + + memcpy (str_symbol, token, tlen); + if (with_src && *dst_reg != *src_reg) + syntax_err ("different register size: '%s', '%s'", + dst_reg, src_reg); + else + bpf_insn = build_bpf_jmp_insn (dst_reg, with_src ? src_reg : NULL, + with_src ? NULL: str_imm32, + bpf_jmp_op, str_symbol, NULL); + state = ST_EOI; + } + break; + + case 19: + /* goto 'sym' */ + memcpy (str_symbol, token, tlen); + bpf_insn = xasprintf ("%s %s", "ja", str_symbol); + state = ST_EOI; + break; + + case 0: + state = ST_EOI; + break; + + case 3: + { + /* dst_reg arithm_op 'sym' */ + int load64 = 0; + + memcpy (str_symbol, token, tlen); + memset (token, 0, tlen); + + if ((ttype = get_token (&str, token, &tlen)) == BPF_LL + && bpf_arithm_op == BPF_MOV) + load64 = 1; + else if (ttype != BPF_UNKNOWN) + syntax_err ("unexpected token: '%s'", token); + + if (load64 && *dst_reg == 'w') + syntax_err ("unexpected register size: '%s'", dst_reg); + + if (! parse_err) + bpf_insn = build_bpf_arithm_insn (dst_reg, NULL, load64, + str_symbol, bpf_arithm_op); + state = ST_EOI; + } + break; + } + break; + + case BPF_LE16: + case BPF_LE32: + case BPF_LE64: + case BPF_BE16: + case BPF_BE32: + case BPF_BE64: + bpf_endianness = ttype; + state = 24; /* dst_reg = 'endianness' */ + break; + + case BPF_LOCK: + state = 26; + break; + + case BPF_IND_CALL: + state = 33; + break; + + case BPF_LD: + state = 34; /* dst_reg = str_cast 'skb' */ + break; + } + + memset (token, 0, tlen); + } + + if (state != ST_EOI) + syntax_err ("incomplete instruction"); + + *errmsg = errbuf; + return bpf_insn; + +#undef syntax_err +} + void md_assemble (char *str) { const CGEN_INSN *insn; char *errmsg; + char *a_errmsg; CGEN_FIELDS fields; + char *normal; #if CGEN_INT_INSN_P CGEN_INSN_INT buffer[CGEN_MAX_INSN_SIZE / sizeof (CGEN_INT_INSN_P)]; @@ -378,11 +1875,26 @@ md_assemble (char *str) gas_cgen_init_parse (); insn = bpf_cgen_assemble_insn (gas_cgen_cpu_desc, str, &fields, buffer, &errmsg); - if (insn == NULL) { - as_bad ("%s", errmsg); - return; + normal = bpf_pseudoc_to_normal_syntax (str, &a_errmsg); + if (normal) + { + insn = bpf_cgen_assemble_insn (gas_cgen_cpu_desc, normal, &fields, + buffer, &a_errmsg); + xfree (normal); + } + + if (insn == NULL) + { + as_bad ("%s", errmsg); + if (a_errmsg) + { + as_bad ("%s", a_errmsg); + xfree (a_errmsg); + } + return; + } } gas_cgen_finish_insn (insn, buffer, CGEN_FIELDS_BITSIZE (&fields), @@ -393,6 +1905,7 @@ md_assemble (char *str) void md_operand (expressionS *expressionP) { + invalid_expression = input_line_pointer - 1; gas_cgen_md_operand (expressionP); } diff --git a/gas/config/tc-bpf.h b/gas/config/tc-bpf.h index 1f7d76762f6..db604dbe8bc 100644 --- a/gas/config/tc-bpf.h +++ b/gas/config/tc-bpf.h @@ -51,3 +51,5 @@ /* The Linux kernel verifier expects NOPs to be encoded in this way; a jump to offset 0 means jump to the next instruction. */ #define md_single_noop_insn "ja 0" + +#define TC_EQUAL_IN_INSN(c, s) 1 From patchwork Wed Apr 26 17:31:22 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Jose E. 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Marchesi via Binutils" From: "Jose E. Marchesi" Reply-To: "Jose E. Marchesi" Errors-To: binutils-bounces+ouuuleilei=gmail.com@sourceware.org Sender: "Binutils" X-getmail-retrieved-from-mailbox: =?utf-8?q?INBOX?= X-GMAIL-THRID: =?utf-8?q?1764261011058789011?= X-GMAIL-MSGID: =?utf-8?q?1764261011058789011?= This patch expands the GAS BPF testsuite in order to also test the alternative pseudo-C syntax used in BPF assembly. This includes three main changes: - Some general GAS tests involving assignment and equality operands in expressions (such as = and ==) are disabled in bpf-* targets, because the syntax collides with the pseudo-C BPF assembly syntax. - New tests are added to the BPF GAS testsuite that test the pseudo-c syntax. Tests for all BPF instructions are included. - New tests are added to the BPF GAS testsuite that test the support for both syntaxes in the same source. gas/ChangeLog: 2023-04-20 Guillermo E. Martinez PR gas/29728 * testsuite/gas/all/assign-bad-recursive.d: Skip test in bpf-* targets. * testsuite/gas/all/eqv-dot.d: Likewise. * testsuite/gas/all/gas.exp: Skip other assignment tests in bpf-*. * testsuite/gas/bpf/alu-pseudoc.s: New file. * testsuite/gas/bpf/pseudoc-normal.s: Likewise. * testsuite/gas/bpf/pseudoc-normal.d: Likewise. * testsuite/gas/bpf/pseudoc-normal-be.d: Likewise. * testsuite/gas/bpf/mem-pseudoc.s: Likewise. * testsuite/gas/bpf/lddw-pseudoc.s: Likewise. * testsuite/gas/bpf/jump32-pseudoc.s: Likewise. * testsuite/gas/bpf/jump-pseudoc.s: Likewise. * testsuite/gas/bpf/indcall-1-pseudoc.s: Likewise. * testsuite/gas/bpf/atomic-pseudoc.s: Likewise. * testsuite/gas/bpf/alu32-pseudoc.s: Likewise. * testsuite/gas/bpf/*.d: Add -pseudoc variants of the tests. --- gas/ChangeLog | 20 ++ gas/testsuite/gas/all/assign-bad-recursive.d | 1 + gas/testsuite/gas/all/eqv-dot.d | 2 +- gas/testsuite/gas/all/gas.exp | 5 +- gas/testsuite/gas/bpf/alu-be.d | 1 + gas/testsuite/gas/bpf/alu-pseudoc.s | 51 +++++ gas/testsuite/gas/bpf/alu32-be.d | 1 + gas/testsuite/gas/bpf/alu32-pseudoc.s | 57 +++++ gas/testsuite/gas/bpf/alu32.d | 2 + gas/testsuite/gas/bpf/atomic-be.d | 1 + gas/testsuite/gas/bpf/atomic-pseudoc.s | 4 + gas/testsuite/gas/bpf/atomic.d | 2 + gas/testsuite/gas/bpf/bpf.exp | 2 + gas/testsuite/gas/bpf/indcall-1-pseudoc.s | 13 ++ gas/testsuite/gas/bpf/indcall-1.d | 2 + gas/testsuite/gas/bpf/indcall-bad-1.l | 2 + gas/testsuite/gas/bpf/jump-be.d | 1 + gas/testsuite/gas/bpf/jump-pseudoc.s | 25 +++ gas/testsuite/gas/bpf/jump.d | 4 +- gas/testsuite/gas/bpf/jump32-pseudoc.s | 25 +++ gas/testsuite/gas/bpf/jump32.d | 2 + gas/testsuite/gas/bpf/lddw-be.d | 1 + gas/testsuite/gas/bpf/lddw-pseudoc.s | 6 + gas/testsuite/gas/bpf/lddw.d | 2 + gas/testsuite/gas/bpf/mem-be.d | 3 +- gas/testsuite/gas/bpf/mem-pseudoc.s | 23 ++ gas/testsuite/gas/bpf/mem.d | 2 + gas/testsuite/gas/bpf/pseudoc-normal-be.d | 214 +++++++++++++++++++ gas/testsuite/gas/bpf/pseudoc-normal.d | 214 +++++++++++++++++++ gas/testsuite/gas/bpf/pseudoc-normal.s | 196 +++++++++++++++++ gas/testsuite/gas/macros/macros.exp | 1 + 31 files changed, 880 insertions(+), 5 deletions(-) create mode 100644 gas/testsuite/gas/bpf/alu-pseudoc.s create mode 100644 gas/testsuite/gas/bpf/alu32-pseudoc.s create mode 100644 gas/testsuite/gas/bpf/atomic-pseudoc.s create mode 100644 gas/testsuite/gas/bpf/indcall-1-pseudoc.s create mode 100644 gas/testsuite/gas/bpf/jump-pseudoc.s create mode 100644 gas/testsuite/gas/bpf/jump32-pseudoc.s create mode 100644 gas/testsuite/gas/bpf/lddw-pseudoc.s create mode 100644 gas/testsuite/gas/bpf/mem-pseudoc.s create mode 100644 gas/testsuite/gas/bpf/pseudoc-normal-be.d create mode 100644 gas/testsuite/gas/bpf/pseudoc-normal.d create mode 100644 gas/testsuite/gas/bpf/pseudoc-normal.s diff --git a/gas/ChangeLog b/gas/ChangeLog index e1cfcec4abf..88a9d2eff95 100644 --- a/gas/ChangeLog +++ b/gas/ChangeLog @@ -1,3 +1,23 @@ +2023-04-20 Guillermo E. Martinez + + PR gas/29728 + * testsuite/gas/all/assign-bad-recursive.d: Skip test in bpf-* + targets. + * testsuite/gas/all/eqv-dot.d: Likewise. + * testsuite/gas/all/gas.exp: Skip other assignment tests in bpf-*. + * testsuite/gas/bpf/alu-pseudoc.s: New file. + * testsuite/gas/bpf/pseudoc-normal.s: Likewise. + * testsuite/gas/bpf/pseudoc-normal.d: Likewise. + * testsuite/gas/bpf/pseudoc-normal-be.d: Likewise. + * testsuite/gas/bpf/mem-pseudoc.s: Likewise. + * testsuite/gas/bpf/lddw-pseudoc.s: Likewise. + * testsuite/gas/bpf/jump32-pseudoc.s: Likewise. + * testsuite/gas/bpf/jump-pseudoc.s: Likewise. + * testsuite/gas/bpf/indcall-1-pseudoc.s: Likewise. + * testsuite/gas/bpf/atomic-pseudoc.s: Likewise. + * testsuite/gas/bpf/alu32-pseudoc.s: Likewise. + * testsuite/gas/bpf/*.d: Add -pseudoc variants of the tests. + 2023-04-20 Guillermo E. Martinez PR gas/29728 diff --git a/gas/testsuite/gas/all/assign-bad-recursive.d b/gas/testsuite/gas/all/assign-bad-recursive.d index aeec5d55f8a..678be3e7c9f 100644 --- a/gas/testsuite/gas/all/assign-bad-recursive.d +++ b/gas/testsuite/gas/all/assign-bad-recursive.d @@ -1,4 +1,5 @@ #name: bad recursive assignments #source: assign-bad-recursive.s #xfail: bfin-*-* +#notarget: *bpf-*-* #error_output: assign-bad-recursive.l diff --git a/gas/testsuite/gas/all/eqv-dot.d b/gas/testsuite/gas/all/eqv-dot.d index fc40b09f217..d97db14995e 100644 --- a/gas/testsuite/gas/all/eqv-dot.d +++ b/gas/testsuite/gas/all/eqv-dot.d @@ -2,7 +2,7 @@ #name: eqv involving dot # bfin doesn't support 'symbol = expression' # tic30 and tic4x have 4 octets per byte, tic54x has 2 octets per byte -#notarget: bfin-*-* *c30-*-* *c4x-*-* *c54x-*-* +#notarget: bfin-*-* *c30-*-* *c4x-*-* *c54x-*-* *bpf-*-* # linkrelax targets don't handle equivalence expressions well (nor any # other forward expression). mep uses complex relocs #xfail: am33_2.0-*-* crx-*-* h8300-*-* mn10200-*-* mn10300-*-* mep-*-* diff --git a/gas/testsuite/gas/all/gas.exp b/gas/testsuite/gas/all/gas.exp index 734634f78d3..53d825310e2 100644 --- a/gas/testsuite/gas/all/gas.exp +++ b/gas/testsuite/gas/all/gas.exp @@ -105,7 +105,7 @@ if { [istarget "pdp11-*-*"] } then { run_dump_test eqv-dot } -if { ![istarget "bfin-*-*"] } then { +if { ![istarget "bfin-*-*"] && ![istarget "bpf-*-*"] } then { gas_test "assign-ok.s" "" "" "== assignment support" } gas_test_error "assign-bad.s" "" "== assignment for symbol already set" @@ -403,7 +403,8 @@ if { ([istarget "i*86-*-*pe*"] && ![istarget "i*86-*-openbsd*"]) \ gas_test "fastcall.s" "" "" "fastcall labels" } -if { ![istarget "bfin-*-*"] && ![istarget "nds32*-*-*"] } then { +if { ![istarget "bfin-*-*"] && ![istarget "nds32*-*-*"] \ + && ![istarget "bpf-*-*"] } then { run_dump_test assign } run_dump_test sleb128 diff --git a/gas/testsuite/gas/bpf/alu-be.d b/gas/testsuite/gas/bpf/alu-be.d index c4ddbad7d18..d42d33bc3cb 100644 --- a/gas/testsuite/gas/bpf/alu-be.d +++ b/gas/testsuite/gas/bpf/alu-be.d @@ -1,5 +1,6 @@ #as: --EB #source: alu.s +#source: alu-pseudoc.s #objdump: -dr #name: eBPF ALU64 instructions, big endian diff --git a/gas/testsuite/gas/bpf/alu-pseudoc.s b/gas/testsuite/gas/bpf/alu-pseudoc.s new file mode 100644 index 00000000000..0f79929ea0d --- /dev/null +++ b/gas/testsuite/gas/bpf/alu-pseudoc.s @@ -0,0 +1,51 @@ +# Tests for the ALU64 eBPF pseudo-C instructions + .text + r2 += 666 + r3 += -666 + r4 += 2125315823 + r5 += r6 + r2 -= 666 + r3 -= -666 + r4 -= 2125315823 + r5 -= r6 + r2 *= 666 + r3 *= -666 + r4 *= 2125315823 + r5 *= r6 + r2 /= 666 + r3 /= -666 + r4 /= 2125315823 + r5 /= r6 + r2 |= 666 + r3 |= -666 + r4 |= 2125315823 + r5 |= r6 + r2 &= 666 + r3 &= -666 + r4 &= 2125315823 + r5 &= r6 + r2 <<= 666 + r3 <<= -666 + r4 <<= 2125315823 + r5 <<= r6 + r2 >>= 666 + r3 >>= -666 + r4 >>= 2125315823 + r5 >>= r6 + r2 %= 0x29a + r3 %= -666 + r4 %= 0x7eadbeef + r5 %= r6 + r2 ^= 666 + r3 ^= -666 + r4 ^= 2125315823 + r5 ^= r6 + r2 = 666 + r3 = -666 + r4 = 2125315823 + r5 = r6 + r2 s>>= 666 + r3 s>>= -666 + r4 s>>= 2125315823 + r5 s>>= r6 + r2 = -r2 diff --git a/gas/testsuite/gas/bpf/alu32-be.d b/gas/testsuite/gas/bpf/alu32-be.d index 2c753e2261d..2ad744dc84c 100644 --- a/gas/testsuite/gas/bpf/alu32-be.d +++ b/gas/testsuite/gas/bpf/alu32-be.d @@ -1,5 +1,6 @@ #as: --EB #source: alu32.s +#source: alu32-pseudoc.s #objdump: -dr #name: eBPF ALU instructions, big-endian diff --git a/gas/testsuite/gas/bpf/alu32-pseudoc.s b/gas/testsuite/gas/bpf/alu32-pseudoc.s new file mode 100644 index 00000000000..a29f6ea0336 --- /dev/null +++ b/gas/testsuite/gas/bpf/alu32-pseudoc.s @@ -0,0 +1,57 @@ +# Tests for the ALU eBPF pseudo-C instructions + .text + W2 += 666 + W3 += -666 + W4 += 2125315823 + W5 += w6 + W2 -= 666 + W3 -= -666 + W4 -= 2125315823 + W5 -= w6 + W2 *= 666 + W3 *= -666 + W4 *= 2125315823 + w5 *= w6 + w2 /= 666 + w3 /= -666 + w4 /= 2125315823 + w5 /= w6 + w2 |= 666 + w3 |= -666 + w4 |= 2125315823 + w5 |= w6 + w2 &= 666 + w3 &= -666 + w4 &= 2125315823 + w5 &= w6 + w2 <<= 666 + w3 <<= -666 + w4 <<= 2125315823 + w5 <<= w6 + w2 >>= 666 + w3 >>= -666 + w4 >>= 2125315823 + w5 >>= w6 + w2 %= 666 + w3 %= -666 + w4 %= 0x7eadbeef + w5 %= w6 + w2 ^= 666 + w3 ^= -666 + w4 ^= 2125315823 + w5 ^= w6 + w2 = 666 + w3 = -666 + w4 = 2125315823 + w5 = w6 + w2 s>>= 666 + w3 s>>= -666 + w4 s>>= 2125315823 + w5 s>>= w6 + w2 = -w2 + r9 = le16 r9 + r8 = le32 r8 + r7 = le64 r7 + r6 = be16 r6 + r5 = be32 r5 + r4 = be64 r4 diff --git a/gas/testsuite/gas/bpf/alu32.d b/gas/testsuite/gas/bpf/alu32.d index d2260fffeb6..ac5c8341e52 100644 --- a/gas/testsuite/gas/bpf/alu32.d +++ b/gas/testsuite/gas/bpf/alu32.d @@ -1,5 +1,7 @@ #as: --EL #objdump: -dr +#source: alu32.s +#source: alu32-pseudoc.s #name: eBPF ALU instructions .*: +file format .*bpf.* diff --git a/gas/testsuite/gas/bpf/atomic-be.d b/gas/testsuite/gas/bpf/atomic-be.d index 04161e08aca..b252571e5fd 100644 --- a/gas/testsuite/gas/bpf/atomic-be.d +++ b/gas/testsuite/gas/bpf/atomic-be.d @@ -1,5 +1,6 @@ #as: --EB #source: atomic.s +#source: atomic-pseudoc.s #objdump: -dr #name: eBPF atomic instructions, big endian diff --git a/gas/testsuite/gas/bpf/atomic-pseudoc.s b/gas/testsuite/gas/bpf/atomic-pseudoc.s new file mode 100644 index 00000000000..1a4f218ccb7 --- /dev/null +++ b/gas/testsuite/gas/bpf/atomic-pseudoc.s @@ -0,0 +1,4 @@ + # Test for eBPF ADDW and ADDDW pseudo-C instructions + .text + lock *(u64 *)(r1 + 7919) += r2 + lock *(u32 *)(r1 + 7919) += r2 diff --git a/gas/testsuite/gas/bpf/atomic.d b/gas/testsuite/gas/bpf/atomic.d index 1c83cb582ab..e22d54283de 100644 --- a/gas/testsuite/gas/bpf/atomic.d +++ b/gas/testsuite/gas/bpf/atomic.d @@ -1,5 +1,7 @@ #as: --EL #objdump: -dr +#source: atomic.s +#source: atomic-pseudoc.s #name: eBPF atomic instructions .*: +file format .*bpf.* diff --git a/gas/testsuite/gas/bpf/bpf.exp b/gas/testsuite/gas/bpf/bpf.exp index b0c49a9e23a..1cdaf6dcc08 100644 --- a/gas/testsuite/gas/bpf/bpf.exp +++ b/gas/testsuite/gas/bpf/bpf.exp @@ -28,6 +28,7 @@ if {[istarget bpf*-*-*]} { run_dump_test exit run_dump_test atomic run_dump_test data + run_dump_test pseudoc-normal run_dump_test lddw-be run_dump_test alu-be @@ -38,6 +39,7 @@ if {[istarget bpf*-*-*]} { run_dump_test exit-be run_dump_test atomic-be run_dump_test data-be + run_dump_test pseudoc-normal-be run_dump_test indcall-1 run_list_test indcall-bad-1 diff --git a/gas/testsuite/gas/bpf/indcall-1-pseudoc.s b/gas/testsuite/gas/bpf/indcall-1-pseudoc.s new file mode 100644 index 00000000000..ede3eac58ef --- /dev/null +++ b/gas/testsuite/gas/bpf/indcall-1-pseudoc.s @@ -0,0 +1,13 @@ + + .text + .align 4 +main: + r0 = 1 + r1 = 1 + r2 = 2 + r6 = 56 ll + callx r6 + exit +bar: + r0 = 0 + exit diff --git a/gas/testsuite/gas/bpf/indcall-1.d b/gas/testsuite/gas/bpf/indcall-1.d index b26e8f8853f..158c75438d7 100644 --- a/gas/testsuite/gas/bpf/indcall-1.d +++ b/gas/testsuite/gas/bpf/indcall-1.d @@ -1,5 +1,7 @@ #as: -mxbpf --EL #objdump: -mxbpf -dr +#source: indcall-1.s +#source: indcall-1-pseudoc.s #name: BPF indirect call 1 .*: +file format .*bpf.* diff --git a/gas/testsuite/gas/bpf/indcall-bad-1.l b/gas/testsuite/gas/bpf/indcall-bad-1.l index 510ec6eabf2..8386736ee78 100644 --- a/gas/testsuite/gas/bpf/indcall-bad-1.l +++ b/gas/testsuite/gas/bpf/indcall-bad-1.l @@ -1,3 +1,5 @@ .*: Assembler messages: +.* Error: bad expression .* Error: illegal operand `call %r6' +.* Error: unexpected token: '%r6' #pass diff --git a/gas/testsuite/gas/bpf/jump-be.d b/gas/testsuite/gas/bpf/jump-be.d index 65632e0813b..7e235e69551 100644 --- a/gas/testsuite/gas/bpf/jump-be.d +++ b/gas/testsuite/gas/bpf/jump-be.d @@ -1,5 +1,6 @@ #as: --EB #source: jump.s +#source: jump-pseudoc.s #objdump: -dr #name: eBPF JUMP instructions, big endian diff --git a/gas/testsuite/gas/bpf/jump-pseudoc.s b/gas/testsuite/gas/bpf/jump-pseudoc.s new file mode 100644 index 00000000000..1331bdad307 --- /dev/null +++ b/gas/testsuite/gas/bpf/jump-pseudoc.s @@ -0,0 +1,25 @@ +# Tests for the JUMP pseudo-C instructions + .text + goto 2f + r1 += r1 +1: if r3 == 3 goto 2f + if r3 == r4 goto 2f +2: if r3 >= 3 goto 1b + if r3 >= r4 goto 1b +1: if r3 < 3 goto 1f + if r3 < r4 goto 1f +1: if r3 <= 3 goto 1f + if r3 <= r4 goto 1f +1: if r3 & 3 goto 1f + if r3 & r4 goto 1f +1: if r3 != 3 goto 1f + if r3 != r4 goto 1f +1: if r3 s> 3 goto 1f + if r3 s> r4 goto 1f +1: if r3 s>= 3 goto 1f + if r3 s>= r4 goto 1f +1: if r3 s< 3 goto 1f + if r3 s< r4 goto 1f +1: if r3 s<= 3 goto 1f + if r3 s<= r4 goto 1f +1: diff --git a/gas/testsuite/gas/bpf/jump.d b/gas/testsuite/gas/bpf/jump.d index ca600f602ba..903f70e8043 100644 --- a/gas/testsuite/gas/bpf/jump.d +++ b/gas/testsuite/gas/bpf/jump.d @@ -1,5 +1,7 @@ #as: --EL #objdump: -dr +#source: jump.s +#source: jump-pseudoc.s #name: eBPF JUMP instructions .*: +file format .*bpf.* @@ -28,4 +30,4 @@ Disassembly of section .text: 90: c5 03 01 00 03 00 00 00 jslt %r3,3,1 98: cd 43 00 00 00 00 00 00 jslt %r3,%r4,0 a0: d5 03 01 00 03 00 00 00 jsle %r3,3,1 - a8: dd 43 00 00 00 00 00 00 jsle %r3,%r4,0 \ No newline at end of file + a8: dd 43 00 00 00 00 00 00 jsle %r3,%r4,0 diff --git a/gas/testsuite/gas/bpf/jump32-pseudoc.s b/gas/testsuite/gas/bpf/jump32-pseudoc.s new file mode 100644 index 00000000000..07311657ebe --- /dev/null +++ b/gas/testsuite/gas/bpf/jump32-pseudoc.s @@ -0,0 +1,25 @@ +# Tests for the eBPF JUMP32 pseudo-C instructions + .text + goto 2f + r1 += r1 +1: if w3 == 3 goto 2f + if w3 == w4 goto 2f +2: if w3 >= 3 goto 1b + if w3 >= w4 goto 1b +1: if w3 < 3 goto 1f + if w3 < w4 goto 1f +1: if w3 <= 3 goto 1f + if w3 <= w4 goto 1f +1: if w3 & 3 goto 1f + if w3 & w4 goto 1f +1: if w3 != 3 goto 1f + if w3 != w4 goto 1f +1: if w3 s> 3 goto 1f + if w3 s> w4 goto 1f +1: if w3 s>= 3 goto 1f + if w3 s>= w4 goto 1f +1: if w3 s< 3 goto 1f + if w3 s< w4 goto 1f +1: if w3 s<= 3 goto 1f + if w3 s<= w4 goto 1f +1: diff --git a/gas/testsuite/gas/bpf/jump32.d b/gas/testsuite/gas/bpf/jump32.d index 4f5ae2c5aa3..ae8683dd69b 100644 --- a/gas/testsuite/gas/bpf/jump32.d +++ b/gas/testsuite/gas/bpf/jump32.d @@ -1,5 +1,7 @@ #as: --EL #objdump: -dr +#source: jump32.s +#source: jump32-pseudoc.s #name: eBPF JUMP32 instructions .*: +file format .*bpf.* diff --git a/gas/testsuite/gas/bpf/lddw-be.d b/gas/testsuite/gas/bpf/lddw-be.d index dc69d3a64d5..b9e60457cde 100644 --- a/gas/testsuite/gas/bpf/lddw-be.d +++ b/gas/testsuite/gas/bpf/lddw-be.d @@ -1,5 +1,6 @@ #as: --EB #source: lddw.s +#source: lddw-pseudoc.s #objdump: -dr #name: eBPF LDDW, big-endian diff --git a/gas/testsuite/gas/bpf/lddw-pseudoc.s b/gas/testsuite/gas/bpf/lddw-pseudoc.s new file mode 100644 index 00000000000..9968c5d8e78 --- /dev/null +++ b/gas/testsuite/gas/bpf/lddw-pseudoc.s @@ -0,0 +1,6 @@ +# Tests for the LDDW pseudo-C instruction + .text + r3 = 1 ll + r4 = 0xdeadbeef ll + r5 = 0x1122334455667788 ll + r6 = -2 ll diff --git a/gas/testsuite/gas/bpf/lddw.d b/gas/testsuite/gas/bpf/lddw.d index f44e7724353..042e4dead30 100644 --- a/gas/testsuite/gas/bpf/lddw.d +++ b/gas/testsuite/gas/bpf/lddw.d @@ -1,5 +1,7 @@ #as: --EL #objdump: -dr +#source: lddw.s +#source: lddw-pseudoc.s #name: eBPF LDDW .*: +file format .*bpf.* diff --git a/gas/testsuite/gas/bpf/mem-be.d b/gas/testsuite/gas/bpf/mem-be.d index b3dba80c2b6..148c55a3491 100644 --- a/gas/testsuite/gas/bpf/mem-be.d +++ b/gas/testsuite/gas/bpf/mem-be.d @@ -1,5 +1,6 @@ #as: --EB #source: mem.s +#source: mem-pseudoc.s #objdump: -dr #name: eBPF MEM instructions, modulus lddw, big endian @@ -27,4 +28,4 @@ Disassembly of section .text: 80: 72 10 7e ef 11 22 33 44 stb \[%r1\+0x7eef\],0x11223344 88: 6a 10 7e ef 11 22 33 44 sth \[%r1\+0x7eef\],0x11223344 90: 62 10 7e ef 11 22 33 44 stw \[%r1\+0x7eef\],0x11223344 - 98: 7a 10 ff fe 11 22 33 44 stdw \[%r1\+-2\],0x11223344 \ No newline at end of file + 98: 7a 10 ff fe 11 22 33 44 stdw \[%r1\+-2\],0x11223344 diff --git a/gas/testsuite/gas/bpf/mem-pseudoc.s b/gas/testsuite/gas/bpf/mem-pseudoc.s new file mode 100644 index 00000000000..06c2cfcdde9 --- /dev/null +++ b/gas/testsuite/gas/bpf/mem-pseudoc.s @@ -0,0 +1,23 @@ +# eBPF tests for MEM pseudo-C instructions, modulus lddw. + + .text + r0 = *(u32 *)skb[48879] + r0 = *(u16 *)skb[48879] + r0 = *(u8 *)skb[48879] + r0 = *(u64 *)skb[48879] + r0 = *(u32 *)skb[r3 + 0xbeef] + r0 = *(u16 *)skb[r5 + 0xbeef] + r0 = *(u8 *)skb[r7 + 0xbeef] + r0 = *(u64 *)skb[r9 + 0xbeef] + r2 = *(u32 *)(r1 + 32495) + r2 = *(u16 *)(r1 + 32495) + r2 = *(u8 *)(r1 + 32495) + r2 = *(u64 *)(r1 - 2) + *(u32 *)(r1 + 32495) = r2 + *(u16 *)(r1 + 32495) = r2 + *(u8 *)(r1 + 32495) = r2 + *(u64 *)(r1 - 2) = r2 + stb [%r1+0x7eef], 0x11223344 + sth [%r1+0x7eef], 0x11223344 + stw [%r1+0x7eef], 0x11223344 + stdw [%r1+-2], 0x11223344 diff --git a/gas/testsuite/gas/bpf/mem.d b/gas/testsuite/gas/bpf/mem.d index 0e0b498ea91..5f257317057 100644 --- a/gas/testsuite/gas/bpf/mem.d +++ b/gas/testsuite/gas/bpf/mem.d @@ -1,5 +1,7 @@ #as: --EL #objdump: -dr +#source: mem.s +#source: mem-pseudoc.s #name: eBPF MEM instructions, modulus lddw .*: +file format .*bpf.* diff --git a/gas/testsuite/gas/bpf/pseudoc-normal-be.d b/gas/testsuite/gas/bpf/pseudoc-normal-be.d new file mode 100644 index 00000000000..7a577edbe4c --- /dev/null +++ b/gas/testsuite/gas/bpf/pseudoc-normal-be.d @@ -0,0 +1,214 @@ +#as: --EB +#objdump: -dr +#source: pseudoc-normal.s +#name: eBPF clang (pseudo-C)/gas (normal) instructions + +.*: +file format .*bpf.* + +Disassembly of section .text: + +0+ : + 0: 07 10 00 00 00 00 00 aa add %r1,0xaa + 8: 07 10 00 00 00 00 00 aa add %r1,0xaa + 10: 0f 12 00 00 00 00 00 00 add %r1,%r2 + 18: 0f 12 00 00 00 00 00 00 add %r1,%r2 + 20: 17 10 00 00 00 00 00 aa sub %r1,0xaa + 28: 17 10 00 00 00 00 00 aa sub %r1,0xaa + 30: 1f 12 00 00 00 00 00 00 sub %r1,%r2 + 38: 1f 12 00 00 00 00 00 00 sub %r1,%r2 + 40: 27 10 00 00 00 00 00 aa mul %r1,0xaa + 48: 27 10 00 00 00 00 00 aa mul %r1,0xaa + 50: 2f 12 00 00 00 00 00 00 mul %r1,%r2 + 58: 2f 12 00 00 00 00 00 00 mul %r1,%r2 + 60: 37 10 00 00 00 00 00 aa div %r1,0xaa + 68: 37 10 00 00 00 00 00 aa div %r1,0xaa + 70: 3f 12 00 00 00 00 00 00 div %r1,%r2 + 78: 3f 12 00 00 00 00 00 00 div %r1,%r2 + 80: 47 10 00 00 00 00 00 aa or %r1,0xaa + 88: 47 10 00 00 00 00 00 aa or %r1,0xaa + 90: 4f 12 00 00 00 00 00 00 or %r1,%r2 + 98: 4f 12 00 00 00 00 00 00 or %r1,%r2 + a0: 57 10 00 00 00 00 00 aa and %r1,0xaa + a8: 57 10 00 00 00 00 00 aa and %r1,0xaa + b0: 5f 12 00 00 00 00 00 00 and %r1,%r2 + b8: 5f 12 00 00 00 00 00 00 and %r1,%r2 + c0: 67 10 00 00 00 00 00 aa lsh %r1,0xaa + c8: 67 10 00 00 00 00 00 aa lsh %r1,0xaa + d0: 6f 12 00 00 00 00 00 00 lsh %r1,%r2 + d8: 6f 12 00 00 00 00 00 00 lsh %r1,%r2 + e0: 77 10 00 00 00 00 00 aa rsh %r1,0xaa + e8: 77 10 00 00 00 00 00 aa rsh %r1,0xaa + f0: 7f 12 00 00 00 00 00 00 rsh %r1,%r2 + f8: 7f 12 00 00 00 00 00 00 rsh %r1,%r2 + 100: a7 10 00 00 00 00 00 aa xor %r1,0xaa + 108: a7 10 00 00 00 00 00 aa xor %r1,0xaa + 110: af 12 00 00 00 00 00 00 xor %r1,%r2 + 118: af 12 00 00 00 00 00 00 xor %r1,%r2 + 120: b7 10 00 00 00 00 00 aa mov %r1,0xaa + 128: b7 10 00 00 00 00 00 aa mov %r1,0xaa + 130: bf 12 00 00 00 00 00 00 mov %r1,%r2 + 138: bf 12 00 00 00 00 00 00 mov %r1,%r2 + 140: c7 10 00 00 00 00 00 aa arsh %r1,0xaa + 148: c7 10 00 00 00 00 00 aa arsh %r1,0xaa + 150: cf 12 00 00 00 00 00 00 arsh %r1,%r2 + 158: cf 12 00 00 00 00 00 00 arsh %r1,%r2 + 160: 87 10 00 00 00 00 00 00 neg %r1 + 168: 87 10 00 00 00 00 00 00 neg %r1 + 170: 04 10 00 00 00 00 00 aa add32 %r1,0xaa + 178: 04 10 00 00 00 00 00 aa add32 %r1,0xaa + 180: 0c 12 00 00 00 00 00 00 add32 %r1,%r2 + 188: 0c 12 00 00 00 00 00 00 add32 %r1,%r2 + 190: 14 10 00 00 00 00 00 aa sub32 %r1,0xaa + 198: 14 10 00 00 00 00 00 aa sub32 %r1,0xaa + 1a0: 1c 12 00 00 00 00 00 00 sub32 %r1,%r2 + 1a8: 1c 12 00 00 00 00 00 00 sub32 %r1,%r2 + 1b0: 24 10 00 00 00 00 00 aa mul32 %r1,0xaa + 1b8: 24 10 00 00 00 00 00 aa mul32 %r1,0xaa + 1c0: 2c 12 00 00 00 00 00 00 mul32 %r1,%r2 + 1c8: 2c 12 00 00 00 00 00 00 mul32 %r1,%r2 + 1d0: 34 10 00 00 00 00 00 aa div32 %r1,0xaa + 1d8: 34 10 00 00 00 00 00 aa div32 %r1,0xaa + 1e0: 3c 12 00 00 00 00 00 00 div32 %r1,%r2 + 1e8: 3c 12 00 00 00 00 00 00 div32 %r1,%r2 + 1f0: 44 10 00 00 00 00 00 aa or32 %r1,0xaa + 1f8: 44 10 00 00 00 00 00 aa or32 %r1,0xaa + 200: 4c 12 00 00 00 00 00 00 or32 %r1,%r2 + 208: 4c 12 00 00 00 00 00 00 or32 %r1,%r2 + 210: 54 10 00 00 00 00 00 aa and32 %r1,0xaa + 218: 54 10 00 00 00 00 00 aa and32 %r1,0xaa + 220: 5c 12 00 00 00 00 00 00 and32 %r1,%r2 + 228: 5c 12 00 00 00 00 00 00 and32 %r1,%r2 + 230: 64 10 00 00 00 00 00 aa lsh32 %r1,0xaa + 238: 64 10 00 00 00 00 00 aa lsh32 %r1,0xaa + 240: 6c 12 00 00 00 00 00 00 lsh32 %r1,%r2 + 248: 6c 12 00 00 00 00 00 00 lsh32 %r1,%r2 + 250: 74 10 00 00 00 00 00 aa rsh32 %r1,0xaa + 258: 74 10 00 00 00 00 00 aa rsh32 %r1,0xaa + 260: 7c 12 00 00 00 00 00 00 rsh32 %r1,%r2 + 268: 7c 12 00 00 00 00 00 00 rsh32 %r1,%r2 + 270: a4 10 00 00 00 00 00 aa xor32 %r1,0xaa + 278: a4 10 00 00 00 00 00 aa xor32 %r1,0xaa + 280: ac 12 00 00 00 00 00 00 xor32 %r1,%r2 + 288: ac 12 00 00 00 00 00 00 xor32 %r1,%r2 + 290: b4 10 00 00 00 00 00 aa mov32 %r1,0xaa + 298: b4 10 00 00 00 00 00 aa mov32 %r1,0xaa + 2a0: bc 12 00 00 00 00 00 00 mov32 %r1,%r2 + 2a8: bc 12 00 00 00 00 00 00 mov32 %r1,%r2 + 2b0: c4 10 00 00 00 00 00 aa arsh32 %r1,0xaa + 2b8: c4 10 00 00 00 00 00 aa arsh32 %r1,0xaa + 2c0: cc 12 00 00 00 00 00 00 arsh32 %r1,%r2 + 2c8: cc 12 00 00 00 00 00 00 arsh32 %r1,%r2 + 2d0: 84 10 00 00 00 00 00 00 neg32 %r1 + 2d8: 84 10 00 00 00 00 00 00 neg32 %r1 + 2e0: d4 10 00 00 00 00 00 10 endle %r1,16 + 2e8: d4 10 00 00 00 00 00 10 endle %r1,16 + 2f0: d4 10 00 00 00 00 00 20 endle %r1,32 + 2f8: d4 10 00 00 00 00 00 20 endle %r1,32 + 300: d4 10 00 00 00 00 00 40 endle %r1,64 + 308: d4 10 00 00 00 00 00 40 endle %r1,64 + 310: dc 10 00 00 00 00 00 10 endbe %r1,16 + 318: dc 10 00 00 00 00 00 10 endbe %r1,16 + 320: dc 10 00 00 00 00 00 20 endbe %r1,32 + 328: dc 10 00 00 00 00 00 20 endbe %r1,32 + 330: dc 10 00 00 00 00 00 40 endbe %r1,64 + 338: dc 10 00 00 00 00 00 40 endbe %r1,64 + 340: 71 12 00 aa 00 00 00 00 ldxb %r1,\[%r2\+0xaa\] + 348: 71 12 00 aa 00 00 00 00 ldxb %r1,\[%r2\+0xaa\] + 350: 69 12 00 aa 00 00 00 00 ldxh %r1,\[%r2\+0xaa\] + 358: 69 12 00 aa 00 00 00 00 ldxh %r1,\[%r2\+0xaa\] + 360: 61 12 00 aa 00 00 00 00 ldxw %r1,\[%r2\+0xaa\] + 368: 61 12 00 aa 00 00 00 00 ldxw %r1,\[%r2\+0xaa\] + 370: 79 12 00 aa 00 00 00 00 ldxdw %r1,\[%r2\+0xaa\] + 378: 79 12 00 aa 00 00 00 00 ldxdw %r1,\[%r2\+0xaa\] + 380: 73 12 00 aa 00 00 00 00 stxb \[%r1\+0xaa\],%r2 + 388: 73 12 00 aa 00 00 00 00 stxb \[%r1\+0xaa\],%r2 + 390: 6b 12 00 aa 00 00 00 00 stxh \[%r1\+0xaa\],%r2 + 398: 6b 12 00 aa 00 00 00 00 stxh \[%r1\+0xaa\],%r2 + 3a0: 63 12 00 aa 00 00 00 00 stxw \[%r1\+0xaa\],%r2 + 3a8: 63 12 00 aa 00 00 00 00 stxw \[%r1\+0xaa\],%r2 + 3b0: 7b 12 00 aa 00 00 00 00 stxdw \[%r1\+0xaa\],%r2 + 3b8: 7b 12 00 aa 00 00 00 00 stxdw \[%r1\+0xaa\],%r2 + 3c0: 05 00 00 bb 00 00 00 00 ja 187 + 3c8: 05 00 00 bb 00 00 00 00 ja 187 + 3d0: 15 10 00 bb 00 00 00 aa jeq %r1,0xaa,187 + 3d8: 15 10 00 bb 00 00 00 aa jeq %r1,0xaa,187 + 3e0: 1d 12 00 bb 00 00 00 00 jeq %r1,%r2,187 + 3e8: 1d 12 00 bb 00 00 00 00 jeq %r1,%r2,187 + 3f0: 25 10 00 bb 00 00 00 aa jgt %r1,0xaa,187 + 3f8: 25 10 00 bb 00 00 00 aa jgt %r1,0xaa,187 + 400: 2d 12 00 bb 00 00 00 00 jgt %r1,%r2,187 + 408: 2d 12 00 bb 00 00 00 00 jgt %r1,%r2,187 + 410: 35 10 00 bb 00 00 00 aa jge %r1,0xaa,187 + 418: 35 10 00 bb 00 00 00 aa jge %r1,0xaa,187 + 420: 3d 12 00 bb 00 00 00 00 jge %r1,%r2,187 + 428: 3d 12 00 bb 00 00 00 00 jge %r1,%r2,187 + 430: a5 10 00 bb 00 00 00 aa jlt %r1,0xaa,187 + 438: a5 10 00 bb 00 00 00 aa jlt %r1,0xaa,187 + 440: ad 12 00 bb 00 00 00 00 jlt %r1,%r2,187 + 448: ad 12 00 bb 00 00 00 00 jlt %r1,%r2,187 + 450: b5 10 00 bb 00 00 00 aa jle %r1,0xaa,187 + 458: b5 10 00 bb 00 00 00 aa jle %r1,0xaa,187 + 460: bd 12 00 bb 00 00 00 00 jle %r1,%r2,187 + 468: bd 12 00 bb 00 00 00 00 jle %r1,%r2,187 + 470: 45 10 00 bb 00 00 00 aa jset %r1,0xaa,187 + 478: 45 10 00 bb 00 00 00 aa jset %r1,0xaa,187 + 480: 4d 12 00 bb 00 00 00 00 jset %r1,%r2,187 + 488: 4d 12 00 bb 00 00 00 00 jset %r1,%r2,187 + 490: 55 10 00 bb 00 00 00 aa jne %r1,0xaa,187 + 498: 55 10 00 bb 00 00 00 aa jne %r1,0xaa,187 + 4a0: 5d 12 00 bb 00 00 00 00 jne %r1,%r2,187 + 4a8: 5d 12 00 bb 00 00 00 00 jne %r1,%r2,187 + 4b0: 65 10 00 bb 00 00 00 aa jsgt %r1,0xaa,187 + 4b8: 65 10 00 bb 00 00 00 aa jsgt %r1,0xaa,187 + 4c0: 6d 12 00 bb 00 00 00 00 jsgt %r1,%r2,187 + 4c8: 6d 12 00 bb 00 00 00 00 jsgt %r1,%r2,187 + 4d0: 75 10 00 bb 00 00 00 aa jsge %r1,0xaa,187 + 4d8: 75 10 00 bb 00 00 00 aa jsge %r1,0xaa,187 + 4e0: 7d 12 00 bb 00 00 00 00 jsge %r1,%r2,187 + 4e8: 7d 12 00 bb 00 00 00 00 jsge %r1,%r2,187 + 4f0: c5 10 00 bb 00 00 00 aa jslt %r1,0xaa,187 + 4f8: c5 10 00 bb 00 00 00 aa jslt %r1,0xaa,187 + 500: cd 12 00 bb 00 00 00 00 jslt %r1,%r2,187 + 508: cd 12 00 bb 00 00 00 00 jslt %r1,%r2,187 + 510: d5 10 00 bb 00 00 00 aa jsle %r1,0xaa,187 + 518: d5 10 00 bb 00 00 00 aa jsle %r1,0xaa,187 + 520: dd 12 00 bb 00 00 00 00 jsle %r1,%r2,187 + 528: dd 12 00 bb 00 00 00 00 jsle %r1,%r2,187 + 530: 85 00 00 00 00 00 00 aa call 170 + 538: 85 00 00 00 00 00 00 aa call 170 + 540: 95 00 00 00 00 00 00 00 exit + 548: 95 00 00 00 00 00 00 00 exit + 550: b7 60 00 00 00 00 06 20 mov %r6,0x620 + 558: 95 00 00 00 00 00 00 00 exit + 560: 20 00 00 00 00 00 00 aa ldabsw 0xaa + 568: 20 00 00 00 00 00 00 aa ldabsw 0xaa + 570: 50 07 00 00 00 00 00 aa ldindb %r7,0xaa + 578: 50 07 00 00 00 00 00 aa ldindb %r7,0xaa + 580: 20 00 00 00 00 00 00 aa ldabsw 0xaa + 588: 20 00 00 00 00 00 00 aa ldabsw 0xaa + 590: 50 07 00 00 00 00 00 aa ldindb %r7,0xaa + 598: 50 07 00 00 00 00 00 aa ldindb %r7,0xaa + 5a0: 18 30 00 00 00 00 00 01 lddw %r3,1 + 5a8: 00 00 00 00 00 00 00 00 + 5b0: 18 30 00 00 00 00 00 01 lddw %r3,1 + 5b8: 00 00 00 00 00 00 00 00 + 5c0: 18 40 00 00 ee ff 77 88 lddw %r4,-6144092013047351416 + 5c8: 00 00 00 00 aa bb cc dd + 5d0: 18 40 00 00 ee ff 77 88 lddw %r4,-6144092013047351416 + 5d8: 00 00 00 00 aa bb cc dd + 5e0: 18 50 00 00 55 66 77 88 lddw %r5,0x1122334455667788 + 5e8: 00 00 00 00 11 22 33 44 + 5f0: 18 50 00 00 55 66 77 88 lddw %r5,0x1122334455667788 + 5f8: 00 00 00 00 11 22 33 44 + 600: 18 60 00 00 00 00 06 20 lddw %r6,0x620 + 608: 00 00 00 00 00 00 00 00 + 600: R_BPF_64_64 .text + 610: 18 60 00 00 00 00 06 20 lddw %r6,0x620 + 618: 00 00 00 00 00 00 00 00 + 610: R_BPF_64_64 .text + +0000000000000620
: + 620: c3 12 00 aa 00 00 00 00 xaddw \[%r1\+0xaa\],%r2 + 628: c3 12 00 aa 00 00 00 00 xaddw \[%r1\+0xaa\],%r2 + 630: db 12 00 aa 00 00 00 00 xadddw \[%r1\+0xaa\],%r2 + 638: db 12 00 aa 00 00 00 00 xadddw \[%r1\+0xaa\],%r2 diff --git a/gas/testsuite/gas/bpf/pseudoc-normal.d b/gas/testsuite/gas/bpf/pseudoc-normal.d new file mode 100644 index 00000000000..5bece2a085a --- /dev/null +++ b/gas/testsuite/gas/bpf/pseudoc-normal.d @@ -0,0 +1,214 @@ +#as: --EL +#objdump: -dr +#source: pseudoc-normal.s +#name: eBPF clang (pseudo-C)/gas (normal) instructions + +.*: +file format .*bpf.* + +Disassembly of section .text: + +0+ : + 0: 07 01 00 00 aa 00 00 00 add %r1,0xaa + 8: 07 01 00 00 aa 00 00 00 add %r1,0xaa + 10: 0f 21 00 00 00 00 00 00 add %r1,%r2 + 18: 0f 21 00 00 00 00 00 00 add %r1,%r2 + 20: 17 01 00 00 aa 00 00 00 sub %r1,0xaa + 28: 17 01 00 00 aa 00 00 00 sub %r1,0xaa + 30: 1f 21 00 00 00 00 00 00 sub %r1,%r2 + 38: 1f 21 00 00 00 00 00 00 sub %r1,%r2 + 40: 27 01 00 00 aa 00 00 00 mul %r1,0xaa + 48: 27 01 00 00 aa 00 00 00 mul %r1,0xaa + 50: 2f 21 00 00 00 00 00 00 mul %r1,%r2 + 58: 2f 21 00 00 00 00 00 00 mul %r1,%r2 + 60: 37 01 00 00 aa 00 00 00 div %r1,0xaa + 68: 37 01 00 00 aa 00 00 00 div %r1,0xaa + 70: 3f 21 00 00 00 00 00 00 div %r1,%r2 + 78: 3f 21 00 00 00 00 00 00 div %r1,%r2 + 80: 47 01 00 00 aa 00 00 00 or %r1,0xaa + 88: 47 01 00 00 aa 00 00 00 or %r1,0xaa + 90: 4f 21 00 00 00 00 00 00 or %r1,%r2 + 98: 4f 21 00 00 00 00 00 00 or %r1,%r2 + a0: 57 01 00 00 aa 00 00 00 and %r1,0xaa + a8: 57 01 00 00 aa 00 00 00 and %r1,0xaa + b0: 5f 21 00 00 00 00 00 00 and %r1,%r2 + b8: 5f 21 00 00 00 00 00 00 and %r1,%r2 + c0: 67 01 00 00 aa 00 00 00 lsh %r1,0xaa + c8: 67 01 00 00 aa 00 00 00 lsh %r1,0xaa + d0: 6f 21 00 00 00 00 00 00 lsh %r1,%r2 + d8: 6f 21 00 00 00 00 00 00 lsh %r1,%r2 + e0: 77 01 00 00 aa 00 00 00 rsh %r1,0xaa + e8: 77 01 00 00 aa 00 00 00 rsh %r1,0xaa + f0: 7f 21 00 00 00 00 00 00 rsh %r1,%r2 + f8: 7f 21 00 00 00 00 00 00 rsh %r1,%r2 + 100: a7 01 00 00 aa 00 00 00 xor %r1,0xaa + 108: a7 01 00 00 aa 00 00 00 xor %r1,0xaa + 110: af 21 00 00 00 00 00 00 xor %r1,%r2 + 118: af 21 00 00 00 00 00 00 xor %r1,%r2 + 120: b7 01 00 00 aa 00 00 00 mov %r1,0xaa + 128: b7 01 00 00 aa 00 00 00 mov %r1,0xaa + 130: bf 21 00 00 00 00 00 00 mov %r1,%r2 + 138: bf 21 00 00 00 00 00 00 mov %r1,%r2 + 140: c7 01 00 00 aa 00 00 00 arsh %r1,0xaa + 148: c7 01 00 00 aa 00 00 00 arsh %r1,0xaa + 150: cf 21 00 00 00 00 00 00 arsh %r1,%r2 + 158: cf 21 00 00 00 00 00 00 arsh %r1,%r2 + 160: 87 01 00 00 00 00 00 00 neg %r1 + 168: 87 01 00 00 00 00 00 00 neg %r1 + 170: 04 01 00 00 aa 00 00 00 add32 %r1,0xaa + 178: 04 01 00 00 aa 00 00 00 add32 %r1,0xaa + 180: 0c 21 00 00 00 00 00 00 add32 %r1,%r2 + 188: 0c 21 00 00 00 00 00 00 add32 %r1,%r2 + 190: 14 01 00 00 aa 00 00 00 sub32 %r1,0xaa + 198: 14 01 00 00 aa 00 00 00 sub32 %r1,0xaa + 1a0: 1c 21 00 00 00 00 00 00 sub32 %r1,%r2 + 1a8: 1c 21 00 00 00 00 00 00 sub32 %r1,%r2 + 1b0: 24 01 00 00 aa 00 00 00 mul32 %r1,0xaa + 1b8: 24 01 00 00 aa 00 00 00 mul32 %r1,0xaa + 1c0: 2c 21 00 00 00 00 00 00 mul32 %r1,%r2 + 1c8: 2c 21 00 00 00 00 00 00 mul32 %r1,%r2 + 1d0: 34 01 00 00 aa 00 00 00 div32 %r1,0xaa + 1d8: 34 01 00 00 aa 00 00 00 div32 %r1,0xaa + 1e0: 3c 21 00 00 00 00 00 00 div32 %r1,%r2 + 1e8: 3c 21 00 00 00 00 00 00 div32 %r1,%r2 + 1f0: 44 01 00 00 aa 00 00 00 or32 %r1,0xaa + 1f8: 44 01 00 00 aa 00 00 00 or32 %r1,0xaa + 200: 4c 21 00 00 00 00 00 00 or32 %r1,%r2 + 208: 4c 21 00 00 00 00 00 00 or32 %r1,%r2 + 210: 54 01 00 00 aa 00 00 00 and32 %r1,0xaa + 218: 54 01 00 00 aa 00 00 00 and32 %r1,0xaa + 220: 5c 21 00 00 00 00 00 00 and32 %r1,%r2 + 228: 5c 21 00 00 00 00 00 00 and32 %r1,%r2 + 230: 64 01 00 00 aa 00 00 00 lsh32 %r1,0xaa + 238: 64 01 00 00 aa 00 00 00 lsh32 %r1,0xaa + 240: 6c 21 00 00 00 00 00 00 lsh32 %r1,%r2 + 248: 6c 21 00 00 00 00 00 00 lsh32 %r1,%r2 + 250: 74 01 00 00 aa 00 00 00 rsh32 %r1,0xaa + 258: 74 01 00 00 aa 00 00 00 rsh32 %r1,0xaa + 260: 7c 21 00 00 00 00 00 00 rsh32 %r1,%r2 + 268: 7c 21 00 00 00 00 00 00 rsh32 %r1,%r2 + 270: a4 01 00 00 aa 00 00 00 xor32 %r1,0xaa + 278: a4 01 00 00 aa 00 00 00 xor32 %r1,0xaa + 280: ac 21 00 00 00 00 00 00 xor32 %r1,%r2 + 288: ac 21 00 00 00 00 00 00 xor32 %r1,%r2 + 290: b4 01 00 00 aa 00 00 00 mov32 %r1,0xaa + 298: b4 01 00 00 aa 00 00 00 mov32 %r1,0xaa + 2a0: bc 21 00 00 00 00 00 00 mov32 %r1,%r2 + 2a8: bc 21 00 00 00 00 00 00 mov32 %r1,%r2 + 2b0: c4 01 00 00 aa 00 00 00 arsh32 %r1,0xaa + 2b8: c4 01 00 00 aa 00 00 00 arsh32 %r1,0xaa + 2c0: cc 21 00 00 00 00 00 00 arsh32 %r1,%r2 + 2c8: cc 21 00 00 00 00 00 00 arsh32 %r1,%r2 + 2d0: 84 01 00 00 00 00 00 00 neg32 %r1 + 2d8: 84 01 00 00 00 00 00 00 neg32 %r1 + 2e0: d4 01 00 00 10 00 00 00 endle %r1,16 + 2e8: d4 01 00 00 10 00 00 00 endle %r1,16 + 2f0: d4 01 00 00 20 00 00 00 endle %r1,32 + 2f8: d4 01 00 00 20 00 00 00 endle %r1,32 + 300: d4 01 00 00 40 00 00 00 endle %r1,64 + 308: d4 01 00 00 40 00 00 00 endle %r1,64 + 310: dc 01 00 00 10 00 00 00 endbe %r1,16 + 318: dc 01 00 00 10 00 00 00 endbe %r1,16 + 320: dc 01 00 00 20 00 00 00 endbe %r1,32 + 328: dc 01 00 00 20 00 00 00 endbe %r1,32 + 330: dc 01 00 00 40 00 00 00 endbe %r1,64 + 338: dc 01 00 00 40 00 00 00 endbe %r1,64 + 340: 71 21 aa 00 00 00 00 00 ldxb %r1,\[%r2\+0xaa\] + 348: 71 21 aa 00 00 00 00 00 ldxb %r1,\[%r2\+0xaa\] + 350: 69 21 aa 00 00 00 00 00 ldxh %r1,\[%r2\+0xaa\] + 358: 69 21 aa 00 00 00 00 00 ldxh %r1,\[%r2\+0xaa\] + 360: 61 21 aa 00 00 00 00 00 ldxw %r1,\[%r2\+0xaa\] + 368: 61 21 aa 00 00 00 00 00 ldxw %r1,\[%r2\+0xaa\] + 370: 79 21 aa 00 00 00 00 00 ldxdw %r1,\[%r2\+0xaa\] + 378: 79 21 aa 00 00 00 00 00 ldxdw %r1,\[%r2\+0xaa\] + 380: 73 21 aa 00 00 00 00 00 stxb \[%r1\+0xaa\],%r2 + 388: 73 21 aa 00 00 00 00 00 stxb \[%r1\+0xaa\],%r2 + 390: 6b 21 aa 00 00 00 00 00 stxh \[%r1\+0xaa\],%r2 + 398: 6b 21 aa 00 00 00 00 00 stxh \[%r1\+0xaa\],%r2 + 3a0: 63 21 aa 00 00 00 00 00 stxw \[%r1\+0xaa\],%r2 + 3a8: 63 21 aa 00 00 00 00 00 stxw \[%r1\+0xaa\],%r2 + 3b0: 7b 21 aa 00 00 00 00 00 stxdw \[%r1\+0xaa\],%r2 + 3b8: 7b 21 aa 00 00 00 00 00 stxdw \[%r1\+0xaa\],%r2 + 3c0: 05 00 bb 00 00 00 00 00 ja 187 + 3c8: 05 00 bb 00 00 00 00 00 ja 187 + 3d0: 15 01 bb 00 aa 00 00 00 jeq %r1,0xaa,187 + 3d8: 15 01 bb 00 aa 00 00 00 jeq %r1,0xaa,187 + 3e0: 1d 21 bb 00 00 00 00 00 jeq %r1,%r2,187 + 3e8: 1d 21 bb 00 00 00 00 00 jeq %r1,%r2,187 + 3f0: 25 01 bb 00 aa 00 00 00 jgt %r1,0xaa,187 + 3f8: 25 01 bb 00 aa 00 00 00 jgt %r1,0xaa,187 + 400: 2d 21 bb 00 00 00 00 00 jgt %r1,%r2,187 + 408: 2d 21 bb 00 00 00 00 00 jgt %r1,%r2,187 + 410: 35 01 bb 00 aa 00 00 00 jge %r1,0xaa,187 + 418: 35 01 bb 00 aa 00 00 00 jge %r1,0xaa,187 + 420: 3d 21 bb 00 00 00 00 00 jge %r1,%r2,187 + 428: 3d 21 bb 00 00 00 00 00 jge %r1,%r2,187 + 430: a5 01 bb 00 aa 00 00 00 jlt %r1,0xaa,187 + 438: a5 01 bb 00 aa 00 00 00 jlt %r1,0xaa,187 + 440: ad 21 bb 00 00 00 00 00 jlt %r1,%r2,187 + 448: ad 21 bb 00 00 00 00 00 jlt %r1,%r2,187 + 450: b5 01 bb 00 aa 00 00 00 jle %r1,0xaa,187 + 458: b5 01 bb 00 aa 00 00 00 jle %r1,0xaa,187 + 460: bd 21 bb 00 00 00 00 00 jle %r1,%r2,187 + 468: bd 21 bb 00 00 00 00 00 jle %r1,%r2,187 + 470: 45 01 bb 00 aa 00 00 00 jset %r1,0xaa,187 + 478: 45 01 bb 00 aa 00 00 00 jset %r1,0xaa,187 + 480: 4d 21 bb 00 00 00 00 00 jset %r1,%r2,187 + 488: 4d 21 bb 00 00 00 00 00 jset %r1,%r2,187 + 490: 55 01 bb 00 aa 00 00 00 jne %r1,0xaa,187 + 498: 55 01 bb 00 aa 00 00 00 jne %r1,0xaa,187 + 4a0: 5d 21 bb 00 00 00 00 00 jne %r1,%r2,187 + 4a8: 5d 21 bb 00 00 00 00 00 jne %r1,%r2,187 + 4b0: 65 01 bb 00 aa 00 00 00 jsgt %r1,0xaa,187 + 4b8: 65 01 bb 00 aa 00 00 00 jsgt %r1,0xaa,187 + 4c0: 6d 21 bb 00 00 00 00 00 jsgt %r1,%r2,187 + 4c8: 6d 21 bb 00 00 00 00 00 jsgt %r1,%r2,187 + 4d0: 75 01 bb 00 aa 00 00 00 jsge %r1,0xaa,187 + 4d8: 75 01 bb 00 aa 00 00 00 jsge %r1,0xaa,187 + 4e0: 7d 21 bb 00 00 00 00 00 jsge %r1,%r2,187 + 4e8: 7d 21 bb 00 00 00 00 00 jsge %r1,%r2,187 + 4f0: c5 01 bb 00 aa 00 00 00 jslt %r1,0xaa,187 + 4f8: c5 01 bb 00 aa 00 00 00 jslt %r1,0xaa,187 + 500: cd 21 bb 00 00 00 00 00 jslt %r1,%r2,187 + 508: cd 21 bb 00 00 00 00 00 jslt %r1,%r2,187 + 510: d5 01 bb 00 aa 00 00 00 jsle %r1,0xaa,187 + 518: d5 01 bb 00 aa 00 00 00 jsle %r1,0xaa,187 + 520: dd 21 bb 00 00 00 00 00 jsle %r1,%r2,187 + 528: dd 21 bb 00 00 00 00 00 jsle %r1,%r2,187 + 530: 85 00 00 00 aa 00 00 00 call 170 + 538: 85 00 00 00 aa 00 00 00 call 170 + 540: 95 00 00 00 00 00 00 00 exit + 548: 95 00 00 00 00 00 00 00 exit + 550: b7 06 00 00 20 06 00 00 mov %r6,0x620 + 558: 95 00 00 00 00 00 00 00 exit + 560: 20 00 00 00 aa 00 00 00 ldabsw 0xaa + 568: 20 00 00 00 aa 00 00 00 ldabsw 0xaa + 570: 50 70 00 00 aa 00 00 00 ldindb %r7,0xaa + 578: 50 70 00 00 aa 00 00 00 ldindb %r7,0xaa + 580: 20 00 00 00 aa 00 00 00 ldabsw 0xaa + 588: 20 00 00 00 aa 00 00 00 ldabsw 0xaa + 590: 50 70 00 00 aa 00 00 00 ldindb %r7,0xaa + 598: 50 70 00 00 aa 00 00 00 ldindb %r7,0xaa + 5a0: 18 03 00 00 01 00 00 00 lddw %r3,1 + 5a8: 00 00 00 00 00 00 00 00 + 5b0: 18 03 00 00 01 00 00 00 lddw %r3,1 + 5b8: 00 00 00 00 00 00 00 00 + 5c0: 18 04 00 00 88 77 ff ee lddw %r4,-6144092013047351416 + 5c8: 00 00 00 00 dd cc bb aa + 5d0: 18 04 00 00 88 77 ff ee lddw %r4,-6144092013047351416 + 5d8: 00 00 00 00 dd cc bb aa + 5e0: 18 05 00 00 88 77 66 55 lddw %r5,0x1122334455667788 + 5e8: 00 00 00 00 44 33 22 11 + 5f0: 18 05 00 00 88 77 66 55 lddw %r5,0x1122334455667788 + 5f8: 00 00 00 00 44 33 22 11 + 600: 18 06 00 00 20 06 00 00 lddw %r6,0x620 + 608: 00 00 00 00 00 00 00 00 + 600: R_BPF_64_64 .text + 610: 18 06 00 00 20 06 00 00 lddw %r6,0x620 + 618: 00 00 00 00 00 00 00 00 + 610: R_BPF_64_64 .text + +0000000000000620
: + 620: c3 21 aa 00 00 00 00 00 xaddw \[%r1\+0xaa\],%r2 + 628: c3 21 aa 00 00 00 00 00 xaddw \[%r1\+0xaa\],%r2 + 630: db 21 aa 00 00 00 00 00 xadddw \[%r1\+0xaa\],%r2 + 638: db 21 aa 00 00 00 00 00 xadddw \[%r1\+0xaa\],%r2 diff --git a/gas/testsuite/gas/bpf/pseudoc-normal.s b/gas/testsuite/gas/bpf/pseudoc-normal.s new file mode 100644 index 00000000000..b3467d12219 --- /dev/null +++ b/gas/testsuite/gas/bpf/pseudoc-normal.s @@ -0,0 +1,196 @@ +# Tests for mixing pseudo-C and normal eBPF instructions +beg: + .text + add %r1,0xaa + r1 += 0xaa + add %r1,%r2 + r1 += r2 + sub %r1,0xaa + r1 -= 0xaa + sub %r1,%r2 + r1 -= r2 + mul %r1,0xaa + r1 *= 0xaa + mul %r1,%r2 + r1 *= r2 + div %r1,0xaa + r1 /= 0xaa + div %r1,%r2 + r1 /= r2 + or %r1,0xaa + r1 |= 0xaa + or %r1,%r2 + r1 |= r2 + and %r1,0xaa + r1 &= 0xaa + and %r1,%r2 + r1 &= r2 + lsh %r1,0xaa + r1 <<= 0xaa + lsh %r1,%r2 + r1 <<= r2 + rsh %r1,0xaa + r1 >>= 0xaa + rsh %r1,%r2 + r1 >>= r2 + xor %r1,0xaa + r1 ^= 0xaa + xor %r1,%r2 + r1 ^= r2 + mov %r1,0xaa + r1 = 0xaa + mov %r1,%r2 + r1 = r2 + arsh %r1,0xaa + r1 s>>= 0xaa + arsh %r1,%r2 + r1 s>>= r2 + neg %r1 + r1 = -r1 + add32 %r1,0xaa + w1 += 0xaa + add32 %r1,%r2 + w1 += w2 + sub32 %r1,0xaa + w1 -= 0xaa + sub32 %r1,%r2 + w1 -= w2 + mul32 %r1,0xaa + w1 *= 0xaa + mul32 %r1,%r2 + w1 *= w2 + div32 %r1,0xaa + w1 /= 0xaa + div32 %r1,%r2 + w1 /= w2 + or32 %r1,0xaa + w1 |= 0xaa + or32 %r1,%r2 + w1 |= w2 + and32 %r1,0xaa + w1 &= 0xaa + and32 %r1,%r2 + w1 &= w2 + lsh32 %r1,0xaa + w1 <<= 0xaa + lsh32 %r1,%r2 + w1 <<= w2 + rsh32 %r1,0xaa + w1 >>= 0xaa + rsh32 %r1,%r2 + w1 >>= w2 + xor32 %r1,0xaa + w1 ^= 0xaa + xor32 %r1,%r2 + w1 ^= w2 + mov32 %r1,0xaa + w1 = 0xaa + mov32 %r1,%r2 + w1 = w2 + arsh32 %r1,0xaa + w1 s>>= 0xaa + arsh32 %r1,%r2 + w1 s>>= w2 + neg32 %r1 + w1 = -w1 + endle %r1,16 + r1 = le16 r1 + endle %r1,32 + r1 = le32 r1 + endle %r1,64 + r1 = le64 r1 + endbe %r1,16 + r1 = be16 r1 + endbe %r1,32 + r1 = be32 r1 + endbe %r1,64 + r1 = be64 r1 + ldxb %r1,[%r2+0xaa] + r1 = *(u8 *)(r2 + 0xaa) + ldxh %r1,[%r2+0xaa] + r1 = *(u16 *)(r2 + 0xaa) + ldxw %r1,[%r2+0xaa] + r1 = *(u32 *)(r2 + 0xaa) + ldxdw %r1,[%r2+0xaa] + r1 = *(u64 *)(r2 + 0xaa) + stxb [%r1+0xaa],%r2 + *(u8 *)(r1 + 0xaa) = r2 + stxh [%r1+0xaa],%r2 + *(u16 *)(r1 + 0xaa) = r2 + stxw [%r1+0xaa],%r2 + *(u32 *)(r1 + 0xaa) = r2 + stxdw [%r1+0xaa],%r2 + *(u64 *)(r1 + 0xaa) = r2 + ja 187 + goto 0xbb + jeq %r1,0xaa,187 + if r1 == 0xaa goto 0xbb + jeq %r1,%r2,187 + if r1 == r2 goto 0xbb + jgt %r1,0xaa,187 + if r1 > 0xaa goto 0xbb + jgt %r1,%r2,187 + if r1 > r2 goto 0xbb + jge %r1,0xaa,187 + if r1 >= 0xaa goto 0xbb + jge %r1,%r2,187 + if r1 >= r2 goto 0xbb + jlt %r1,0xaa,187 + if r1 < 0xaa goto 0xbb + jlt %r1,%r2,187 + if r1 < r2 goto 0xbb + jle %r1,0xaa,187 + if r1 <= 0xaa goto 0xbb + jle %r1,%r2,187 + if r1 <= r2 goto 0xbb + jset %r1,0xaa,187 + if r1 & 0xaa goto 0xbb + jset %r1,%r2,187 + if r1 & r2 goto 0xbb + jne %r1,0xaa,187 + if r1 != 0xaa goto 0xbb + jne %r1,%r2,187 + if r1 != r2 goto 0xbb + jsgt %r1,0xaa,187 + if r1 s> 0xaa goto 0xbb + jsgt %r1,%r2,187 + if r1 s> r2 goto 0xbb + jsge %r1,0xaa,187 + if r1 s>= 0xaa goto 0xbb + jsge %r1,%r2,187 + if r1 s>= r2 goto 0xbb + jslt %r1,0xaa,187 + if r1 s< 0xaa goto 0xbb + jslt %r1,%r2,187 + if r1 s< r2 goto 0xbb + jsle %r1,0xaa,187 + if r1 s<= 0xaa goto 0xbb + jsle %r1,%r2,187 + if r1 s<= r2 goto 0xbb + call 170 + call 0xaa + exit + exit + mov %r6,main - beg + exit + ldabsw 0xaa + r0 = *(u32 *)skb[0xaa] + ldindb %r7,0xaa + r0 = *(u8 *)skb[r7 + 0xaa] + ldabsw 0xaa + r0 = *(u32 *)skb[0xaa] + ldindb %r7,0xaa + r0 = *(u8 *)skb[r7 + 0xaa] + lddw %r3,1 + r3 = 1 ll + lddw %r4,0xaabbccddeeff7788 + r4 = 0xaabbccddeeff7788 ll + r5 = 0x1122334455667788 ll + lddw %r5,0x1122334455667788 + lddw %r6,main + r6 = main ll + main: + lock *(u32 *)(r1 + 0xaa) += r2 + xaddw [%r1+0xaa],%r2 + lock *(u64 *)(r1 + 0xaa) += r2 + xadddw [%r1+0xaa],%r2 diff --git a/gas/testsuite/gas/macros/macros.exp b/gas/testsuite/gas/macros/macros.exp index e217b2b14ae..811ef7d835c 100644 --- a/gas/testsuite/gas/macros/macros.exp +++ b/gas/testsuite/gas/macros/macros.exp @@ -82,6 +82,7 @@ switch -glob $target_triplet { rl78-*-* { } rx-*-* { } vax-*-* { } + bpf-*-* { } default { run_list_test dot "-alm" } } run_list_test end "" From patchwork Wed Apr 26 17:31:23 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Jose E. 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Marchesi via Binutils" From: "Jose E. Marchesi" Reply-To: "Jose E. Marchesi" Errors-To: binutils-bounces+ouuuleilei=gmail.com@sourceware.org Sender: "Binutils" X-getmail-retrieved-from-mailbox: =?utf-8?q?INBOX?= X-GMAIL-THRID: =?utf-8?q?1764260920875351005?= X-GMAIL-MSGID: =?utf-8?q?1764260920875351005?= This patch expands the GAS manual in order to specify the alternate pseudo-C assembly syntax used in BPF, and now supported by the assembler. gas/ChangeLog: 2023-04-19 Jose E. Marchesi PR gas/29757 * doc/c-bpf.texi (BPF Pseudo-C Syntax): New section. --- gas/ChangeLog | 5 ++ gas/doc/c-bpf.texi | 202 +++++++++++++++++++++++++++++++++++++++++++-- 2 files changed, 201 insertions(+), 6 deletions(-) diff --git a/gas/ChangeLog b/gas/ChangeLog index 88a9d2eff95..2659601f793 100644 --- a/gas/ChangeLog +++ b/gas/ChangeLog @@ -1,3 +1,8 @@ +2023-04-19 Jose E. Marchesi + + PR gas/29757 + * doc/c-bpf.texi (BPF Pseudo-C Syntax): New section. + 2023-04-20 Guillermo E. Martinez PR gas/29728 diff --git a/gas/doc/c-bpf.texi b/gas/doc/c-bpf.texi index bb1c452f115..0756796adc9 100644 --- a/gas/doc/c-bpf.texi +++ b/gas/doc/c-bpf.texi @@ -19,6 +19,7 @@ * BPF Syntax:: Syntax * BPF Directives:: Machine Directives * BPF Opcodes:: Opcodes +* BPF Pseudo-C Syntax:: Alternative Pseudo-C Assembly Syntax @end menu @node BPF Options @@ -228,11 +229,11 @@ in @code{%d}. @subsubsection Endianness conversion instructions @table @code -@item endle %d, (8|16|32) -Convert the 8-bit, 16-bit or 32-bit value in @code{%d} to +@item endle %d, (16|32|64) +Convert the 16-bit, 32-bit or 64-bit value in @code{%d} to little-endian. -@item endbe %d, (8|16|32) -Convert the 8-bit, 16-bit or 32-bit value in @code{%d} to big-endian. +@item endbe %d, (16|32|64) +Convert the 16-bit, 32-bit or 64-bit value in @code{%d} to big-endian. @end table @subsubsection 64-bit load and pseudo maps @@ -335,9 +336,9 @@ holds true. @item ja %d,(%s|imm32),disp16 Jump-always. @item jeq %d,(%s|imm32),disp16 -Jump if equal. +Jump if equal, unsigned. @item jgt %d,(%s|imm32),disp16 -Jump if greater. +Jump if greater, unsigned. @item jge %d,(%s|imm32),disp16 Jump if greater or equal. @item jlt %d,(%s|imm32),disp16 @@ -385,3 +386,192 @@ Exchange-and-add a 64-bit value at the specified location. @item xaddw [%d+offset16],%s Exchange-and-add a 32-bit value at the specified location. @end table + +@node BPF Pseudo-C Syntax +@section BPF Pseudo-C Syntax + +This assembler supports another syntax to denote BPF instructions, +which is an alternative to the normal looking syntax documented above. +This alternatative syntax, which we call @dfn{pseudo-C syntax}, is +supported by the LLVM/clang integrated assembler. + +This syntax is very unconventional, but we need to support it in order +to support inline assembly in existing BPF programs. + +Note that the assembler is able to parse sources in which both +syntaxes coexist: some instructions can use the usual assembly like +syntax, whereas some other instructions in the same file can use the +pseudo-C syntax. + +@subsubsection Pseudo-C Register Names + +All BPF registers are 64-bit long. However, in the Pseudo-C syntax +registers can be referred using different names, which actually +reflect the kind of instruction they appear on: + +@table @samp +@item r0..r9 +General-purpose register in an instruction that operates on its value +as if it was a 64-bit value. +@item w0..w9 +General-purpose register in an instruction that operates on its value +as if it was a 32-bit value. +@end table + +@noindent +Note that in the Pseudo-C syntax register names are not preceded by +@code{%} characters. + +@subsubsection Arithmetic instructions + +In all the instructions below, the operations are 64-bit or 32-bit +depending on the names used to refer to the registers. For example +@code{r3 += r2} will perform 64-bit addition, whereas @code{w3 += w2} +will perform 32-bit addition. Mixing register prefixes is an error, +for example @code{r3 += w2}. + +@table @code +@item dst_reg += (imm32|src_reg) +Arithmetic addition. +@item dst_reg -= (imm32|src_reg) +Arithmetic subtraction. +@item dst_reg *= (imm32|src_reg) +Arithmetic multiplication. +@item dst_reg /= (imm32|src_reg) +Arithmetic integer unsigned division. +@item dst_reg %= (imm32|src_reg) +Arithmetic integer unsigned remainder. +@item dst_reg &= (imm32|src_reg) +Bit-wise ``and'' operation. +@item dst_reg |= (imm32|src_reg) +Bit-wise ``or'' operation. +@item dst_reg ^= (imm32|src_reg) +Bit-wise exclusive-or operation. +@item dst_reg <<= (imm32|src_reg) +Left shift, by whatever specified number of bits. +@item dst_reg >>= (imm32|src_reg) +Right logical shift, by whatever specified number of bits. +@item dst_reg s>>= (imm32|src_reg) +Right arithmetic shift, by whatever specified number of bits. +@item dst_reg = (imm32|src_reg) +Move the value in @code{imm32} or @code{src_reg} in @code{dst_reg}. +@item dst_reg = -dst_reg +Arithmetic negation. +@end table + +@subsubsection Endianness conversion instructions + +@table @code +@item dst_reg = le16 src_reg +Convert the 16-bit value in @code{src_reg} to little-endian. +@item dst_reg = le32 src_reg +Convert the 32-bit value in @code{src_reg} to little-endian. +@item dst_reg = le64 src_reg +Convert the 64-bit value in @code{src_reg} to little-endian. +@item dst_reg = be16 src_reg +Convert the 16-bit value in @code{src_reg} to big-endian. +@item dst_reg = be32 src_reg +Convert the 32-bit value in @code{src_reg} to big-endian. +@item dst_reg = be64 src_reg +Convert the 64-bit value in @code{src_reg} to big-endian. +@end table + +@subsubsection 64-bit load and pseudo maps + +@table @code +@item dst_reg = imm64 ll +Load the given signed 64-bit immediate, or pseudo map descriptor, to +the destination register @code{dst_reg}. +@end table + +@subsubsection Load instructions for socket filters + +@table @code +@item r0 = *(u8 *)skb[imm32] +Absolute 8-bit load. +@item r0 = *(u16 *)skb[imm32] +Absolute 16-bit load. +@item r0 = *(u32 *)skb[imm32] +Absolute 32-bit load. +@item r0 = *(u64 *)skb[imm32] +Absolute 64-bit load. +@item r0 = *(u8 *)skb[src_reg + imm32] +Indirect 8-bit load. +@item r0 = *(u16 *)skb[src_reg + imm32] +Indirect 16-bit load. +@item r0 = *(u32 *)skb[src_reg + imm32] +Indirect 32-bit load. +@item r0 = *(u64 *)skb[src_reg + imm32] +Indirect 64-bit load. +@end table + +@subsubsection Generic load/store instructions + +@table @code +@item dst_reg = *(u8 *)(src_reg + offset16) +Generic 8-bit load. +@item dst_reg = *(u16 *)(src_reg + offset16) +Generic 16-bit load. +@item dst_reg = *(u32 *)(src_reg + offset16) +Generic 32-bit load. +@item dst_reg = *(u64 *)(src_reg + offset16) +Generic 64-bit load. +@c XXX stb +@c NO PSEUDOC-SYNTAX +@c XXX sth +@c NO PSEUDOC-SYNTAX +@c XXX stw +@c NO PSEUDOC-SYNTAX +@c XXX stdw +@c NO PSEUDOC-SYNTAX +@item *(u8 *)(dst_reg + offset16) = src_reg +Generic 8-bit store. +@item *(u16 *)(dst_reg + offset16) = src_reg +Generic 16-bit store. +@item *(u32 *)(dst_reg + offset16) = src_reg +Generic 32-bit store. +@item *(u64 *)(dst_reg + offset16) = src_reg +Generic 64-bit store. +@end table + +@subsubsection Jump instructions + +@table @code +@item goto disp16 +Jump-always. +@item if dst_reg == (imm32|src_reg) goto disp16 +Jump if equal. +@item if dst_reg & (imm32|src_reg) goto disp16 +Jump if signed equal. +@item if dst_reg != (imm32|src_reg) goto disp16 +Jump if not equal. +@item if dst_reg > (imm32|src_reg) goto disp16 +Jump if bigger, unsigned. +@item if dst_reg < (imm32|src_reg) goto disp16 +Jump if smaller, unsigned. +@item if dst_reg >= (imm32|src_reg) goto disp16 +Jump if bigger or equal, unsigned. +@item if dst_reg <= (imm32|src_reg) goto disp16 +Jump if smaller or equal, unsigned. +@item if dst_reg s> (imm32|src_reg) goto disp16 +Jump if bigger, signed. +@item if dst_reg s< (imm32|src_reg) goto disp16 +Jump if smaller, signed. +@item if dst_reg s>= (imm32|src_reg) goto disp16 +Jump if bigger or equal, signed. +@item if dst_reg s<= (imm32|src_reg) goto disp16 +Jump if smaller or equal, signed. +@item call imm32 +Jump and link. +@item exit +Terminate the eBPF program. +@end table + +@subsubsection Atomic instructions + +@table @code +@item lock *(u64 *)(dst_reg + offset16) += src_reg +Exchange-and-add a 64-bit value at the specified location. +@item lock *(u32 *)(dst_reg + offset16) += src_reg +Exchange-and-add a 32-bit value at the specified location. +@end table