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Miller" , Eric Dumazet , Jakub Kicinski , Paolo Abeni , , , , Schuyler Patton , Nishanth Menon , Vignesh Raghavendra , Tero Kristo , Rob Herring , , , Oliver Hartkopp Subject: [PATCH v2 1/4] can: m_can: Add hrtimer to generate software interrupt Date: Mon, 24 Apr 2023 14:53:59 -0500 Message-ID: <20230424195402.516-2-jm@ti.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20230424195402.516-1-jm@ti.com> References: <20230424195402.516-1-jm@ti.com> MIME-Version: 1.0 X-EXCLAIMER-MD-CONFIG: e1e8a2fd-e40a-4ac6-ac9b-f7e9cc9ee180 X-Spam-Status: No, score=-4.6 required=5.0 tests=BAYES_00,DKIMWL_WL_HIGH, DKIM_SIGNED,DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,RCVD_IN_DNSWL_MED, SPF_HELO_PASS,SPF_PASS,T_SCC_BODY_TEXT_LINE autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-getmail-retrieved-from-mailbox: =?utf-8?q?INBOX?= X-GMAIL-THRID: =?utf-8?q?1764090019709002555?= X-GMAIL-MSGID: =?utf-8?q?1764090019709002555?= Add an hrtimer to MCAN class device. Each MCAN will have its own hrtimer instantiated if there is no hardware interrupt found and poll-interval property is defined in device tree M_CAN node. The hrtimer will generate a software interrupt every 1 ms. In hrtimer callback, we check if there is a transaction pending by reading a register, then process by calling the isr if there is. Signed-off-by: Judith Mendez --- Changelog: v2: 1. Add poll-interval to MCAN class device to check if poll-interval propery is present in MCAN node, this enables timer polling method. 2. Add 'polling' flag to MCAN class device to check if a device is using timer polling method 3. Check if both timer polling and hardware interrupt are enabled for a MCAN device, default to hardware interrupt mode if both are enabled. 4. Changed ms_to_ktime() to ns_to_ktime() 5. Removed newlines, tabs, and restructure if/else section. drivers/net/can/m_can/m_can.c | 30 ++++++++++++++++++++----- drivers/net/can/m_can/m_can.h | 5 +++++ drivers/net/can/m_can/m_can_platform.c | 31 ++++++++++++++++++++++++-- 3 files changed, 59 insertions(+), 7 deletions(-) diff --git a/drivers/net/can/m_can/m_can.c b/drivers/net/can/m_can/m_can.c index a5003435802b..33e094f88da1 100644 --- a/drivers/net/can/m_can/m_can.c +++ b/drivers/net/can/m_can/m_can.c @@ -23,6 +23,7 @@ #include #include #include +#include #include "m_can.h" @@ -1587,6 +1588,11 @@ static int m_can_close(struct net_device *dev) if (!cdev->is_peripheral) napi_disable(&cdev->napi); + if (cdev->polling) { + dev_dbg(cdev->dev, "Disabling the hrtimer\n"); + hrtimer_cancel(&cdev->hrtimer); + } + m_can_stop(dev); m_can_clk_stop(cdev); free_irq(dev->irq, dev); @@ -1793,6 +1799,18 @@ static netdev_tx_t m_can_start_xmit(struct sk_buff *skb, return NETDEV_TX_OK; } +enum hrtimer_restart hrtimer_callback(struct hrtimer *timer) +{ + struct m_can_classdev *cdev = + container_of(timer, struct m_can_classdev, hrtimer); + + m_can_isr(0, cdev->net); + + hrtimer_forward_now(timer, ms_to_ktime(1)); + + return HRTIMER_RESTART; +} + static int m_can_open(struct net_device *dev) { struct m_can_classdev *cdev = netdev_priv(dev); @@ -1827,13 +1845,15 @@ static int m_can_open(struct net_device *dev) } INIT_WORK(&cdev->tx_work, m_can_tx_work_queue); - err = request_threaded_irq(dev->irq, NULL, m_can_isr, - IRQF_ONESHOT, - dev->name, dev); - } else { - err = request_irq(dev->irq, m_can_isr, IRQF_SHARED, dev->name, + IRQF_ONESHOT, dev->name, dev); + } else if (!cdev->polling) { + err = request_irq(dev->irq, m_can_isr, IRQF_SHARED, dev->name, dev); + } else { + dev_dbg(cdev->dev, "Start hrtimer\n"); + cdev->hrtimer.function = &hrtimer_callback; + hrtimer_start(&cdev->hrtimer, ms_to_ktime(cdev->poll_interval), HRTIMER_MODE_REL_PINNED); } if (err < 0) { diff --git a/drivers/net/can/m_can/m_can.h b/drivers/net/can/m_can/m_can.h index a839dc71dc9b..1ba87eb23f8e 100644 --- a/drivers/net/can/m_can/m_can.h +++ b/drivers/net/can/m_can/m_can.h @@ -28,6 +28,7 @@ #include #include #include +#include /* m_can lec values */ enum m_can_lec_type { @@ -93,6 +94,10 @@ struct m_can_classdev { int is_peripheral; struct mram_cfg mcfg[MRAM_CFG_NUM]; + + struct hrtimer hrtimer; + u32 poll_interval; + u8 polling; }; struct m_can_classdev *m_can_class_allocate_dev(struct device *dev, int sizeof_priv); diff --git a/drivers/net/can/m_can/m_can_platform.c b/drivers/net/can/m_can/m_can_platform.c index 9c1dcf838006..e899c04edc01 100644 --- a/drivers/net/can/m_can/m_can_platform.c +++ b/drivers/net/can/m_can/m_can_platform.c @@ -7,6 +7,7 @@ #include #include +#include #include "m_can.h" @@ -97,11 +98,37 @@ static int m_can_plat_probe(struct platform_device *pdev) addr = devm_platform_ioremap_resource_byname(pdev, "m_can"); irq = platform_get_irq_byname(pdev, "int0"); - if (IS_ERR(addr) || irq < 0) { - ret = -EINVAL; + if (irq == -EPROBE_DEFER) { + ret = -EPROBE_DEFER; goto probe_fail; } + if (IS_ERR(addr)) { + ret = PTR_ERR(addr); + goto probe_fail; + } + + mcan_class->polling = 0; + if (device_property_present(mcan_class->dev, "poll-interval")) { + mcan_class->polling = 1; + } + + if (!mcan_class->polling && irq < 0) { + ret = -ENODATA; + dev_dbg(mcan_class->dev, "Polling not enabled\n"); + goto probe_fail; + } + + if (mcan_class->polling && irq > 0) { + mcan_class->polling = 0; + dev_dbg(mcan_class->dev, "Polling not enabled, hardware interrupt exists\n"); + } + + if (mcan_class->polling && irq < 0) { + dev_dbg(mcan_class->dev, "Polling enabled, initialize hrtimer"); + hrtimer_init(&mcan_class->hrtimer, CLOCK_MONOTONIC, HRTIMER_MODE_REL_PINNED); + } + /* message ram could be shared */ res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "message_ram"); if (!res) { From patchwork Mon Apr 24 19:54:00 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Judith Mendez X-Patchwork-Id: 87156 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a59:b0ea:0:b0:3b6:4342:cba0 with SMTP id b10csp2981772vqo; Mon, 24 Apr 2023 13:11:59 -0700 (PDT) X-Google-Smtp-Source: AKy350Z1758fOdLA5TnXJ0rON6lkCe6xpKKVMTPGVJXNawU3dXV91ANa24j+dZfUlflB2BlNaa/M X-Received: by 2002:a17:90b:46d3:b0:23d:bbcb:c97f with SMTP id jx19-20020a17090b46d300b0023dbbcbc97fmr14537844pjb.1.1682367119284; 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Miller" , Eric Dumazet , Jakub Kicinski , Paolo Abeni , , , , Schuyler Patton , Nishanth Menon , Vignesh Raghavendra , Tero Kristo , Rob Herring , , , Oliver Hartkopp Subject: [PATCH v2 2/4] dt-bindings: net: can: Add poll-interval for MCAN Date: Mon, 24 Apr 2023 14:54:00 -0500 Message-ID: <20230424195402.516-3-jm@ti.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20230424195402.516-1-jm@ti.com> References: <20230424195402.516-1-jm@ti.com> MIME-Version: 1.0 X-EXCLAIMER-MD-CONFIG: e1e8a2fd-e40a-4ac6-ac9b-f7e9cc9ee180 X-Spam-Status: No, score=-4.6 required=5.0 tests=BAYES_00,DKIMWL_WL_HIGH, DKIM_SIGNED,DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,RCVD_IN_DNSWL_MED, SPF_HELO_PASS,SPF_PASS,T_SCC_BODY_TEXT_LINE autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-getmail-retrieved-from-mailbox: =?utf-8?q?INBOX?= X-GMAIL-THRID: =?utf-8?q?1764089784455102772?= X-GMAIL-MSGID: =?utf-8?q?1764089784455102772?= On AM62x SoC, MCANs on MCU domain do not have hardware interrupt routed to A53 Linux, instead they will use software interrupt by hrtimer. To enable timer method, interrupts should be optional so remove interrupts property from required section and introduce poll-interval property. Signed-off-by: Judith Mendez --- Changelog: v2: 1. Add poll-interval property to enable timer polling method 2. Add example using poll-interval property .../bindings/net/can/bosch,m_can.yaml | 26 ++++++++++++++++--- 1 file changed, 23 insertions(+), 3 deletions(-) diff --git a/Documentation/devicetree/bindings/net/can/bosch,m_can.yaml b/Documentation/devicetree/bindings/net/can/bosch,m_can.yaml index 67879aab623b..1c64c7a0c3df 100644 --- a/Documentation/devicetree/bindings/net/can/bosch,m_can.yaml +++ b/Documentation/devicetree/bindings/net/can/bosch,m_can.yaml @@ -40,6 +40,10 @@ properties: - const: int1 minItems: 1 + poll-interval: + $ref: /schemas/types.yaml#/definitions/flag + description: Poll interval time in milliseconds. + clocks: items: - description: peripheral clock @@ -122,15 +126,13 @@ required: - compatible - reg - reg-names - - interrupts - - interrupt-names - clocks - clock-names - bosch,mram-cfg additionalProperties: false -examples: +example with interrupts: - | #include can@20e8000 { @@ -149,4 +151,22 @@ examples: }; }; +example with timer polling: + - | + #include + can@20e8000 { + compatible = "bosch,m_can"; + reg = <0x020e8000 0x4000>, <0x02298000 0x4000>; + reg-names = "m_can", "message_ram"; + poll-interval; + clocks = <&clks IMX6SX_CLK_CANFD>, + <&clks IMX6SX_CLK_CANFD>; + clock-names = "hclk", "cclk"; + bosch,mram-cfg = <0x0 0 0 32 0 0 0 1>; + + can-transceiver { + max-bitrate = <5000000>; + }; + }; + ... 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Miller" , Eric Dumazet , Jakub Kicinski , Paolo Abeni , , , , Schuyler Patton , Nishanth Menon , Vignesh Raghavendra , Tero Kristo , Rob Herring , , , Oliver Hartkopp Subject: [PATCH v2 3/4] DO_NOT_MERGE arm64: dts: ti: Add AM62x MCAN MAIN domain transceiver overlay Date: Mon, 24 Apr 2023 14:54:01 -0500 Message-ID: <20230424195402.516-4-jm@ti.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20230424195402.516-1-jm@ti.com> References: <20230424195402.516-1-jm@ti.com> MIME-Version: 1.0 X-EXCLAIMER-MD-CONFIG: e1e8a2fd-e40a-4ac6-ac9b-f7e9cc9ee180 X-Spam-Status: No, score=-4.6 required=5.0 tests=BAYES_00,DKIMWL_WL_HIGH, DKIM_SIGNED,DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,RCVD_IN_DNSWL_MED, SPF_HELO_PASS,SPF_PASS,T_SCC_BODY_TEXT_LINE autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-getmail-retrieved-from-mailbox: =?utf-8?q?INBOX?= X-GMAIL-THRID: =?utf-8?q?1764089152850707565?= X-GMAIL-MSGID: =?utf-8?q?1764089152850707565?= Add an overlay for main domain MCAN on AM62x SK. The AM62x SK board does not have on-board CAN transceiver so instead of changing the DTB permanently, add an overlay to enable MAIN domain MCAN and support for 1 CAN transceiver. Signed-off-by: Judith Mendez --- arch/arm64/boot/dts/ti/Makefile | 2 ++ .../boot/dts/ti/k3-am625-sk-mcan-main.dtso | 35 +++++++++++++++++++ 2 files changed, 37 insertions(+) create mode 100644 arch/arm64/boot/dts/ti/k3-am625-sk-mcan-main.dtso diff --git a/arch/arm64/boot/dts/ti/Makefile b/arch/arm64/boot/dts/ti/Makefile index c83c9d772b81..abe15e76b614 100644 --- a/arch/arm64/boot/dts/ti/Makefile +++ b/arch/arm64/boot/dts/ti/Makefile @@ -9,8 +9,10 @@ # alphabetically. # Boards with AM62x SoC +k3-am625-sk-mcan-dtbs := k3-am625-sk.dtb k3-am625-sk-mcan-main.dtbo dtb-$(CONFIG_ARCH_K3) += k3-am625-beagleplay.dtb dtb-$(CONFIG_ARCH_K3) += k3-am625-sk.dtb +dtb-$(CONFIG_ARCH_K3) += k3-am625-sk-mcan.dtb dtb-$(CONFIG_ARCH_K3) += k3-am62-lp-sk.dtb # Boards with AM62Ax SoC diff --git a/arch/arm64/boot/dts/ti/k3-am625-sk-mcan-main.dtso b/arch/arm64/boot/dts/ti/k3-am625-sk-mcan-main.dtso new file mode 100644 index 000000000000..0a7b2f394f87 --- /dev/null +++ b/arch/arm64/boot/dts/ti/k3-am625-sk-mcan-main.dtso @@ -0,0 +1,35 @@ +// SPDX-License-Identifier: GPL-2.0 +/** + * DT overlay for MCAN transceiver in main domain on AM625 SK + * + * Copyright (C) 2022 Texas Instruments Incorporated - https://www.ti.com/ + */ + +/dts-v1/; +/plugin/; + +#include "k3-pinctrl.h" + +&{/} { + transceiver1: can-phy0 { + compatible = "ti,tcan1042"; + #phy-cells = <0>; + max-bitrate = <5000000>; + }; +}; + +&main_pmx0 { + main_mcan0_pins_default: main-mcan0-pins-default { + pinctrl-single,pins = < + AM62X_IOPAD(0x1dc, PIN_INPUT, 0) /* (E15) MCAN0_RX */ + AM62X_IOPAD(0x1d8, PIN_OUTPUT, 0) /* (C15) MCAN0_TX */ + >; + }; +}; + +&main_mcan0 { + status = "okay"; + pinctrl-names = "default"; + pinctrl-0 = <&main_mcan0_pins_default>; + phys = <&transceiver1>; +}; From patchwork Mon Apr 24 19:54:02 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Judith Mendez X-Patchwork-Id: 87153 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a59:b0ea:0:b0:3b6:4342:cba0 with SMTP id b10csp2975552vqo; Mon, 24 Apr 2023 13:01:03 -0700 (PDT) X-Google-Smtp-Source: AKy350Y8SxIbOfCsXqsTgYYD74HLt3Pu6OmgFQcpT0FXd0cQ+cGrT2o8TjbJd2bpyIyhs/bfaqVZ X-Received: by 2002:a17:90b:4a91:b0:23e:f855:79f2 with SMTP id lp17-20020a17090b4a9100b0023ef85579f2mr15477261pjb.12.1682366463465; Mon, 24 Apr 2023 13:01:03 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1682366463; cv=none; d=google.com; s=arc-20160816; b=xiPK1CruVWWoVvKs+c23uHmvoeQb1IOnmEpptokF0YF0WDgnoJs3CvpEjWT8LI/yJk vUP0ucM70A5QPQw1PfhAHegs6nAB139Kt4phLEnB0VZbaGAMR/7ZKYWpYoYRUAkX4y8i sBEJrs9dxZHhRG7joYHFvRffai9134nX9A8A4locmo0z13LMN4a69xHSKNz36tykZrxH fVv/mTlihp+hTIFhllzcavSHLovYOOj+zU97tZ5tqGyOBmayg0Ro/LjkOoBGjHf9FyUh NYxcHLTurexxpc2ATf77j0jm8U2eveto5eq99hH1DjvQObn/RFHXF/egbpBwxtXGi7CU /0og== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:mime-version:references:in-reply-to:message-id :date:subject:cc:to:from:dkim-signature; bh=xN8GscHHJ6cRjz/NyB+DfX33/HNoCFa7RseYHLEePrY=; b=bMUCqjAUNc/PEAA3Efz+OfkER/lnxc5ZuihfiwZsKaX21TCi1v5uFUVRCkiL51hose t4TspJDBQ+c3LDZ9yU4zbl93tRE+vQwU9l8OmOvebCUXqA+PJVj3amMycUnIPR3NVr5C sskSeacFmWddHFTnIsWLeg4DEV3v9BFX2d12ESxLWFk8WRdmpDa4VwJYEUkOx5FUo//c HLD3kL721hQ2Qc9+yVj5KnDuyr1v/3eC0QTRF4eNMx65jkzRPIrYxHZKD9yeWGwl6lM+ Nk/uD/zzXqph2g7PVd6XBvA8b/zf/i5DzfhClby2OmhAcIJ1fQ+vzXNOUxe0UZL7eUkN Ctpw== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@ti.com header.s=ti-com-17Q1 header.b="yoFBbz/X"; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=QUARANTINE sp=NONE dis=NONE) header.from=ti.com Received: from out1.vger.email (out1.vger.email. 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Miller" , Eric Dumazet , Jakub Kicinski , Paolo Abeni , , , , Schuyler Patton , Nishanth Menon , Vignesh Raghavendra , Tero Kristo , Rob Herring , , , Oliver Hartkopp Subject: [PATCH v2 4/4] DO_NOT_MERGE arm64: dts: ti: Enable MCU MCANs for AM62x Date: Mon, 24 Apr 2023 14:54:02 -0500 Message-ID: <20230424195402.516-5-jm@ti.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20230424195402.516-1-jm@ti.com> References: <20230424195402.516-1-jm@ti.com> MIME-Version: 1.0 X-EXCLAIMER-MD-CONFIG: e1e8a2fd-e40a-4ac6-ac9b-f7e9cc9ee180 X-Spam-Status: No, score=-4.6 required=5.0 tests=BAYES_00,DKIMWL_WL_HIGH, DKIM_SIGNED,DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,RCVD_IN_DNSWL_MED, SPF_HELO_PASS,SPF_PASS,T_SCC_BODY_TEXT_LINE autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-getmail-retrieved-from-mailbox: =?utf-8?q?INBOX?= X-GMAIL-THRID: =?utf-8?q?1764089096612164811?= X-GMAIL-MSGID: =?utf-8?q?1764089096612164811?= On AM62x there are no hardware interrupts routed to A53 GIC interrupt controller for MCU MCAN IPs, so MCU MCANs were not added to the MCU dtsi. In this patch series an hrtimer is introduced to MCAN driver to generate software interrupts. Now add MCU MCAN nodes to the MCU dtsi but disable the MCAN devices by default. AM62x does not carry on-board CAN transceivers, so instead of changing DTB permanently use an overlay to enable MCU MCANs and to add CAN transceiver nodes. If there is no hardware interrupt and timer method is used, remove interrupt properties and add poll-interval to enable the hrtimer per MCAN node. Signed-off-by: Judith Mendez --- Changelog: v2: 1. Add poll-interval in MCU MCAN nodes to enable timer polling mode arch/arm64/boot/dts/ti/Makefile | 2 +- arch/arm64/boot/dts/ti/k3-am62-mcu.dtsi | 24 ++++++++ .../boot/dts/ti/k3-am625-sk-mcan-mcu.dtso | 57 +++++++++++++++++++ 3 files changed, 82 insertions(+), 1 deletion(-) create mode 100644 arch/arm64/boot/dts/ti/k3-am625-sk-mcan-mcu.dtso diff --git a/arch/arm64/boot/dts/ti/Makefile b/arch/arm64/boot/dts/ti/Makefile index abe15e76b614..c76be3888e4d 100644 --- a/arch/arm64/boot/dts/ti/Makefile +++ b/arch/arm64/boot/dts/ti/Makefile @@ -9,7 +9,7 @@ # alphabetically. # Boards with AM62x SoC -k3-am625-sk-mcan-dtbs := k3-am625-sk.dtb k3-am625-sk-mcan-main.dtbo +k3-am625-sk-mcan-dtbs := k3-am625-sk.dtb k3-am625-sk-mcan-main.dtbo k3-am625-sk-mcan-mcu.dtbo dtb-$(CONFIG_ARCH_K3) += k3-am625-beagleplay.dtb dtb-$(CONFIG_ARCH_K3) += k3-am625-sk.dtb dtb-$(CONFIG_ARCH_K3) += k3-am625-sk-mcan.dtb diff --git a/arch/arm64/boot/dts/ti/k3-am62-mcu.dtsi b/arch/arm64/boot/dts/ti/k3-am62-mcu.dtsi index 076601a41e84..20462f457643 100644 --- a/arch/arm64/boot/dts/ti/k3-am62-mcu.dtsi +++ b/arch/arm64/boot/dts/ti/k3-am62-mcu.dtsi @@ -141,4 +141,28 @@ /* Tightly coupled to M4F */ status = "reserved"; }; + + mcu_mcan1: can@4e00000 { + compatible = "bosch,m_can"; + reg = <0x00 0x4e00000 0x00 0x8000>, + <0x00 0x4e08000 0x00 0x200>; + reg-names = "message_ram", "m_can"; + power-domains = <&k3_pds 188 TI_SCI_PD_EXCLUSIVE>; + clocks = <&k3_clks 188 6>, <&k3_clks 188 1>; + clock-names = "hclk", "cclk"; + bosch,mram-cfg = <0x0 128 64 64 64 64 32 32>; + status = "disabled"; + }; + + mcu_mcan2: can@4e10000 { + compatible = "bosch,m_can"; + reg = <0x00 0x4e10000 0x00 0x8000>, + <0x00 0x4e18000 0x00 0x200>; + reg-names = "message_ram", "m_can"; + power-domains = <&k3_pds 189 TI_SCI_PD_EXCLUSIVE>; + clocks = <&k3_clks 189 6>, <&k3_clks 189 1>; + clock-names = "hclk", "cclk"; + bosch,mram-cfg = <0x0 128 64 64 64 64 32 32>; + status = "disabled"; + }; }; diff --git a/arch/arm64/boot/dts/ti/k3-am625-sk-mcan-mcu.dtso b/arch/arm64/boot/dts/ti/k3-am625-sk-mcan-mcu.dtso new file mode 100644 index 000000000000..5145b3de4f9b --- /dev/null +++ b/arch/arm64/boot/dts/ti/k3-am625-sk-mcan-mcu.dtso @@ -0,0 +1,57 @@ +// SPDX-License-Identifier: GPL-2.0 +/** + * DT overlay for MCAN in MCU domain on AM625 SK + * + * Copyright (C) 2022 Texas Instruments Incorporated - https://www.ti.com/ + */ + +/dts-v1/; +/plugin/; + +#include "k3-pinctrl.h" + +&{/} { + transceiver2: can-phy1 { + compatible = "ti,tcan1042"; + #phy-cells = <0>; + max-bitrate = <5000000>; + }; + + transceiver3: can-phy2 { + compatible = "ti,tcan1042"; + #phy-cells = <0>; + max-bitrate = <5000000>; + }; +}; + +&mcu_pmx0 { + mcu_mcan1_pins_default: mcu-mcan1-pins-default { + pinctrl-single,pins = < + AM62X_IOPAD(0x038, PIN_INPUT, 0) /* (B3) MCU_MCAN0_RX */ + AM62X_IOPAD(0x034, PIN_OUTPUT, 0) /* (D6) MCU_MCAN0_TX */ + >; + }; + + mcu_mcan2_pins_default: mcu-mcan2-pins-default { + pinctrl-single,pins = < + AM62X_IOPAD(0x040, PIN_INPUT, 0) /* (D4) MCU_MCAN1_RX */ + AM62X_IOPAD(0x03C, PIN_OUTPUT, 0) /* (E5) MCU_MCAN1_TX */ + >; + }; +}; + +&mcu_mcan1 { + poll-interval; + pinctrl-names = "default"; + pinctrl-0 = <&mcu_mcan1_pins_default>; + phys = <&transceiver2>; + status = "okay"; +}; + +&mcu_mcan2 { + poll-interval; + pinctrl-names = "default"; + pinctrl-0 = <&mcu_mcan2_pins_default>; + phys = <&transceiver3>; + status = "okay"; +};