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[83.9.29.144]) by smtp.gmail.com with ESMTPSA id k25-20020a2e2419000000b002a8dce82cf6sm28853ljk.32.2023.04.19.18.14.56 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 19 Apr 2023 18:14:57 -0700 (PDT) From: Konrad Dybcio Date: Thu, 20 Apr 2023 03:14:54 +0200 Subject: [PATCH 1/2] drm/msm/dpu1: Rename sm8150_dspp_blk to sdm845_dspp_blk MIME-Version: 1.0 Message-Id: <20230420-topic-dpu_gc-v1-1-d9d1a5e40917@linaro.org> References: <20230420-topic-dpu_gc-v1-0-d9d1a5e40917@linaro.org> In-Reply-To: <20230420-topic-dpu_gc-v1-0-d9d1a5e40917@linaro.org> To: Rob Clark , Abhinav Kumar , Dmitry Baryshkov , Sean Paul , David Airlie , Daniel Vetter Cc: Marijn Suijten , linux-arm-msm@vger.kernel.org, dri-devel@lists.freedesktop.org, freedreno@lists.freedesktop.org, linux-kernel@vger.kernel.org, Konrad Dybcio X-Mailer: b4 0.12.2 X-Developer-Signature: v=1; a=ed25519-sha256; t=1681953295; l=8333; i=konrad.dybcio@linaro.org; s=20230215; h=from:subject:message-id; bh=Hv4Y+/OyENonA4D9WD0Atvk2X0RWlZqmSfSPeIcfQbA=; b=T14hv8IeHuKO46xglmGsqcs8p+2X5l5YCGnQE8/gsMEYDBDiRoCgy+ALP29JpTGlB/9vGa2HQeoF 3jaHxr3hDzJPUU2EPJNZ6FnzxLHsa2/GxxPZKjqsqtBqVHhF2czU X-Developer-Key: i=konrad.dybcio@linaro.org; a=ed25519; pk=iclgkYvtl2w05SSXO5EjjSYlhFKsJ+5OSZBjOkQuEms= X-Spam-Status: No, score=-2.1 required=5.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,RCVD_IN_DNSWL_NONE, SPF_HELO_NONE,SPF_PASS,T_SCC_BODY_TEXT_LINE autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-getmail-retrieved-from-mailbox: =?utf-8?q?INBOX?= X-GMAIL-THRID: =?utf-8?q?1763656554089675802?= X-GMAIL-MSGID: =?utf-8?q?1763656554089675802?= SDM845 was the first SoC to include both PCC v4 and GC v1.8. We don't currently support any other blocks but the common config for these two can be reused for a large amount of SoCs. Rename it to indicate the origin of that combo. Signed-off-by: Konrad Dybcio Reviewed-by: Dmitry Baryshkov --- drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_5_0_sm8150.h | 8 ++++---- drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_6_0_sm8250.h | 8 ++++---- drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_6_3_sm6115.h | 2 +- drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_6_5_qcm2290.h | 2 +- drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_7_0_sm8350.h | 8 ++++---- drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_8_0_sc8280xp.h | 8 ++++---- drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_8_1_sm8450.h | 8 ++++---- drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_9_0_sm8550.h | 8 ++++---- drivers/gpu/drm/msm/disp/dpu1/dpu_hw_catalog.c | 2 +- 9 files changed, 27 insertions(+), 27 deletions(-) diff --git a/drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_5_0_sm8150.h b/drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_5_0_sm8150.h index 282d410269ff..c555d43ef0e0 100644 --- a/drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_5_0_sm8150.h +++ b/drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_5_0_sm8150.h @@ -118,13 +118,13 @@ static const struct dpu_lm_cfg sm8150_lm[] = { static const struct dpu_dspp_cfg sm8150_dspp[] = { DSPP_BLK("dspp_0", DSPP_0, 0x54000, DSPP_SC7180_MASK, - &sm8150_dspp_sblk), + &sdm845_dspp_sblk), DSPP_BLK("dspp_1", DSPP_1, 0x56000, DSPP_SC7180_MASK, - &sm8150_dspp_sblk), + &sdm845_dspp_sblk), DSPP_BLK("dspp_2", DSPP_2, 0x58000, DSPP_SC7180_MASK, - &sm8150_dspp_sblk), + &sdm845_dspp_sblk), DSPP_BLK("dspp_3", DSPP_3, 0x5a000, DSPP_SC7180_MASK, - &sm8150_dspp_sblk), + &sdm845_dspp_sblk), }; static const struct dpu_pingpong_cfg sm8150_pp[] = { diff --git a/drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_6_0_sm8250.h b/drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_6_0_sm8250.h index 2c40229ea515..c8a174352ede 100644 --- a/drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_6_0_sm8250.h +++ b/drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_6_0_sm8250.h @@ -119,13 +119,13 @@ static const struct dpu_lm_cfg sm8250_lm[] = { static const struct dpu_dspp_cfg sm8250_dspp[] = { DSPP_BLK("dspp_0", DSPP_0, 0x54000, DSPP_SC7180_MASK, - &sm8150_dspp_sblk), + &sdm845_dspp_sblk), DSPP_BLK("dspp_1", DSPP_1, 0x56000, DSPP_SC7180_MASK, - &sm8150_dspp_sblk), + &sdm845_dspp_sblk), DSPP_BLK("dspp_2", DSPP_2, 0x58000, DSPP_SC7180_MASK, - &sm8150_dspp_sblk), + &sdm845_dspp_sblk), DSPP_BLK("dspp_3", DSPP_3, 0x5a000, DSPP_SC7180_MASK, - &sm8150_dspp_sblk), + &sdm845_dspp_sblk), }; static const struct dpu_pingpong_cfg sm8250_pp[] = { diff --git a/drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_6_3_sm6115.h b/drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_6_3_sm6115.h index 6f04d8f85c92..00f82b2c18ff 100644 --- a/drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_6_3_sm6115.h +++ b/drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_6_3_sm6115.h @@ -56,7 +56,7 @@ static const struct dpu_lm_cfg sm6115_lm[] = { static const struct dpu_dspp_cfg sm6115_dspp[] = { DSPP_BLK("dspp_0", DSPP_0, 0x54000, DSPP_SC7180_MASK, - &sm8150_dspp_sblk), + &sdm845_dspp_sblk), }; static const struct dpu_pingpong_cfg sm6115_pp[] = { diff --git a/drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_6_5_qcm2290.h b/drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_6_5_qcm2290.h index 303492d62a5c..5f103140abc7 100644 --- a/drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_6_5_qcm2290.h +++ b/drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_6_5_qcm2290.h @@ -53,7 +53,7 @@ static const struct dpu_lm_cfg qcm2290_lm[] = { static const struct dpu_dspp_cfg qcm2290_dspp[] = { DSPP_BLK("dspp_0", DSPP_0, 0x54000, DSPP_SC7180_MASK, - &sm8150_dspp_sblk), + &sdm845_dspp_sblk), }; static const struct dpu_pingpong_cfg qcm2290_pp[] = { diff --git a/drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_7_0_sm8350.h b/drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_7_0_sm8350.h index ca107ca8de46..257e898fea18 100644 --- a/drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_7_0_sm8350.h +++ b/drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_7_0_sm8350.h @@ -117,13 +117,13 @@ static const struct dpu_lm_cfg sm8350_lm[] = { static const struct dpu_dspp_cfg sm8350_dspp[] = { DSPP_BLK("dspp_0", DSPP_0, 0x54000, DSPP_SC7180_MASK, - &sm8150_dspp_sblk), + &sdm845_dspp_sblk), DSPP_BLK("dspp_1", DSPP_1, 0x56000, DSPP_SC7180_MASK, - &sm8150_dspp_sblk), + &sdm845_dspp_sblk), DSPP_BLK("dspp_2", DSPP_2, 0x58000, DSPP_SC7180_MASK, - &sm8150_dspp_sblk), + &sdm845_dspp_sblk), DSPP_BLK("dspp_3", DSPP_3, 0x5a000, DSPP_SC7180_MASK, - &sm8150_dspp_sblk), + &sdm845_dspp_sblk), }; static const struct dpu_pingpong_cfg sm8350_pp[] = { diff --git a/drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_8_0_sc8280xp.h b/drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_8_0_sc8280xp.h index 9aab110b8c44..e4d4e47418fe 100644 --- a/drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_8_0_sc8280xp.h +++ b/drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_8_0_sc8280xp.h @@ -111,13 +111,13 @@ static const struct dpu_lm_cfg sc8280xp_lm[] = { static const struct dpu_dspp_cfg sc8280xp_dspp[] = { DSPP_BLK("dspp_0", DSPP_0, 0x54000, DSPP_SC7180_MASK, - &sm8150_dspp_sblk), + &sdm845_dspp_sblk), DSPP_BLK("dspp_1", DSPP_1, 0x56000, DSPP_SC7180_MASK, - &sm8150_dspp_sblk), + &sdm845_dspp_sblk), DSPP_BLK("dspp_2", DSPP_2, 0x58000, DSPP_SC7180_MASK, - &sm8150_dspp_sblk), + &sdm845_dspp_sblk), DSPP_BLK("dspp_3", DSPP_3, 0x5a000, DSPP_SC7180_MASK, - &sm8150_dspp_sblk), + &sdm845_dspp_sblk), }; static const struct dpu_pingpong_cfg sc8280xp_pp[] = { diff --git a/drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_8_1_sm8450.h b/drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_8_1_sm8450.h index 02a259b6b426..88ad81e03622 100644 --- a/drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_8_1_sm8450.h +++ b/drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_8_1_sm8450.h @@ -118,13 +118,13 @@ static const struct dpu_lm_cfg sm8450_lm[] = { static const struct dpu_dspp_cfg sm8450_dspp[] = { DSPP_BLK("dspp_0", DSPP_0, 0x54000, DSPP_SC7180_MASK, - &sm8150_dspp_sblk), + &sdm845_dspp_sblk), DSPP_BLK("dspp_1", DSPP_1, 0x56000, DSPP_SC7180_MASK, - &sm8150_dspp_sblk), + &sdm845_dspp_sblk), DSPP_BLK("dspp_2", DSPP_2, 0x58000, DSPP_SC7180_MASK, - &sm8150_dspp_sblk), + &sdm845_dspp_sblk), DSPP_BLK("dspp_3", DSPP_3, 0x5a000, DSPP_SC7180_MASK, - &sm8150_dspp_sblk), + &sdm845_dspp_sblk), }; /* FIXME: interrupts */ static const struct dpu_pingpong_cfg sm8450_pp[] = { diff --git a/drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_9_0_sm8550.h b/drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_9_0_sm8550.h index 9e403034093f..ecc034f76441 100644 --- a/drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_9_0_sm8550.h +++ b/drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_9_0_sm8550.h @@ -123,13 +123,13 @@ static const struct dpu_lm_cfg sm8550_lm[] = { static const struct dpu_dspp_cfg sm8550_dspp[] = { DSPP_BLK("dspp_0", DSPP_0, 0x54000, DSPP_SC7180_MASK, - &sm8150_dspp_sblk), + &sdm845_dspp_sblk), DSPP_BLK("dspp_1", DSPP_1, 0x56000, DSPP_SC7180_MASK, - &sm8150_dspp_sblk), + &sdm845_dspp_sblk), DSPP_BLK("dspp_2", DSPP_2, 0x58000, DSPP_SC7180_MASK, - &sm8150_dspp_sblk), + &sdm845_dspp_sblk), DSPP_BLK("dspp_3", DSPP_3, 0x5a000, DSPP_SC7180_MASK, - &sm8150_dspp_sblk), + &sdm845_dspp_sblk), }; static const struct dpu_pingpong_cfg sm8550_pp[] = { PP_BLK_DIPHER("pingpong_0", PINGPONG_0, 0x69000, MERGE_3D_0, sc7280_pp_sblk, diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_catalog.c b/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_catalog.c index 03f162af1a50..69af786b66a0 100644 --- a/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_catalog.c +++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_catalog.c @@ -458,7 +458,7 @@ static const struct dpu_dspp_sub_blks sc7180_dspp_sblk = { .len = 0x90, .version = 0x10000}, }; -static const struct dpu_dspp_sub_blks sm8150_dspp_sblk = { +static const struct dpu_dspp_sub_blks sdm845_dspp_sblk = { .pcc = {.id = DPU_DSPP_PCC, .base = 0x1700, .len = 0x90, .version = 0x40000}, }; From patchwork Thu Apr 20 01:14:55 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Konrad Dybcio X-Patchwork-Id: 85677 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a59:b0ea:0:b0:3b6:4342:cba0 with SMTP id b10csp784490vqo; Wed, 19 Apr 2023 18:25:56 -0700 (PDT) X-Google-Smtp-Source: AKy350YNT31cBY+/BE24k8CJa+Ut7BU94cjMileAKqC/Ls3sLLYx4llWDS0ZRbATI5+aFDMCstOS X-Received: by 2002:a17:90b:1b4b:b0:24b:2b8a:d618 with SMTP id nv11-20020a17090b1b4b00b0024b2b8ad618mr3089839pjb.9.1681953956052; Wed, 19 Apr 2023 18:25:56 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1681953956; cv=none; d=google.com; s=arc-20160816; b=HBIG3ZzQFLj4Rw2lAxukkH4FkDh8Ldu9uOlMoOoNVogRu4Dtj6+2CYNvNL7v1nq7/+ HOyJ9iC2Us6EksRY4RVXSDCspC9x5yX7gs0hg6FLIU7M0Yz7qSLh068seXF2etNRYrw8 IphEVrw//Hdc13xuaeIY9yFO4DS9RGyXF2IhKoloHrAEtzzwPw58Zg9+8vDpvXTSk2NK xONBb96p6gQF7vS1iVZCB1gQddHbTO0q6KyvXgEgTBaUX0kVDMREcIJ7dpK7uQ5BdHqH 1BxG3hLIUO1NaE1cGGiiAcgihKt6JM7LXgbFZAeoU7l8u9o8EImxcpUoEihLx70ukubd XqBw== ARC-Message-Signature: i=1; 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[83.9.29.144]) by smtp.gmail.com with ESMTPSA id k25-20020a2e2419000000b002a8dce82cf6sm28853ljk.32.2023.04.19.18.14.57 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 19 Apr 2023 18:14:58 -0700 (PDT) From: Konrad Dybcio Date: Thu, 20 Apr 2023 03:14:55 +0200 Subject: [PATCH 2/2] drm/msm/dpu1: Enable GCv1.8 on many SoCs MIME-Version: 1.0 Message-Id: <20230420-topic-dpu_gc-v1-2-d9d1a5e40917@linaro.org> References: <20230420-topic-dpu_gc-v1-0-d9d1a5e40917@linaro.org> In-Reply-To: <20230420-topic-dpu_gc-v1-0-d9d1a5e40917@linaro.org> To: Rob Clark , Abhinav Kumar , Dmitry Baryshkov , Sean Paul , David Airlie , Daniel Vetter Cc: Marijn Suijten , linux-arm-msm@vger.kernel.org, dri-devel@lists.freedesktop.org, freedreno@lists.freedesktop.org, linux-kernel@vger.kernel.org, Konrad Dybcio X-Mailer: b4 0.12.2 X-Developer-Signature: v=1; a=ed25519-sha256; t=1681953295; l=8668; i=konrad.dybcio@linaro.org; s=20230215; h=from:subject:message-id; bh=QVtQDfqK3It08LFU0wkflkqkKfPf5Fjkojt8olul9zU=; b=xOUG96Fng8s7DGGyX1U0c3LFk6G1IUdyzoRkrICsv+NBs8gz7jaefwTfUtt0l+u8UmcMFbyiHZW4 2qknP6p1Bk8EkbG2nr9397t5boBG8LJt+2uOBuRSbaRhmMx7YGHh X-Developer-Key: i=konrad.dybcio@linaro.org; a=ed25519; pk=iclgkYvtl2w05SSXO5EjjSYlhFKsJ+5OSZBjOkQuEms= X-Spam-Status: No, score=-2.1 required=5.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,RCVD_IN_DNSWL_NONE, SPF_HELO_NONE,SPF_PASS,T_SCC_BODY_TEXT_LINE autolearn=unavailable autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-getmail-retrieved-from-mailbox: =?utf-8?q?INBOX?= X-GMAIL-THRID: =?utf-8?q?1763656551640153009?= X-GMAIL-MSGID: =?utf-8?q?1763656551640153009?= There's a plethora of S(D)M-era SoCs that have a GC v1.8 but never declared, let alone enabled it. Do so! Signed-off-by: Konrad Dybcio --- drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_5_0_sm8150.h | 8 ++++---- drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_6_0_sm8250.h | 8 ++++---- drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_6_3_sm6115.h | 2 +- drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_6_5_qcm2290.h | 2 +- drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_7_0_sm8350.h | 8 ++++---- drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_8_0_sc8280xp.h | 8 ++++---- drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_8_1_sm8450.h | 8 ++++---- drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_9_0_sm8550.h | 8 ++++---- drivers/gpu/drm/msm/disp/dpu1/dpu_hw_catalog.c | 2 ++ 9 files changed, 28 insertions(+), 26 deletions(-) diff --git a/drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_5_0_sm8150.h b/drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_5_0_sm8150.h index c555d43ef0e0..a49e4d265b73 100644 --- a/drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_5_0_sm8150.h +++ b/drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_5_0_sm8150.h @@ -117,13 +117,13 @@ static const struct dpu_lm_cfg sm8150_lm[] = { }; static const struct dpu_dspp_cfg sm8150_dspp[] = { - DSPP_BLK("dspp_0", DSPP_0, 0x54000, DSPP_SC7180_MASK, + DSPP_BLK("dspp_0", DSPP_0, 0x54000, DSPP_MSM8998_MASK, &sdm845_dspp_sblk), - DSPP_BLK("dspp_1", DSPP_1, 0x56000, DSPP_SC7180_MASK, + DSPP_BLK("dspp_1", DSPP_1, 0x56000, DSPP_MSM8998_MASK, &sdm845_dspp_sblk), - DSPP_BLK("dspp_2", DSPP_2, 0x58000, DSPP_SC7180_MASK, + DSPP_BLK("dspp_2", DSPP_2, 0x58000, DSPP_MSM8998_MASK, &sdm845_dspp_sblk), - DSPP_BLK("dspp_3", DSPP_3, 0x5a000, DSPP_SC7180_MASK, + DSPP_BLK("dspp_3", DSPP_3, 0x5a000, DSPP_MSM8998_MASK, &sdm845_dspp_sblk), }; diff --git a/drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_6_0_sm8250.h b/drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_6_0_sm8250.h index c8a174352ede..80252a96c2fd 100644 --- a/drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_6_0_sm8250.h +++ b/drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_6_0_sm8250.h @@ -118,13 +118,13 @@ static const struct dpu_lm_cfg sm8250_lm[] = { }; static const struct dpu_dspp_cfg sm8250_dspp[] = { - DSPP_BLK("dspp_0", DSPP_0, 0x54000, DSPP_SC7180_MASK, + DSPP_BLK("dspp_0", DSPP_0, 0x54000, DSPP_MSM8998_MASK, &sdm845_dspp_sblk), - DSPP_BLK("dspp_1", DSPP_1, 0x56000, DSPP_SC7180_MASK, + DSPP_BLK("dspp_1", DSPP_1, 0x56000, DSPP_MSM8998_MASK, &sdm845_dspp_sblk), - DSPP_BLK("dspp_2", DSPP_2, 0x58000, DSPP_SC7180_MASK, + DSPP_BLK("dspp_2", DSPP_2, 0x58000, DSPP_MSM8998_MASK, &sdm845_dspp_sblk), - DSPP_BLK("dspp_3", DSPP_3, 0x5a000, DSPP_SC7180_MASK, + DSPP_BLK("dspp_3", DSPP_3, 0x5a000, DSPP_MSM8998_MASK, &sdm845_dspp_sblk), }; diff --git a/drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_6_3_sm6115.h b/drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_6_3_sm6115.h index 00f82b2c18ff..ea89ba1ab0fd 100644 --- a/drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_6_3_sm6115.h +++ b/drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_6_3_sm6115.h @@ -55,7 +55,7 @@ static const struct dpu_lm_cfg sm6115_lm[] = { }; static const struct dpu_dspp_cfg sm6115_dspp[] = { - DSPP_BLK("dspp_0", DSPP_0, 0x54000, DSPP_SC7180_MASK, + DSPP_BLK("dspp_0", DSPP_0, 0x54000, DSPP_MSM8998_MASK, &sdm845_dspp_sblk), }; diff --git a/drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_6_5_qcm2290.h b/drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_6_5_qcm2290.h index 5f103140abc7..739c1a4f6618 100644 --- a/drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_6_5_qcm2290.h +++ b/drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_6_5_qcm2290.h @@ -52,7 +52,7 @@ static const struct dpu_lm_cfg qcm2290_lm[] = { }; static const struct dpu_dspp_cfg qcm2290_dspp[] = { - DSPP_BLK("dspp_0", DSPP_0, 0x54000, DSPP_SC7180_MASK, + DSPP_BLK("dspp_0", DSPP_0, 0x54000, DSPP_MSM8998_MASK, &sdm845_dspp_sblk), }; diff --git a/drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_7_0_sm8350.h b/drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_7_0_sm8350.h index 257e898fea18..f90eb457ff3d 100644 --- a/drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_7_0_sm8350.h +++ b/drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_7_0_sm8350.h @@ -116,13 +116,13 @@ static const struct dpu_lm_cfg sm8350_lm[] = { }; static const struct dpu_dspp_cfg sm8350_dspp[] = { - DSPP_BLK("dspp_0", DSPP_0, 0x54000, DSPP_SC7180_MASK, + DSPP_BLK("dspp_0", DSPP_0, 0x54000, DSPP_MSM8998_MASK, &sdm845_dspp_sblk), - DSPP_BLK("dspp_1", DSPP_1, 0x56000, DSPP_SC7180_MASK, + DSPP_BLK("dspp_1", DSPP_1, 0x56000, DSPP_MSM8998_MASK, &sdm845_dspp_sblk), - DSPP_BLK("dspp_2", DSPP_2, 0x58000, DSPP_SC7180_MASK, + DSPP_BLK("dspp_2", DSPP_2, 0x58000, DSPP_MSM8998_MASK, &sdm845_dspp_sblk), - DSPP_BLK("dspp_3", DSPP_3, 0x5a000, DSPP_SC7180_MASK, + DSPP_BLK("dspp_3", DSPP_3, 0x5a000, DSPP_MSM8998_MASK, &sdm845_dspp_sblk), }; diff --git a/drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_8_0_sc8280xp.h b/drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_8_0_sc8280xp.h index e4d4e47418fe..27f14a4fa882 100644 --- a/drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_8_0_sc8280xp.h +++ b/drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_8_0_sc8280xp.h @@ -110,13 +110,13 @@ static const struct dpu_lm_cfg sc8280xp_lm[] = { }; static const struct dpu_dspp_cfg sc8280xp_dspp[] = { - DSPP_BLK("dspp_0", DSPP_0, 0x54000, DSPP_SC7180_MASK, + DSPP_BLK("dspp_0", DSPP_0, 0x54000, DSPP_MSM8998_MASK, &sdm845_dspp_sblk), - DSPP_BLK("dspp_1", DSPP_1, 0x56000, DSPP_SC7180_MASK, + DSPP_BLK("dspp_1", DSPP_1, 0x56000, DSPP_MSM8998_MASK, &sdm845_dspp_sblk), - DSPP_BLK("dspp_2", DSPP_2, 0x58000, DSPP_SC7180_MASK, + DSPP_BLK("dspp_2", DSPP_2, 0x58000, DSPP_MSM8998_MASK, &sdm845_dspp_sblk), - DSPP_BLK("dspp_3", DSPP_3, 0x5a000, DSPP_SC7180_MASK, + DSPP_BLK("dspp_3", DSPP_3, 0x5a000, DSPP_MSM8998_MASK, &sdm845_dspp_sblk), }; diff --git a/drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_8_1_sm8450.h b/drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_8_1_sm8450.h index 88ad81e03622..0f97b4cc9e25 100644 --- a/drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_8_1_sm8450.h +++ b/drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_8_1_sm8450.h @@ -117,13 +117,13 @@ static const struct dpu_lm_cfg sm8450_lm[] = { }; static const struct dpu_dspp_cfg sm8450_dspp[] = { - DSPP_BLK("dspp_0", DSPP_0, 0x54000, DSPP_SC7180_MASK, + DSPP_BLK("dspp_0", DSPP_0, 0x54000, DSPP_MSM8998_MASK, &sdm845_dspp_sblk), - DSPP_BLK("dspp_1", DSPP_1, 0x56000, DSPP_SC7180_MASK, + DSPP_BLK("dspp_1", DSPP_1, 0x56000, DSPP_MSM8998_MASK, &sdm845_dspp_sblk), - DSPP_BLK("dspp_2", DSPP_2, 0x58000, DSPP_SC7180_MASK, + DSPP_BLK("dspp_2", DSPP_2, 0x58000, DSPP_MSM8998_MASK, &sdm845_dspp_sblk), - DSPP_BLK("dspp_3", DSPP_3, 0x5a000, DSPP_SC7180_MASK, + DSPP_BLK("dspp_3", DSPP_3, 0x5a000, DSPP_MSM8998_MASK, &sdm845_dspp_sblk), }; /* FIXME: interrupts */ diff --git a/drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_9_0_sm8550.h b/drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_9_0_sm8550.h index ecc034f76441..2fdf0382cf1d 100644 --- a/drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_9_0_sm8550.h +++ b/drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_9_0_sm8550.h @@ -122,13 +122,13 @@ static const struct dpu_lm_cfg sm8550_lm[] = { }; static const struct dpu_dspp_cfg sm8550_dspp[] = { - DSPP_BLK("dspp_0", DSPP_0, 0x54000, DSPP_SC7180_MASK, + DSPP_BLK("dspp_0", DSPP_0, 0x54000, DSPP_MSM8998_MASK, &sdm845_dspp_sblk), - DSPP_BLK("dspp_1", DSPP_1, 0x56000, DSPP_SC7180_MASK, + DSPP_BLK("dspp_1", DSPP_1, 0x56000, DSPP_MSM8998_MASK, &sdm845_dspp_sblk), - DSPP_BLK("dspp_2", DSPP_2, 0x58000, DSPP_SC7180_MASK, + DSPP_BLK("dspp_2", DSPP_2, 0x58000, DSPP_MSM8998_MASK, &sdm845_dspp_sblk), - DSPP_BLK("dspp_3", DSPP_3, 0x5a000, DSPP_SC7180_MASK, + DSPP_BLK("dspp_3", DSPP_3, 0x5a000, DSPP_MSM8998_MASK, &sdm845_dspp_sblk), }; static const struct dpu_pingpong_cfg sm8550_pp[] = { diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_catalog.c b/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_catalog.c index 69af786b66a0..c4d3aaebb06f 100644 --- a/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_catalog.c +++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_catalog.c @@ -461,6 +461,8 @@ static const struct dpu_dspp_sub_blks sc7180_dspp_sblk = { static const struct dpu_dspp_sub_blks sdm845_dspp_sblk = { .pcc = {.id = DPU_DSPP_PCC, .base = 0x1700, .len = 0x90, .version = 0x40000}, + .gc = { .id = DPU_DSPP_GC, .base = 0x17c0, + .len = 0x90, .version = 0x10008}, }; #define DSPP_BLK(_name, _id, _base, _mask, _sblk) \