From patchwork Fri Oct 21 23:56:59 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Sebastian Fricke X-Patchwork-Id: 7032 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a5d:4242:0:0:0:0:0 with SMTP id s2csp958811wrr; Fri, 21 Oct 2022 17:00:52 -0700 (PDT) X-Google-Smtp-Source: AMsMyM7K4eoGa9ak/G/5FT+3H2tfQP/AIkJ2cZNB2xwSf6SUaWv4mtWqbi6Ku1wAf0aYOYhgZtXu X-Received: by 2002:a05:6a00:1da1:b0:563:2e07:db1b with SMTP id z33-20020a056a001da100b005632e07db1bmr21406335pfw.22.1666396851825; Fri, 21 Oct 2022 17:00:51 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1666396851; cv=none; d=google.com; s=arc-20160816; b=G2QeOaeFhy9olFblYIZK6YxVIHDJF7oJjj8EQ3WiOSya9L6wbnhOXm9oEv88F3YMdL ixbLzK5P6FY8CMccjFOBNGFZQCbJgnddD4eS4qlT2AeLn4o9ITgeF+J1NvHciGrPb6t+ qc9OAnt7GIK/hednc2YwfAYYqX/Sf989H3p0wroBssABCzHpws2Po5oQlL9/ADIysGK+ /VTtVNyL4GP5oWNYtgNnt4tep30G4YuQbABZp+wsGq5nWPamzF0shhgLFKglImF5dFZW oWpErYpUS04CMUI9Aval46zQtBDc01eMDNRvK75eFTufTEZ2DjiLTDEMz7HA2+E3WI1H UObw== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from :dkim-signature; bh=Gwn8npl7UAtjJh3t7b0z2T8QksT9znuiIs8TMhsSwHw=; b=bibApDMMu+Bb0Wcc+YutjBQZ9l0m4B8WjmN5jNbR7Uy25h8FgjoyTZzgyBXUEyjfKd tXr33IwZwt9FyVZPNrJYZkpLIbI6yvChfTt2k5QsdjFo5bMhBkLem76HzenQFa8zEq11 pWbDq+yxehqVfPOY8b36EiYe8DQhrRmUpIdoRJ2qYhmuW4GhOFkqmlXQBqpKjyPHNv/i ixK6VWVl35/xoyovz9flwFwvRhx2D3gx/39q6BU131MCKEcZbO/XUc/9yOg2Omm2SEgu 70cwL5qQdyTbZSTiHLqgbxBgoyRmgEw15SbEc9CZQT7r1LVbkNAbYl6xtV6W8zSLOIqe Pheg== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@collabora.com header.s=mail header.b=bGhvdgzC; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=collabora.com Received: from out1.vger.email (out1.vger.email. [2620:137:e000::1:20]) by mx.google.com with ESMTP id z22-20020a63c056000000b0046b1dabcb34si26877428pgi.765.2022.10.21.17.00.37; Fri, 21 Oct 2022 17:00:51 -0700 (PDT) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) client-ip=2620:137:e000::1:20; Authentication-Results: mx.google.com; dkim=pass header.i=@collabora.com header.s=mail header.b=bGhvdgzC; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=collabora.com Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S229613AbiJUX7H (ORCPT + 99 others); Fri, 21 Oct 2022 19:59:07 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:40144 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229978AbiJUX7F (ORCPT ); Fri, 21 Oct 2022 19:59:05 -0400 Received: from madras.collabora.co.uk (madras.collabora.co.uk [46.235.227.172]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id DB37E1B1D7; Fri, 21 Oct 2022 16:59:03 -0700 (PDT) Received: from localhost (89-26-75-29.goll.dyn.salzburg-online.at [89.26.75.29]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange ECDHE (P-256) server-signature RSA-PSS (4096 bits) server-digest SHA256) (No client certificate requested) (Authenticated sender: sebastianfricke) by madras.collabora.co.uk (Postfix) with ESMTPSA id 23D3E660252D; Sat, 22 Oct 2022 00:59:02 +0100 (BST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=collabora.com; s=mail; t=1666396742; bh=WX42UbRvhWW+T6eeBIcTxHMTmQHOlCr/w9dQBRM9Sbs=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=bGhvdgzCCjp5W1DTyIo54x6/ZZZzPcu2TBvYe0O4I2E8uXhatpP076e2X5+nw+w+d 3svhghyysRI0yW4SwbocEDWOysTYvYCq5Q9aw3AWN7BL++AbexmGhuocag6Pawr1OS c2+qoe5trbDyUuCHr2U9cNjyhUvXt3OPDqt7NxvfunCrfGeF81KLkHC9bnj/odVczV Zv2kGW9zMsjfXxjrlAjRX/JbKk+d7KxA4g9b0wL2GjL4fJ7lmvRcXcS4tV9rZqY5pc wNlVpY8OtVkzSS0Gw4kfMCrb+US8+0/apD6cZKlFI+u9rEqGNh029Y5orLDTuSmM1z mNP31eG6ueGHA== From: Sebastian Fricke To: linux-media@vger.kernel.org Cc: kernel@collabora.com, nas.chung@chipsnmedia.com, hverkuil@xs4all.nl, ezequiel@vanguardiasur.com.ar, linux-kernel@vger.kernel.org, nicolas.dufresne@collabora.com, Sebastian Fricke Subject: [PATCH v10 1/7] media: platform: chips-media: Move Coda to separate folder Date: Sat, 22 Oct 2022 01:56:59 +0200 Message-Id: <20221021235704.219915-2-sebastian.fricke@collabora.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20221021235704.219915-1-sebastian.fricke@collabora.com> References: <20221021235704.219915-1-sebastian.fricke@collabora.com> MIME-Version: 1.0 X-Spam-Status: No, score=-2.1 required=5.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,SPF_HELO_NONE,SPF_PASS autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-getmail-retrieved-from-mailbox: =?utf-8?q?INBOX?= X-GMAIL-THRID: =?utf-8?q?1747343745360735462?= X-GMAIL-MSGID: =?utf-8?q?1747343745360735462?= Prepare the folder structure for a second Chips&Media driver. Move the Coda driver to a sub-directory. Signed-off-by: Sebastian Fricke --- MAINTAINERS | 2 +- drivers/media/platform/chips-media/Kconfig | 17 +---------------- drivers/media/platform/chips-media/Makefile | 5 +---- .../media/platform/chips-media/coda/Kconfig | 18 ++++++++++++++++++ .../media/platform/chips-media/coda/Makefile | 6 ++++++ .../platform/chips-media/{ => coda}/coda-bit.c | 0 .../chips-media/{ => coda}/coda-common.c | 0 .../platform/chips-media/{ => coda}/coda-gdi.c | 0 .../chips-media/{ => coda}/coda-h264.c | 0 .../chips-media/{ => coda}/coda-jpeg.c | 0 .../chips-media/{ => coda}/coda-mpeg2.c | 0 .../chips-media/{ => coda}/coda-mpeg4.c | 0 .../platform/chips-media/{ => coda}/coda.h | 0 .../chips-media/{ => coda}/coda_regs.h | 0 .../platform/chips-media/{ => coda}/imx-vdoa.c | 0 .../platform/chips-media/{ => coda}/imx-vdoa.h | 0 .../platform/chips-media/{ => coda}/trace.h | 0 17 files changed, 27 insertions(+), 21 deletions(-) create mode 100644 drivers/media/platform/chips-media/coda/Kconfig create mode 100644 drivers/media/platform/chips-media/coda/Makefile rename drivers/media/platform/chips-media/{ => coda}/coda-bit.c (100%) rename drivers/media/platform/chips-media/{ => coda}/coda-common.c (100%) rename drivers/media/platform/chips-media/{ => coda}/coda-gdi.c (100%) rename drivers/media/platform/chips-media/{ => coda}/coda-h264.c (100%) rename drivers/media/platform/chips-media/{ => coda}/coda-jpeg.c (100%) rename drivers/media/platform/chips-media/{ => coda}/coda-mpeg2.c (100%) rename drivers/media/platform/chips-media/{ => coda}/coda-mpeg4.c (100%) rename drivers/media/platform/chips-media/{ => coda}/coda.h (100%) rename drivers/media/platform/chips-media/{ => coda}/coda_regs.h (100%) rename drivers/media/platform/chips-media/{ => coda}/imx-vdoa.c (100%) rename drivers/media/platform/chips-media/{ => coda}/imx-vdoa.h (100%) rename drivers/media/platform/chips-media/{ => coda}/trace.h (100%) diff --git a/MAINTAINERS b/MAINTAINERS index cf0f18502372..618fd1a490f8 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -5135,7 +5135,7 @@ M: Philipp Zabel L: linux-media@vger.kernel.org S: Maintained F: Documentation/devicetree/bindings/media/coda.yaml -F: drivers/media/platform/chips-media/ +F: drivers/media/platform/chips-media/coda CODE OF CONDUCT M: Greg Kroah-Hartman diff --git a/drivers/media/platform/chips-media/Kconfig b/drivers/media/platform/chips-media/Kconfig index 57f8f8a22df8..f87a0d693df7 100644 --- a/drivers/media/platform/chips-media/Kconfig +++ b/drivers/media/platform/chips-media/Kconfig @@ -2,19 +2,4 @@ comment "Chips&Media media platform drivers" -config VIDEO_CODA - tristate "Chips&Media Coda multi-standard codec IP" - depends on V4L_MEM2MEM_DRIVERS - depends on VIDEO_DEV && OF && (ARCH_MXC || COMPILE_TEST) - select SRAM - select VIDEOBUF2_DMA_CONTIG - select VIDEOBUF2_VMALLOC - select V4L2_JPEG_HELPER - select V4L2_MEM2MEM_DEV - select GENERIC_ALLOCATOR - help - Coda is a range of video codec IPs that supports - H.264, MPEG-4, and other video formats. - -config VIDEO_IMX_VDOA - def_tristate VIDEO_CODA if SOC_IMX6Q || COMPILE_TEST +source "drivers/media/platform/chips-media/coda/Kconfig" diff --git a/drivers/media/platform/chips-media/Makefile b/drivers/media/platform/chips-media/Makefile index bbb16425a875..5ee693f651c1 100644 --- a/drivers/media/platform/chips-media/Makefile +++ b/drivers/media/platform/chips-media/Makefile @@ -1,6 +1,3 @@ # SPDX-License-Identifier: GPL-2.0-only -coda-vpu-objs := coda-common.o coda-bit.o coda-gdi.o coda-h264.o coda-mpeg2.o coda-mpeg4.o coda-jpeg.o - -obj-$(CONFIG_VIDEO_CODA) += coda-vpu.o -obj-$(CONFIG_VIDEO_IMX_VDOA) += imx-vdoa.o +obj-y += coda/ diff --git a/drivers/media/platform/chips-media/coda/Kconfig b/drivers/media/platform/chips-media/coda/Kconfig new file mode 100644 index 000000000000..cb7b66c71380 --- /dev/null +++ b/drivers/media/platform/chips-media/coda/Kconfig @@ -0,0 +1,18 @@ +# SPDX-License-Identifier: GPL-2.0-only + +config VIDEO_CODA + tristate "Chips&Media Coda multi-standard codec IP" + depends on V4L_MEM2MEM_DRIVERS + depends on VIDEO_DEV && OF && (ARCH_MXC || COMPILE_TEST) + select SRAM + select VIDEOBUF2_DMA_CONTIG + select VIDEOBUF2_VMALLOC + select V4L2_JPEG_HELPER + select V4L2_MEM2MEM_DEV + select GENERIC_ALLOCATOR + help + Coda is a range of video codec IPs that supports + H.264, MPEG-4, and other video formats. + +config VIDEO_IMX_VDOA + def_tristate VIDEO_CODA if SOC_IMX6Q || COMPILE_TEST diff --git a/drivers/media/platform/chips-media/coda/Makefile b/drivers/media/platform/chips-media/coda/Makefile new file mode 100644 index 000000000000..bbb16425a875 --- /dev/null +++ b/drivers/media/platform/chips-media/coda/Makefile @@ -0,0 +1,6 @@ +# SPDX-License-Identifier: GPL-2.0-only + +coda-vpu-objs := coda-common.o coda-bit.o coda-gdi.o coda-h264.o coda-mpeg2.o coda-mpeg4.o coda-jpeg.o + +obj-$(CONFIG_VIDEO_CODA) += coda-vpu.o +obj-$(CONFIG_VIDEO_IMX_VDOA) += imx-vdoa.o diff --git a/drivers/media/platform/chips-media/coda-bit.c b/drivers/media/platform/chips-media/coda/coda-bit.c similarity index 100% rename from drivers/media/platform/chips-media/coda-bit.c rename to drivers/media/platform/chips-media/coda/coda-bit.c diff --git a/drivers/media/platform/chips-media/coda-common.c b/drivers/media/platform/chips-media/coda/coda-common.c similarity index 100% rename from drivers/media/platform/chips-media/coda-common.c rename to drivers/media/platform/chips-media/coda/coda-common.c diff --git a/drivers/media/platform/chips-media/coda-gdi.c b/drivers/media/platform/chips-media/coda/coda-gdi.c similarity index 100% rename from drivers/media/platform/chips-media/coda-gdi.c rename to drivers/media/platform/chips-media/coda/coda-gdi.c diff --git a/drivers/media/platform/chips-media/coda-h264.c b/drivers/media/platform/chips-media/coda/coda-h264.c similarity index 100% rename from drivers/media/platform/chips-media/coda-h264.c rename to drivers/media/platform/chips-media/coda/coda-h264.c diff --git a/drivers/media/platform/chips-media/coda-jpeg.c b/drivers/media/platform/chips-media/coda/coda-jpeg.c similarity index 100% rename from drivers/media/platform/chips-media/coda-jpeg.c rename to drivers/media/platform/chips-media/coda/coda-jpeg.c diff --git a/drivers/media/platform/chips-media/coda-mpeg2.c b/drivers/media/platform/chips-media/coda/coda-mpeg2.c similarity index 100% rename from drivers/media/platform/chips-media/coda-mpeg2.c rename to drivers/media/platform/chips-media/coda/coda-mpeg2.c diff --git a/drivers/media/platform/chips-media/coda-mpeg4.c b/drivers/media/platform/chips-media/coda/coda-mpeg4.c similarity index 100% rename from drivers/media/platform/chips-media/coda-mpeg4.c rename to drivers/media/platform/chips-media/coda/coda-mpeg4.c diff --git a/drivers/media/platform/chips-media/coda.h b/drivers/media/platform/chips-media/coda/coda.h similarity index 100% rename from drivers/media/platform/chips-media/coda.h rename to drivers/media/platform/chips-media/coda/coda.h diff --git a/drivers/media/platform/chips-media/coda_regs.h b/drivers/media/platform/chips-media/coda/coda_regs.h similarity index 100% rename from drivers/media/platform/chips-media/coda_regs.h rename to drivers/media/platform/chips-media/coda/coda_regs.h diff --git a/drivers/media/platform/chips-media/imx-vdoa.c b/drivers/media/platform/chips-media/coda/imx-vdoa.c similarity index 100% rename from drivers/media/platform/chips-media/imx-vdoa.c rename to drivers/media/platform/chips-media/coda/imx-vdoa.c diff --git a/drivers/media/platform/chips-media/imx-vdoa.h b/drivers/media/platform/chips-media/coda/imx-vdoa.h similarity index 100% rename from drivers/media/platform/chips-media/imx-vdoa.h rename to drivers/media/platform/chips-media/coda/imx-vdoa.h diff --git a/drivers/media/platform/chips-media/trace.h b/drivers/media/platform/chips-media/coda/trace.h similarity index 100% rename from drivers/media/platform/chips-media/trace.h rename to drivers/media/platform/chips-media/coda/trace.h From patchwork Sat Oct 22 00:05:02 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Sebastian Fricke X-Patchwork-Id: 7046 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a5d:4242:0:0:0:0:0 with SMTP id s2csp961453wrr; Fri, 21 Oct 2022 17:07:38 -0700 (PDT) X-Google-Smtp-Source: AMsMyM4a+ouqih23cmIZnvDSrlKSgsDX6Xx1L2r+Xe7HFqFb8npC3PNuaavWWbAAIHCV3Fkfj7c7 X-Received: by 2002:a17:906:fe46:b0:73d:939a:ec99 with SMTP id wz6-20020a170906fe4600b0073d939aec99mr18057036ejb.169.1666397257871; Fri, 21 Oct 2022 17:07:37 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1666397257; cv=none; d=google.com; s=arc-20160816; b=X/u+3DpIAKZO/jlRcOuvfp3fUY/OS8l4fldsHKkMmEpVwb44YG5n+A4JNJmczc/wgX nFc/c22ioRFq6Ta49ERgGCALqhUACIZN1wgglNmA32bNwsEn01rab+vcn/Uyr8qxMtcQ y0jfvZv9zpXj64FYBuHUCltMuM1fLZN/uLSZPXV4zbnhKRaYTTYIkzwUeKPwBBzt7ahl wKtxWyrx9HZ3+mK0HnbTE5iYXeacXp+jTYu74d4eMjJI7OYCOUzeqV1nuwNvxGJLiHzt WBhwG7Tx9P2W1MhMUGakPm/vOcar8tdFLyxL/i3SW8BIPEPx2Q/9AU2NAUXnfPf9b5fn 6obQ== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from :dkim-signature; bh=8iWph8yVTze7DjVIn1WJxdIXrAqdIy4DnhKmTGlQgX8=; b=K2/e/cMn5XndAqg2XfpbQF0Hy6hYV6emK6mRHuaciHmsfPEcObTh4H7sLs6OhgWmHI k60v9O13tsEUFa1QQKkbA7NidyVt9AKLTHR3Pk870QOvciprC+hucheyy0qbFUhhAAmZ GCW+CpHt39I7Metcog1n2cUPwWLxmQs7NlOZvfNRFS4fzTrEYjaKCZY3hdqkofO9CQ1V cFm40SEbj5d98GvjokMnK6Nlk9Pzfdo0l5wByDgs+5z+nLe3fVFqxo7c4hZmmz49qPYV XWcYKrcG6wCJX4CZHJEoWpuxBGUSoagE+hq/+iEN54awvf63Tx5dEqVyMenOLYNudsLG Y7uw== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@collabora.com header.s=mail header.b=Gt12uo1E; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=collabora.com Received: from out1.vger.email (out1.vger.email. [2620:137:e000::1:20]) by mx.google.com with ESMTP id i4-20020a170906698400b00783d969f318si18956636ejr.253.2022.10.21.17.07.13; Fri, 21 Oct 2022 17:07:37 -0700 (PDT) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) client-ip=2620:137:e000::1:20; Authentication-Results: mx.google.com; dkim=pass header.i=@collabora.com header.s=mail header.b=Gt12uo1E; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=collabora.com Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S229982AbiJVAHB (ORCPT + 99 others); Fri, 21 Oct 2022 20:07:01 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:52392 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S230169AbiJVAGn (ORCPT ); Fri, 21 Oct 2022 20:06:43 -0400 Received: from madras.collabora.co.uk (madras.collabora.co.uk [46.235.227.172]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 70A39189513; Fri, 21 Oct 2022 17:05:55 -0700 (PDT) Received: from localhost (89-26-75-29.goll.dyn.salzburg-online.at [89.26.75.29]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange ECDHE (P-256) server-signature RSA-PSS (4096 bits) server-digest SHA256) (No client certificate requested) (Authenticated sender: sebastianfricke) by madras.collabora.co.uk (Postfix) with ESMTPSA id 588C1660252D; Sat, 22 Oct 2022 01:05:19 +0100 (BST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=collabora.com; s=mail; t=1666397119; bh=qLSnXMNAQnDylElqwrYPQ1/9hp7S8xAIH+BFUxYcYrY=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=Gt12uo1Etlh0kzWprAMaeWhV6BcAkZMS3C43QmhII23fXCXSybA8BCiCh9pvNIRQa 3/qGP7pq88noU+qe+XgE6jNwAYsMMWaNFXPx6teyBZ9h8LcggxqcS4Z6BPLaMUqGUR u00/20/uGXovrUlmR+Osvuzi3aOPljJZbonStvb4HZ677Jx3471aIk7/Gi/WIlq8ZC uRkGeuivvh8dQEyBNwvCDt+W8N66PUnCuDysanHYsreqAyY2qFpU70viGnVDS5maZF 0GqpLdJh0vKyHZPZIaujuI2hngW1JE0A/YCJcCzVWa5d2OC3/6wFp2pXhCk06sNE58 S3W+A8n6LO1ZA== From: Sebastian Fricke To: linux-media@vger.kernel.org Cc: kernel@collabora.com, nas.chung@chipsnmedia.com, hverkuil@xs4all.nl, ezequiel@vanguardiasur.com.ar, linux-kernel@vger.kernel.org, nicolas.dufresne@collabora.com, p.zabel@pengutronix.de, dafna@fastmail.com Subject: [PATCH v10 3/7] media: chips-media: wave5: Add the vdi layer Date: Sat, 22 Oct 2022 02:05:02 +0200 Message-Id: <20221022000506.221933-4-sebastian.fricke@collabora.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20221022000506.221933-1-sebastian.fricke@collabora.com> References: <20221022000506.221933-1-sebastian.fricke@collabora.com> MIME-Version: 1.0 X-Spam-Status: No, score=-2.1 required=5.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,SPF_HELO_NONE,SPF_PASS autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-getmail-retrieved-from-mailbox: =?utf-8?q?INBOX?= X-GMAIL-THRID: =?utf-8?q?1747344171036908475?= X-GMAIL-MSGID: =?utf-8?q?1747344171036908475?= From: Dafna Hirschfeld Add the vdi part of the wave5 codec driver. The wave5-vdi.h header defines common helper functions such as writing/reading register and handling endianness. Signed-off-by: Robert Beckett Signed-off-by: Dafna Hirschfeld Signed-off-by: Sebastian Fricke --- .../platform/chips-media/wave5/wave5-vdi.c | 261 ++++++++++++++++++ .../platform/chips-media/wave5/wave5-vdi.h | 67 +++++ .../platform/chips-media/wave5/wave5-vpuapi.h | 2 +- 3 files changed, 329 insertions(+), 1 deletion(-) create mode 100644 drivers/media/platform/chips-media/wave5/wave5-vdi.c create mode 100644 drivers/media/platform/chips-media/wave5/wave5-vdi.h diff --git a/drivers/media/platform/chips-media/wave5/wave5-vdi.c b/drivers/media/platform/chips-media/wave5/wave5-vdi.c new file mode 100644 index 000000000000..f85580dba294 --- /dev/null +++ b/drivers/media/platform/chips-media/wave5/wave5-vdi.c @@ -0,0 +1,261 @@ +// SPDX-License-Identifier: (GPL-2.0 OR BSD-3-Clause) +/* + * Wave5 series multi-standard codec IP - low level access functions + * + * Copyright (C) 2021 CHIPS&MEDIA INC + */ + +#include +#include "wave5-vdi.h" +#include "wave5-vpu.h" +#include "wave5-regdefine.h" +#include + +#define VDI_SRAM_BASE_ADDR 0x00 + +#define VDI_SYSTEM_ENDIAN VDI_LITTLE_ENDIAN +#define VDI_128BIT_BUS_SYSTEM_ENDIAN VDI_128BIT_LITTLE_ENDIAN + +static int wave5_vdi_allocate_common_memory(struct device *dev) +{ + struct vpu_device *vpu_dev = dev_get_drvdata(dev); + + if (!vpu_dev->common_mem.vaddr) { + int ret; + + vpu_dev->common_mem.size = SIZE_COMMON; + ret = wave5_vdi_allocate_dma_memory(vpu_dev, &vpu_dev->common_mem); + if (ret) { + dev_err(dev, "unable to allocate common buffer\n"); + return ret; + } + } + + dev_dbg(dev, "[VDI] common_mem: daddr=%pad size=%zu vaddr=0x%p\n", + &vpu_dev->common_mem.daddr, vpu_dev->common_mem.size, vpu_dev->common_mem.vaddr); + + return 0; +} + +int wave5_vdi_init(struct device *dev) +{ + struct vpu_device *vpu_dev = dev_get_drvdata(dev); + int ret; + + ret = wave5_vdi_allocate_common_memory(dev); + if (ret < 0) { + dev_err(dev, "[VDI] failed to get vpu common buffer from driver\n"); + return ret; + } + + if (!PRODUCT_CODE_W_SERIES(vpu_dev->product_code)) { + WARN_ONCE(1, "unsupported product code: 0x%x\n", vpu_dev->product_code); + return 0; + } + + // if BIT processor is not running. + if (wave5_vdi_readl(vpu_dev, W5_VCPU_CUR_PC) == 0) { + int i; + + for (i = 0; i < 64; i++) + wave5_vdi_write_register(vpu_dev, (i * 4) + 0x100, 0x0); + } + + dev_dbg(dev, "[VDI] driver initialized successfully\n"); + + return 0; +} + +int wave5_vdi_release(struct device *dev) +{ + struct vpu_device *vpu_dev = dev_get_drvdata(dev); + + vpu_dev->vdb_register = NULL; + wave5_vdi_free_dma_memory(vpu_dev, &vpu_dev->common_mem); + + return 0; +} + +void wave5_vdi_write_register(struct vpu_device *vpu_dev, u32 addr, u32 data) +{ + writel(data, vpu_dev->vdb_register + addr); +} + +unsigned int wave5_vdi_readl(struct vpu_device *vpu_dev, u32 addr) +{ + return readl(vpu_dev->vdb_register + addr); +} + +int wave5_vdi_clear_memory(struct vpu_device *vpu_dev, struct vpu_buf *vb) +{ + if (!vb || !vb->vaddr) { + dev_err(vpu_dev->dev, "%s: unable to clear unmapped buffer\n", __func__); + return -EINVAL; + } + + memset(vb->vaddr, 0, vb->size); + return vb->size; +} + +static void wave5_swap_endian(struct vpu_device *vpu_dev, u8 *data, size_t len, + unsigned int endian); + +int wave5_vdi_write_memory(struct vpu_device *vpu_dev, struct vpu_buf *vb, size_t offset, + u8 *data, size_t len, unsigned int endian) +{ + if (!vb || !vb->vaddr) { + dev_err(vpu_dev->dev, "%s: unable to write to unmapped buffer\n", __func__); + return -EINVAL; + } + + if (offset > vb->size || len > vb->size || offset + len > vb->size) { + dev_err(vpu_dev->dev, "%s: buffer too small\n", __func__); + return -ENOSPC; + } + + wave5_swap_endian(vpu_dev, data, len, endian); + memcpy(vb->vaddr + offset, data, len); + + return len; +} + +int wave5_vdi_allocate_dma_memory(struct vpu_device *vpu_dev, struct vpu_buf *vb) +{ + void *vaddr; + dma_addr_t daddr; + + if (!vb->size) { + dev_err(vpu_dev->dev, "%s: requested size==0\n", __func__); + return -EINVAL; + } + + vaddr = dma_alloc_coherent(vpu_dev->dev, vb->size, &daddr, GFP_KERNEL); + if (!vaddr) + return -ENOMEM; + vb->vaddr = vaddr; + vb->daddr = daddr; + + return 0; +} + +void wave5_vdi_free_dma_memory(struct vpu_device *vpu_dev, struct vpu_buf *vb) +{ + if (vb->size == 0) + return; + + if (!vb->vaddr) + dev_err(vpu_dev->dev, "%s: requested free of unmapped buffer\n", __func__); + else + dma_free_coherent(vpu_dev->dev, vb->size, vb->vaddr, vb->daddr); + + memset(vb, 0, sizeof(*vb)); +} + +unsigned int wave5_vdi_convert_endian(struct vpu_device *vpu_dev, unsigned int endian) +{ + if (PRODUCT_CODE_W_SERIES(vpu_dev->product_code)) { + switch (endian) { + case VDI_LITTLE_ENDIAN: + endian = 0x00; + break; + case VDI_BIG_ENDIAN: + endian = 0x0f; + break; + case VDI_32BIT_LITTLE_ENDIAN: + endian = 0x04; + break; + case VDI_32BIT_BIG_ENDIAN: + endian = 0x03; + break; + } + } + + return (endian & 0x0f); +} + +static void byte_swap(unsigned char *data, size_t len) +{ + u8 temp; + unsigned int i; + + for (i = 0; i < len; i += 2) { + temp = data[i]; + data[i] = data[i + 1]; + data[i + 1] = temp; + } +} + +static void word_swap(unsigned char *data, size_t len) +{ + u16 temp; + u16 *ptr = (u16 *)data; + unsigned int i; + size_t size = len / sizeof(uint16_t); + + for (i = 0; i < size; i += 2) { + temp = ptr[i]; + ptr[i] = ptr[i + 1]; + ptr[i + 1] = temp; + } +} + +static void dword_swap(unsigned char *data, size_t len) +{ + u32 temp; + u32 *ptr = (u32 *)data; + size_t size = len / sizeof(u32); + unsigned int i; + + for (i = 0; i < size; i += 2) { + temp = ptr[i]; + ptr[i] = ptr[i + 1]; + ptr[i + 1] = temp; + } +} + +static void lword_swap(unsigned char *data, size_t len) +{ + u64 temp; + u64 *ptr = (u64 *)data; + size_t size = len / sizeof(uint64_t); + unsigned int i; + + for (i = 0; i < size; i += 2) { + temp = ptr[i]; + ptr[i] = ptr[i + 1]; + ptr[i + 1] = temp; + } +} + +static void wave5_swap_endian(struct vpu_device *vpu_dev, u8 *data, size_t len, + unsigned int endian) +{ + int changes; + unsigned int sys_endian = VDI_128BIT_BUS_SYSTEM_ENDIAN; + bool byte_change, word_change, dword_change, lword_change; + + if (!PRODUCT_CODE_W_SERIES(vpu_dev->product_code)) { + dev_err(vpu_dev->dev, "unknown product id: %08x\n", vpu_dev->product_code); + return; + } + + endian = wave5_vdi_convert_endian(vpu_dev, endian); + sys_endian = wave5_vdi_convert_endian(vpu_dev, sys_endian); + if (endian == sys_endian) + return; + + changes = endian ^ sys_endian; + byte_change = changes & 0x01; + word_change = ((changes & 0x02) == 0x02); + dword_change = ((changes & 0x04) == 0x04); + lword_change = ((changes & 0x08) == 0x08); + + if (byte_change) + byte_swap(data, len); + if (word_change) + word_swap(data, len); + if (dword_change) + dword_swap(data, len); + if (lword_change) + lword_swap(data, len); +} diff --git a/drivers/media/platform/chips-media/wave5/wave5-vdi.h b/drivers/media/platform/chips-media/wave5/wave5-vdi.h new file mode 100644 index 000000000000..8e1d09331d5c --- /dev/null +++ b/drivers/media/platform/chips-media/wave5/wave5-vdi.h @@ -0,0 +1,67 @@ +/* SPDX-License-Identifier: (GPL-2.0 OR BSD-3-Clause) */ +/* + * Wave5 series multi-standard codec IP - low level access functions + * + * Copyright (C) 2021 CHIPS&MEDIA INC + */ + +#ifndef _VDI_H_ +#define _VDI_H_ + +#include "wave5-vpuconfig.h" +#include +#include +#include + +/************************************************************************/ +/* COMMON REGISTERS */ +/************************************************************************/ +#define VPU_PRODUCT_CODE_REGISTER 0x1044 + +/* system register write */ +#define vpu_write_reg(VPU_INST, ADDR, DATA) wave5_vdi_write_register(VPU_INST, ADDR, DATA) +// system register read +#define vpu_read_reg(CORE, ADDR) wave5_vdi_readl(CORE, ADDR) + +struct vpu_buf { + size_t size; + dma_addr_t daddr; + void *vaddr; +}; + +struct dma_vpu_buf { + size_t size; + dma_addr_t daddr; +}; + +enum endian_mode { + VDI_LITTLE_ENDIAN = 0, /* 64bit LE */ + VDI_BIG_ENDIAN, /* 64bit BE */ + VDI_32BIT_LITTLE_ENDIAN, + VDI_32BIT_BIG_ENDIAN, + /* WAVE PRODUCTS */ + VDI_128BIT_LITTLE_ENDIAN = 16, + VDI_128BIT_LE_BYTE_SWAP, + VDI_128BIT_LE_WORD_SWAP, + VDI_128BIT_LE_WORD_BYTE_SWAP, + VDI_128BIT_LE_DWORD_SWAP, + VDI_128BIT_LE_DWORD_BYTE_SWAP, + VDI_128BIT_LE_DWORD_WORD_SWAP, + VDI_128BIT_LE_DWORD_WORD_BYTE_SWAP, + VDI_128BIT_BE_DWORD_WORD_BYTE_SWAP, + VDI_128BIT_BE_DWORD_WORD_SWAP, + VDI_128BIT_BE_DWORD_BYTE_SWAP, + VDI_128BIT_BE_DWORD_SWAP, + VDI_128BIT_BE_WORD_BYTE_SWAP, + VDI_128BIT_BE_WORD_SWAP, + VDI_128BIT_BE_BYTE_SWAP, + VDI_128BIT_BIG_ENDIAN = 31, + VDI_ENDIAN_MAX +}; + +#define VDI_128BIT_ENDIAN_MASK 0xf + +int wave5_vdi_init(struct device *dev); +int wave5_vdi_release(struct device *dev); //this function may be called only at system off. + +#endif //#ifndef _VDI_H_ diff --git a/drivers/media/platform/chips-media/wave5/wave5-vpuapi.h b/drivers/media/platform/chips-media/wave5/wave5-vpuapi.h index 8b36c7196526..ef930408d977 100644 --- a/drivers/media/platform/chips-media/wave5/wave5-vpuapi.h +++ b/drivers/media/platform/chips-media/wave5/wave5-vpuapi.h @@ -1159,7 +1159,7 @@ int wave5_vdi_clear_memory(struct vpu_device *vpu_dev, struct vpu_buf *vb); int wave5_vdi_allocate_dma_memory(struct vpu_device *vpu_dev, struct vpu_buf *vb); int wave5_vdi_write_memory(struct vpu_device *vpu_dev, struct vpu_buf *vb, size_t offset, u8 *data, size_t len, unsigned int endian); -int wave5_vdi_convert_endian(struct vpu_device *vpu_dev, unsigned int endian); +unsigned int wave5_vdi_convert_endian(struct vpu_device *vpu_dev, unsigned int endian); void wave5_vdi_free_dma_memory(struct vpu_device *vpu_dev, struct vpu_buf *vb); int wave5_vpu_init_with_bitcode(struct device *dev, u8 *bitcode, size_t size);