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[2620:137:e000::1:20]) by mx.google.com with ESMTP id v1-20020a626101000000b006389d389c01si9544677pfb.78.2023.04.16.12.26.58; Sun, 16 Apr 2023 12:27:11 -0700 (PDT) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) client-ip=2620:137:e000::1:20; Authentication-Results: mx.google.com; dkim=pass header.i=@me.com header.s=1a1hai header.b="IEp/xzCQ"; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=QUARANTINE sp=QUARANTINE dis=NONE) header.from=me.com Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S229501AbjDPTLR (ORCPT + 99 others); Sun, 16 Apr 2023 15:11:17 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:54508 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229615AbjDPTLP (ORCPT ); Sun, 16 Apr 2023 15:11:15 -0400 X-Greylist: delayed 335 seconds by postgrey-1.37 at lindbergh.monkeyblade.net; Sun, 16 Apr 2023 12:11:14 PDT Received: from st43p00im-ztfb10073301.me.com (st43p00im-ztfb10073301.me.com [17.58.63.186]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 7B3362D5B for ; Sun, 16 Apr 2023 12:11:14 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=me.com; s=1a1hai; t=1681672273; bh=SHEIfHZdwV1MgUhja3Pb7A0Q8HBViX4AhyXV3iC/XmE=; h=From:To:Subject:Date:Message-Id:MIME-Version; b=IEp/xzCQksUYhUhiofR4fY9KsVezXAMrdQDRS9Qmb/R1e18RX4DVVZYt66l977Wpt fCBIJ/bayDQXSSDKFgf4Ts2G3LlEYlA7fkgSxWMCBfkClp8xfzNOiLWfhILR/DGVYq HXzq9wEk5PaN57/qD8gq1qfLAtEVr2lJ92tSAfIz425GNLsEgFommRIzAJ2R7l1hj5 QOEkj+btC1jKgU2fOtnguUgVo04sdtmoPsbjmfQ3Er0xLw/UX1pe6p+9UBvsncCUeO ZYEWrSL6ngMnRmei0Qv59njFtqkC/PsdzAflZmswDtrs1McE63xDOtma9D65xKZ4C8 zbCxZWA1F6dWA== Received: from localhost (st43p00im-dlb-asmtp-mailmevip.me.com [17.42.251.41]) by st43p00im-ztfb10073301.me.com (Postfix) with ESMTPSA id 71783800D29; Sun, 16 Apr 2023 19:11:12 +0000 (UTC) From: Alain Volmat To: Thomas Gleixner , Marc Zyngier , Rob Herring , Krzysztof Kozlowski Cc: patrice.chotard@foss.st.com, Alain Volmat , Krzysztof Kozlowski , linux-kernel@vger.kernel.org, devicetree@vger.kernel.org Subject: [PATCH] dt-bindings: irqchip: sti: remove stih415/stih416 and stid127 Date: Sun, 16 Apr 2023 21:09:50 +0200 Message-Id: <20230416190950.18929-1-avolmat@me.com> X-Mailer: git-send-email 2.34.1 MIME-Version: 1.0 X-Proofpoint-ORIG-GUID: Jkl-dPGDjNp7nHuhdjtxZtB-NUEdponJ X-Proofpoint-GUID: Jkl-dPGDjNp7nHuhdjtxZtB-NUEdponJ X-Proofpoint-Virus-Version: =?utf-8?q?vendor=3Dfsecure_engine=3D1=2E1=2E170-?= =?utf-8?q?22c6f66c430a71ce266a39bfe25bc2903e8d5c8f=3A6=2E0=2E138=2C18=2E0?= =?utf-8?q?=2E816=2C17=2E11=2E62=2E513=2E0000000_definitions=3D2022-01-17=5F?= =?utf-8?q?04=3A2020-02-14=5F02=2C2022-01-17=5F04=2C2021-12-02=5F01_signatur?= =?utf-8?q?es=3D0?= X-Proofpoint-Spam-Details: rule=notspam policy=default score=0 adultscore=0 mlxlogscore=611 mlxscore=0 phishscore=0 suspectscore=0 malwarescore=0 spamscore=0 bulkscore=0 clxscore=1015 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.12.0-2212070000 definitions=main-2304160181 X-Spam-Status: No, score=-2.8 required=5.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,FREEMAIL_FROM,RCVD_IN_DNSWL_LOW, RCVD_IN_MSPIKE_H2,SPF_HELO_NONE,SPF_PASS,T_SCC_BODY_TEXT_LINE, URIBL_BLOCKED autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-getmail-retrieved-from-mailbox: =?utf-8?q?INBOX?= X-GMAIL-THRID: =?utf-8?q?1763362190396922783?= X-GMAIL-MSGID: =?utf-8?q?1763362190396922783?= Remove bindings for the stih415/stih416/stid127 since they are not supported within the kernel anymore. Signed-off-by: Alain Volmat Acked-by: Krzysztof Kozlowski --- Patch sent previously via serie: https://lore.kernel.org/all/20230209091659.1409-5-avolmat@me.com/ .../bindings/interrupt-controller/st,sti-irq-syscfg.txt | 9 ++------- 1 file changed, 2 insertions(+), 7 deletions(-) diff --git a/Documentation/devicetree/bindings/interrupt-controller/st,sti-irq-syscfg.txt b/Documentation/devicetree/bindings/interrupt-controller/st,sti-irq-syscfg.txt index ced6014061a3..977d7ed3670e 100644 --- a/Documentation/devicetree/bindings/interrupt-controller/st,sti-irq-syscfg.txt +++ b/Documentation/devicetree/bindings/interrupt-controller/st,sti-irq-syscfg.txt @@ -6,11 +6,7 @@ and PL310 L2 Cache IRQs are controlled using System Configuration registers. This driver is used to unmask them prior to use. Required properties: -- compatible : Should be set to one of: - "st,stih415-irq-syscfg" - "st,stih416-irq-syscfg" - "st,stih407-irq-syscfg" - "st,stid127-irq-syscfg" +- compatible : Should be "st,stih407-irq-syscfg" - st,syscfg : Phandle to Cortex-A9 IRQ system config registers - st,irq-device : Array of IRQs to enable - should be 2 in length - st,fiq-device : Array of FIQs to enable - should be 2 in length @@ -25,11 +21,10 @@ Optional properties: Example: irq-syscfg { - compatible = "st,stih416-irq-syscfg"; + compatible = "st,stih407-irq-syscfg"; st,syscfg = <&syscfg_cpu>; st,irq-device = , ; st,fiq-device = , ; - st,invert-ext = <(ST_IRQ_SYSCFG_EXT_1_INV | ST_IRQ_SYSCFG_EXT_3_INV)>; };