From patchwork Thu Apr 13 04:06:24 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: =?utf-8?b?WGlubGVpIExlZSAo5p2O5piV56OKKQ==?= X-Patchwork-Id: 82768 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a59:b0ea:0:b0:3b6:4342:cba0 with SMTP id b10csp770852vqo; Wed, 12 Apr 2023 21:09:03 -0700 (PDT) X-Google-Smtp-Source: AKy350ZNYACm55Fea9f9kJQV3B4GGmy4GPyS42lymLvqbQ6eb2VZ0VTpRcp4EcmkFC1gfDmI1ZjK X-Received: by 2002:a17:907:b68a:b0:878:481c:c49b with SMTP id vm10-20020a170907b68a00b00878481cc49bmr1305735ejc.1.1681358943318; Wed, 12 Apr 2023 21:09:03 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1681358943; cv=none; d=google.com; s=arc-20160816; b=p2c2fOBcUUDvvhDrktJan02znfhDCW9J4acK6RTY74ObGbfHgIy4WpUDSedRas2eMp 8XTv6CDC4k1qDpwsBPC3K5e/IcBglpg6YtOOrlj5/U8vWwjzfALFLHZVszKbjTaFCGiX ANvEWbH4egLGl5hmgqX/NNcaR8z1WJXE1dG1y7mBkLM9yfjSmcztD/miw8ysFmomvhHT Ic1JTXgT79545EcgS6zN51ojwxI7Nxun3Hqb8FkbmQ/Dd/i2q3Qk3DwE88mFCDn6oZNc vmyMSaiyFiNxAlXDpYueUCDvYNeeq0ec4AGhcwrI3BwK2AXO1OCsvp5yc6sWY+ha4DvR Bl9g== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:mime-version:references:in-reply-to:message-id :date:subject:cc:to:from:dkim-signature; bh=DkibEOTufv7mSb9yzcBhIelu9TuyfoDaNkBlQdFT9h0=; b=AThvySuR7fhwQ+7fPpOtuSIyyiRcuRZMAQyed6x5qy7RziQcLW3/0E7juQ/ffdruvD vGFtBmb6JTH6OV+95gFwZyI2Q/kjvpvuLJCj3lHMORhOESafevuL80m2wDPmPlt8wghY XQ5D54GiTRKPVSjt7Oaih8OJYoJ2xFd95/iAB8oAmSEYgfUbI6qaLSr/u2V/uh7K1ypB Us3blWtfNmF1PguQRH6jo8rpgiq96euEtq7g5nv1OVLKYvzpsKNr52Ip2QNhcbYTc1VD PurJjfy0A+14rljRHmSJdon1FH1oyVvawCbT5s1ulAhUo/OklfSuemSs7aX6gh1ND0dO MTbw== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@mediatek.com header.s=dk header.b=RoCf5KNI; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=QUARANTINE sp=QUARANTINE dis=NONE) header.from=mediatek.com Received: from out1.vger.email (out1.vger.email. [2620:137:e000::1:20]) by mx.google.com with ESMTP id az6-20020a170907904600b00947e2d50eb4si719361ejc.68.2023.04.12.21.08.37; Wed, 12 Apr 2023 21:09:03 -0700 (PDT) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) client-ip=2620:137:e000::1:20; Authentication-Results: mx.google.com; dkim=pass header.i=@mediatek.com header.s=dk header.b=RoCf5KNI; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=QUARANTINE sp=QUARANTINE dis=NONE) header.from=mediatek.com Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S229728AbjDMEHa (ORCPT + 99 others); Thu, 13 Apr 2023 00:07:30 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:36664 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229705AbjDMEGx (ORCPT ); Thu, 13 Apr 2023 00:06:53 -0400 Received: from mailgw02.mediatek.com (unknown [210.61.82.184]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 85E6D729A; Wed, 12 Apr 2023 21:06:50 -0700 (PDT) X-UUID: 98efeaccd9b011edb6b9f13eb10bd0fe-20230413 DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=mediatek.com; s=dk; h=Content-Type:MIME-Version:References:In-Reply-To:Message-ID:Date:Subject:CC:To:From; bh=DkibEOTufv7mSb9yzcBhIelu9TuyfoDaNkBlQdFT9h0=; b=RoCf5KNIjchqqGeu/OWIMkUY25AOWv19xQP6P3apCuW5MmQDzf1BrpMgifatvoKIe0gR1RRy2g+cLGSe5Xyu3CpJgGIIK23elATb4sZx7gMS0a9HG0aHxUbHktZ1uBhTofwMb502LqeA9Iv7Va6fyiUt5TRON04oqiUq8Rnr7jY=; X-CID-P-RULE: Release_Ham X-CID-O-INFO: VERSION:1.1.22,REQID:68df401e-dad3-48aa-809d-7fe6e66bcfbb,IP:0,U RL:0,TC:0,Content:0,EDM:0,RT:0,SF:95,FILE:0,BULK:0,RULE:Release_Ham,ACTION :release,TS:95 X-CID-INFO: VERSION:1.1.22,REQID:68df401e-dad3-48aa-809d-7fe6e66bcfbb,IP:0,URL :0,TC:0,Content:0,EDM:0,RT:0,SF:95,FILE:0,BULK:0,RULE:Spam_GS981B3D,ACTION :quarantine,TS:95 X-CID-META: VersionHash:120426c,CLOUDID:0b222ba1-8fcb-430b-954a-ba3f00fa94a5,B ulkID:230413120644VJZ8TQOS,BulkQuantity:0,Recheck:0,SF:28|17|19|48|38|29,T C:nil,Content:0,EDM:-3,IP:nil,URL:0,File:nil,Bulk:nil,QS:nil,BEC:nil,COL:0 ,OSI:0,OSA:0,AV:0 X-CID-BVR: 0 X-CID-BAS: 0,_,0,_ X-UUID: 98efeaccd9b011edb6b9f13eb10bd0fe-20230413 Received: from mtkmbs10n1.mediatek.inc [(172.21.101.34)] by mailgw02.mediatek.com (envelope-from ) (Generic MTA with TLSv1.2 ECDHE-RSA-AES256-GCM-SHA384 256/256) with ESMTP id 2128535430; Thu, 13 Apr 2023 12:06:42 +0800 Received: from mtkmbs11n2.mediatek.inc (172.21.101.187) by mtkmbs10n2.mediatek.inc (172.21.101.183) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.1118.25; Thu, 13 Apr 2023 12:06:40 +0800 Received: from mszsdaap41.gcn.mediatek.inc (10.16.6.141) by mtkmbs11n2.mediatek.inc (172.21.101.73) with Microsoft SMTP Server id 15.2.1118.25 via Frontend Transport; Thu, 13 Apr 2023 12:06:40 +0800 From: To: , , , , , , , CC: , , , , , , Xinlei Lee Subject: [PATCH 1/2] dt-bindings: display: mediatek: dp: Add compatible for MediaTek MT8188 Date: Thu, 13 Apr 2023 12:06:24 +0800 Message-ID: <1681358785-6930-2-git-send-email-xinlei.lee@mediatek.com> X-Mailer: git-send-email 2.6.4 In-Reply-To: <1681358785-6930-1-git-send-email-xinlei.lee@mediatek.com> References: <1681358785-6930-1-git-send-email-xinlei.lee@mediatek.com> MIME-Version: 1.0 X-MTK: N X-Spam-Status: No, score=-1.3 required=5.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,RCVD_IN_MSPIKE_H2,RDNS_NONE, SPF_HELO_PASS,SPF_PASS,UNPARSEABLE_RELAY,URIBL_BLOCKED autolearn=no autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-getmail-retrieved-from-mailbox: =?utf-8?q?INBOX?= X-GMAIL-THRID: =?utf-8?q?1763032635614782419?= X-GMAIL-MSGID: =?utf-8?q?1763032635614782419?= From: Xinlei Lee Add dt-binding documentation of dp-tx for MediaTek MT8188 SoC. Signed-off-by: Xinlei Lee Signed-off-by: Jitao Shi Acked-by: Krzysztof Kozlowski --- .../devicetree/bindings/display/mediatek/mediatek,dp.yaml | 1 + 1 file changed, 1 insertion(+) diff --git a/Documentation/devicetree/bindings/display/mediatek/mediatek,dp.yaml b/Documentation/devicetree/bindings/display/mediatek/mediatek,dp.yaml index ff781f2174a0..d1b8259b79a8 100644 --- a/Documentation/devicetree/bindings/display/mediatek/mediatek,dp.yaml +++ b/Documentation/devicetree/bindings/display/mediatek/mediatek,dp.yaml @@ -21,6 +21,7 @@ description: | properties: compatible: enum: + - mediatek,mt8188-dp-tx - mediatek,mt8195-dp-tx - mediatek,mt8195-edp-tx From patchwork Thu Apr 13 04:06:25 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: =?utf-8?b?WGlubGVpIExlZSAo5p2O5piV56OKKQ==?= X-Patchwork-Id: 82782 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a59:b0ea:0:b0:3b6:4342:cba0 with SMTP id b10csp775898vqo; Wed, 12 Apr 2023 21:23:42 -0700 (PDT) X-Google-Smtp-Source: AKy350YD2blHHJUwO+QqOhdmLs4wZTdN7i2K7+fARhoHtsVAhkq4ozmH41Cqi+bqFRqF5cUS0Mwy X-Received: by 2002:a17:906:4e0d:b0:94a:5e42:2e3a with SMTP id z13-20020a1709064e0d00b0094a5e422e3amr1120928eju.36.1681359822249; Wed, 12 Apr 2023 21:23:42 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1681359822; cv=none; d=google.com; s=arc-20160816; b=F90cwgBQ9+DzZYK2SSVp3VA0EBvp2UZtOAHs6Ko2ip8hDYq0h25beZHEDWG9Jddcca uIVXvXdQ00UECKcDvLqaQjR1BqvhQs90g2FqdGMGv7DjIsKj9lMfALKWjTfnPGMYifBJ KUWRzQGVE83ULmRagHf1QSEtlUG1kvKK3KaWpyqlY2iwiSxmkMsfSUpWGyU4VLeMvFr0 9y3UvA5qyaUEQ8cgZqnttlJDZZaqEOKy1ON1Q+a8fkXXkrRjiDT+d2e2Dz7WxfY5R5Tj 1OhXbIuEEmqPKJIJ3Fsyoc3ACk7RjQUG4SeWnwAemnXd7oHwOPkb4Xqqi3+F4znPC/9N i6Dw== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:mime-version:references:in-reply-to:message-id :date:subject:cc:to:from:dkim-signature; bh=3KOKcXA4BrgWj4MAEjaQanirD/sgJJEqHU3KajlNX+A=; b=Qk+xW8yV3X9w2UHzr6FarIwLcAbagcbMYdDgj3sL6E9yu0fsGGcLoimRUyShXj+7PV pY2LChyEuwTxJwlKcYuVkMMWt2JvV6nc2NkPUZUOIY82/AKnvknSjxf+asAF83b8jc66 BBB0WG8hUJrX+gzyWF8aKuyY+wVYFrM0ESwqoYbqD2ll+TBA0mdNG6STVDPeRzS5l1ne 44Ya81/QD4KH0oavFa3BBUN/oY4UfcR2G8CgpMcqcH5BrSc7g+PPZJc2gS3nqB8fJcd/ 3N6TMPdiVbPTQgrVy9fOPpTIlJGTx6GYl7U4ZoZMlF30jDgYtbOZALPZa0BVOWQPBBZn 49Sw== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@mediatek.com header.s=dk header.b=KfV6nqa5; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=QUARANTINE sp=QUARANTINE dis=NONE) header.from=mediatek.com Received: from out1.vger.email (out1.vger.email. [2620:137:e000::1:20]) by mx.google.com with ESMTP id y16-20020a170906471000b0094e918d3a4csi831335ejq.881.2023.04.12.21.23.18; Wed, 12 Apr 2023 21:23:42 -0700 (PDT) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) client-ip=2620:137:e000::1:20; Authentication-Results: mx.google.com; dkim=pass header.i=@mediatek.com header.s=dk header.b=KfV6nqa5; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=QUARANTINE sp=QUARANTINE dis=NONE) header.from=mediatek.com Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S230020AbjDMEHp (ORCPT + 99 others); Thu, 13 Apr 2023 00:07:45 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:36782 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229794AbjDMEG4 (ORCPT ); Thu, 13 Apr 2023 00:06:56 -0400 Received: from mailgw01.mediatek.com (unknown [60.244.123.138]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id E4A447687; Wed, 12 Apr 2023 21:06:53 -0700 (PDT) X-UUID: 9bba2e70d9b011eda9a90f0bb45854f4-20230413 DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=mediatek.com; s=dk; h=Content-Type:MIME-Version:References:In-Reply-To:Message-ID:Date:Subject:CC:To:From; bh=3KOKcXA4BrgWj4MAEjaQanirD/sgJJEqHU3KajlNX+A=; b=KfV6nqa5P2i7gf9Od3z6U6XlRJMWR+LK8OeO/yeB7ZgWt4GVYPTrP7sUFTDCxJPJSBJQtOyX1wfN7VUNIUm/KeQOEUtRd+yT4x1fHuEIOmk2rfO65Lz6CPnBcJvnyEsNYzU56aukqT14jNlDLB81Wk/e3nll1VdYqHY5k5nJjsI=; X-CID-P-RULE: Release_Ham X-CID-O-INFO: VERSION:1.1.22,REQID:df8592e8-5ba8-45a0-97cc-a791c0b31747,IP:0,U RL:0,TC:0,Content:-25,EDM:0,RT:0,SF:95,FILE:0,BULK:0,RULE:Release_Ham,ACTI ON:release,TS:70 X-CID-INFO: VERSION:1.1.22,REQID:df8592e8-5ba8-45a0-97cc-a791c0b31747,IP:0,URL :0,TC:0,Content:-25,EDM:0,RT:0,SF:95,FILE:0,BULK:0,RULE:Spam_GS981B3D,ACTI ON:quarantine,TS:70 X-CID-META: VersionHash:120426c,CLOUDID:bf222ba1-8fcb-430b-954a-ba3f00fa94a5,B ulkID:230413120649TTNZIZNZ,BulkQuantity:0,Recheck:0,SF:17|19|48|38|29|28,T C:nil,Content:0,EDM:-3,IP:nil,URL:0,File:nil,Bulk:nil,QS:nil,BEC:nil,COL:0 ,OSI:0,OSA:0,AV:0 X-CID-BVR: 0 X-CID-BAS: 0,_,0,_ X-UUID: 9bba2e70d9b011eda9a90f0bb45854f4-20230413 Received: from mtkmbs13n1.mediatek.inc [(172.21.101.193)] by mailgw01.mediatek.com (envelope-from ) (Generic MTA with TLSv1.2 ECDHE-RSA-AES256-GCM-SHA384 256/256) with ESMTP id 16016973; Thu, 13 Apr 2023 12:06:46 +0800 Received: from mtkmbs11n2.mediatek.inc (172.21.101.187) by mtkmbs10n2.mediatek.inc (172.21.101.183) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.1118.25; Thu, 13 Apr 2023 12:06:45 +0800 Received: from mszsdaap41.gcn.mediatek.inc (10.16.6.141) by mtkmbs11n2.mediatek.inc (172.21.101.73) with Microsoft SMTP Server id 15.2.1118.25 via Frontend Transport; Thu, 13 Apr 2023 12:06:45 +0800 From: To: , , , , , , , CC: , , , , , , Xinlei Lee Subject: [PATCH 2/2] drm/mediatek: dp: Add the audio control to mtk_dp_data struct Date: Thu, 13 Apr 2023 12:06:25 +0800 Message-ID: <1681358785-6930-3-git-send-email-xinlei.lee@mediatek.com> X-Mailer: git-send-email 2.6.4 In-Reply-To: <1681358785-6930-1-git-send-email-xinlei.lee@mediatek.com> References: <1681358785-6930-1-git-send-email-xinlei.lee@mediatek.com> MIME-Version: 1.0 X-MTK: N X-Spam-Status: No, score=-2.1 required=5.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,RCVD_IN_MSPIKE_H2,SPF_HELO_PASS, SPF_PASS,UNPARSEABLE_RELAY,URIBL_BLOCKED autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-getmail-retrieved-from-mailbox: =?utf-8?q?INBOX?= X-GMAIL-THRID: =?utf-8?q?1763033556563737821?= X-GMAIL-MSGID: =?utf-8?q?1763033556563737821?= From: Xinlei Lee Mainly add the following two flag: 1.The audio packet arrangement function is to only arrange audio packets into the Hblanking area. In order to align with the HW default setting of g1200, this function needs to be turned off. 2.Due to the difference of HW, different dividers need to be set. Signed-off-by: Xinlei Lee Signed-off-by: Jitao Shi --- drivers/gpu/drm/mediatek/mtk_dp.c | 32 ++++++++++++++++++++++++++- drivers/gpu/drm/mediatek/mtk_dp_reg.h | 5 +++++ 2 files changed, 36 insertions(+), 1 deletion(-) diff --git a/drivers/gpu/drm/mediatek/mtk_dp.c b/drivers/gpu/drm/mediatek/mtk_dp.c index 767b71da31a4..65a9984eac81 100644 --- a/drivers/gpu/drm/mediatek/mtk_dp.c +++ b/drivers/gpu/drm/mediatek/mtk_dp.c @@ -139,6 +139,8 @@ struct mtk_dp_data { unsigned int smc_cmd; const struct mtk_dp_efuse_fmt *efuse_fmt; bool audio_supported; + const bool arrange; + const u8 audio_m_div2; }; static const struct mtk_dp_efuse_fmt mt8195_edp_efuse_fmt[MTK_DP_CAL_MAX] = { @@ -646,8 +648,10 @@ static void mtk_dp_audio_sdp_asp_set_channels(struct mtk_dp *mtk_dp, static void mtk_dp_audio_set_divider(struct mtk_dp *mtk_dp) { + u8 div2_id = mtk_dp->data->audio_m_div2; + mtk_dp_update_bits(mtk_dp, MTK_DP_ENC0_P0_30BC, - AUDIO_M_CODE_MULT_DIV_SEL_DP_ENC0_P0_DIV_2, + div2_id << AUDIO_M_CODE_MULT_DIV_SEL_DP_ENC0_P0_SHIFT, AUDIO_M_CODE_MULT_DIV_SEL_DP_ENC0_P0_MASK); } @@ -1362,6 +1366,14 @@ static void mtk_dp_sdp_set_down_cnt_init_in_hblank(struct mtk_dp *mtk_dp) SDP_DOWN_CNT_INIT_IN_HBLANK_DP_ENC1_P0_MASK); } +static void mtk_dp_audio_sample_arrange(struct mtk_dp *mtk_dp) +{ + if (mtk_dp->data->arrange) { + mtk_dp_update_bits(mtk_dp, MTK_DP_ENC1_P0_3374, 0, BIT(12)); + mtk_dp_update_bits(mtk_dp, MTK_DP_ENC1_P0_3374, 0, 0xFFF); + } +} + static void mtk_dp_setup_tu(struct mtk_dp *mtk_dp) { u32 sram_read_start = min_t(u32, MTK_DP_TBC_BUF_READ_START_ADDR, @@ -1371,6 +1383,7 @@ static void mtk_dp_setup_tu(struct mtk_dp *mtk_dp) MTK_DP_PIX_PER_ADDR); mtk_dp_set_sram_read_start(mtk_dp, sram_read_start); mtk_dp_setup_encoder(mtk_dp); + mtk_dp_audio_sample_arrange(mtk_dp); mtk_dp_sdp_set_down_cnt_init_in_hblank(mtk_dp); mtk_dp_sdp_set_down_cnt_init(mtk_dp, sram_read_start); } @@ -2615,11 +2628,22 @@ static int mtk_dp_resume(struct device *dev) static SIMPLE_DEV_PM_OPS(mtk_dp_pm_ops, mtk_dp_suspend, mtk_dp_resume); +static const struct mtk_dp_data mt8188_dp_data = { + .bridge_type = DRM_MODE_CONNECTOR_DisplayPort, + .smc_cmd = MTK_DP_SIP_ATF_VIDEO_UNMUTE, + .efuse_fmt = mt8195_dp_efuse_fmt, + .audio_supported = true, + .arrange = true, + .audio_m_div2 = 4, +}; + static const struct mtk_dp_data mt8195_edp_data = { .bridge_type = DRM_MODE_CONNECTOR_eDP, .smc_cmd = MTK_DP_SIP_ATF_EDP_VIDEO_UNMUTE, .efuse_fmt = mt8195_edp_efuse_fmt, .audio_supported = false, + .arrange = false, + .audio_m_div2 = 5, }; static const struct mtk_dp_data mt8195_dp_data = { @@ -2627,9 +2651,15 @@ static const struct mtk_dp_data mt8195_dp_data = { .smc_cmd = MTK_DP_SIP_ATF_VIDEO_UNMUTE, .efuse_fmt = mt8195_dp_efuse_fmt, .audio_supported = true, + .arrange = false, + .audio_m_div2 = 5, }; static const struct of_device_id mtk_dp_of_match[] = { + { + .compatible = "mediatek,mt8188-dp-tx", + .data = &mt8188_dp_data, + }, { .compatible = "mediatek,mt8195-edp-tx", .data = &mt8195_edp_data, diff --git a/drivers/gpu/drm/mediatek/mtk_dp_reg.h b/drivers/gpu/drm/mediatek/mtk_dp_reg.h index 84e38cef03c2..4dc4f7cd0ef2 100644 --- a/drivers/gpu/drm/mediatek/mtk_dp_reg.h +++ b/drivers/gpu/drm/mediatek/mtk_dp_reg.h @@ -158,6 +158,7 @@ #define MTK_DP_ENC0_P0_30A8 0x30a8 #define MTK_DP_ENC0_P0_30BC 0x30bc #define ISRC_CONT_DP_ENC0_P0 BIT(0) +#define AUDIO_M_CODE_MULT_DIV_SEL_DP_ENC0_P0_SHIFT 8 #define AUDIO_M_CODE_MULT_DIV_SEL_DP_ENC0_P0_MASK GENMASK(10, 8) #define AUDIO_M_CODE_MULT_DIV_SEL_DP_ENC0_P0_MUL_2 (1 << 8) #define AUDIO_M_CODE_MULT_DIV_SEL_DP_ENC0_P0_MUL_4 (2 << 8) @@ -228,6 +229,10 @@ VIDEO_STABLE_CNT_THRD_DP_ENC1_P0 | \ SDP_DP13_EN_DP_ENC1_P0 | \ BS2BS_MODE_DP_ENC1_P0) + +#define MTK_DP_ENC1_P0_3374 0x3374 +#define AU_ASP_PACKET_ONLY_IN_HBLANK_ENABLE_MASK 0x1000 + #define MTK_DP_ENC1_P0_33F4 0x33f4 #define DP_ENC_DUMMY_RW_1_AUDIO_RST_EN BIT(0) #define DP_ENC_DUMMY_RW_1 BIT(9)