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[2620:137:e000::1:20]) by mx.google.com with ESMTP id s14-20020a170902ea0e00b001a05347d088si6474322plg.201.2023.04.08.04.31.48; Sat, 08 Apr 2023 04:32:00 -0700 (PDT) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) client-ip=2620:137:e000::1:20; Authentication-Results: mx.google.com; dkim=pass header.i=@linutronix.de header.s=2020 header.b=KVhVLpuG; dkim=neutral (no key) header.i=@linutronix.de header.s=2020e header.b=U41w3+v7; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=QUARANTINE dis=NONE) header.from=linutronix.de Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S230324AbjDHKte (ORCPT + 99 others); Sat, 8 Apr 2023 06:49:34 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:48592 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229957AbjDHKs4 (ORCPT ); Sat, 8 Apr 2023 06:48:56 -0400 Received: from galois.linutronix.de (Galois.linutronix.de [193.142.43.55]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 14C9EFF34 for ; Sat, 8 Apr 2023 03:48:21 -0700 (PDT) Date: Sat, 08 Apr 2023 10:45:19 -0000 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linutronix.de; s=2020; t=1680950719; h=from:from:sender:sender:reply-to:reply-to:subject:subject:date:date: message-id:message-id:to:to:cc:cc:mime-version:mime-version: content-type:content-type: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=quFPX/rVGWadDGn8c22WUUmTmkWHBFHDS5dCLSIQ61g=; b=KVhVLpuGyp7laOosowVNxibq3z6Lzb1YNnV8iz6amu5Irt/L/4D2K736fJkR/mCCodGHMF z3sBUC/3PuambOItNmpbGKjvY4YnFYBawz5YJWUqC7Uyf5xmPmjUbFFjSYraJI/cp2/sOA JwvCh7Pnq7jIE9IFTmwu2cilvDtaP5/N/SzMwIHSRMU65MXo58T0vGmr6Vns93Nnyj357n +M9ofoY3jRWglBiHT8SAkK35YVQeaorsBYJ6a3aKZBpg2OLEAy4/V2fa0Kw3hFZJ4HeHrs UAK76hv80y6lsyjEB3Vunjxa610lhbN4SvFibK6gAdVjyyMHzhiyNh6Wxhs3Bw== DKIM-Signature: v=1; a=ed25519-sha256; c=relaxed/relaxed; d=linutronix.de; s=2020e; t=1680950719; h=from:from:sender:sender:reply-to:reply-to:subject:subject:date:date: message-id:message-id:to:to:cc:cc:mime-version:mime-version: content-type:content-type: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=quFPX/rVGWadDGn8c22WUUmTmkWHBFHDS5dCLSIQ61g=; b=U41w3+v7VotmFJsi46xLt0swi1D3vzUc/1l01x+StydjxjXmPrpKNuoyHjHxZ/38A7uLgg VjcueGGtOTpLyHAw== From: "irqchip-bot for Anup Patel" Sender: tip-bot2@linutronix.de Reply-to: linux-kernel@vger.kernel.org To: linux-kernel@vger.kernel.org Subject: [irqchip: irq/irqchip-next] RISC-V: Clear SIP bit only when using SBI IPI operations Cc: Anup Patel , Bin Meng , Atish Patra , Palmer Dabbelt , Marc Zyngier , tglx@linutronix.de In-Reply-To: <20230328035223.1480939-2-apatel@ventanamicro.com> References: <20230328035223.1480939-2-apatel@ventanamicro.com> MIME-Version: 1.0 Message-ID: <168095071929.404.14218576691551578438.tip-bot2@tip-bot2> Robot-ID: Robot-Unsubscribe: Contact to get blacklisted from these emails X-Spam-Status: No, score=-2.5 required=5.0 tests=DKIM_SIGNED,DKIM_VALID, DKIM_VALID_AU,DKIM_VALID_EF,RCVD_IN_DNSWL_MED,SPF_HELO_NONE,SPF_PASS autolearn=unavailable autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-getmail-retrieved-from-mailbox: =?utf-8?q?INBOX?= X-GMAIL-THRID: =?utf-8?q?1761584660471333655?= X-GMAIL-MSGID: =?utf-8?q?1762607518856508727?= The following commit has been merged into the irq/irqchip-next branch of irqchip: Commit-ID: 3ee92565b83ecc08e5b0c878dd87a2973eaca2ea Gitweb: https://git.kernel.org/pub/scm/linux/kernel/git/maz/arm-platforms/3ee92565b83ecc08e5b0c878dd87a2973eaca2ea Author: Anup Patel AuthorDate: Tue, 28 Mar 2023 09:22:17 +05:30 Committer: Marc Zyngier CommitterDate: Sat, 08 Apr 2023 11:26:23 +01:00 RISC-V: Clear SIP bit only when using SBI IPI operations The software interrupt pending (i.e. [M|S]SIP) bit is writeable for S-mode but read-only for M-mode so we clear this bit only when using SBI IPI operations. Signed-off-by: Anup Patel Reviewed-by: Bin Meng Reviewed-by: Atish Patra Acked-by: Palmer Dabbelt Signed-off-by: Marc Zyngier Link: https://lore.kernel.org/r/20230328035223.1480939-2-apatel@ventanamicro.com --- arch/riscv/kernel/sbi.c | 8 +++++++- arch/riscv/kernel/smp.c | 2 -- 2 files changed, 7 insertions(+), 3 deletions(-) diff --git a/arch/riscv/kernel/sbi.c b/arch/riscv/kernel/sbi.c index 5c87db8..ac99a70 100644 --- a/arch/riscv/kernel/sbi.c +++ b/arch/riscv/kernel/sbi.c @@ -646,8 +646,14 @@ static void sbi_send_cpumask_ipi(const struct cpumask *target) sbi_send_ipi(target); } +static void sbi_ipi_clear(void) +{ + csr_clear(CSR_IP, IE_SIE); +} + static const struct riscv_ipi_ops sbi_ipi_ops = { - .ipi_inject = sbi_send_cpumask_ipi + .ipi_inject = sbi_send_cpumask_ipi, + .ipi_clear = sbi_ipi_clear }; void __init sbi_init(void) diff --git a/arch/riscv/kernel/smp.c b/arch/riscv/kernel/smp.c index 8c3b59f..8a12768 100644 --- a/arch/riscv/kernel/smp.c +++ b/arch/riscv/kernel/smp.c @@ -112,8 +112,6 @@ void riscv_clear_ipi(void) { if (ipi_ops && ipi_ops->ipi_clear) ipi_ops->ipi_clear(); - - csr_clear(CSR_IP, IE_SIE); } EXPORT_SYMBOL_GPL(riscv_clear_ipi);