From patchwork Fri Apr 7 12:23:38 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Sai Krishna Gajula X-Patchwork-Id: 80776 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a59:b0ea:0:b0:3b6:4342:cba0 with SMTP id b10csp259570vqo; Fri, 7 Apr 2023 05:47:35 -0700 (PDT) X-Google-Smtp-Source: AKy350aptqdWV1sHUBHMOn94L67BXJSRxm/UXLaCRc59ihB0hhYXEOWO0Aj5fswQbgfmooLKOymV X-Received: by 2002:aa7:ca41:0:b0:502:67b6:9734 with SMTP id j1-20020aa7ca41000000b0050267b69734mr2225842edt.6.1680871654953; Fri, 07 Apr 2023 05:47:34 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1680871654; cv=none; d=google.com; s=arc-20160816; b=EKYuxLo7gctIQKsgim9pk/TF4DB5zIqZoUnY6WkSMiWI4K2h/8/tjI76wwSaMsXHb0 w2OKhx7O/CKBLQ/HbGpMSW8OgrjFkORZPwNCFv2FPmIuOKIzvdYnF5HBmIYD/DGVg907 ZWl2zqHobm5O9soMbWeq3DIbvyZk+qtQjRiiUOrNMKho1Ru+L5J0cX3oYCMpeHdiwU8a cd85UpGZD4ovJ/3lW2o4AJgVAGeGuXa4tFjzIBMDLjG6suPJW7VFA3R6N/BFmxa9jtwy oEI7x6CGMfZ6DegR+Mj+pr/9+odGK+e/RGVAE+AqCHkgitk63fIsu7pOTxiBDHvHDMzW 7cUQ== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from :dkim-signature; bh=aJ4BaAT3AGcAdjDo2xWVNbwi49MYlxqi2NK5V4zd0ms=; b=mo9FBGq9cj+5sZeehAZ9Auj/3cmN1HKZp8aSbWCkYudTLK+IaFeay13BKZ5qqkNFB3 RnCguTIXizaju/jVuEPr7UBCDvwgxC/3o9GdVb4hX+Jy9OVLTOjosadathUtq6UAavfc 5aRgs+ywKJ/AXOnMuBGEbaz04cy1CsQWhalZvTQxq46oUVyH3DyEUqYJu5APsvvxgNCc AdwKvMjaaxhDUkI66XNo/5WOIecR8a20oGFvw2dwDaI2ld5KcwQtyM5I2HGdtg1Q/atB IAEYK9vkcBFUR8f/frP/D/H3azYcsnOkU7M0Hlayw3sYuDjPIVzL501Wm7KVLzn/H+HJ pKOw== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@marvell.com header.s=pfpt0220 header.b=gcnFh8BR; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=REJECT dis=NONE) header.from=marvell.com Received: from out1.vger.email (out1.vger.email. [2620:137:e000::1:20]) by mx.google.com with ESMTP id u7-20020a056402064700b005002aad5850si3349745edx.589.2023.04.07.05.47.08; Fri, 07 Apr 2023 05:47:34 -0700 (PDT) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) client-ip=2620:137:e000::1:20; Authentication-Results: mx.google.com; dkim=pass header.i=@marvell.com header.s=pfpt0220 header.b=gcnFh8BR; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=REJECT dis=NONE) header.from=marvell.com Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S240736AbjDGMYQ (ORCPT + 99 others); Fri, 7 Apr 2023 08:24:16 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:45926 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S231667AbjDGMYL (ORCPT ); Fri, 7 Apr 2023 08:24:11 -0400 Received: from mx0b-0016f401.pphosted.com (mx0a-0016f401.pphosted.com [67.231.148.174]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 6F0C6976F; Fri, 7 Apr 2023 05:24:10 -0700 (PDT) Received: from pps.filterd (m0045849.ppops.net [127.0.0.1]) by mx0a-0016f401.pphosted.com (8.17.1.19/8.17.1.19) with ESMTP id 337AwmMZ000622; Fri, 7 Apr 2023 05:23:59 -0700 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=marvell.com; h=from : to : cc : subject : date : message-id : in-reply-to : references : mime-version : content-transfer-encoding : content-type; s=pfpt0220; bh=aJ4BaAT3AGcAdjDo2xWVNbwi49MYlxqi2NK5V4zd0ms=; b=gcnFh8BRzh9UtQjT4OfHQnbtrc0gjmvjZDCQZNAuJ0/9Qddpmrl6Ohrwz8BlMqQ4r1So rsvb2V9JdsEOChu9cKCqwM+g3o94i1RrSfFECyLyoUl7hF8CYLUlZJMhfXduCpqc7JS6 wItHyiv1z5hF1tXU5SBI8lIowqGL99HXUdM1yKQKOW+EVU7yxEmNjHE9cB0FMaUI3PhU Pf11+A4o8Y5biM/1SkvsM2Tt482mDoACOcziKdrSI0Q5cNYPTf8zofuz3J3tNTYaA9i2 l/CI/u33cu1FJbYh3b9/Iz5gKHKhhyCSC/lZ0NS09Ku7fPez2YBnU2Q2UhD+FgHuWgJO Gg== Received: from dc5-exch02.marvell.com ([199.233.59.182]) by mx0a-0016f401.pphosted.com (PPS) with ESMTPS id 3pthvw88pr-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-SHA384 bits=256 verify=NOT); Fri, 07 Apr 2023 05:23:59 -0700 Received: from DC5-EXCH02.marvell.com (10.69.176.39) by DC5-EXCH02.marvell.com (10.69.176.39) with Microsoft SMTP Server (TLS) id 15.0.1497.48; Fri, 7 Apr 2023 05:23:57 -0700 Received: from maili.marvell.com (10.69.176.80) by DC5-EXCH02.marvell.com (10.69.176.39) with Microsoft SMTP Server id 15.0.1497.48 via Frontend Transport; Fri, 7 Apr 2023 05:23:57 -0700 Received: from hyd1425.marvell.com (unknown [10.29.37.83]) by maili.marvell.com (Postfix) with ESMTP id 486483F7062; Fri, 7 Apr 2023 05:23:53 -0700 (PDT) From: Sai Krishna To: , , , , , , , , , , , , CC: Sai Krishna Subject: [net PATCH v2 1/7] octeontx2-af: Secure APR table update with the lock Date: Fri, 7 Apr 2023 17:53:38 +0530 Message-ID: <20230407122344.4059-2-saikrishnag@marvell.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20230407122344.4059-1-saikrishnag@marvell.com> References: <20230407122344.4059-1-saikrishnag@marvell.com> MIME-Version: 1.0 X-Proofpoint-ORIG-GUID: kTQv6lgVAO_GSKLpznL0LK5J2INraHAe X-Proofpoint-GUID: kTQv6lgVAO_GSKLpznL0LK5J2INraHAe X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.254,Aquarius:18.0.942,Hydra:6.0.573,FMLib:17.11.170.22 definitions=2023-04-07_08,2023-04-06_03,2023-02-09_01 X-Spam-Status: No, score=-0.9 required=5.0 tests=DKIM_SIGNED,DKIM_VALID, DKIM_VALID_AU,DKIM_VALID_EF,RCVD_IN_DNSWL_LOW,SPF_HELO_NONE,SPF_NONE autolearn=unavailable autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-getmail-retrieved-from-mailbox: =?utf-8?q?INBOX?= X-GMAIL-THRID: =?utf-8?q?1762521676805021098?= X-GMAIL-MSGID: =?utf-8?q?1762521676805021098?= From: Geetha sowjanya APR table contains the lmtst base address of PF/VFs. These entries are updated by the PF/VF during the device probe. Due to race condition while updating the entries are getting corrupted. Hence secure the APR table update with the lock. Fixes: 893ae97214c3 ("octeontx2-af: cn10k: Support configurable LMTST regions") Signed-off-by: Geetha sowjanya Signed-off-by: Sunil Kovvuri Goutham Signed-off-by: Sai Krishna --- drivers/net/ethernet/marvell/octeontx2/af/rvu_cn10k.c | 8 +++++--- 1 file changed, 5 insertions(+), 3 deletions(-) diff --git a/drivers/net/ethernet/marvell/octeontx2/af/rvu_cn10k.c b/drivers/net/ethernet/marvell/octeontx2/af/rvu_cn10k.c index 4ad9ff025c96..8530250f6fba 100644 --- a/drivers/net/ethernet/marvell/octeontx2/af/rvu_cn10k.c +++ b/drivers/net/ethernet/marvell/octeontx2/af/rvu_cn10k.c @@ -142,16 +142,17 @@ int rvu_mbox_handler_lmtst_tbl_setup(struct rvu *rvu, * region, if so, convert that IOVA to physical address and * populate LMT table with that address */ + mutex_lock(&rvu->rsrc_lock); if (req->use_local_lmt_region) { err = rvu_get_lmtaddr(rvu, req->hdr.pcifunc, req->lmt_iova, &lmt_addr); if (err < 0) - return err; + goto error; /* Update the lmt addr for this PFFUNC in the LMT table */ err = rvu_update_lmtaddr(rvu, req->hdr.pcifunc, lmt_addr); if (err) - return err; + goto error; } /* Reconfiguring lmtst map table in lmt region shared mode i.e. make @@ -181,7 +182,7 @@ int rvu_mbox_handler_lmtst_tbl_setup(struct rvu *rvu, */ err = rvu_update_lmtaddr(rvu, req->hdr.pcifunc, val); if (err) - return err; + goto error; } /* This mailbox can also be used to update word1 of APR_LMT_MAP_ENTRY_S @@ -230,6 +231,7 @@ int rvu_mbox_handler_lmtst_tbl_setup(struct rvu *rvu, } error: + mutex_unlock(&rvu->rsrc_lock); return err; } From patchwork Fri Apr 7 12:23:39 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Sai Krishna Gajula X-Patchwork-Id: 80769 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a59:b0ea:0:b0:3b6:4342:cba0 with SMTP id b10csp249951vqo; Fri, 7 Apr 2023 05:29:38 -0700 (PDT) X-Google-Smtp-Source: AKy350bEMb+Rg7SjAkgGTVJZm7IDY0xaZK7NYnxXUJOy+3jTJ1dkguscXfPK4C8oN0deiZxUT6DN X-Received: by 2002:a05:6a20:3b11:b0:cc:7967:8a75 with SMTP id c17-20020a056a203b1100b000cc79678a75mr2602445pzh.46.1680870578400; Fri, 07 Apr 2023 05:29:38 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1680870578; cv=none; d=google.com; s=arc-20160816; b=ZBoK9LjmQZLcnBNXqH68CjcrsTg7p7YqQvAzOVs4WHW9eru0SD0O8tsbFPRJBqJv/S +khhq5uoVUbh82QOmyZ3WaYmxprTel0vvokoRpnZRdMzXhZOMeeg3IxHSWgMLMYAFSJx KD6P6L+mJeRKv8d1Fmksu+rrme+PmzeK7oHCutzsfeJbX9OtMd+WaqfLDse9p1yMPg6U gtl66XmYGRe7yR5G8FTJJjnrpH7VBYIfR8YG7iXj5G5wyiRSTOZlIAsG2t5T28iYpG0M 845VIHZCev2jIcf8jA71xgkzPQkt98pl9QUqFhsjqHD1YiUYHT6oOhsCOo3X2/YmRrtz 5K9g== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from :dkim-signature; bh=2eugfjHN5cEXVXyZBKU/nW9nBVOQy0d2Nhqol6lbOzo=; b=F8DGFKkG/npEbGoJkL6uGvqP96Lf/M4Met5WvxIqYoeDjwL+baCfC/0mrwTEZQka9s aObmHThJxk90jvoKztyAmEthDJD+ULa11QOvSOEmkR0Um98PnU0pJmwSariBURpdKdgU 5cbjDbKYfqEja1eiIIpDX6elO8S2fuyOO+wrOL/DFqMjcn8MNzznkYOdRYJzujDHYwzG xeLLsW8lk1a5aR0eaSDeypX9KcLuS3Bm8eIwYqFYwgxh715faNIRlr9L7q995v6qxNlI gTCChkX2MltwbqBA3RSMD9JTiaJZaEv4ocs3pRUHYCMIdQBPhZHcFnMQcvjhkGPcC4Y8 nYYg== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@marvell.com header.s=pfpt0220 header.b=WG7PKm3b; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=REJECT dis=NONE) header.from=marvell.com Received: from out1.vger.email (out1.vger.email. [2620:137:e000::1:20]) by mx.google.com with ESMTP id t18-20020aa79472000000b00628a75401bdsi3624391pfq.142.2023.04.07.05.29.25; Fri, 07 Apr 2023 05:29:38 -0700 (PDT) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) client-ip=2620:137:e000::1:20; Authentication-Results: mx.google.com; dkim=pass header.i=@marvell.com header.s=pfpt0220 header.b=WG7PKm3b; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=REJECT dis=NONE) header.from=marvell.com Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S240745AbjDGMYT (ORCPT + 99 others); Fri, 7 Apr 2023 08:24:19 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:45954 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S240716AbjDGMYM (ORCPT ); Fri, 7 Apr 2023 08:24:12 -0400 Received: from mx0b-0016f401.pphosted.com (mx0a-0016f401.pphosted.com [67.231.148.174]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 80402A271; Fri, 7 Apr 2023 05:24:11 -0700 (PDT) Received: from pps.filterd (m0045849.ppops.net [127.0.0.1]) by mx0a-0016f401.pphosted.com (8.17.1.19/8.17.1.19) with ESMTP id 337AxF3r000893; Fri, 7 Apr 2023 05:24:05 -0700 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=marvell.com; h=from : to : cc : subject : date : message-id : in-reply-to : references : mime-version : content-transfer-encoding : content-type; s=pfpt0220; bh=2eugfjHN5cEXVXyZBKU/nW9nBVOQy0d2Nhqol6lbOzo=; b=WG7PKm3bN8Pr7monF/nR62TmsxjNvF5hVLMYpqwBbhbyRIORIy3NnOIIwGTRnNjf7b+V hhP3L1CAHdhcqGMpKLEempefWfse2XWPbPY/aC7x/k8CpdhO2RS0hiTk/SET/eguzEq4 3TCy8/NmU2gpsAWMkkVBpAra5+lOjt7Rbo/bJh/ZcNtYgA+WLlu5yAC6n05pxDRmvwjX LkXOtHJkX34n0L2XIfelBSdttCgntN1Jp/lQW7dB3Ik5XF/qLmj8nNz3ToKiKlOhE6tv tuuEdXQPBz6WPFH60LQHexeyKUa2X0e59SJwENsESXGlaPnZjqCPymAmfDlBsdtSRKP5 3g== Received: from dc5-exch01.marvell.com ([199.233.59.181]) by mx0a-0016f401.pphosted.com (PPS) with ESMTPS id 3pthvw88py-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-SHA384 bits=256 verify=NOT); Fri, 07 Apr 2023 05:24:04 -0700 Received: from DC5-EXCH01.marvell.com (10.69.176.38) by DC5-EXCH01.marvell.com (10.69.176.38) with Microsoft SMTP Server (TLS) id 15.0.1497.48; Fri, 7 Apr 2023 05:24:02 -0700 Received: from maili.marvell.com (10.69.176.80) by DC5-EXCH01.marvell.com (10.69.176.38) with Microsoft SMTP Server id 15.0.1497.48 via Frontend Transport; Fri, 7 Apr 2023 05:24:02 -0700 Received: from hyd1425.marvell.com (unknown [10.29.37.83]) by maili.marvell.com (Postfix) with ESMTP id E3F193F7060; Fri, 7 Apr 2023 05:23:57 -0700 (PDT) From: Sai Krishna To: , , , , , , , , , , , , CC: Ratheesh Kannoth , Sai Krishna Subject: [net PATCH v2 2/7] octeontx2-af: Fix start and end bit for scan config Date: Fri, 7 Apr 2023 17:53:39 +0530 Message-ID: <20230407122344.4059-3-saikrishnag@marvell.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20230407122344.4059-1-saikrishnag@marvell.com> References: <20230407122344.4059-1-saikrishnag@marvell.com> MIME-Version: 1.0 X-Proofpoint-ORIG-GUID: pFsX-kAJYIi8LJyIrF0TvlW4pPOM3P8Y X-Proofpoint-GUID: pFsX-kAJYIi8LJyIrF0TvlW4pPOM3P8Y X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.254,Aquarius:18.0.942,Hydra:6.0.573,FMLib:17.11.170.22 definitions=2023-04-07_08,2023-04-06_03,2023-02-09_01 X-Spam-Status: No, score=-0.9 required=5.0 tests=DKIM_SIGNED,DKIM_VALID, DKIM_VALID_AU,DKIM_VALID_EF,RCVD_IN_DNSWL_LOW,SPF_HELO_NONE,SPF_NONE autolearn=unavailable autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-getmail-retrieved-from-mailbox: =?utf-8?q?INBOX?= X-GMAIL-THRID: =?utf-8?q?1762520547737095312?= X-GMAIL-MSGID: =?utf-8?q?1762520547737095312?= From: Ratheesh Kannoth Fix the NPC nibble start and end positions in the bit map. Fix the depth of cam and mem table configuration. Increased the field size of dmac filter flows as cn10kb support large in number. Fixes: b747923afff8 ("octeontx2-af: Exact match support") Signed-off-by: Ratheesh Kannoth Signed-off-by: Sunil Kovvuri Goutham Signed-off-by: Sai Krishna --- drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_fs.c | 5 ++--- drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_hash.c | 4 ++-- drivers/net/ethernet/marvell/octeontx2/nic/otx2_common.h | 4 ++-- 3 files changed, 6 insertions(+), 7 deletions(-) diff --git a/drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_fs.c b/drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_fs.c index 006beb5cf98d..27603078689a 100644 --- a/drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_fs.c +++ b/drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_fs.c @@ -593,9 +593,8 @@ static int npc_scan_kex(struct rvu *rvu, int blkaddr, u8 intf) * exact match code. */ masked_cfg = cfg & NPC_EXACT_NIBBLE; - bitnr = NPC_EXACT_NIBBLE_START; - for_each_set_bit_from(bitnr, (unsigned long *)&masked_cfg, - NPC_EXACT_NIBBLE_START) { + bitnr = NPC_EXACT_NIBBLE_START - 1; + for_each_set_bit_from(bitnr, (unsigned long *)&masked_cfg, NPC_EXACT_NIBBLE_END + 1) { npc_scan_exact_result(mcam, bitnr, key_nibble, intf); key_nibble++; } diff --git a/drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_hash.c b/drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_hash.c index 20ebb9c95c73..6597af84aa36 100644 --- a/drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_hash.c +++ b/drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_hash.c @@ -1868,9 +1868,9 @@ int rvu_npc_exact_init(struct rvu *rvu) rvu->hw->table = table; /* Read table size, ways and depth */ - table->mem_table.depth = FIELD_GET(GENMASK_ULL(31, 24), npc_const3); table->mem_table.ways = FIELD_GET(GENMASK_ULL(19, 16), npc_const3); - table->cam_table.depth = FIELD_GET(GENMASK_ULL(15, 0), npc_const3); + table->mem_table.depth = FIELD_GET(GENMASK_ULL(15, 0), npc_const3); + table->cam_table.depth = FIELD_GET(GENMASK_ULL(31, 24), npc_const3); dev_dbg(rvu->dev, "%s: NPC exact match 4way_2k table(ways=%d, depth=%d)\n", __func__, table->mem_table.ways, table->cam_table.depth); diff --git a/drivers/net/ethernet/marvell/octeontx2/nic/otx2_common.h b/drivers/net/ethernet/marvell/octeontx2/nic/otx2_common.h index 3d22cc6a2804..99cdc871b59c 100644 --- a/drivers/net/ethernet/marvell/octeontx2/nic/otx2_common.h +++ b/drivers/net/ethernet/marvell/octeontx2/nic/otx2_common.h @@ -335,11 +335,11 @@ struct otx2_flow_config { #define OTX2_PER_VF_VLAN_FLOWS 2 /* Rx + Tx per VF */ #define OTX2_VF_VLAN_RX_INDEX 0 #define OTX2_VF_VLAN_TX_INDEX 1 - u16 max_flows; - u8 dmacflt_max_flows; u32 *bmap_to_dmacindex; unsigned long *dmacflt_bmap; struct list_head flow_list; + u32 dmacflt_max_flows; + u16 max_flows; }; struct otx2_tc_info { From patchwork Fri Apr 7 12:23:40 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Sai Krishna Gajula X-Patchwork-Id: 80770 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a59:b0ea:0:b0:3b6:4342:cba0 with SMTP id b10csp250050vqo; Fri, 7 Apr 2023 05:29:50 -0700 (PDT) X-Google-Smtp-Source: AKy350bk+k/3rvBJZmAOQtSdNpz/nKLjsvMrX9+gyJT88Q7Gu0zNPFtDv+sO8q45kkodDxFe+D3H X-Received: by 2002:a05:6a20:6626:b0:d8:e90b:78 with SMTP id n38-20020a056a20662600b000d8e90b0078mr2302485pzh.45.1680870590529; Fri, 07 Apr 2023 05:29:50 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1680870590; cv=none; d=google.com; s=arc-20160816; b=lzAYzmY5HLZSZO9iPxxy+b2K3437W3gLG7yetj/2UmDq2SHrvlOaiQTx0FQ9oykWOU gtnPBaItvF2nBumCpYOgrBnrZMSTOtF3T6RL5S/ugN53JmmFufOQ6FK73Jk31wCYUpYi L+BYBJTBSFyxK4RpftaMc/WXKDubgU3V/siwXDpnF69ptw7rlMkBbRrrcWjTrkUWMGdN ST1kHfu8SQPnZlNiWrRXJAtM6UwMRng1sa7DulXfnbpaxHgREvH4K9X5eQ+O/h2QgO9m /4ppCZ9TSi91tmZpww7rRCCHqdUe7fqfEf32TnzT570Z0jCCtvu8HIk/JwiIw2NoVjga /yJA== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from :dkim-signature; bh=/1EraJ/KOS82xadi014qOEu9vIJ5vyi/xvCLp1ys0n4=; b=ZVGl+SW+8NcgiQbsEoDZge3HJtVF1LK4E4weP1Hcrd43PHuL37dgpUu7xaNeTiGVat 3O2i6DWAIgk6rIBXCO7c+o1EldYKd7lGyXYxbCM00yY9mIMAIP/QQsoDBusF8ZOn1ikx gsQc7siea2MDaahZdDF5zngD8/YP0lI5SNr9IfZ3srxxhmzRQPi05jKJfVA6HmEX5Bya tvJyWrHEvt5PV5N3NOt1LUuwrUYcP7bCGXCiZnM6p/NLSVVgz9DYPJtHeqQVFuQsjLDX dl6Hwz1h2Jpy2VU9lHgEgZuRx7QJqECDeW/Yguu3jm163muWxobcRil1p/oyEjMZyK6A VHCw== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@marvell.com header.s=pfpt0220 header.b=i2dL+p+a; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=REJECT dis=NONE) header.from=marvell.com Received: from out1.vger.email (out1.vger.email. [2620:137:e000::1:20]) by mx.google.com with ESMTP id 64-20020a630443000000b00502e76a516csi3578207pge.500.2023.04.07.05.29.38; Fri, 07 Apr 2023 05:29:50 -0700 (PDT) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) client-ip=2620:137:e000::1:20; Authentication-Results: mx.google.com; dkim=pass header.i=@marvell.com header.s=pfpt0220 header.b=i2dL+p+a; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=REJECT dis=NONE) header.from=marvell.com Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S240753AbjDGMYX (ORCPT + 99 others); Fri, 7 Apr 2023 08:24:23 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:46044 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S240723AbjDGMYP (ORCPT ); Fri, 7 Apr 2023 08:24:15 -0400 Received: from mx0b-0016f401.pphosted.com (mx0a-0016f401.pphosted.com [67.231.148.174]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 84039AD32; Fri, 7 Apr 2023 05:24:14 -0700 (PDT) Received: from pps.filterd (m0045849.ppops.net [127.0.0.1]) by mx0a-0016f401.pphosted.com (8.17.1.19/8.17.1.19) with ESMTP id 337AwmMb000622; Fri, 7 Apr 2023 05:24:08 -0700 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=marvell.com; h=from : to : cc : subject : date : message-id : in-reply-to : references : mime-version : content-transfer-encoding : content-type; s=pfpt0220; bh=/1EraJ/KOS82xadi014qOEu9vIJ5vyi/xvCLp1ys0n4=; b=i2dL+p+a2hwY9hD+mvMmueS4VLsVB9+VF4V9Wq7WYvuYaBONPQfMBpfoQjEsKo+RuFfQ 4HPXtCuHSjGikhZ5hiydmN0AkYugBJc2ZAcQZaF3D5oL1zdfbbn0QGlNdTunONXlhK5p lnIV8cnu9QaEIpWuCgyb2HAZNAp7EspNwCXf2cURzCuZW7xSHZVndVcvLVfH6paQlWgD s5n9qS0lGOTs1FSJPLnMKRt/eIXCSKiw5fCeuO4WOq3AubqmpJvCirkFEAHty8XhbDJZ /iZScuRdZW9aTeWtg0MDLc6inT97/nsNoImEPZjjAjfkQF2r1ZQmeo3YmGaFKoAf5mNa Dg== Received: from dc5-exch02.marvell.com ([199.233.59.182]) by mx0a-0016f401.pphosted.com (PPS) with ESMTPS id 3pthvw88q9-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-SHA384 bits=256 verify=NOT); Fri, 07 Apr 2023 05:24:08 -0700 Received: from DC5-EXCH02.marvell.com (10.69.176.39) by DC5-EXCH02.marvell.com (10.69.176.39) with Microsoft SMTP Server (TLS) id 15.0.1497.48; Fri, 7 Apr 2023 05:24:07 -0700 Received: from maili.marvell.com (10.69.176.80) by DC5-EXCH02.marvell.com (10.69.176.39) with Microsoft SMTP Server id 15.0.1497.48 via Frontend Transport; Fri, 7 Apr 2023 05:24:06 -0700 Received: from hyd1425.marvell.com (unknown [10.29.37.83]) by maili.marvell.com (Postfix) with ESMTP id C2EE33F7064; Fri, 7 Apr 2023 05:24:02 -0700 (PDT) From: Sai Krishna To: , , , , , , , , , , , , CC: Sai Krishna Subject: [net PATCH v2 3/7] octeontx2-af: Add validation for lmac type Date: Fri, 7 Apr 2023 17:53:40 +0530 Message-ID: <20230407122344.4059-4-saikrishnag@marvell.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20230407122344.4059-1-saikrishnag@marvell.com> References: <20230407122344.4059-1-saikrishnag@marvell.com> MIME-Version: 1.0 X-Proofpoint-ORIG-GUID: ZFoNIYd5WKTaD56V4R7BOvRRoLKsCAxj X-Proofpoint-GUID: ZFoNIYd5WKTaD56V4R7BOvRRoLKsCAxj X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.254,Aquarius:18.0.942,Hydra:6.0.573,FMLib:17.11.170.22 definitions=2023-04-07_08,2023-04-06_03,2023-02-09_01 X-Spam-Status: No, score=-0.9 required=5.0 tests=DKIM_SIGNED,DKIM_VALID, DKIM_VALID_AU,DKIM_VALID_EF,RCVD_IN_DNSWL_LOW,SPF_HELO_NONE,SPF_NONE autolearn=unavailable autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-getmail-retrieved-from-mailbox: =?utf-8?q?INBOX?= X-GMAIL-THRID: =?utf-8?q?1762520560696758126?= X-GMAIL-MSGID: =?utf-8?q?1762520560696758126?= From: Hariprasad Kelam Upon physical link change, firmware reports to the kernel about the change along with the details like speed, lmac_type_id, etc. Kernel derives lmac_type based on lmac_type_id received from firmware. In a few scenarios, firmware returns an invalid lmac_type_id, which is resulting in below kernel panic. This patch adds the missing validation of the lmac_type_id field. Internal error: Oops: 96000005 [#1] PREEMPT SMP [ 35.321595] Modules linked in: [ 35.328982] CPU: 0 PID: 31 Comm: kworker/0:1 Not tainted 5.4.210-g2e3169d8e1bc-dirty #17 [ 35.337014] Hardware name: Marvell CN103XX board (DT) [ 35.344297] Workqueue: events work_for_cpu_fn [ 35.352730] pstate: 40400089 (nZcv daIf +PAN -UAO) [ 35.360267] pc : strncpy+0x10/0x30 [ 35.366595] lr : cgx_link_change_handler+0x90/0x180 Fixes: 61071a871ea6 ("octeontx2-af: Forward CGX link notifications to PFs") Signed-off-by: Hariprasad Kelam Signed-off-by: Sunil Kovvuri Goutham Signed-off-by: Sai Krishna drivers/net/ethernet/marvell/octeontx2/af/cgx.c | 8 ++++++++ 1 file changed, 8 insertions(+) Reviewed-by: Simon Horman diff --git a/drivers/net/ethernet/marvell/octeontx2/af/cgx.c b/drivers/net/ethernet/marvell/octeontx2/af/cgx.c index 724df6398bbe..bd77152bb8d7 100644 --- a/drivers/net/ethernet/marvell/octeontx2/af/cgx.c +++ b/drivers/net/ethernet/marvell/octeontx2/af/cgx.c @@ -1231,6 +1231,14 @@ static inline void link_status_user_format(u64 lstat, linfo->an = FIELD_GET(RESP_LINKSTAT_AN, lstat); linfo->fec = FIELD_GET(RESP_LINKSTAT_FEC, lstat); linfo->lmac_type_id = FIELD_GET(RESP_LINKSTAT_LMAC_TYPE, lstat); + + if (linfo->lmac_type_id >= LMAC_MODE_MAX) { + dev_err(&cgx->pdev->dev, "Unknown lmac_type_id %d reported by firmware on cgx port%d:%d", + linfo->lmac_type_id, cgx->cgx_id, lmac_id); + strncpy(linfo->lmac_type, "Unknown", LMACTYPE_STR_LEN - 1); + return; + } + lmac_string = cgx_lmactype_string[linfo->lmac_type_id]; strncpy(linfo->lmac_type, lmac_string, LMACTYPE_STR_LEN - 1); } From patchwork Fri Apr 7 12:23:41 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Sai Krishna Gajula X-Patchwork-Id: 80771 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a59:b0ea:0:b0:3b6:4342:cba0 with SMTP id b10csp250228vqo; Fri, 7 Apr 2023 05:30:11 -0700 (PDT) X-Google-Smtp-Source: AKy350auXK6ifvzrAVvbYUPVCdz0mU4/oppdHMK6WVuSJ+k1IKvTgpUq3h+2PIIG5hNOdsLJWxuJ X-Received: by 2002:a17:90b:4f4a:b0:23a:6be8:9446 with SMTP id pj10-20020a17090b4f4a00b0023a6be89446mr2010452pjb.48.1680870611492; Fri, 07 Apr 2023 05:30:11 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1680870611; cv=none; d=google.com; s=arc-20160816; b=o3s74kvgCdku0c6Cgos1uFuikU5/sSDr9xcwmEBjmI8C5WVQo8N5OTZWNFJrCBOGMW A13ItvYv6RGQpX8VIYipruJOFoiFtmrYOtSdQKTk+XO8xxPY0PAAd26WJCgOsk0L6Px7 AkZBI2fd/iULjgpApTD5tZ5VYvz0A92LjyMv0nQ1bQFKBI926uh1HJPecsoEg1xoVmj5 nuQzfvZg90oCz+cXrD+EjusYrERF0mvvOYIwKX7Dk0mne6BsjS7ULXBpEGOcn4hW4J7B d7eLG2O9KqYzEtC3riJWm4JRDLJwKaknw2GKaobaMda9iMeqsjJuN8zDnaSG8oXq6Be7 F8Zw== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from :dkim-signature; bh=r5iQOyecge+mIAqmb5xI+ZhCpEcoa0uCD3OrB1FbqPQ=; b=q0afMR9GdCQdbNMsobGh3QgKqvKgvMU4BJZrn6k6n8w4HVksXL0moq2TK8+84LGsLc WGt3qQiuQdlYkwJzlfA9CPVY+MwNYr0dylVxjgnxebQ7fB2ZK0mCMp5j7Nlqm7o0YROH rwsvgvrb1KZXZBKESKt7HOlsBfliXaERhGlgVKE0ODgfcIN7ZioPq7hqT0BWZEQHrg1Y QGVFVB3FIqzxH97dru09sUeHhAEbLP1heNr9jTS3txTJkfhN2L+ARMt4xGT3/Vz97G3R MwfFyiJdSQ5+7QLldTKR5ao9l+JoZOzGjpljLeyXy+faySpP5PEwaQoYP8EyOuVHDOH9 SFvA== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@marvell.com header.s=pfpt0220 header.b=IlOMHZ6H; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=REJECT dis=NONE) header.from=marvell.com Received: from out1.vger.email (out1.vger.email. [2620:137:e000::1:20]) by mx.google.com with ESMTP id z8-20020a17090a8b8800b0023bdb8f6176si6019998pjn.128.2023.04.07.05.29.59; Fri, 07 Apr 2023 05:30:11 -0700 (PDT) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) client-ip=2620:137:e000::1:20; Authentication-Results: mx.google.com; dkim=pass header.i=@marvell.com header.s=pfpt0220 header.b=IlOMHZ6H; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=REJECT dis=NONE) header.from=marvell.com Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S240626AbjDGMY1 (ORCPT + 99 others); Fri, 7 Apr 2023 08:24:27 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:46218 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S240748AbjDGMYU (ORCPT ); Fri, 7 Apr 2023 08:24:20 -0400 Received: from mx0b-0016f401.pphosted.com (mx0a-0016f401.pphosted.com [67.231.148.174]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 754289EE5; Fri, 7 Apr 2023 05:24:19 -0700 (PDT) Received: from pps.filterd (m0045849.ppops.net [127.0.0.1]) by mx0a-0016f401.pphosted.com (8.17.1.19/8.17.1.19) with ESMTP id 337AwmfO000614; Fri, 7 Apr 2023 05:24:14 -0700 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=marvell.com; h=from : to : cc : subject : date : message-id : in-reply-to : references : mime-version : content-transfer-encoding : content-type; s=pfpt0220; bh=r5iQOyecge+mIAqmb5xI+ZhCpEcoa0uCD3OrB1FbqPQ=; b=IlOMHZ6Hl+rM08co9ysg2r0HKO156U0j3Q87KA1HqSr4O78aSt0Udjx5nc6pRkddKiCG h20ROaoyELkwk8sZju5vhe1i/77f8n5YYoTy2cfgbqpSjUE1wW4MzUyQaggUfRPQtfn4 VMSjAAjSCjdsaK3pzfSuDYaowuysJ2Z927kkQd2njuoBuwZh6GrgjAPwNvaDSz33tgQN mkdET8FhtNOqibV2+ZMDFavc7Y3b/OMIa49OPw+t+z67zoX4qWcdNTmJCHBYSBbNhN2/ SbozRgjMC0nsb6mQVHjBB/Dchtv3JztIJMfty35DEubmCROldZcJjV97EeepNJ38Sfsv Gg== Received: from dc5-exch02.marvell.com ([199.233.59.182]) by mx0a-0016f401.pphosted.com (PPS) with ESMTPS id 3pthvw88qf-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-SHA384 bits=256 verify=NOT); Fri, 07 Apr 2023 05:24:13 -0700 Received: from DC5-EXCH02.marvell.com (10.69.176.39) by DC5-EXCH02.marvell.com (10.69.176.39) with Microsoft SMTP Server (TLS) id 15.0.1497.48; Fri, 7 Apr 2023 05:24:11 -0700 Received: from maili.marvell.com (10.69.176.80) by DC5-EXCH02.marvell.com (10.69.176.39) with Microsoft SMTP Server id 15.0.1497.48 via Frontend Transport; Fri, 7 Apr 2023 05:24:11 -0700 Received: from hyd1425.marvell.com (unknown [10.29.37.83]) by maili.marvell.com (Postfix) with ESMTP id 73DED3F7060; Fri, 7 Apr 2023 05:24:07 -0700 (PDT) From: Sai Krishna To: , , , , , , , , , , , , CC: Suman Ghosh , Sai Krishna Subject: [net PATCH v2 4/7] octeontx2-af: Update correct mask to filter IPv4 fragments Date: Fri, 7 Apr 2023 17:53:41 +0530 Message-ID: <20230407122344.4059-5-saikrishnag@marvell.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20230407122344.4059-1-saikrishnag@marvell.com> References: <20230407122344.4059-1-saikrishnag@marvell.com> MIME-Version: 1.0 X-Proofpoint-ORIG-GUID: _Zjzh5fTO8GzjSKuJUmGChikr8j2uS0A X-Proofpoint-GUID: _Zjzh5fTO8GzjSKuJUmGChikr8j2uS0A X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.254,Aquarius:18.0.942,Hydra:6.0.573,FMLib:17.11.170.22 definitions=2023-04-07_08,2023-04-06_03,2023-02-09_01 X-Spam-Status: No, score=-0.9 required=5.0 tests=DKIM_SIGNED,DKIM_VALID, DKIM_VALID_AU,DKIM_VALID_EF,RCVD_IN_DNSWL_LOW,SPF_HELO_NONE,SPF_NONE autolearn=unavailable autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-getmail-retrieved-from-mailbox: =?utf-8?q?INBOX?= X-GMAIL-THRID: =?utf-8?q?1762520582641571972?= X-GMAIL-MSGID: =?utf-8?q?1762520582641571972?= From: Suman Ghosh During the initial design, the IPv4 ip_flag mask was set to 0xff. Which results to filter only fragmets with (fragment_offset == 0). As part of the fix, updated the mask to 0x20 to filter all the fragmented packets irrespective of the fragment_offset value. Fixes: c672e3727989 ("octeontx2-pf: Add support to filter packet based on IP fragment") Signed-off-by: Suman Ghosh Signed-off-by: Sunil Kovvuri Goutham Signed-off-by: Sai Krishna Reviewed-by: Simon Horman --- drivers/net/ethernet/marvell/octeontx2/nic/otx2_tc.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/net/ethernet/marvell/octeontx2/nic/otx2_tc.c b/drivers/net/ethernet/marvell/octeontx2/nic/otx2_tc.c index 044cc211424e..8392f63e433f 100644 --- a/drivers/net/ethernet/marvell/octeontx2/nic/otx2_tc.c +++ b/drivers/net/ethernet/marvell/octeontx2/nic/otx2_tc.c @@ -544,7 +544,7 @@ static int otx2_tc_prepare_flow(struct otx2_nic *nic, struct otx2_tc_flow *node, if (match.mask->flags & FLOW_DIS_IS_FRAGMENT) { if (ntohs(flow_spec->etype) == ETH_P_IP) { flow_spec->ip_flag = IPV4_FLAG_MORE; - flow_mask->ip_flag = 0xff; + flow_mask->ip_flag = IPV4_FLAG_MORE; req->features |= BIT_ULL(NPC_IPFRAG_IPV4); } else if (ntohs(flow_spec->etype) == ETH_P_IPV6) { flow_spec->next_header = IPPROTO_FRAGMENT; From patchwork Fri Apr 7 12:23:42 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Sai Krishna Gajula X-Patchwork-Id: 80772 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a59:b0ea:0:b0:3b6:4342:cba0 with SMTP id b10csp251408vqo; Fri, 7 Apr 2023 05:31:59 -0700 (PDT) X-Google-Smtp-Source: AKy350aT0m0BWRk3ZzdDsoD5oeRi1DMCYZCda0bCiw/45q0KIrIGHI0AjAEjNrsdlrJrF3l7VRSn X-Received: by 2002:a05:6a20:6721:b0:e7:33df:44f1 with SMTP id q33-20020a056a20672100b000e733df44f1mr2792883pzh.57.1680870719025; Fri, 07 Apr 2023 05:31:59 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1680870719; cv=none; d=google.com; s=arc-20160816; b=x0aZ62WgQEejnMLI34ryD4gqa+CUPlU40n4P+Rm/d/hk/MogK7yxqHl6dcJ/RFEx6Q Mgcv5mH4OI5+X2vIp9Y5c6cy9AXIhir0gNq908uTWN2wWu6Rw2iM/3NsZb+T8mT7NNSA 86Z/ZkFfyKwOwwkmUNID2dlQexe40L4ON9Mc8X8L8y5JgfOlhLseIsFy7NyV3+uKYFcY DvcgdfsnMMG/v+lspPeDaCsMNOPInML/KH+/2Xtx+jFnzYAaV0u7iqGnKfSIYkBeIHIa W/MKXvWTpdv9XwrGNxrRQ4xlBjTzmUQnWKbeZgGYO2LOPtjnS01hQYwSCt1JkSv4Sj6e 0iSg== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from :dkim-signature; bh=XWC+dAW1aafVpJSMrs97weOyTL6EtX96R5pQdOZ6mIM=; b=VrwN5obz/1NAjQQlEDOcK1IkltQcyrYNiwP9++u1sOwYfW0Mct8YewPNXUDb83dxhw zQ0wFqe7hEa9zN4rg/73NJVCZixWtSVVmZWYqxaA85duH47WOpnsXWSa3kxPznqfc3WK xmvvYeIjSOiQbslvDqZQEB81dr7xEls27mISnHx3KDTuxSPaQmHh5vV1oualaGwXndT4 cgkBtvFBeyRBBfKIZ/9NHyT3vKuSiwZkjAFwIHTriTDhcSPC24OSb+4m//pTE2PgrFfc S7eAdPSvEmf5TFrwL5pIJCYLI1iHBF4LI3ATqWwurVOpLUqxonjt5BVvm8VF72Ns1ffk d9tw== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@marvell.com header.s=pfpt0220 header.b="bq/YgSD+"; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=REJECT dis=NONE) header.from=marvell.com Received: from out1.vger.email (out1.vger.email. [2620:137:e000::1:20]) by mx.google.com with ESMTP id t18-20020aa79472000000b00628a75401bdsi3624391pfq.142.2023.04.07.05.31.46; Fri, 07 Apr 2023 05:31:58 -0700 (PDT) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) client-ip=2620:137:e000::1:20; Authentication-Results: mx.google.com; dkim=pass header.i=@marvell.com header.s=pfpt0220 header.b="bq/YgSD+"; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=REJECT dis=NONE) header.from=marvell.com Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S240772AbjDGMY4 (ORCPT + 99 others); Fri, 7 Apr 2023 08:24:56 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:47360 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S240761AbjDGMYq (ORCPT ); Fri, 7 Apr 2023 08:24:46 -0400 Received: from mx0b-0016f401.pphosted.com (mx0a-0016f401.pphosted.com [67.231.148.174]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id CEB72BB96; Fri, 7 Apr 2023 05:24:26 -0700 (PDT) Received: from pps.filterd (m0045849.ppops.net [127.0.0.1]) by mx0a-0016f401.pphosted.com (8.17.1.19/8.17.1.19) with ESMTP id 337AwkRq000607; Fri, 7 Apr 2023 05:24:20 -0700 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=marvell.com; h=from : to : cc : subject : date : message-id : in-reply-to : references : mime-version : content-transfer-encoding : content-type; s=pfpt0220; bh=XWC+dAW1aafVpJSMrs97weOyTL6EtX96R5pQdOZ6mIM=; b=bq/YgSD+vlY8jyPT2Y0gPgpTVAqdfHfmx07H5Nn9ps4eX9stgqQwGkVaAENDbeRQSlPo GdTneXWb3BA/JOJ5EV+gkBEuyXzs0xvpVSFwZ84eNuDxhQSqQs1uJ6zFYWZJmGb7c7sM l38iOF7aCCy6qzNRouC65V3b0hdS7tM0zLB1crjT3lH3Gi1QrIbE/FehLDJ6Hn2Lslb5 rTvYuEOQJ0rRN/T1zBMQNKApj94yIaiBxiDD2UVjKQuPmsPT0VVncS6d24MgieITVzOd 2skUTFvc8ic/+hA96PdySCIxDZK+jD6aTcr4t+WbEq151XsBV/TRQoIQEum7S1Ly696M dQ== Received: from dc5-exch02.marvell.com ([199.233.59.182]) by mx0a-0016f401.pphosted.com (PPS) with ESMTPS id 3pthvw88qm-2 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-SHA384 bits=256 verify=NOT); Fri, 07 Apr 2023 05:24:19 -0700 Received: from DC5-EXCH01.marvell.com (10.69.176.38) by DC5-EXCH02.marvell.com (10.69.176.39) with Microsoft SMTP Server (TLS) id 15.0.1497.48; Fri, 7 Apr 2023 05:24:17 -0700 Received: from maili.marvell.com (10.69.176.80) by DC5-EXCH01.marvell.com (10.69.176.38) with Microsoft SMTP Server id 15.0.1497.48 via Frontend Transport; Fri, 7 Apr 2023 05:24:17 -0700 Received: from hyd1425.marvell.com (unknown [10.29.37.83]) by maili.marvell.com (Postfix) with ESMTP id 50FC73F7062; Fri, 7 Apr 2023 05:24:12 -0700 (PDT) From: Sai Krishna To: , , , , , , , , , , , , CC: Ratheesh Kannoth , Sai Krishna Subject: [net PATCH v2 5/7] octeontx2-af: Fix issues with NPC field hash extract Date: Fri, 7 Apr 2023 17:53:42 +0530 Message-ID: <20230407122344.4059-6-saikrishnag@marvell.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20230407122344.4059-1-saikrishnag@marvell.com> References: <20230407122344.4059-1-saikrishnag@marvell.com> MIME-Version: 1.0 X-Proofpoint-ORIG-GUID: GgXoMbkPceqFgBynX0HpN0B1TvhLrhp3 X-Proofpoint-GUID: GgXoMbkPceqFgBynX0HpN0B1TvhLrhp3 X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.254,Aquarius:18.0.942,Hydra:6.0.573,FMLib:17.11.170.22 definitions=2023-04-07_08,2023-04-06_03,2023-02-09_01 X-Spam-Status: No, score=-0.9 required=5.0 tests=DKIM_SIGNED,DKIM_VALID, DKIM_VALID_AU,DKIM_VALID_EF,RCVD_IN_DNSWL_LOW,SPF_HELO_NONE,SPF_NONE autolearn=unavailable autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-getmail-retrieved-from-mailbox: =?utf-8?q?INBOX?= X-GMAIL-THRID: =?utf-8?q?1762520695259100735?= X-GMAIL-MSGID: =?utf-8?q?1762520695259100735?= From: Ratheesh Kannoth 1. As per previous implementation, mask and control parameter to generate the field hash value was not passed to the caller program. Updated the secret key mbox to share that information as well, as a part of the fix. 2. Earlier implementation did not consider hash reduction of both source and destination IPv6 addresses. Only source IPv6 address was considered. This fix solves that and provides option to hash reduce both source and destination IPv6 addresses. 3. Fix endianness issue during hash reduction while storing the IPv6 source/destination address as hash keys. 4. Configure hardware parser based on hash extract feature enable flag for IPv6. Fixes: 56d9f5fd2246 ("octeontx2-af: Use hashed field in MCAM key") Signed-off-by: Ratheesh Kannoth Signed-off-by: Sunil Kovvuri Goutham Signed-off-by: Sai Krishna .../net/ethernet/marvell/octeontx2/af/mbox.h | 16 ++- .../marvell/octeontx2/af/rvu_npc_fs.c | 23 +++- .../marvell/octeontx2/af/rvu_npc_fs.h | 4 + .../marvell/octeontx2/af/rvu_npc_hash.c | 121 ++++++++++-------- .../marvell/octeontx2/af/rvu_npc_hash.h | 10 +- 5 files changed, 108 insertions(+), 66 deletions(-) diff --git a/drivers/net/ethernet/marvell/octeontx2/af/mbox.h b/drivers/net/ethernet/marvell/octeontx2/af/mbox.h index 5727d67e0259..0ce533848536 100644 --- a/drivers/net/ethernet/marvell/octeontx2/af/mbox.h +++ b/drivers/net/ethernet/marvell/octeontx2/af/mbox.h @@ -245,9 +245,9 @@ M(NPC_MCAM_READ_BASE_RULE, 0x6011, npc_read_base_steer_rule, \ M(NPC_MCAM_GET_STATS, 0x6012, npc_mcam_entry_stats, \ npc_mcam_get_stats_req, \ npc_mcam_get_stats_rsp) \ -M(NPC_GET_SECRET_KEY, 0x6013, npc_get_secret_key, \ - npc_get_secret_key_req, \ - npc_get_secret_key_rsp) \ +M(NPC_GET_FIELD_HASH_INFO, 0x6013, npc_get_field_hash_info, \ + npc_get_field_hash_info_req, \ + npc_get_field_hash_info_rsp) \ M(NPC_GET_FIELD_STATUS, 0x6014, npc_get_field_status, \ npc_get_field_status_req, \ npc_get_field_status_rsp) \ @@ -1524,14 +1524,20 @@ struct npc_mcam_get_stats_rsp { u8 stat_ena; /* enabled */ }; -struct npc_get_secret_key_req { +struct npc_get_field_hash_info_req { struct mbox_msghdr hdr; u8 intf; }; -struct npc_get_secret_key_rsp { +struct npc_get_field_hash_info_rsp { struct mbox_msghdr hdr; u64 secret_key[3]; +#define NPC_MAX_HASH 2 +#define NPC_MAX_HASH_MASK 2 + /* NPC_AF_INTF(0..1)_HASH(0..1)_MASK(0..1) */ + u64 hash_mask[NPC_MAX_INTF][NPC_MAX_HASH][NPC_MAX_HASH_MASK]; + /* NPC_AF_INTF(0..1)_HASH(0..1)_RESULT_CTRL */ + u64 hash_ctrl[NPC_MAX_INTF][NPC_MAX_HASH]; }; enum ptp_op { diff --git a/drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_fs.c b/drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_fs.c index 27603078689a..6d63a0ef6d9c 100644 --- a/drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_fs.c +++ b/drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_fs.c @@ -13,11 +13,6 @@ #include "rvu_npc_fs.h" #include "rvu_npc_hash.h" -#define NPC_BYTESM GENMASK_ULL(19, 16) -#define NPC_HDR_OFFSET GENMASK_ULL(15, 8) -#define NPC_KEY_OFFSET GENMASK_ULL(5, 0) -#define NPC_LDATA_EN BIT_ULL(7) - static const char * const npc_flow_names[] = { [NPC_DMAC] = "dmac", [NPC_SMAC] = "smac", @@ -442,6 +437,7 @@ static void npc_handle_multi_layer_fields(struct rvu *rvu, int blkaddr, u8 intf) static void npc_scan_ldata(struct rvu *rvu, int blkaddr, u8 lid, u8 lt, u64 cfg, u8 intf) { + struct npc_mcam_kex_hash *mkex_hash = rvu->kpu.mkex_hash; struct npc_mcam *mcam = &rvu->hw->mcam; u8 hdr, key, nr_bytes, bit_offset; u8 la_ltype, la_start; @@ -490,8 +486,21 @@ do { \ NPC_SCAN_HDR(NPC_SIP_IPV4, NPC_LID_LC, NPC_LT_LC_IP, 12, 4); NPC_SCAN_HDR(NPC_DIP_IPV4, NPC_LID_LC, NPC_LT_LC_IP, 16, 4); NPC_SCAN_HDR(NPC_IPFRAG_IPV6, NPC_LID_LC, NPC_LT_LC_IP6_EXT, 6, 1); - NPC_SCAN_HDR(NPC_SIP_IPV6, NPC_LID_LC, NPC_LT_LC_IP6, 8, 16); - NPC_SCAN_HDR(NPC_DIP_IPV6, NPC_LID_LC, NPC_LT_LC_IP6, 24, 16); + if (rvu->hw->cap.npc_hash_extract) { + if (mkex_hash->lid_lt_ld_hash_en[intf][lid][lt][0]) + NPC_SCAN_HDR(NPC_SIP_IPV6, NPC_LID_LC, NPC_LT_LC_IP6, 8, 4); + else + NPC_SCAN_HDR(NPC_SIP_IPV6, NPC_LID_LC, NPC_LT_LC_IP6, 8, 16); + + if (mkex_hash->lid_lt_ld_hash_en[intf][lid][lt][1]) + NPC_SCAN_HDR(NPC_DIP_IPV6, NPC_LID_LC, NPC_LT_LC_IP6, 24, 4); + else + NPC_SCAN_HDR(NPC_DIP_IPV6, NPC_LID_LC, NPC_LT_LC_IP6, 24, 16); + } else { + NPC_SCAN_HDR(NPC_SIP_IPV6, NPC_LID_LC, NPC_LT_LC_IP6, 8, 16); + NPC_SCAN_HDR(NPC_DIP_IPV6, NPC_LID_LC, NPC_LT_LC_IP6, 24, 16); + } + NPC_SCAN_HDR(NPC_SPORT_UDP, NPC_LID_LD, NPC_LT_LD_UDP, 0, 2); NPC_SCAN_HDR(NPC_DPORT_UDP, NPC_LID_LD, NPC_LT_LD_UDP, 2, 2); NPC_SCAN_HDR(NPC_SPORT_TCP, NPC_LID_LD, NPC_LT_LD_TCP, 0, 2); diff --git a/drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_fs.h b/drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_fs.h index bdd65ce56a32..3f5c9042d10e 100644 --- a/drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_fs.h +++ b/drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_fs.h @@ -9,6 +9,10 @@ #define __RVU_NPC_FS_H #define IPV6_WORDS 4 +#define NPC_BYTESM GENMASK_ULL(19, 16) +#define NPC_HDR_OFFSET GENMASK_ULL(15, 8) +#define NPC_KEY_OFFSET GENMASK_ULL(5, 0) +#define NPC_LDATA_EN BIT_ULL(7) void npc_update_entry(struct rvu *rvu, enum key_fields type, struct mcam_entry *entry, u64 val_lo, diff --git a/drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_hash.c b/drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_hash.c index 6597af84aa36..51209119f0f2 100644 --- a/drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_hash.c +++ b/drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_hash.c @@ -78,42 +78,43 @@ static u32 rvu_npc_toeplitz_hash(const u64 *data, u64 *key, size_t data_bit_len, return hash_out; } -u32 npc_field_hash_calc(u64 *ldata, struct npc_mcam_kex_hash *mkex_hash, - u64 *secret_key, u8 intf, u8 hash_idx) +u32 npc_field_hash_calc(u64 *ldata, struct npc_get_field_hash_info_rsp rsp, + u8 intf, u8 hash_idx) { u64 hash_key[3]; u64 data_padded[2]; u32 field_hash; - hash_key[0] = secret_key[1] << 31; - hash_key[0] |= secret_key[2]; - hash_key[1] = secret_key[1] >> 33; - hash_key[1] |= secret_key[0] << 31; - hash_key[2] = secret_key[0] >> 33; + hash_key[0] = rsp.secret_key[1] << 31; + hash_key[0] |= rsp.secret_key[2]; + hash_key[1] = rsp.secret_key[1] >> 33; + hash_key[1] |= rsp.secret_key[0] << 31; + hash_key[2] = rsp.secret_key[0] >> 33; - data_padded[0] = mkex_hash->hash_mask[intf][hash_idx][0] & ldata[0]; - data_padded[1] = mkex_hash->hash_mask[intf][hash_idx][1] & ldata[1]; + data_padded[0] = rsp.hash_mask[intf][hash_idx][0] & ldata[0]; + data_padded[1] = rsp.hash_mask[intf][hash_idx][1] & ldata[1]; field_hash = rvu_npc_toeplitz_hash(data_padded, hash_key, 128, 159); - field_hash &= mkex_hash->hash_ctrl[intf][hash_idx] >> 32; - field_hash |= mkex_hash->hash_ctrl[intf][hash_idx]; + field_hash &= FIELD_GET(GENMASK(63, 32), rsp.hash_ctrl[intf][hash_idx]); + field_hash += FIELD_GET(GENMASK(31, 0), rsp.hash_ctrl[intf][hash_idx]); return field_hash; } -static u64 npc_update_use_hash(int lt, int ld) +static u64 npc_update_use_hash(struct rvu *rvu, int blkaddr, + u8 intf, int lid, int lt, int ld) { - u64 cfg = 0; - - switch (lt) { - case NPC_LT_LC_IP6: - /* Update use_hash(bit-20) and bytesm1 (bit-16:19) - * in KEX_LD_CFG - */ - cfg = KEX_LD_CFG_USE_HASH(0x1, 0x03, - ld ? 0x8 : 0x18, - 0x1, 0x0, 0x10); - break; - } + u8 hdr, key; + u64 cfg; + + cfg = rvu_read64(rvu, blkaddr, NPC_AF_INTFX_LIDX_LTX_LDX_CFG(intf, lid, lt, ld)); + hdr = FIELD_GET(NPC_HDR_OFFSET, cfg); + key = FIELD_GET(NPC_KEY_OFFSET, cfg); + + /* Update use_hash(bit-20) to 'true' and + * bytesm1(bit-16:19) to '0x3' in KEX_LD_CFG + */ + cfg = KEX_LD_CFG_USE_HASH(0x1, 0x03, + hdr, 0x1, 0x0, key); return cfg; } @@ -132,12 +133,13 @@ static void npc_program_mkex_hash_rx(struct rvu *rvu, int blkaddr, for (lt = 0; lt < NPC_MAX_LT; lt++) { for (ld = 0; ld < NPC_MAX_LD; ld++) { if (mkex_hash->lid_lt_ld_hash_en[intf][lid][lt][ld]) { - u64 cfg = npc_update_use_hash(lt, ld); + u64 cfg; - hash_cnt++; if (hash_cnt == NPC_MAX_HASH) return; + cfg = npc_update_use_hash(rvu, blkaddr, + intf, lid, lt, ld); /* Set updated KEX configuration */ SET_KEX_LD(intf, lid, lt, ld, cfg); /* Set HASH configuration */ @@ -149,6 +151,8 @@ static void npc_program_mkex_hash_rx(struct rvu *rvu, int blkaddr, mkex_hash->hash_mask[intf][ld][1]); SET_KEX_LD_HASH_CTRL(intf, ld, mkex_hash->hash_ctrl[intf][ld]); + + hash_cnt++; } } } @@ -169,12 +173,13 @@ static void npc_program_mkex_hash_tx(struct rvu *rvu, int blkaddr, for (lt = 0; lt < NPC_MAX_LT; lt++) { for (ld = 0; ld < NPC_MAX_LD; ld++) if (mkex_hash->lid_lt_ld_hash_en[intf][lid][lt][ld]) { - u64 cfg = npc_update_use_hash(lt, ld); + u64 cfg; - hash_cnt++; if (hash_cnt == NPC_MAX_HASH) return; + cfg = npc_update_use_hash(rvu, blkaddr, + intf, lid, lt, ld); /* Set updated KEX configuration */ SET_KEX_LD(intf, lid, lt, ld, cfg); /* Set HASH configuration */ @@ -187,8 +192,6 @@ static void npc_program_mkex_hash_tx(struct rvu *rvu, int blkaddr, SET_KEX_LD_HASH_CTRL(intf, ld, mkex_hash->hash_ctrl[intf][ld]); hash_cnt++; - if (hash_cnt == NPC_MAX_HASH) - return; } } } @@ -238,8 +241,8 @@ void npc_update_field_hash(struct rvu *rvu, u8 intf, struct flow_msg *omask) { struct npc_mcam_kex_hash *mkex_hash = rvu->kpu.mkex_hash; - struct npc_get_secret_key_req req; - struct npc_get_secret_key_rsp rsp; + struct npc_get_field_hash_info_req req; + struct npc_get_field_hash_info_rsp rsp; u64 ldata[2], cfg; u32 field_hash; u8 hash_idx; @@ -250,7 +253,7 @@ void npc_update_field_hash(struct rvu *rvu, u8 intf, } req.intf = intf; - rvu_mbox_handler_npc_get_secret_key(rvu, &req, &rsp); + rvu_mbox_handler_npc_get_field_hash_info(rvu, &req, &rsp); for (hash_idx = 0; hash_idx < NPC_MAX_HASH; hash_idx++) { cfg = rvu_read64(rvu, blkaddr, NPC_AF_INTFX_HASHX_CFG(intf, hash_idx)); @@ -266,44 +269,45 @@ void npc_update_field_hash(struct rvu *rvu, u8 intf, * is hashed to 32 bit value. */ case NPC_LT_LC_IP6: - if (features & BIT_ULL(NPC_SIP_IPV6)) { + /* ld[0] == hash_idx[0] == Source IPv6 + * ld[1] == hash_idx[1] == Destination IPv6 + */ + if ((features & BIT_ULL(NPC_SIP_IPV6)) && !hash_idx) { u32 src_ip[IPV6_WORDS]; be32_to_cpu_array(src_ip, pkt->ip6src, IPV6_WORDS); - ldata[0] = (u64)src_ip[0] << 32 | src_ip[1]; - ldata[1] = (u64)src_ip[2] << 32 | src_ip[3]; + ldata[1] = (u64)src_ip[0] << 32 | src_ip[1]; + ldata[0] = (u64)src_ip[2] << 32 | src_ip[3]; field_hash = npc_field_hash_calc(ldata, - mkex_hash, - rsp.secret_key, + rsp, intf, hash_idx); npc_update_entry(rvu, NPC_SIP_IPV6, entry, - field_hash, 0, 32, 0, intf); + field_hash, 0, + GENMASK(31, 0), 0, intf); memcpy(&opkt->ip6src, &pkt->ip6src, sizeof(pkt->ip6src)); memcpy(&omask->ip6src, &mask->ip6src, sizeof(mask->ip6src)); - break; - } - - if (features & BIT_ULL(NPC_DIP_IPV6)) { + } else if ((features & BIT_ULL(NPC_DIP_IPV6)) && hash_idx) { u32 dst_ip[IPV6_WORDS]; be32_to_cpu_array(dst_ip, pkt->ip6dst, IPV6_WORDS); - ldata[0] = (u64)dst_ip[0] << 32 | dst_ip[1]; - ldata[1] = (u64)dst_ip[2] << 32 | dst_ip[3]; + ldata[1] = (u64)dst_ip[0] << 32 | dst_ip[1]; + ldata[0] = (u64)dst_ip[2] << 32 | dst_ip[3]; field_hash = npc_field_hash_calc(ldata, - mkex_hash, - rsp.secret_key, + rsp, intf, hash_idx); npc_update_entry(rvu, NPC_DIP_IPV6, entry, - field_hash, 0, 32, 0, intf); + field_hash, 0, + GENMASK(31, 0), 0, intf); memcpy(&opkt->ip6dst, &pkt->ip6dst, sizeof(pkt->ip6dst)); memcpy(&omask->ip6dst, &mask->ip6dst, sizeof(mask->ip6dst)); } + break; } } @@ -311,13 +315,13 @@ void npc_update_field_hash(struct rvu *rvu, u8 intf, } } -int rvu_mbox_handler_npc_get_secret_key(struct rvu *rvu, - struct npc_get_secret_key_req *req, - struct npc_get_secret_key_rsp *rsp) +int rvu_mbox_handler_npc_get_field_hash_info(struct rvu *rvu, + struct npc_get_field_hash_info_req *req, + struct npc_get_field_hash_info_rsp *rsp) { u64 *secret_key = rsp->secret_key; u8 intf = req->intf; - int blkaddr; + int i, j, blkaddr; blkaddr = rvu_get_blkaddr(rvu, BLKTYPE_NPC, 0); if (blkaddr < 0) { @@ -329,6 +333,19 @@ int rvu_mbox_handler_npc_get_secret_key(struct rvu *rvu, secret_key[1] = rvu_read64(rvu, blkaddr, NPC_AF_INTFX_SECRET_KEY1(intf)); secret_key[2] = rvu_read64(rvu, blkaddr, NPC_AF_INTFX_SECRET_KEY2(intf)); + for (i = 0; i < NPC_MAX_HASH; i++) { + for (j = 0; j < NPC_MAX_HASH_MASK; j++) { + rsp->hash_mask[NIX_INTF_RX][i][j] = + GET_KEX_LD_HASH_MASK(NIX_INTF_RX, i, j); + rsp->hash_mask[NIX_INTF_TX][i][j] = + GET_KEX_LD_HASH_MASK(NIX_INTF_TX, i, j); + } + } + + for (i = 0; i < NPC_MAX_INTF; i++) + for (j = 0; j < NPC_MAX_HASH; j++) + rsp->hash_ctrl[i][j] = GET_KEX_LD_HASH_CTRL(i, j); + return 0; } diff --git a/drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_hash.h b/drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_hash.h index 3efeb09c58de..a1c3d987b804 100644 --- a/drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_hash.h +++ b/drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_hash.h @@ -31,6 +31,12 @@ rvu_write64(rvu, blkaddr, \ NPC_AF_INTFX_HASHX_MASKX(intf, ld, mask_idx), cfg) +#define GET_KEX_LD_HASH_CTRL(intf, ld) \ + rvu_read64(rvu, blkaddr, NPC_AF_INTFX_HASHX_RESULT_CTRL(intf, ld)) + +#define GET_KEX_LD_HASH_MASK(intf, ld, mask_idx) \ + rvu_read64(rvu, blkaddr, NPC_AF_INTFX_HASHX_MASKX(intf, ld, mask_idx)) + #define SET_KEX_LD_HASH_CTRL(intf, ld, cfg) \ rvu_write64(rvu, blkaddr, \ NPC_AF_INTFX_HASHX_RESULT_CTRL(intf, ld), cfg) @@ -56,8 +62,8 @@ void npc_update_field_hash(struct rvu *rvu, u8 intf, struct flow_msg *omask); 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[2620:137:e000::1:20]) by mx.google.com with ESMTP id a1-20020a656401000000b0051322a9ea4dsi3356719pgv.180.2023.04.07.05.32.06; Fri, 07 Apr 2023 05:32:19 -0700 (PDT) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) client-ip=2620:137:e000::1:20; Authentication-Results: mx.google.com; dkim=pass header.i=@marvell.com header.s=pfpt0220 header.b=VUKLbXAw; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=REJECT dis=NONE) header.from=marvell.com Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S240748AbjDGMZO (ORCPT + 99 others); Fri, 7 Apr 2023 08:25:14 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:46464 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S240768AbjDGMYz (ORCPT ); Fri, 7 Apr 2023 08:24:55 -0400 Received: from mx0b-0016f401.pphosted.com (mx0a-0016f401.pphosted.com [67.231.148.174]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id EB014AD37; Fri, 7 Apr 2023 05:24:33 -0700 (PDT) Received: from pps.filterd (m0045849.ppops.net [127.0.0.1]) by mx0a-0016f401.pphosted.com (8.17.1.19/8.17.1.19) with ESMTP id 337AwkRr000607; Fri, 7 Apr 2023 05:24:23 -0700 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=marvell.com; h=from : to : cc : subject : date : message-id : in-reply-to : references : mime-version : content-transfer-encoding : content-type; s=pfpt0220; bh=La/ke9ZRJ7EVarRCZpDAcuhvINgB6+KJJy92FQiy70E=; b=VUKLbXAwqTDeRy5mYS4PauC2iJ2cBt2yK6NPxL8i/MfMhsc7vl1by5AiqZ6Y8Oi+zlDq 0x1qj17LTudruFPQLWr+8Vj7xftvBfHbecbN34ytJ1lBdzFYcxXlpqi5Pw8jfhdycU2c 4SLMYIwVHQnf+gnApzZwLXKwQM3K3X58535DsICUsuRPRxjqvXGOTZaCJPtbnyRdcSvO huBTMgXJkeBxxk2VDXQlpq902kqNry4kPlpq6OpmEWhP/1PRdsgJQ6FCTUue4Sd7dnOE ywUau/D0qPj/0C9Cw8CJgCAcbH6btO86g1+TgEGUlOSuQmSMWaC/fPERKYaQWEnG4UI6 Cg== Received: from dc5-exch01.marvell.com ([199.233.59.181]) by mx0a-0016f401.pphosted.com (PPS) with ESMTPS id 3pthvw88qq-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-SHA384 bits=256 verify=NOT); Fri, 07 Apr 2023 05:24:23 -0700 Received: from DC5-EXCH02.marvell.com (10.69.176.39) by DC5-EXCH01.marvell.com (10.69.176.38) with Microsoft SMTP Server (TLS) id 15.0.1497.48; Fri, 7 Apr 2023 05:24:21 -0700 Received: from maili.marvell.com (10.69.176.80) by DC5-EXCH02.marvell.com (10.69.176.39) with Microsoft SMTP Server id 15.0.1497.48 via Frontend Transport; Fri, 7 Apr 2023 05:24:21 -0700 Received: from hyd1425.marvell.com (unknown [10.29.37.83]) by maili.marvell.com (Postfix) with ESMTP id 3D4495B697F; Fri, 7 Apr 2023 05:24:16 -0700 (PDT) From: Sai Krishna To: , , , , , , , , , , , , CC: Ratheesh Kannoth , Sai Krishna Subject: [net PATCH v2 6/7] octeontx2-af: Skip PFs if not enabled Date: Fri, 7 Apr 2023 17:53:43 +0530 Message-ID: <20230407122344.4059-7-saikrishnag@marvell.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20230407122344.4059-1-saikrishnag@marvell.com> References: <20230407122344.4059-1-saikrishnag@marvell.com> MIME-Version: 1.0 X-Proofpoint-ORIG-GUID: Tmd0M3r2SqnQYOZnEIj2Z_1KnHBZLkwO X-Proofpoint-GUID: Tmd0M3r2SqnQYOZnEIj2Z_1KnHBZLkwO X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.254,Aquarius:18.0.942,Hydra:6.0.573,FMLib:17.11.170.22 definitions=2023-04-07_08,2023-04-06_03,2023-02-09_01 X-Spam-Status: No, score=-0.9 required=5.0 tests=DKIM_SIGNED,DKIM_VALID, DKIM_VALID_AU,DKIM_VALID_EF,RCVD_IN_DNSWL_LOW,SPF_HELO_NONE,SPF_NONE autolearn=unavailable autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-getmail-retrieved-from-mailbox: =?utf-8?q?INBOX?= X-GMAIL-THRID: =?utf-8?q?1762520716043383307?= X-GMAIL-MSGID: =?utf-8?q?1762520716043383307?= From: Ratheesh Kannoth Skip mbox initialization of disabled PFs. Firmware configures PFs and allocate mbox resources etc. Linux should configure particular PFs, which ever are enabled by firmware. Fixes: 9bdc47a6e328 ("octeontx2-af: Mbox communication support btw AF and it's VFs") Signed-off-by: Ratheesh Kannoth Signed-off-by: Sunil Kovvuri Goutham Signed-off-by: Sai Krishna --- .../net/ethernet/marvell/octeontx2/af/mbox.c | 5 ++- .../net/ethernet/marvell/octeontx2/af/mbox.h | 3 +- .../net/ethernet/marvell/octeontx2/af/rvu.c | 38 ++++++++++++++++--- 3 files changed, 39 insertions(+), 7 deletions(-) diff --git a/drivers/net/ethernet/marvell/octeontx2/af/mbox.c b/drivers/net/ethernet/marvell/octeontx2/af/mbox.c index 2898931d5260..9690ac01f02c 100644 --- a/drivers/net/ethernet/marvell/octeontx2/af/mbox.c +++ b/drivers/net/ethernet/marvell/octeontx2/af/mbox.c @@ -157,7 +157,7 @@ EXPORT_SYMBOL(otx2_mbox_init); */ int otx2_mbox_regions_init(struct otx2_mbox *mbox, void **hwbase, struct pci_dev *pdev, void *reg_base, - int direction, int ndevs) + int direction, int ndevs, unsigned long *pf_bmap) { struct otx2_mbox_dev *mdev; int devid, err; @@ -169,6 +169,9 @@ int otx2_mbox_regions_init(struct otx2_mbox *mbox, void **hwbase, mbox->hwbase = hwbase[0]; for (devid = 0; devid < ndevs; devid++) { + if (!test_bit(devid, pf_bmap)) + continue; + mdev = &mbox->dev[devid]; mdev->mbase = hwbase[devid]; mdev->hwbase = hwbase[devid]; diff --git a/drivers/net/ethernet/marvell/octeontx2/af/mbox.h b/drivers/net/ethernet/marvell/octeontx2/af/mbox.h index 0ce533848536..26636a4d7dcc 100644 --- a/drivers/net/ethernet/marvell/octeontx2/af/mbox.h +++ b/drivers/net/ethernet/marvell/octeontx2/af/mbox.h @@ -96,9 +96,10 @@ void otx2_mbox_destroy(struct otx2_mbox *mbox); int otx2_mbox_init(struct otx2_mbox *mbox, void __force *hwbase, struct pci_dev *pdev, void __force *reg_base, int direction, int ndevs); + int otx2_mbox_regions_init(struct otx2_mbox *mbox, void __force **hwbase, struct pci_dev *pdev, void __force *reg_base, - int direction, int ndevs); + int direction, int ndevs, unsigned long *bmap); void otx2_mbox_msg_send(struct otx2_mbox *mbox, int devid); int otx2_mbox_wait_for_rsp(struct otx2_mbox *mbox, int devid); int otx2_mbox_busy_poll_for_rsp(struct otx2_mbox *mbox, int devid); diff --git a/drivers/net/ethernet/marvell/octeontx2/af/rvu.c b/drivers/net/ethernet/marvell/octeontx2/af/rvu.c index 8683ce57ed3f..61c658fa3f28 100644 --- a/drivers/net/ethernet/marvell/octeontx2/af/rvu.c +++ b/drivers/net/ethernet/marvell/octeontx2/af/rvu.c @@ -2282,7 +2282,7 @@ static inline void rvu_afvf_mbox_up_handler(struct work_struct *work) } static int rvu_get_mbox_regions(struct rvu *rvu, void **mbox_addr, - int num, int type) + int num, int type, unsigned long *pf_bmap) { struct rvu_hwinfo *hw = rvu->hw; int region; @@ -2294,6 +2294,9 @@ static int rvu_get_mbox_regions(struct rvu *rvu, void **mbox_addr, */ if (type == TYPE_AFVF) { for (region = 0; region < num; region++) { + if (!test_bit(region, pf_bmap)) + continue; + if (hw->cap.per_pf_mbox_regs) { bar4 = rvu_read64(rvu, BLKADDR_RVUM, RVU_AF_PFX_BAR4_ADDR(0)) + @@ -2315,6 +2318,9 @@ static int rvu_get_mbox_regions(struct rvu *rvu, void **mbox_addr, * RVU_AF_PF_BAR4_ADDR register. */ for (region = 0; region < num; region++) { + if (!test_bit(region, pf_bmap)) + continue; + if (hw->cap.per_pf_mbox_regs) { bar4 = rvu_read64(rvu, BLKADDR_RVUM, RVU_AF_PFX_BAR4_ADDR(region)); @@ -2343,8 +2349,27 @@ static int rvu_mbox_init(struct rvu *rvu, struct mbox_wq_info *mw, int err = -EINVAL, i, dir, dir_up; void __iomem *reg_base; struct rvu_work *mwork; + unsigned long *pf_bmap; void **mbox_regions; const char *name; + u64 cfg; + + pf_bmap = devm_kcalloc(rvu->dev, BITS_TO_LONGS(num), sizeof(long), GFP_KERNEL); + if (!pf_bmap) + return -ENOMEM; + + /* RVU VFs */ + if (type == TYPE_AFVF) + bitmap_set(pf_bmap, 0, num); + + if (type == TYPE_AFPF) { + /* Mark enabled PFs in bitmap */ + for (i = 0; i < num; i++) { + cfg = rvu_read64(rvu, BLKADDR_RVUM, RVU_PRIV_PFX_CFG(i)); + if (cfg & BIT_ULL(20)) + set_bit(i, pf_bmap); + } + } mbox_regions = kcalloc(num, sizeof(void *), GFP_KERNEL); if (!mbox_regions) @@ -2356,7 +2381,7 @@ static int rvu_mbox_init(struct rvu *rvu, struct mbox_wq_info *mw, dir = MBOX_DIR_AFPF; dir_up = MBOX_DIR_AFPF_UP; reg_base = rvu->afreg_base; - err = rvu_get_mbox_regions(rvu, mbox_regions, num, TYPE_AFPF); + err = rvu_get_mbox_regions(rvu, mbox_regions, num, TYPE_AFPF, pf_bmap); if (err) goto free_regions; break; @@ -2365,7 +2390,7 @@ static int rvu_mbox_init(struct rvu *rvu, struct mbox_wq_info *mw, dir = MBOX_DIR_PFVF; dir_up = MBOX_DIR_PFVF_UP; reg_base = rvu->pfreg_base; - err = rvu_get_mbox_regions(rvu, mbox_regions, num, TYPE_AFVF); + err = rvu_get_mbox_regions(rvu, mbox_regions, num, TYPE_AFVF, pf_bmap); if (err) goto free_regions; break; @@ -2396,16 +2421,19 @@ static int rvu_mbox_init(struct rvu *rvu, struct mbox_wq_info *mw, } err = otx2_mbox_regions_init(&mw->mbox, mbox_regions, rvu->pdev, - reg_base, dir, num); + reg_base, dir, num, pf_bmap); if (err) goto exit; err = otx2_mbox_regions_init(&mw->mbox_up, mbox_regions, rvu->pdev, - reg_base, dir_up, num); + reg_base, dir_up, num, pf_bmap); if (err) goto exit; for (i = 0; i < num; i++) { + if (!test_bit(i, pf_bmap)) + continue; + mwork = &mw->mbox_wrk[i]; mwork->rvu = rvu; INIT_WORK(&mwork->work, mbox_handler); From patchwork Fri Apr 7 12:23:44 2023 Content-Type: text/plain; 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[2620:137:e000::1:20]) by mx.google.com with ESMTP id a1-20020a656401000000b0051322a9ea4dsi3356719pgv.180.2023.04.07.05.33.51; Fri, 07 Apr 2023 05:34:03 -0700 (PDT) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) client-ip=2620:137:e000::1:20; Authentication-Results: mx.google.com; dkim=pass header.i=@marvell.com header.s=pfpt0220 header.b=Fz5HXcGX; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=REJECT dis=NONE) header.from=marvell.com Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S240785AbjDGMZj (ORCPT + 99 others); Fri, 7 Apr 2023 08:25:39 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:47874 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S240756AbjDGMZ0 (ORCPT ); Fri, 7 Apr 2023 08:25:26 -0400 Received: from mx0b-0016f401.pphosted.com (mx0a-0016f401.pphosted.com [67.231.148.174]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id D2669BB8F; Fri, 7 Apr 2023 05:24:58 -0700 (PDT) Received: from pps.filterd (m0045849.ppops.net [127.0.0.1]) by mx0a-0016f401.pphosted.com (8.17.1.19/8.17.1.19) with ESMTP id 337Ax8Vw000813; Fri, 7 Apr 2023 05:24:28 -0700 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=marvell.com; h=from : to : cc : subject : date : message-id : in-reply-to : references : mime-version : content-transfer-encoding : content-type; s=pfpt0220; bh=BlWiti7aiJ9pMybHjerR+p6XbcoliBYcRK+PVTNGv5s=; b=Fz5HXcGXpHc8DrA3zKvJMAkh56ea2XPOBERNxvvoNxWuRstAqZpekdXOOnE76/mUCwav X7Rk879IMbFSykgctgmp14sQrqeVYNvH82U9152jxc9POARJYt1MGilN/vVNGZtPBCjf eFGWCdUA7dsi/zIT3dU2jdAv0KV0rl5sp18kyR6dZQrZh2JabpW+D1MEaWeL2zjsHQNX OZlL9z/fr0VOwfGslLT/USa6ophp+hPsHSS32HB0kIvTQAhIFwfz00ANFYvkugWrYvwn b02+uh65xJGJ6a13xW1WB3WxvLBhSJj/FwxMpgEUSEJ/bRGu/Rkyyhp2BYK3r7KLWxat DA== Received: from dc5-exch02.marvell.com ([199.233.59.182]) by mx0a-0016f401.pphosted.com (PPS) with ESMTPS id 3pthvw88rd-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-SHA384 bits=256 verify=NOT); Fri, 07 Apr 2023 05:24:28 -0700 Received: from DC5-EXCH01.marvell.com (10.69.176.38) by DC5-EXCH02.marvell.com (10.69.176.39) with Microsoft SMTP Server (TLS) id 15.0.1497.48; Fri, 7 Apr 2023 05:24:26 -0700 Received: from maili.marvell.com (10.69.176.80) by DC5-EXCH01.marvell.com (10.69.176.38) with Microsoft SMTP Server id 15.0.1497.48 via Frontend Transport; Fri, 7 Apr 2023 05:24:26 -0700 Received: from hyd1425.marvell.com (unknown [10.29.37.83]) by maili.marvell.com (Postfix) with ESMTP id 261573F7060; Fri, 7 Apr 2023 05:24:21 -0700 (PDT) From: Sai Krishna To: , , , , , , , , , , , , CC: Sai Krishna Subject: [net PATCH v2 7/7] octeontx2-pf: Disable packet I/O for graceful exit Date: Fri, 7 Apr 2023 17:53:44 +0530 Message-ID: <20230407122344.4059-8-saikrishnag@marvell.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20230407122344.4059-1-saikrishnag@marvell.com> References: <20230407122344.4059-1-saikrishnag@marvell.com> MIME-Version: 1.0 X-Proofpoint-ORIG-GUID: 3AJZ7HCkVG9V2nFl585F94nz3U2EnWy_ X-Proofpoint-GUID: 3AJZ7HCkVG9V2nFl585F94nz3U2EnWy_ X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.254,Aquarius:18.0.942,Hydra:6.0.573,FMLib:17.11.170.22 definitions=2023-04-07_08,2023-04-06_03,2023-02-09_01 X-Spam-Status: No, score=-0.9 required=5.0 tests=DKIM_SIGNED,DKIM_VALID, DKIM_VALID_AU,DKIM_VALID_EF,RCVD_IN_DNSWL_LOW,SPF_HELO_NONE,SPF_NONE autolearn=unavailable autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-getmail-retrieved-from-mailbox: =?utf-8?q?INBOX?= X-GMAIL-THRID: =?utf-8?q?1762520826109806102?= X-GMAIL-MSGID: =?utf-8?q?1762520826109806102?= From: Subbaraya Sundeep At the stage of enabling packet I/O in otx2_open, If mailbox timeout occurs then interface ends up in down state where as hardware packet I/O is enabled. Hence disable packet I/O also before bailing out. This patch also free the LMTST per cpu structure on teardown, if the lmt_info pointer is not NULL. Fixes: 1ea0166da050 ("octeontx2-pf: Fix the device state on error") Signed-off-by: Subbaraya Sundeep Signed-off-by: Sunil Kovvuri Goutham Signed-off-by: Sai Krishna --- drivers/net/ethernet/marvell/octeontx2/nic/otx2_pf.c | 11 ++++++++++- drivers/net/ethernet/marvell/octeontx2/nic/otx2_vf.c | 8 +++++--- 2 files changed, 15 insertions(+), 4 deletions(-) diff --git a/drivers/net/ethernet/marvell/octeontx2/nic/otx2_pf.c b/drivers/net/ethernet/marvell/octeontx2/nic/otx2_pf.c index 179433d0a54a..52a57d2493dc 100644 --- a/drivers/net/ethernet/marvell/octeontx2/nic/otx2_pf.c +++ b/drivers/net/ethernet/marvell/octeontx2/nic/otx2_pf.c @@ -1835,13 +1835,22 @@ int otx2_open(struct net_device *netdev) otx2_dmacflt_reinstall_flows(pf); err = otx2_rxtx_enable(pf, true); - if (err) + /* If a mbox communication error happens at this point then interface + * will end up in a state such that it is in down state but hardware + * mcam entries are enabled to receive the packets. Hence disable the + * packet I/O. + */ + if (err == EIO) + goto err_disable_rxtx; + else if (err) goto err_tx_stop_queues; otx2_do_set_rx_mode(pf); return 0; +err_disable_rxtx: + otx2_rxtx_enable(pf, false); err_tx_stop_queues: netif_tx_stop_all_queues(netdev); netif_carrier_off(netdev); diff --git a/drivers/net/ethernet/marvell/octeontx2/nic/otx2_vf.c b/drivers/net/ethernet/marvell/octeontx2/nic/otx2_vf.c index ab126f8706c7..6ab4780f12fd 100644 --- a/drivers/net/ethernet/marvell/octeontx2/nic/otx2_vf.c +++ b/drivers/net/ethernet/marvell/octeontx2/nic/otx2_vf.c @@ -621,7 +621,7 @@ static int otx2vf_probe(struct pci_dev *pdev, const struct pci_device_id *id) err = otx2vf_realloc_msix_vectors(vf); if (err) - goto err_mbox_destroy; + goto err_detach_rsrc; err = otx2_set_real_num_queues(netdev, qcount, qcount); if (err) @@ -709,7 +709,8 @@ static int otx2vf_probe(struct pci_dev *pdev, const struct pci_device_id *id) err_ptp_destroy: otx2_ptp_destroy(vf); err_detach_rsrc: - free_percpu(vf->hw.lmt_info); + if (vf->hw.lmt_info) + free_percpu(vf->hw.lmt_info); if (test_bit(CN10K_LMTST, &vf->hw.cap_flag)) qmem_free(vf->dev, vf->dync_lmt); otx2_detach_resources(&vf->mbox); @@ -763,7 +764,8 @@ static void otx2vf_remove(struct pci_dev *pdev) otx2_shutdown_tc(vf); otx2vf_disable_mbox_intr(vf); otx2_detach_resources(&vf->mbox); - free_percpu(vf->hw.lmt_info); + if (vf->hw.lmt_info) + free_percpu(vf->hw.lmt_info); if (test_bit(CN10K_LMTST, &vf->hw.cap_flag)) qmem_free(vf->dev, vf->dync_lmt); otx2vf_vfaf_mbox_destroy(vf);