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[2620:137:e000::1:20]) by mx.google.com with ESMTP id p15-20020aa79e8f000000b0062e024b49c2si7768245pfq.152.2023.04.05.04.24.58; Wed, 05 Apr 2023 04:25:11 -0700 (PDT) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) client-ip=2620:137:e000::1:20; Authentication-Results: mx.google.com; dkim=pass header.i=@ti.com header.s=ti-com-17Q1 header.b="X2WIYs/j"; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=QUARANTINE sp=NONE dis=NONE) header.from=ti.com Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S237582AbjDELOa (ORCPT + 99 others); Wed, 5 Apr 2023 07:14:30 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:51170 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S230130AbjDELO1 (ORCPT ); Wed, 5 Apr 2023 07:14:27 -0400 Received: from lelv0142.ext.ti.com (lelv0142.ext.ti.com [198.47.23.249]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 71328123; Wed, 5 Apr 2023 04:14:26 -0700 (PDT) Received: from lelv0266.itg.ti.com ([10.180.67.225]) by lelv0142.ext.ti.com (8.15.2/8.15.2) with ESMTP id 335BEFTV107840; Wed, 5 Apr 2023 06:14:15 -0500 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ti.com; s=ti-com-17Q1; t=1680693255; bh=gJwIOSAR6mPpOZd/TA9dQZe8R4GmfYpdvlq9WvMeFY0=; h=From:To:CC:Subject:Date:In-Reply-To:References; b=X2WIYs/jO2+F/t4VI0YJduBdo+MByJIJAzpa/E5GFI4Mm9hL60zevGS8ntLtVIf3I JnHunOCKiJu4qCE6vbe+aTI3H5Q+3x1BYewS5X8KqcBv2/+FjpjsRMalPofuEkz/Uy Gku/rF/Rc1wFKHcHCuT4JC4xKqfEYGL6cyuz7s0g= Received: from DFLE111.ent.ti.com (dfle111.ent.ti.com [10.64.6.32]) by lelv0266.itg.ti.com (8.15.2/8.15.2) with ESMTPS id 335BEFoH036784 (version=TLSv1.2 cipher=AES256-GCM-SHA384 bits=256 verify=FAIL); Wed, 5 Apr 2023 06:14:15 -0500 Received: from DFLE106.ent.ti.com (10.64.6.27) by DFLE111.ent.ti.com (10.64.6.32) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.2507.16; Wed, 5 Apr 2023 06:14:14 -0500 Received: from fllv0039.itg.ti.com (10.64.41.19) by DFLE106.ent.ti.com (10.64.6.27) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.2507.16 via Frontend Transport; Wed, 5 Apr 2023 06:14:14 -0500 Received: from localhost (ileaxei01-snat.itg.ti.com [10.180.69.5]) by fllv0039.itg.ti.com (8.15.2/8.15.2) with ESMTP id 335BEEVv120241; Wed, 5 Apr 2023 06:14:14 -0500 From: Jayesh Choudhary To: , CC: , , , , , , , Subject: [PATCH 1/6] arm64: dts: ti: k3-j784s4-main: Add system controller and SERDES lane mux Date: Wed, 5 Apr 2023 16:44:07 +0530 Message-ID: <20230405111412.151192-2-j-choudhary@ti.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20230405111412.151192-1-j-choudhary@ti.com> References: <20230405111412.151192-1-j-choudhary@ti.com> MIME-Version: 1.0 X-EXCLAIMER-MD-CONFIG: e1e8a2fd-e40a-4ac6-ac9b-f7e9cc9ee180 X-Spam-Status: No, score=-2.5 required=5.0 tests=DKIMWL_WL_HIGH,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,RCVD_IN_DNSWL_MED,SPF_HELO_PASS, SPF_PASS autolearn=unavailable autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-getmail-retrieved-from-mailbox: =?utf-8?q?INBOX?= X-GMAIL-THRID: =?utf-8?q?1762335298507402964?= X-GMAIL-MSGID: =?utf-8?q?1762335298507402964?= From: Siddharth Vadapalli The system controller node manages the CTRL_MMR0 region. Add serdes_ln_ctrl node which is used for controlling the SERDES lane mux. Signed-off-by: Siddharth Vadapalli Signed-off-by: Jayesh Choudhary --- arch/arm64/boot/dts/ti/k3-j784s4-main.dtsi | 22 ++++++++++++++++++++++ 1 file changed, 22 insertions(+) diff --git a/arch/arm64/boot/dts/ti/k3-j784s4-main.dtsi b/arch/arm64/boot/dts/ti/k3-j784s4-main.dtsi index e9169eb358c1..344f4ffa0b82 100644 --- a/arch/arm64/boot/dts/ti/k3-j784s4-main.dtsi +++ b/arch/arm64/boot/dts/ti/k3-j784s4-main.dtsi @@ -5,6 +5,9 @@ * Copyright (C) 2022 Texas Instruments Incorporated - https://www.ti.com/ */ +#include +#include + &cbass_main { msmc_ram: sram@70000000 { compatible = "mmio-sram"; @@ -26,6 +29,25 @@ l3cache-sram@200000 { }; }; + scm_conf: scm-conf@100000 { + compatible = "ti,j721e-system-controller", "syscon", "simple-mfd"; + reg = <0x00 0x00100000 0x00 0x1c000>; + #address-cells = <1>; + #size-cells = <1>; + ranges = <0x00 0x00 0x00100000 0x1c000>; + + serdes_ln_ctrl: mux-controller@4080 { + compatible = "mmio-mux"; + #mux-control-cells = <1>; + mux-reg-masks = <0x4080 0x3>, <0x4084 0x3>, /* SERDES0 lane0/1 select */ + <0x4088 0x3>, <0x408c 0x3>, /* SERDES0 lane2/3 select */ + <0x4090 0x3>, <0x4094 0x3>, /* SERDES1 lane0/1 select */ + <0x4098 0x3>, <0x409c 0x3>, /* SERDES1 lane2/3 select */ + <0x40a0 0x3>, <0x40a4 0x3>, /* SERDES2 lane0/1 select */ + <0x40a8 0x3>, <0x40ac 0x3>; /* SERDES2 lane2/3 select */ + }; + }; + gic500: interrupt-controller@1800000 { compatible = "arm,gic-v3"; #address-cells = <2>; From patchwork Wed Apr 5 11:14:08 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Jayesh Choudhary X-Patchwork-Id: 79562 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a59:b0ea:0:b0:3b6:4342:cba0 with SMTP id b10csp220147vqo; Wed, 5 Apr 2023 04:16:39 -0700 (PDT) X-Google-Smtp-Source: AKy350bM464z2yHkFhN+r/9WyfBIDMc+A1aTzo16NEgshwI/c2sHpltXlDysXMbhbcylw2XZf00X X-Received: by 2002:a17:90b:4c92:b0:23f:635e:51e9 with SMTP id my18-20020a17090b4c9200b0023f635e51e9mr6448176pjb.8.1680693399602; Wed, 05 Apr 2023 04:16:39 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1680693399; cv=none; d=google.com; s=arc-20160816; b=c36wrlhFaILJxC9UwlNTHciEvxTjPtR/BFIBK99iPWkQFuGPn3FG0AcDkZ3AyXOkZh 5gQ0YrvCa066ilnej1RC/uB5/qBRaAK7vm1Ef2vU3PHU0AB7h8JfOL2j9fxSTOdFQ5g/ m8IqvmURcV9KrMWuT2C9TiylvxGB8kt3Mv+QQSAtp0SVeDxUj6TRtWRsl/+R+gXvK/m+ Oxva5O4IBm/goyXhNP9jVUiWqQiotxs7pT+265blzRQpOmW0glr9hg7PQsgKCNLnx0iR +sELeb6KmwPS+rupWafH9DBsW36DdYHrmibaKHWXlo7AWDBImCwU7vHr7wyUWUFoa22z USpw== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from :dkim-signature; bh=ZXIT24LwUDoFK65Tx0pvt8BK2CEw61Wgiziw3JaY0Mk=; b=TPw0VewoB5/I8Fns97e1Gt8tVOOs6IBCTHhO2NzMqiWvGtO4bdpExa7saBrB6UL3pF 61UaOEa+KpEtDLNCtXPQclLQunksSZ9M70iPHXwZVP/aIMFr6TEe3WUrEL0xi9XjEN04 M5LIDcKR9IJPNTfEyj0rb61iXxP2aGX1/OczTCrouFUJa17kDIVGQvBbZu+Cjt8nm62f yMhaGVU1FihYUNKeXWBMbI4uelqTOAf54OEvwl/+/lm/f9AMbw1TSGo6ItfYUF4VL1+s UdJ51UaExDlrzKA6y0xL0wcMYTL6Nu7b0YIvwuxeE08WMFqEbFjwK89DUySVqSSaewFL xAAg== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@ti.com header.s=ti-com-17Q1 header.b="TK8vSCD/"; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=QUARANTINE sp=NONE dis=NONE) header.from=ti.com Received: from out1.vger.email (out1.vger.email. [2620:137:e000::1:20]) by mx.google.com with ESMTP id u2-20020a17090341c200b001a271348785si12355920ple.462.2023.04.05.04.16.27; Wed, 05 Apr 2023 04:16:39 -0700 (PDT) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) client-ip=2620:137:e000::1:20; Authentication-Results: mx.google.com; dkim=pass header.i=@ti.com header.s=ti-com-17Q1 header.b="TK8vSCD/"; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=QUARANTINE sp=NONE dis=NONE) header.from=ti.com Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S237667AbjDELOg (ORCPT + 99 others); Wed, 5 Apr 2023 07:14:36 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:51176 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S237557AbjDELO3 (ORCPT ); Wed, 5 Apr 2023 07:14:29 -0400 Received: from fllv0015.ext.ti.com (fllv0015.ext.ti.com [198.47.19.141]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 987F3126; Wed, 5 Apr 2023 04:14:26 -0700 (PDT) Received: from fllv0035.itg.ti.com ([10.64.41.0]) by fllv0015.ext.ti.com (8.15.2/8.15.2) with ESMTP id 335BEGgg041314; Wed, 5 Apr 2023 06:14:16 -0500 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ti.com; s=ti-com-17Q1; t=1680693256; bh=ZXIT24LwUDoFK65Tx0pvt8BK2CEw61Wgiziw3JaY0Mk=; h=From:To:CC:Subject:Date:In-Reply-To:References; b=TK8vSCD/huykw6fYl+TYP52NhgAGGHIFhHLvUtXGjFXzWvKGhLYfSgQSg/WepqLyB ZFRxWxHxuzOrpJ5RwMlpJQeGj0UGDmKFteIZFQGakQjIdl3doCoCFY2Is4D2teCS0c UGltpCgUUZCayBCGxxTsuduA4lKwocmM9aumZUiM= Received: from DFLE105.ent.ti.com (dfle105.ent.ti.com [10.64.6.26]) by fllv0035.itg.ti.com (8.15.2/8.15.2) with ESMTPS id 335BEGdU041807 (version=TLSv1.2 cipher=AES256-GCM-SHA384 bits=256 verify=FAIL); Wed, 5 Apr 2023 06:14:16 -0500 Received: from DFLE101.ent.ti.com (10.64.6.22) by DFLE105.ent.ti.com (10.64.6.26) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.2507.16; Wed, 5 Apr 2023 06:14:16 -0500 Received: from fllv0040.itg.ti.com (10.64.41.20) by DFLE101.ent.ti.com (10.64.6.22) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.2507.16 via Frontend Transport; Wed, 5 Apr 2023 06:14:16 -0500 Received: from localhost (ileaxei01-snat2.itg.ti.com [10.180.69.6]) by fllv0040.itg.ti.com (8.15.2/8.15.2) with ESMTP id 335BEF0o116097; Wed, 5 Apr 2023 06:14:16 -0500 From: Jayesh Choudhary To: , CC: , , , , , , , Subject: [PATCH 2/6] arm64: dts: ti: k3-j784s4: Add Main CPSW2G node Date: Wed, 5 Apr 2023 16:44:08 +0530 Message-ID: <20230405111412.151192-3-j-choudhary@ti.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20230405111412.151192-1-j-choudhary@ti.com> References: <20230405111412.151192-1-j-choudhary@ti.com> MIME-Version: 1.0 X-EXCLAIMER-MD-CONFIG: e1e8a2fd-e40a-4ac6-ac9b-f7e9cc9ee180 X-Spam-Status: No, score=-2.5 required=5.0 tests=DKIMWL_WL_HIGH,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,RCVD_IN_DNSWL_MED,SPF_HELO_PASS, SPF_PASS autolearn=unavailable autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-getmail-retrieved-from-mailbox: =?utf-8?q?INBOX?= X-GMAIL-THRID: =?utf-8?q?1762334762387132484?= X-GMAIL-MSGID: =?utf-8?q?1762334762387132484?= From: Siddharth Vadapalli J784S4 SoC has a Main CPSW2G instance of the CPSW Ethernet Switch. Add the device-tree nodes for the Main CPSW2G instance and enable it. Signed-off-by: Siddharth Vadapalli Signed-off-by: Jayesh Choudhary --- arch/arm64/boot/dts/ti/k3-j784s4-evm.dts | 48 +++++++++++++++ arch/arm64/boot/dts/ti/k3-j784s4-main.dtsi | 68 ++++++++++++++++++++++ 2 files changed, 116 insertions(+) diff --git a/arch/arm64/boot/dts/ti/k3-j784s4-evm.dts b/arch/arm64/boot/dts/ti/k3-j784s4-evm.dts index f33815953e77..aef6f53ae8ac 100644 --- a/arch/arm64/boot/dts/ti/k3-j784s4-evm.dts +++ b/arch/arm64/boot/dts/ti/k3-j784s4-evm.dts @@ -105,6 +105,30 @@ vdd_sd_dv: regulator-TLV71033 { }; &main_pmx0 { + main_cpsw2g_pins_default: main-cpsw2g-pins-default { + pinctrl-single,pins = < + J784S4_IOPAD(0x0b8, PIN_INPUT, 6) /* (AC34) MCASP1_ACLKX.RGMII1_RD0 */ + J784S4_IOPAD(0x0a0, PIN_INPUT, 6) /* (AD34) MCASP0_AXR12.RGMII1_RD1 */ + J784S4_IOPAD(0x0a4, PIN_INPUT, 6) /* (AJ36) MCASP0_AXR13.RGMII1_RD2 */ + J784S4_IOPAD(0x0a8, PIN_INPUT, 6) /* (AF34) MCASP0_AXR14.RGMII1_RD3 */ + J784S4_IOPAD(0x0b0, PIN_INPUT, 6) /* (AL33) MCASP1_AXR3.RGMII1_RXC */ + J784S4_IOPAD(0x0ac, PIN_INPUT, 6) /* (AE34) MCASP0_AXR15.RGMII1_RX_CTL */ + J784S4_IOPAD(0x08c, PIN_INPUT, 6) /* (AE35) MCASP0_AXR7.RGMII1_TD0 */ + J784S4_IOPAD(0x090, PIN_INPUT, 6) /* (AC35) MCASP0_AXR8.RGMII1_TD1 */ + J784S4_IOPAD(0x094, PIN_INPUT, 6) /* (AG35) MCASP0_AXR9.RGMII1_TD2 */ + J784S4_IOPAD(0x098, PIN_INPUT, 6) /* (AH36) MCASP0_AXR10.RGMII1_TD3 */ + J784S4_IOPAD(0x0b4, PIN_INPUT, 6) /* (AL34) MCASP1_AXR4.RGMII1_TXC */ + J784S4_IOPAD(0x09c, PIN_INPUT, 6) /* (AF35) MCASP0_AXR11.RGMII1_TX_CTL */ + >; + }; + + main_cpsw2g_mdio_pins_default: main-cpsw2g-mdio-pins-default { + pinctrl-single,pins = < + J784S4_IOPAD(0x0c0, PIN_INPUT, 6) /* (AD38) MCASP1_AXR0.MDIO0_MDC */ + J784S4_IOPAD(0x0bc, PIN_INPUT, 6) /* (AD33) MCASP1_AFSX.MDIO0_MDIO */ + >; + }; + main_uart8_pins_default: main-uart8-pins-default { pinctrl-single,pins = < J784S4_IOPAD(0x040, PIN_INPUT, 14) /* (AF37) MCASP0_AXR0.UART8_CTSn */ @@ -253,3 +277,27 @@ &mcu_cpsw_port1 { phy-mode = "rgmii-rxid"; phy-handle = <&mcu_phy0>; }; + +&main_cpsw1 { + status = "okay"; + pinctrl-names = "default"; + pinctrl-0 = <&main_cpsw2g_pins_default>; +}; + +&main_cpsw1_mdio { + pinctrl-names = "default"; + pinctrl-0 = <&main_cpsw2g_mdio_pins_default>; + + main_phy0: ethernet-phy@0 { + reg = <0>; + ti,rx-internal-delay = ; + ti,fifo-depth = ; + ti,min-output-impedance; + }; +}; + +&main_cpsw1_port1 { + status = "okay"; + phy-mode = "rgmii-rxid"; + phy-handle = <&main_phy0>; +}; diff --git a/arch/arm64/boot/dts/ti/k3-j784s4-main.dtsi b/arch/arm64/boot/dts/ti/k3-j784s4-main.dtsi index 344f4ffa0b82..35b2ee07549b 100644 --- a/arch/arm64/boot/dts/ti/k3-j784s4-main.dtsi +++ b/arch/arm64/boot/dts/ti/k3-j784s4-main.dtsi @@ -36,6 +36,12 @@ scm_conf: scm-conf@100000 { #size-cells = <1>; ranges = <0x00 0x00 0x00100000 0x1c000>; + cpsw1_phy_gmii_sel: phy@4034 { + compatible = "ti,am654-phy-gmii-sel"; + reg = <0x4034 0x4>; + #phy-cells = <1>; + }; + serdes_ln_ctrl: mux-controller@4080 { compatible = "mmio-mux"; #mux-control-cells = <1>; @@ -777,6 +783,68 @@ cpts@310d0000 { }; }; + main_cpsw1: ethernet@c200000 { + compatible = "ti,j721e-cpsw-nuss"; + #address-cells = <2>; + #size-cells = <2>; + reg = <0x00 0xc200000 0x00 0x200000>; + reg-names = "cpsw_nuss"; + ranges = <0x00 0x00 0x00 0xc200000 0x00 0x200000>; + dma-coherent; + clocks = <&k3_clks 62 0>; + clock-names = "fck"; + power-domains = <&k3_pds 62 TI_SCI_PD_EXCLUSIVE>; + + dmas = <&main_udmap 0xc640>, + <&main_udmap 0xc641>, + <&main_udmap 0xc642>, + <&main_udmap 0xc643>, + <&main_udmap 0xc644>, + <&main_udmap 0xc645>, + <&main_udmap 0xc646>, + <&main_udmap 0xc647>, + <&main_udmap 0x4640>; + dma-names = "tx0", "tx1", "tx2", "tx3", + "tx4", "tx5", "tx6", "tx7", + "rx"; + + status = "disabled"; + + ethernet-ports { + #address-cells = <1>; + #size-cells = <0>; + + main_cpsw1_port1: port@1 { + reg = <1>; + label = "port1"; + phys = <&cpsw1_phy_gmii_sel 1>; + ti,mac-only; + status = "disabled"; + }; + }; + + main_cpsw1_mdio: mdio@f00 { + compatible = "ti,cpsw-mdio", "ti,davinci_mdio"; + reg = <0x00 0xf00 0x00 0x100>; + #address-cells = <1>; + #size-cells = <0>; + clocks = <&k3_clks 62 0>; + clock-names = "fck"; + bus_freq = <1000000>; + }; + + cpts@3d000 { + compatible = "ti,am65-cpts"; + reg = <0x00 0x3d000 0x00 0x400>; + clocks = <&k3_clks 62 3>; + clock-names = "cpts"; + interrupts-extended = <&gic500 GIC_SPI 21 IRQ_TYPE_LEVEL_HIGH>; + interrupt-names = "cpts"; + ti,cpts-ext-ts-inputs = <4>; + ti,cpts-periodic-outputs = <2>; + }; + }; + main_mcan0: can@2701000 { compatible = "bosch,m_can"; reg = <0x00 0x02701000 0x00 0x200>, From patchwork Wed Apr 5 11:14:09 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Jayesh Choudhary X-Patchwork-Id: 79561 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a59:b0ea:0:b0:3b6:4342:cba0 with SMTP id b10csp219977vqo; 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[2620:137:e000::1:20]) by mx.google.com with ESMTP id f11-20020aa79d8b000000b006260200cd0asi12535939pfq.368.2023.04.05.04.16.09; Wed, 05 Apr 2023 04:16:21 -0700 (PDT) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) client-ip=2620:137:e000::1:20; Authentication-Results: mx.google.com; dkim=pass header.i=@ti.com header.s=ti-com-17Q1 header.b=irc9htk3; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=QUARANTINE sp=NONE dis=NONE) header.from=ti.com Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S237635AbjDELOd (ORCPT + 99 others); Wed, 5 Apr 2023 07:14:33 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:51178 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S237503AbjDELO3 (ORCPT ); Wed, 5 Apr 2023 07:14:29 -0400 Received: from fllv0015.ext.ti.com (fllv0015.ext.ti.com [198.47.19.141]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id AE5FB131; Wed, 5 Apr 2023 04:14:26 -0700 (PDT) Received: from lelv0265.itg.ti.com ([10.180.67.224]) by fllv0015.ext.ti.com (8.15.2/8.15.2) with ESMTP id 335BEIRK041323; Wed, 5 Apr 2023 06:14:18 -0500 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ti.com; s=ti-com-17Q1; t=1680693258; bh=CVJHXScW334a/UbB6PQOgmJwO4fZtgGWRX415vTbtj0=; h=From:To:CC:Subject:Date:In-Reply-To:References; b=irc9htk3gASZwHGRJrjW6kjsPg+gcGF0kYIxbswqLvItN404QJZZs2e609gf8vzIp O70Ylseeu6HxGpylU/PshklhYvY3EziyK5Gni2ncLNkCEYZsBpqLZP6qNtBZnYn1sl ENb9zWAaE+NHiEptEOJ898IdhuS7cY6G0mRqOxCI= Received: from DFLE106.ent.ti.com (dfle106.ent.ti.com [10.64.6.27]) by lelv0265.itg.ti.com (8.15.2/8.15.2) with ESMTPS id 335BEIBk004442 (version=TLSv1.2 cipher=AES256-GCM-SHA384 bits=256 verify=FAIL); Wed, 5 Apr 2023 06:14:18 -0500 Received: from DFLE100.ent.ti.com (10.64.6.21) by DFLE106.ent.ti.com (10.64.6.27) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.2507.16; Wed, 5 Apr 2023 06:14:17 -0500 Received: from lelv0326.itg.ti.com (10.180.67.84) by DFLE100.ent.ti.com (10.64.6.21) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.2507.16 via Frontend Transport; Wed, 5 Apr 2023 06:14:17 -0500 Received: from localhost (ileaxei01-snat2.itg.ti.com [10.180.69.6]) by lelv0326.itg.ti.com (8.15.2/8.15.2) with ESMTP id 335BEHkU003783; Wed, 5 Apr 2023 06:14:17 -0500 From: Jayesh Choudhary To: , CC: , , , , , , , Subject: [PATCH 3/6] arm64: dts: ti: k3-j784s4: Add WIZ and SERDES PHY nodes Date: Wed, 5 Apr 2023 16:44:09 +0530 Message-ID: <20230405111412.151192-4-j-choudhary@ti.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20230405111412.151192-1-j-choudhary@ti.com> References: <20230405111412.151192-1-j-choudhary@ti.com> MIME-Version: 1.0 X-EXCLAIMER-MD-CONFIG: e1e8a2fd-e40a-4ac6-ac9b-f7e9cc9ee180 X-Spam-Status: No, score=-2.5 required=5.0 tests=DKIMWL_WL_HIGH,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,RCVD_IN_DNSWL_MED,SPF_HELO_PASS, SPF_PASS autolearn=unavailable autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-getmail-retrieved-from-mailbox: =?utf-8?q?INBOX?= X-GMAIL-THRID: =?utf-8?q?1762334743700675421?= X-GMAIL-MSGID: =?utf-8?q?1762334743700675421?= From: Siddharth Vadapalli J784S4 SoC has 4 Serdes instances along with their respective WIZ instances. Add device-tree nodes for them and disable them by default. Signed-off-by: Siddharth Vadapalli Signed-off-by: Jayesh Choudhary --- arch/arm64/boot/dts/ti/k3-j784s4-evm.dts | 4 + arch/arm64/boot/dts/ti/k3-j784s4-main.dtsi | 171 +++++++++++++++++++++ 2 files changed, 175 insertions(+) diff --git a/arch/arm64/boot/dts/ti/k3-j784s4-evm.dts b/arch/arm64/boot/dts/ti/k3-j784s4-evm.dts index aef6f53ae8ac..b1445b7c2aa8 100644 --- a/arch/arm64/boot/dts/ti/k3-j784s4-evm.dts +++ b/arch/arm64/boot/dts/ti/k3-j784s4-evm.dts @@ -301,3 +301,7 @@ &main_cpsw1_port1 { phy-mode = "rgmii-rxid"; phy-handle = <&main_phy0>; }; + +&serdes_refclk { + clock-frequency = <100000000>; +}; diff --git a/arch/arm64/boot/dts/ti/k3-j784s4-main.dtsi b/arch/arm64/boot/dts/ti/k3-j784s4-main.dtsi index 35b2ee07549b..0cd692bc52e6 100644 --- a/arch/arm64/boot/dts/ti/k3-j784s4-main.dtsi +++ b/arch/arm64/boot/dts/ti/k3-j784s4-main.dtsi @@ -7,6 +7,15 @@ #include #include +#include +#include + +/ { + serdes_refclk: serdes-refclk { + #clock-cells = <0>; + compatible = "fixed-clock"; + }; +}; &cbass_main { msmc_ram: sram@70000000 { @@ -440,6 +449,168 @@ main_sdhci1: mmc@4fb0000 { status = "disabled"; }; + serdes_wiz0: wiz@5060000 { + compatible = "ti,j784s4-wiz-10g"; + #address-cells = <1>; + #size-cells = <1>; + power-domains = <&k3_pds 404 TI_SCI_PD_EXCLUSIVE>; + clocks = <&k3_clks 404 2>, <&k3_clks 404 6>, <&k3_clks 404 5>, <&serdes_refclk>; + clock-names = "fck", "core_ref_clk", "core_ref1_clk", "ext_ref_clk"; + assigned-clocks = <&k3_clks 404 6>; + assigned-clock-parents = <&k3_clks 404 10>; + num-lanes = <4>; + #reset-cells = <1>; + #clock-cells = <1>; + ranges = <0x5060000 0x00 0x5060000 0x10000>; + + status = "disabled"; + + serdes0: serdes@5060000 { + compatible = "ti,j721e-serdes-10g"; + reg = <0x05060000 0x010000>; + reg-names = "torrent_phy"; + resets = <&serdes_wiz0 0>; + reset-names = "torrent_reset"; + clocks = <&serdes_wiz0 TI_WIZ_PLL0_REFCLK>, + <&serdes_wiz0 TI_WIZ_PHY_EN_REFCLK>; + clock-names = "refclk", "phy_en_refclk"; + assigned-clocks = <&serdes_wiz0 TI_WIZ_PLL0_REFCLK>, + <&serdes_wiz0 TI_WIZ_PLL1_REFCLK>, + <&serdes_wiz0 TI_WIZ_REFCLK_DIG>; + assigned-clock-parents = <&k3_clks 404 6>, + <&k3_clks 404 6>, + <&k3_clks 404 6>; + #address-cells = <1>; + #size-cells = <0>; + #clock-cells = <1>; + + status = "disabled"; + }; + }; + + serdes_wiz1: wiz@5070000 { + compatible = "ti,j784s4-wiz-10g"; + #address-cells = <1>; + #size-cells = <1>; + power-domains = <&k3_pds 405 TI_SCI_PD_EXCLUSIVE>; + clocks = <&k3_clks 405 2>, <&k3_clks 405 6>, <&k3_clks 405 5>, <&serdes_refclk>; + clock-names = "fck", "core_ref_clk", "core_ref1_clk", "ext_ref_clk"; + assigned-clocks = <&k3_clks 405 6>; + assigned-clock-parents = <&k3_clks 405 10>; + num-lanes = <4>; + #reset-cells = <1>; + #clock-cells = <1>; + ranges = <0x05070000 0x00 0x05070000 0x10000>; + + status = "disabled"; + + serdes1: serdes@5070000 { + compatible = "ti,j721e-serdes-10g"; + reg = <0x05070000 0x010000>; + reg-names = "torrent_phy"; + resets = <&serdes_wiz1 0>; + reset-names = "torrent_reset"; + clocks = <&serdes_wiz1 TI_WIZ_PLL0_REFCLK>, + <&serdes_wiz1 TI_WIZ_PHY_EN_REFCLK>; + clock-names = "refclk", "phy_en_refclk"; + assigned-clocks = <&serdes_wiz1 TI_WIZ_PLL0_REFCLK>, + <&serdes_wiz1 TI_WIZ_PLL1_REFCLK>, + <&serdes_wiz1 TI_WIZ_REFCLK_DIG>; + assigned-clock-parents = <&k3_clks 405 6>, + <&k3_clks 405 6>, + <&k3_clks 405 6>; + #address-cells = <1>; + #size-cells = <0>; + #clock-cells = <1>; + + status = "disabled"; + }; + }; + + serdes_wiz2: wiz@5020000 { + compatible = "ti,j784s4-wiz-10g"; + #address-cells = <1>; + #size-cells = <1>; + power-domains = <&k3_pds 406 TI_SCI_PD_EXCLUSIVE>; + clocks = <&k3_clks 406 2>, <&k3_clks 406 6>, <&k3_clks 406 5>, <&serdes_refclk>; + clock-names = "fck", "core_ref_clk", "core_ref1_clk", "ext_ref_clk"; + assigned-clocks = <&k3_clks 406 6>; + assigned-clock-parents = <&k3_clks 406 10>; + num-lanes = <4>; + #reset-cells = <1>; + #clock-cells = <1>; + ranges = <0x05020000 0x00 0x05020000 0x10000>; + + status = "disabled"; + + serdes2: serdes@5020000 { + compatible = "ti,j721e-serdes-10g"; + reg = <0x05020000 0x010000>; + reg-names = "torrent_phy"; + resets = <&serdes_wiz2 0>; + reset-names = "torrent_reset"; + clocks = <&serdes_wiz2 TI_WIZ_PLL0_REFCLK>, + <&serdes_wiz2 TI_WIZ_PHY_EN_REFCLK>; + clock-names = "refclk", "phy_en_refclk"; + assigned-clocks = <&serdes_wiz2 TI_WIZ_PLL0_REFCLK>, + <&serdes_wiz2 TI_WIZ_PLL1_REFCLK>, + <&serdes_wiz2 TI_WIZ_REFCLK_DIG>; + assigned-clock-parents = <&k3_clks 406 6>, + <&k3_clks 406 6>, + <&k3_clks 406 6>; + #address-cells = <1>; + #size-cells = <0>; + #clock-cells = <1>; + + status = "disabled"; + }; + }; + + serdes_wiz4: wiz@5050000 { + compatible = "ti,j784s4-wiz-10g"; + #address-cells = <1>; + #size-cells = <1>; + power-domains = <&k3_pds 407 TI_SCI_PD_EXCLUSIVE>; + clocks = <&k3_clks 407 2>, <&k3_clks 407 6>, <&k3_clks 407 5>, <&serdes_refclk>; + clock-names = "fck", "core_ref_clk", "core_ref1_clk", "ext_ref_clk"; + assigned-clocks = <&k3_clks 407 6>; + assigned-clock-parents = <&k3_clks 407 10>; + num-lanes = <4>; + #reset-cells = <1>; + #clock-cells = <1>; + ranges = <0x05050000 0x00 0x05050000 0x10000>, + <0xa030a00 0x00 0xa030a00 0x40>; /* DPTX PHY */ + + status = "disabled"; + + serdes4: serdes@5050000 { + /* + * Note: we also map DPTX PHY registers as the Torrent + * needs to manage those. + */ + compatible = "ti,j721e-serdes-10g"; + reg = <0x05050000 0x010000>, + <0x0a030a00 0x40>; /* DPTX PHY */ + reg-names = "torrent_phy"; + resets = <&serdes_wiz4 0>; + reset-names = "torrent_reset"; + clocks = <&serdes_wiz4 TI_WIZ_PLL0_REFCLK>, + <&serdes_wiz4 TI_WIZ_PHY_EN_REFCLK>; + clock-names = "refclk", "phy_en_refclk"; + assigned-clocks = <&serdes_wiz4 TI_WIZ_PLL0_REFCLK>, + <&serdes_wiz4 TI_WIZ_PLL1_REFCLK>, + <&serdes_wiz4 TI_WIZ_REFCLK_DIG>; + assigned-clock-parents = <&k3_clks 407 6>, + <&k3_clks 407 6>, + <&k3_clks 407 6>; + #address-cells = <1>; + #size-cells = <0>; + #clock-cells = <1>; + + status = "disabled"; + }; + }; + main_navss: bus@30000000 { compatible = "simple-bus"; #address-cells = <2>; From patchwork Wed Apr 5 11:14:10 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Jayesh Choudhary X-Patchwork-Id: 79564 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a59:b0ea:0:b0:3b6:4342:cba0 with SMTP id b10csp220975vqo; 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[2620:137:e000::1:20]) by mx.google.com with ESMTP id gc18-20020a17090b311200b0023fced08097si1121032pjb.158.2023.04.05.04.18.00; Wed, 05 Apr 2023 04:18:13 -0700 (PDT) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) client-ip=2620:137:e000::1:20; Authentication-Results: mx.google.com; dkim=pass header.i=@ti.com header.s=ti-com-17Q1 header.b=U2KD8wmp; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=QUARANTINE sp=NONE dis=NONE) header.from=ti.com Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S237813AbjDELOk (ORCPT + 99 others); Wed, 5 Apr 2023 07:14:40 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:51340 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S237730AbjDELOd (ORCPT ); Wed, 5 Apr 2023 07:14:33 -0400 Received: from lelv0143.ext.ti.com (lelv0143.ext.ti.com [198.47.23.248]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 3367B5B8A; Wed, 5 Apr 2023 04:14:31 -0700 (PDT) Received: from fllv0035.itg.ti.com ([10.64.41.0]) by lelv0143.ext.ti.com (8.15.2/8.15.2) with ESMTP id 335BEJSW019349; Wed, 5 Apr 2023 06:14:19 -0500 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ti.com; s=ti-com-17Q1; t=1680693259; bh=ne/R9/9lcpXYVNtZtDesLZu+LTAyPLuUfK5bBFhGcXs=; h=From:To:CC:Subject:Date:In-Reply-To:References; b=U2KD8wmpGD/UfM10e3cB/ETJjIGHifyMykdvb/JRyqZt4RBbA72Hqf8BCl2ZYDSmS fAX/i1QIBNXQI25pc5IHkC4hXcnxs49ZnQFQujDV5yvHucoQ0HqQpBJKy3IRzpTgjQ nNzUXCLtZZHGlPLLgi2D2rqeUlOgd/DPOqrgidqU= Received: from DFLE100.ent.ti.com (dfle100.ent.ti.com [10.64.6.21]) by fllv0035.itg.ti.com (8.15.2/8.15.2) with ESMTPS id 335BEJsA041827 (version=TLSv1.2 cipher=AES256-GCM-SHA384 bits=256 verify=FAIL); Wed, 5 Apr 2023 06:14:19 -0500 Received: from DFLE112.ent.ti.com (10.64.6.33) by DFLE100.ent.ti.com (10.64.6.21) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.2507.16; Wed, 5 Apr 2023 06:14:19 -0500 Received: from fllv0039.itg.ti.com (10.64.41.19) by DFLE112.ent.ti.com (10.64.6.33) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.2507.16 via Frontend Transport; Wed, 5 Apr 2023 06:14:19 -0500 Received: from localhost (ileaxei01-snat2.itg.ti.com [10.180.69.6]) by fllv0039.itg.ti.com (8.15.2/8.15.2) with ESMTP id 335BEISE120287; Wed, 5 Apr 2023 06:14:19 -0500 From: Jayesh Choudhary To: , CC: , , , , , , , Subject: [PATCH 4/6] arm64: dts: ti: k3-j784s4-*: Add DSS node Date: Wed, 5 Apr 2023 16:44:10 +0530 Message-ID: <20230405111412.151192-5-j-choudhary@ti.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20230405111412.151192-1-j-choudhary@ti.com> References: <20230405111412.151192-1-j-choudhary@ti.com> MIME-Version: 1.0 X-EXCLAIMER-MD-CONFIG: e1e8a2fd-e40a-4ac6-ac9b-f7e9cc9ee180 X-Spam-Status: No, score=-2.5 required=5.0 tests=DKIMWL_WL_HIGH,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,RCVD_IN_DNSWL_MED,SPF_HELO_PASS, SPF_PASS autolearn=unavailable autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-getmail-retrieved-from-mailbox: =?utf-8?q?INBOX?= X-GMAIL-THRID: =?utf-8?q?1762334860786656922?= X-GMAIL-MSGID: =?utf-8?q?1762334860786656922?= From: Rahul T R Add DSS node for J784S4 SoC. DSS IP in J784S4 is same as DSS IP in J721E, so same compatible is being used. Also add assigned clks for DSS Signed-off-by: Rahul T R Signed-off-by: Jayesh Choudhary --- arch/arm64/boot/dts/ti/k3-j784s4-evm.dts | 11 +++++ arch/arm64/boot/dts/ti/k3-j784s4-main.dtsi | 55 ++++++++++++++++++++++ 2 files changed, 66 insertions(+) diff --git a/arch/arm64/boot/dts/ti/k3-j784s4-evm.dts b/arch/arm64/boot/dts/ti/k3-j784s4-evm.dts index b1445b7c2aa8..ccbfca76e9ae 100644 --- a/arch/arm64/boot/dts/ti/k3-j784s4-evm.dts +++ b/arch/arm64/boot/dts/ti/k3-j784s4-evm.dts @@ -305,3 +305,14 @@ &main_cpsw1_port1 { &serdes_refclk { clock-frequency = <100000000>; }; + +&dss { + assigned-clocks = <&k3_clks 218 2>, + <&k3_clks 218 5>, + <&k3_clks 218 14>, + <&k3_clks 218 18>; + assigned-clock-parents = <&k3_clks 218 3>, + <&k3_clks 218 7>, + <&k3_clks 218 16>, + <&k3_clks 218 22>; +}; diff --git a/arch/arm64/boot/dts/ti/k3-j784s4-main.dtsi b/arch/arm64/boot/dts/ti/k3-j784s4-main.dtsi index 0cd692bc52e6..86ce6f6d4fc2 100644 --- a/arch/arm64/boot/dts/ti/k3-j784s4-main.dtsi +++ b/arch/arm64/boot/dts/ti/k3-j784s4-main.dtsi @@ -1373,4 +1373,59 @@ main_spi7: spi@2170000 { clocks = <&k3_clks 383 1>; status = "disabled"; }; + + dss: dss@4a00000 { + compatible = "ti,j721e-dss"; + reg = + <0x00 0x04a00000 0x00 0x10000>, + <0x00 0x04a10000 0x00 0x10000>, + <0x00 0x04b00000 0x00 0x10000>, + <0x00 0x04b10000 0x00 0x10000>, + + <0x00 0x04a20000 0x00 0x10000>, + <0x00 0x04a30000 0x00 0x10000>, + <0x00 0x04a50000 0x00 0x10000>, + <0x00 0x04a60000 0x00 0x10000>, + + <0x00 0x04a70000 0x00 0x10000>, + <0x00 0x04a90000 0x00 0x10000>, + <0x00 0x04ab0000 0x00 0x10000>, + <0x00 0x04ad0000 0x00 0x10000>, + + <0x00 0x04a80000 0x00 0x10000>, + <0x00 0x04aa0000 0x00 0x10000>, + <0x00 0x04ac0000 0x00 0x10000>, + <0x00 0x04ae0000 0x00 0x10000>, + <0x00 0x04af0000 0x00 0x10000>; + + reg-names = "common_m", "common_s0", + "common_s1", "common_s2", + "vidl1", "vidl2","vid1","vid2", + "ovr1", "ovr2", "ovr3", "ovr4", + "vp1", "vp2", "vp3", "vp4", + "wb"; + + clocks = <&k3_clks 218 0>, + <&k3_clks 218 2>, + <&k3_clks 218 5>, + <&k3_clks 218 14>, + <&k3_clks 218 18>; + clock-names = "fck", "vp1", "vp2", "vp3", "vp4"; + + power-domains = <&k3_pds 218 TI_SCI_PD_EXCLUSIVE>; + + interrupts = , + , + , + ; + interrupt-names = "common_m", + "common_s0", + "common_s1", + "common_s2"; + + status = "disabled"; + + dss_ports: ports { + }; + }; }; From patchwork Wed Apr 5 11:14:11 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Jayesh Choudhary X-Patchwork-Id: 79563 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a59:b0ea:0:b0:3b6:4342:cba0 with SMTP id b10csp220449vqo; Wed, 5 Apr 2023 04:17:17 -0700 (PDT) X-Google-Smtp-Source: AKy350a2BpAL2jRFEiwEzqO/K6HWPmuNGQARkbPjXU601bv5OAdAHvXKWm4w24sCmlPNNc2Jb7uS X-Received: by 2002:a05:6a20:671d:b0:db:df13:4f73 with SMTP id q29-20020a056a20671d00b000dbdf134f73mr5362264pzh.26.1680693437698; Wed, 05 Apr 2023 04:17:17 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1680693437; cv=none; d=google.com; s=arc-20160816; b=kjEWaQunSsCavfmgduxjWV1mYpFUvjwSc2n/beG7iBNLkRIj0tRlaTCdqSKoPQnWKh hQcjCGJOpoaw4x4UZZcRZ3sA53JQRpK9e/bNdx0l+x7XwfHZy4nSQ7DnPYkquQZnYW6u z593hYILWbjIIr+OYumieFeZYvGVPoxQ5Mw9MYatSYpmI9eqEc1PYrW3i8P9kw4EvMgv ySW20OQWDRApby+5dfzIwEg48t1rozHIzf+6rOAaNJ99mLUGBRt8/2ST7FiJOZr4ZWu1 138bAefRnS0jZ2HBNV//Nkv2sL5k98HOeaVu7k1JbpNVk3xMfZcnzHZ9v0QZ+k9hKWNO WZAQ== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from :dkim-signature; bh=oFvQkBfdjln/WhbfYxZasipH1KQY08uztdM09uYGWpU=; b=ix8b1BgQdymUiDzMWLNAvP6st/fSbsY3+f94ysNEBce40TyiJGpkwSymAAoGq8FILX Eqsj34Y0rW1cG4ixTi1IRSSEK9jb2n73yh9Fw6IwSyAudCynJVELfebRPOP6UZVwekm2 xGtkm0RSeCnix40dVWWvNxiBQKqrRdEmNzV+56g4IjOFT04kgvcvrdVM+7iWYPK3cpzP 76loI4t9P17LgDo0bG90zpJtYiP6p1bZDzxwFbXPAFIbnZteCtE4QZL9szWEQEYwO100 fxi5dnuk6cbjuF8Bw919jZ119Y3aYubCQu3LX2VVr6fLgKJ9UFA946/ox8l2XIbAosw2 qvfg== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@ti.com header.s=ti-com-17Q1 header.b=h92fslHt; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=QUARANTINE sp=NONE dis=NONE) header.from=ti.com Received: from out1.vger.email (out1.vger.email. [2620:137:e000::1:20]) by mx.google.com with ESMTP id f66-20020a623845000000b00628177c7b35si12010400pfa.77.2023.04.05.04.17.05; Wed, 05 Apr 2023 04:17:17 -0700 (PDT) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) client-ip=2620:137:e000::1:20; Authentication-Results: mx.google.com; dkim=pass header.i=@ti.com header.s=ti-com-17Q1 header.b=h92fslHt; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=QUARANTINE sp=NONE dis=NONE) header.from=ti.com Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S237805AbjDELOw (ORCPT + 99 others); Wed, 5 Apr 2023 07:14:52 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:51558 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S237768AbjDELOf (ORCPT ); Wed, 5 Apr 2023 07:14:35 -0400 Received: from lelv0143.ext.ti.com (lelv0143.ext.ti.com [198.47.23.248]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 8106D5BA1; Wed, 5 Apr 2023 04:14:33 -0700 (PDT) Received: from fllv0034.itg.ti.com ([10.64.40.246]) by lelv0143.ext.ti.com (8.15.2/8.15.2) with ESMTP id 335BELQs019354; Wed, 5 Apr 2023 06:14:21 -0500 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ti.com; s=ti-com-17Q1; t=1680693261; bh=oFvQkBfdjln/WhbfYxZasipH1KQY08uztdM09uYGWpU=; h=From:To:CC:Subject:Date:In-Reply-To:References; b=h92fslHtiMrA//l7pz56s305/kDaH+0T+qnCunmYDFK/Mtg4xELkVPSQHM8937RSZ ey0eQl875CzUfTKekHjA0pRMGJzARNFzc1fDz2+eGnfuXSrQtsHVFmxe/nOy2DiTeX 4CNXWMzyrEV/hnrrdd383hPU2dfRsXYBX/PCrqT0= Received: from DLEE100.ent.ti.com (dlee100.ent.ti.com [157.170.170.30]) by fllv0034.itg.ti.com (8.15.2/8.15.2) with ESMTPS id 335BELFV078330 (version=TLSv1.2 cipher=AES256-GCM-SHA384 bits=256 verify=FAIL); Wed, 5 Apr 2023 06:14:21 -0500 Received: from DLEE114.ent.ti.com (157.170.170.25) by DLEE100.ent.ti.com (157.170.170.30) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.2507.16; Wed, 5 Apr 2023 06:14:20 -0500 Received: from lelv0327.itg.ti.com (10.180.67.183) by DLEE114.ent.ti.com (157.170.170.25) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.2507.16 via Frontend Transport; Wed, 5 Apr 2023 06:14:20 -0500 Received: from localhost (ileaxei01-snat2.itg.ti.com [10.180.69.6]) by lelv0327.itg.ti.com (8.15.2/8.15.2) with ESMTP id 335BEJ76026160; Wed, 5 Apr 2023 06:14:20 -0500 From: Jayesh Choudhary To: , CC: , , , , , , , Subject: [PATCH 5/6] arm64: dts: ti: k3-j784s4-*: add DP & DP PHY Date: Wed, 5 Apr 2023 16:44:11 +0530 Message-ID: <20230405111412.151192-6-j-choudhary@ti.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20230405111412.151192-1-j-choudhary@ti.com> References: <20230405111412.151192-1-j-choudhary@ti.com> MIME-Version: 1.0 X-EXCLAIMER-MD-CONFIG: e1e8a2fd-e40a-4ac6-ac9b-f7e9cc9ee180 X-Spam-Status: No, score=-2.5 required=5.0 tests=DKIMWL_WL_HIGH,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,RCVD_IN_DNSWL_MED,SPF_HELO_PASS, SPF_PASS autolearn=unavailable autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-getmail-retrieved-from-mailbox: =?utf-8?q?INBOX?= X-GMAIL-THRID: =?utf-8?q?1762334802102705467?= X-GMAIL-MSGID: =?utf-8?q?1762334802102705467?= From: Rahul T R Add DT nodes for DisplayPort and DisplayPort PHY. The DP is Cadence MHDP 8546 and the PHY is a Cadence Torrent PHY with TI WIZ wrapper. Also add pinmux required for DP HPD. Signed-off-by: Rahul T R Signed-off-by: Jayesh Choudhary --- arch/arm64/boot/dts/ti/k3-j784s4-evm.dts | 24 ++++++++++++++++++++++ arch/arm64/boot/dts/ti/k3-j784s4-main.dtsi | 22 ++++++++++++++++++++ 2 files changed, 46 insertions(+) diff --git a/arch/arm64/boot/dts/ti/k3-j784s4-evm.dts b/arch/arm64/boot/dts/ti/k3-j784s4-evm.dts index ccbfca76e9ae..2b414fd973d0 100644 --- a/arch/arm64/boot/dts/ti/k3-j784s4-evm.dts +++ b/arch/arm64/boot/dts/ti/k3-j784s4-evm.dts @@ -163,6 +163,12 @@ vdd_sd_dv_pins_default: vdd-sd-dv-pins-default { J784S4_IOPAD(0x020, PIN_INPUT, 7) /* (AJ35) MCAN15_RX.GPIO0_8 */ >; }; + + dp0_pins_default: dp0-pins-default { + pinctrl-single,pins = < + J784S4_IOPAD(0x0cc, PIN_INPUT, 12) /* (AM37) SPI0_CS0.DP0_HPD */ + >; + }; }; &wkup_pmx0 { @@ -316,3 +322,21 @@ &dss { <&k3_clks 218 16>, <&k3_clks 218 22>; }; + +&serdes4 { + serdes4_dp_link: phy@0 { + reg = <0>; + cdns,num-lanes = <4>; + #phy-cells = <0>; + cdns,phy-type = ; + resets = <&serdes_wiz4 1>, <&serdes_wiz4 2>, + <&serdes_wiz4 3>, <&serdes_wiz4 4>; + }; +}; + +&mhdp { + pinctrl-names = "default"; + pinctrl-0 = <&dp0_pins_default>; + phys = <&serdes4_dp_link>; + phy-names = "dpphy"; +}; diff --git a/arch/arm64/boot/dts/ti/k3-j784s4-main.dtsi b/arch/arm64/boot/dts/ti/k3-j784s4-main.dtsi index 86ce6f6d4fc2..fc6071c16188 100644 --- a/arch/arm64/boot/dts/ti/k3-j784s4-main.dtsi +++ b/arch/arm64/boot/dts/ti/k3-j784s4-main.dtsi @@ -1374,6 +1374,28 @@ main_spi7: spi@2170000 { status = "disabled"; }; + mhdp: dp-bridge@a000000 { + compatible = "ti,j721e-mhdp8546"; + + reg = <0x0 0xa000000 0x0 0x30a00>, + <0x0 0x4f40000 0x0 0x20>; + reg-names = "mhdptx", "j721e-intg"; + + clocks = <&k3_clks 217 11>; + + interrupt-parent = <&gic500>; + interrupts = ; + + power-domains = <&k3_pds 217 TI_SCI_PD_EXCLUSIVE>; + + status = "disabled"; + + dp0_ports: ports { + #address-cells = <1>; + #size-cells = <0>; + }; + }; + dss: dss@4a00000 { compatible = "ti,j721e-dss"; reg = From patchwork Wed Apr 5 11:14:12 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Jayesh Choudhary X-Patchwork-Id: 79568 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a59:b0ea:0:b0:3b6:4342:cba0 with SMTP id b10csp225853vqo; Wed, 5 Apr 2023 04:27:05 -0700 (PDT) X-Google-Smtp-Source: AKy350bB6wmm3gQkvGVF8nCLnRdFes4/DjKVwdM8B6ia5d1P3XOZRr0kXyFYNHMUm/lpNUROFibn X-Received: by 2002:a05:6a20:4fa9:b0:d5:2f2a:ead4 with SMTP id gh41-20020a056a204fa900b000d52f2aead4mr4177044pzb.47.1680694025105; Wed, 05 Apr 2023 04:27:05 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1680694025; cv=none; d=google.com; s=arc-20160816; b=ye8ZRduGxmjxWdMKV9lGBQxbQuiGBa9K9PFd/Yiy0A7tjfjiSC+GvGprH8C4dlisrD AGYa5W+Ok8vSGB0RtOt+9OMqg+TYXN9BRROAOmWZwsMPOAVVXLXWxObSpVX/tHidUqAX n80LlPl+vsEBh+RIdPuBKO1+F41muQEPz20ezqu/9iJK08hXXOldASr/j7grHv41O4nM OM7BsbfgwIJaHERVUPIX7XHPSKBf3KYF2JVvqxui7v97BhhATnj+T3IFqjaFdT5Pg2e2 DbXnzPmh42IGuZSos/WyByqiG1sabKlEcu5wtsUWaWkgb3svU5QymjCWjvToLVQUrTMi rtpQ== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from :dkim-signature; bh=BRlbJsoQX8FM0khHXey+jJ5JONeai13EfiYLeaBfKNY=; b=YHGzCGcjR+/TvuaWj+p8nlSo9FLtftk87K2S3STL6lPYsMiDeBcWrOlmo1Gs1ylNI5 X2HELxFXwJuth8MJ3JV8NJwJ9L0s/ixhwhuo1fqegdeA6oyDV/WIRjJx4pFpKRsWhyeF kn+SdoDDKOWsTYT9/ww1ZyS+Mh/NLvFs4TXPfQ3v3a/dP0843MJtZmHw6szDBBZZCman +iB2BrJGC0oXaRMTn4VarA/osnGxbfmP86mL5uZI2+mS49Ycs95rQOC3fz3HG/vd443+ 1VrJQf7FYXlRUiMKmS3TdbBl2sqbU4U8wlrTvrkOvu8ANzAvZi2apvKUVsbaYYnSHNAG L24Q== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@ti.com header.s=ti-com-17Q1 header.b=eSff4Eax; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=QUARANTINE sp=NONE dis=NONE) header.from=ti.com Received: from out1.vger.email (out1.vger.email. [2620:137:e000::1:20]) by mx.google.com with ESMTP id f2-20020a656282000000b004fc29da6e55si11752679pgv.674.2023.04.05.04.26.52; Wed, 05 Apr 2023 04:27:05 -0700 (PDT) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) client-ip=2620:137:e000::1:20; Authentication-Results: mx.google.com; dkim=pass header.i=@ti.com header.s=ti-com-17Q1 header.b=eSff4Eax; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=QUARANTINE sp=NONE dis=NONE) header.from=ti.com Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S237834AbjDELOz (ORCPT + 99 others); Wed, 5 Apr 2023 07:14:55 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:51780 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S237797AbjDELOi (ORCPT ); Wed, 5 Apr 2023 07:14:38 -0400 Received: from lelv0143.ext.ti.com (lelv0143.ext.ti.com [198.47.23.248]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 21A2B59D5; Wed, 5 Apr 2023 04:14:33 -0700 (PDT) Received: from fllv0034.itg.ti.com ([10.64.40.246]) by lelv0143.ext.ti.com (8.15.2/8.15.2) with ESMTP id 335BEMNB019360; Wed, 5 Apr 2023 06:14:22 -0500 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ti.com; s=ti-com-17Q1; t=1680693262; bh=BRlbJsoQX8FM0khHXey+jJ5JONeai13EfiYLeaBfKNY=; h=From:To:CC:Subject:Date:In-Reply-To:References; b=eSff4Eaxn78ul05w6vf89lkTujt43v1vAGU4+0872IwlIO+ZpBqgaqav2QL9Fdih7 wMqjdk1Pj4GeBIT8g/R60zcNDVgKtGJT+SB4cmN1WIn+UnWX9u77wHEdi1qDr6NKNP V7KJgfkNqNyOvHwASCNn/vG90h+agQptybrj9ajU= Received: from DLEE114.ent.ti.com (dlee114.ent.ti.com [157.170.170.25]) by fllv0034.itg.ti.com (8.15.2/8.15.2) with ESMTPS id 335BEMU3078340 (version=TLSv1.2 cipher=AES256-GCM-SHA384 bits=256 verify=FAIL); Wed, 5 Apr 2023 06:14:22 -0500 Received: from DLEE107.ent.ti.com (157.170.170.37) by DLEE114.ent.ti.com (157.170.170.25) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.2507.16; Wed, 5 Apr 2023 06:14:22 -0500 Received: from lelv0326.itg.ti.com (10.180.67.84) by DLEE107.ent.ti.com (157.170.170.37) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.2507.16 via Frontend Transport; Wed, 5 Apr 2023 06:14:22 -0500 Received: from localhost (ileaxei01-snat.itg.ti.com [10.180.69.5]) by lelv0326.itg.ti.com (8.15.2/8.15.2) with ESMTP id 335BELGm003818; Wed, 5 Apr 2023 06:14:21 -0500 From: Jayesh Choudhary To: , CC: , , , , , , , Subject: [PATCH 6/6] arm64: dts: ti: k3-j784s4-evm: Add DP0 Date: Wed, 5 Apr 2023 16:44:12 +0530 Message-ID: <20230405111412.151192-7-j-choudhary@ti.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20230405111412.151192-1-j-choudhary@ti.com> References: <20230405111412.151192-1-j-choudhary@ti.com> MIME-Version: 1.0 X-EXCLAIMER-MD-CONFIG: e1e8a2fd-e40a-4ac6-ac9b-f7e9cc9ee180 X-Spam-Status: No, score=-2.5 required=5.0 tests=DKIMWL_WL_HIGH,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,RCVD_IN_DNSWL_MED,SPF_HELO_PASS, SPF_PASS autolearn=unavailable autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-getmail-retrieved-from-mailbox: =?utf-8?q?INBOX?= X-GMAIL-THRID: =?utf-8?q?1762335417782000809?= X-GMAIL-MSGID: =?utf-8?q?1762335417782000809?= From: Rahul T R Add the endpoint nodes to describe connection from DSS => MHDP => DisplayPort connector. Also add the required nodes gpio expander 4 and pinmux for main_i2c4 which is required for controlling DP Power and set status of all the required nodes for DP0 as okay Signed-off-by: Rahul T R Signed-off-by: Jayesh Choudhary --- arch/arm64/boot/dts/ti/k3-j784s4-evm.dts | 77 ++++++++++++++++++++++++ 1 file changed, 77 insertions(+) diff --git a/arch/arm64/boot/dts/ti/k3-j784s4-evm.dts b/arch/arm64/boot/dts/ti/k3-j784s4-evm.dts index 2b414fd973d0..03c9bf34cb1b 100644 --- a/arch/arm64/boot/dts/ti/k3-j784s4-evm.dts +++ b/arch/arm64/boot/dts/ti/k3-j784s4-evm.dts @@ -102,6 +102,28 @@ vdd_sd_dv: regulator-TLV71033 { states = <1800000 0x0>, <3300000 0x1>; }; + + dp0_pwr_3v3: regulator-dp0-prw { + compatible = "regulator-fixed"; + regulator-name = "dp0-pwr"; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + gpio = <&exp4 0 GPIO_ACTIVE_HIGH>; + enable-active-high; + }; + + dp0: dp0-connector { + compatible = "dp-connector"; + label = "DP0"; + type = "full-size"; + dp-pwr-supply = <&dp0_pwr_3v3>; + + port { + dp0_connector_in: endpoint { + remote-endpoint = <&dp0_out>; + }; + }; + }; }; &main_pmx0 { @@ -169,6 +191,13 @@ dp0_pins_default: dp0-pins-default { J784S4_IOPAD(0x0cc, PIN_INPUT, 12) /* (AM37) SPI0_CS0.DP0_HPD */ >; }; + + main_i2c4_pins_default: main-i2c4-pins-default { + pinctrl-single,pins = < + J784S4_IOPAD(0x014, PIN_INPUT_PULLUP, 8) /* (AG33) MCAN14_TX.I2C4_SCL */ + J784S4_IOPAD(0x010, PIN_INPUT_PULLUP, 8) /* (AH33) MCAN13_RX.I2C4_SDA */ + >; + }; }; &wkup_pmx0 { @@ -313,6 +342,7 @@ &serdes_refclk { }; &dss { + status = "okay"; assigned-clocks = <&k3_clks 218 2>, <&k3_clks 218 5>, <&k3_clks 218 14>, @@ -323,7 +353,12 @@ &dss { <&k3_clks 218 22>; }; +&serdes_wiz4 { + status = "okay"; +}; + &serdes4 { + status = "okay"; serdes4_dp_link: phy@0 { reg = <0>; cdns,num-lanes = <4>; @@ -335,8 +370,50 @@ serdes4_dp_link: phy@0 { }; &mhdp { + status = "okay"; pinctrl-names = "default"; pinctrl-0 = <&dp0_pins_default>; phys = <&serdes4_dp_link>; phy-names = "dpphy"; }; + +&dss_ports { + port { + dpi0_out: endpoint { + remote-endpoint = <&dp0_in>; + }; + }; +}; + +&main_i2c4 { + status = "okay"; + pinctrl-names = "default"; + pinctrl-0 = <&main_i2c4_pins_default>; + clock-frequency = <400000>; + + exp4: gpio@20 { + compatible = "ti,tca6408"; + reg = <0x20>; + gpio-controller; + #gpio-cells = <2>; + }; +}; + +&dp0_ports { + #address-cells = <1>; + #size-cells = <0>; + + port@0 { + reg = <0>; + dp0_in: endpoint { + remote-endpoint = <&dpi0_out>; + }; + }; + + port@4 { + reg = <4>; + dp0_out: endpoint { + remote-endpoint = <&dp0_connector_in>; + }; + }; +};