From patchwork Tue Apr 4 17:16:11 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Tharun Kumar P X-Patchwork-Id: 79272 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a59:b0ea:0:b0:3b6:4342:cba0 with SMTP id b10csp49534vqo; Tue, 4 Apr 2023 10:33:55 -0700 (PDT) X-Google-Smtp-Source: AKy350adPexuE1PLhClNJQlVZxVnPJi5VZC8FkySXIzMvQug6JaQgTBSyDmkfvtGwUXqgz/sxoHF X-Received: by 2002:aa7:d841:0:b0:4ac:bd6f:cacc with SMTP id f1-20020aa7d841000000b004acbd6fcaccmr254598eds.12.1680629635414; Tue, 04 Apr 2023 10:33:55 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1680629635; cv=none; d=google.com; s=arc-20160816; b=0Sd77QposSXjU2Cw8b5VcDepmTxvDsH3FAFw/X4gJ3HZ8CGpgoUHgThZx0JeWtckc9 eun/oW/Mn91542uLPf5bt9SSfc0ikAuHuAMmOpqK+1AWn4ddxE4VCPWBqdoP4rAO9vZV U5BgO27P3J/Kt6Pf+M3Ywqfys/e5Zxi7L0wRCoNhoxXwpRHl1jnKrlXOKnttbiOCA0mx C8C9bEbQonZk9rxkIcqJxswFp+ulBkNKv7YE7jeOuq9iQtPzxaDTB/Dosh7DSYoKw3HT cOzQJHyaV51++7OBnYkIb9RTdXYp4sNpaqo0EiT62rxzZ7Fqeg+/PUin46s61EqDZcjV 8GdA== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from :dkim-signature; bh=pkrt3PYJS73mgROXggFzZLuHSpal+OdX4GYvalgpVOA=; b=RCw/k4YJb9z/wd4Yb0Kltzzhwl2CEbLO1w0mmqi5Z68Z4Usocoxdvm35LwguwUB6AN W+tHHSWNIDGggjb7urn2DjlzGsGU8yPGBCqaOs7Ckl/8jVcdQv71whHK8Tnq53II8Bwl fYt9ryqcAjH3LCd9dcSmQ54AA8v8yYZwbcvHdTsBmMoC2g2YQJE77jAUuIh+RASKR9mx gwtzVEdpWZUyXKu6g52pdqxUG2gNgznuKTBCl8RMRGpJQ6+n1WEjgZFDIbkgrL4jSA+7 e4F0JUAlR7K3O+wPAe3CSoo/ybOfGwMEZQGY0xNl/Ayy6bxX8/EsPkNioVESUDvMlfVy uQUA== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@microchip.com header.s=mchp header.b=sNto0Dcz; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=QUARANTINE sp=QUARANTINE dis=NONE) header.from=microchip.com Received: from out1.vger.email (out1.vger.email. [2620:137:e000::1:20]) by mx.google.com with ESMTP id v22-20020aa7cd56000000b004ab092142e1si9040970edw.406.2023.04.04.10.33.31; Tue, 04 Apr 2023 10:33:55 -0700 (PDT) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) client-ip=2620:137:e000::1:20; Authentication-Results: mx.google.com; dkim=pass header.i=@microchip.com header.s=mchp header.b=sNto0Dcz; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=QUARANTINE sp=QUARANTINE dis=NONE) header.from=microchip.com Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S235778AbjDDRRG (ORCPT + 99 others); Tue, 4 Apr 2023 13:17:06 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:40598 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S235849AbjDDRRB (ORCPT ); Tue, 4 Apr 2023 13:17:01 -0400 Received: from esa.microchip.iphmx.com (esa.microchip.iphmx.com [68.232.153.233]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 6465B2683; Tue, 4 Apr 2023 10:17:00 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=microchip.com; i=@microchip.com; q=dns/txt; s=mchp; t=1680628620; x=1712164620; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=i+Jlcq7+ozFYtO3gopneWBMGEdmaY2LDJGZxZu3AEuw=; b=sNto0DczWSZo2MZF1875OA4cp8SG4t+w8IYGeyiC/oNTB14UTtotNvab aYpI87/A9uIYafSmaBVYvJqPiRrvFAbccEJy/yozzOf9pxoAhb4JPJyPw ZxPPsYCoAkfshjS3/qMijpG9AaZU1wZeaSUrRub/+ak1n2Va0yoQDIfdi SWXgNDFIrHmNVP2OLrpq4Q1nIDA0dftpDnnnolsNbHP7xmBQBVqwOZr8z chPfS/vcddPkBj+UYv4MdxMdKudjvfN8RO7uupnnSn0isi1m+nh9Rveif 6kvH5ftWnoLfz9wK0EgebJKxwKjxre0N4O7eFlY/SqPYXwgMd7RhQ5yuo Q==; X-IronPort-AV: E=Sophos;i="5.98,318,1673938800"; d="scan'208";a="219405872" Received: from unknown (HELO email.microchip.com) ([170.129.1.10]) by esa1.microchip.iphmx.com with ESMTP/TLS/AES256-SHA256; 04 Apr 2023 10:16:49 -0700 Received: from chn-vm-ex03.mchp-main.com (10.10.85.151) by chn-vm-ex03.mchp-main.com (10.10.85.151) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.2507.21; Tue, 4 Apr 2023 10:16:49 -0700 Received: from CHE-LT-UNGSOFTWARE.microchip.com (10.10.115.15) by chn-vm-ex03.mchp-main.com (10.10.85.151) with Microsoft SMTP Server id 15.1.2507.21 via Frontend Transport; Tue, 4 Apr 2023 10:16:47 -0700 From: Tharun Kumar P To: CC: , Subject: [PATCH SPI for-next 1/3] spi: mchp-pci1xxxx: Fix length of SPI transactions not set properly in driver Date: Tue, 4 Apr 2023 22:46:11 +0530 Message-ID: <20230404171613.1336093-2-tharunkumar.pasumarthi@microchip.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20230404171613.1336093-1-tharunkumar.pasumarthi@microchip.com> References: <20230404171613.1336093-1-tharunkumar.pasumarthi@microchip.com> MIME-Version: 1.0 X-Spam-Status: No, score=-2.5 required=5.0 tests=DKIMWL_WL_HIGH,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,RCVD_IN_DNSWL_MED, RCVD_IN_MSPIKE_H2,SPF_HELO_PASS,SPF_PASS autolearn=unavailable autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-getmail-retrieved-from-mailbox: =?utf-8?q?INBOX?= X-GMAIL-THRID: =?utf-8?q?1762267900480541798?= X-GMAIL-MSGID: =?utf-8?q?1762267900480541798?= In pci1xxxx_spi_transfer_one API, length of SPI transaction gets cleared by setting of length mask. Set length of transaction only after masking length field. Fixes: 1cc0cbea7167 ("spi: microchip: pci1xxxx: Add driver for SPI controller of PCI1XXXX PCIe switch") Signed-off-by: Tharun Kumar P --- drivers/spi/spi-pci1xxxx.c | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/drivers/spi/spi-pci1xxxx.c b/drivers/spi/spi-pci1xxxx.c index 1c5731641a04..419a1d3a5c2e 100644 --- a/drivers/spi/spi-pci1xxxx.c +++ b/drivers/spi/spi-pci1xxxx.c @@ -199,8 +199,9 @@ static int pci1xxxx_spi_transfer_one(struct spi_controller *spi_ctlr, else regval &= ~SPI_MST_CTL_MODE_SEL; - regval |= ((clkdiv << 5) | SPI_FORCE_CE | (len << 8)); + regval |= ((clkdiv << 5) | SPI_FORCE_CE); regval &= ~SPI_MST_CTL_CMD_LEN_MASK; + regval |= (len << 8); writel(regval, par->reg_base + SPI_MST_CTL_REG_OFFSET(p->hw_inst)); regval = readl(par->reg_base + From patchwork Tue Apr 4 17:16:12 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Tharun Kumar P X-Patchwork-Id: 79295 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a59:b0ea:0:b0:3b6:4342:cba0 with SMTP id b10csp57770vqo; Tue, 4 Apr 2023 10:49:38 -0700 (PDT) X-Google-Smtp-Source: AKy350aUZY1YalfcgH+BT0HoNqLiR6kFovNpv4WyC2SKgi5dFDc5Z9fFvwdMI1niVcBblcT3fFqS X-Received: by 2002:a17:906:c1c5:b0:932:83fa:d2fe with SMTP id bw5-20020a170906c1c500b0093283fad2femr460390ejb.12.1680630578320; Tue, 04 Apr 2023 10:49:38 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1680630578; cv=none; d=google.com; s=arc-20160816; b=xLBrFC9tgTYInlYdwLP39wsngvaGrT3OA7F3ZnT7/6Sr5N7bJ4rzSSLjHx7lzxqnND 3JUbHccNPv9P8OqD/v1y24rbD4hDv2F6Bhy5IBnwTyBHvmRRZAqhAJPuVReCzk/nXVq4 a1RJxWKI8jPCtciy4YLFZEOFR8e4h0aF/WGD9MSqeYEfMnptZnc+tU9vUydpm57mNi95 0ToBO/ItoKfUHKkY+iRJvT4FpVmd6cYaTdXj1W2O3Mx7WUdetyD5JhbdKrqoWpbSHaZj 2JDRGM+CYelbTFZ5MtO9qq6p8XZTr/mjSgWyOF0E0lFxwW79/57HGrnuFcTYw1hHzbgW 7pGA== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from :dkim-signature; bh=jkAxn0hgLJ+W2YbsW4YfiTghtESmi2Kjwdu4nNU1amc=; b=cBSbBkgBOUv5WeE3/6BiDkhwujCatyys1wgwnqJV1qAR2bYZvXABolkmZCvLj+pSGG b7/YyoVmJN9r+VxT3kpo9xtle24MjhFgqsc1MLDDzhtNIwUSRcU4E9+J2yThm0C5uMx/ Nzv1fsDaB+Kha+DDSzhCQ5A7quSlnAvw09tC/waes9ykSghgT+aUjFGmZWgI72u1QJtK EU3dkgq00Kf8Jg8x8VjV7BfKxu8nShHlPVqgRtGrCQDJxH4lQRpUUsJHyEYsH6ORT+LG PttawO7fH5x6RgROlQDWshs7sKm++JcYsNrIgOV86k7bJw2VolDfJgLaLRWSfwr3GDy8 Jj5Q== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@microchip.com header.s=mchp header.b=TaMnRRAR; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=QUARANTINE sp=QUARANTINE dis=NONE) header.from=microchip.com Received: from out1.vger.email (out1.vger.email. [2620:137:e000::1:20]) by mx.google.com with ESMTP id f10-20020a170906560a00b008d4d102a7b8si1986714ejq.365.2023.04.04.10.49.14; Tue, 04 Apr 2023 10:49:38 -0700 (PDT) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) client-ip=2620:137:e000::1:20; Authentication-Results: mx.google.com; dkim=pass header.i=@microchip.com header.s=mchp header.b=TaMnRRAR; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=QUARANTINE sp=QUARANTINE dis=NONE) header.from=microchip.com Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S235724AbjDDRQ4 (ORCPT + 99 others); Tue, 4 Apr 2023 13:16:56 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:40474 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S232447AbjDDRQy (ORCPT ); Tue, 4 Apr 2023 13:16:54 -0400 Received: from esa.microchip.iphmx.com (esa.microchip.iphmx.com [68.232.154.123]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 5FAE8D3; Tue, 4 Apr 2023 10:16:53 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=microchip.com; i=@microchip.com; q=dns/txt; s=mchp; t=1680628613; x=1712164613; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=r3aKOSdvH+07JEB/Anw6Ara6+1P1wt7dI3yReMFX3Bg=; b=TaMnRRARwZtp4GrvTbsBhb36wadtjwWnH+u68RNZvU/BRqTW9xQtLA4D arOuWtArvkddOaQR2UbnqljGrZ69wsHeX3mizLFLH6SBsC+Q2oWwMaOMt eDkggoQwE3xMUCimbo87ipgLqOyl4kCos0U2DDC2n8K9fg8gkpvc4+2Kq v+sQl3fdizajU5voMUtRr9Fmo2SdsTsbWACU11/IOCI1glelvJWwQK0ve U8CPaeHD3rvVlmZGTUNbRf2TbgSd1/AoOHAvr/uIkVWICWhSAJEfKp9Rl NxsjAc7z2rIR7Q3mJqh3427nmhAAJjH/mwZexI2Tn59IbzQijxhOGzV5+ w==; X-IronPort-AV: E=Sophos;i="5.98,318,1673938800"; d="scan'208";a="204973525" Received: from unknown (HELO email.microchip.com) ([170.129.1.10]) by esa4.microchip.iphmx.com with ESMTP/TLS/AES256-SHA256; 04 Apr 2023 10:16:52 -0700 Received: from chn-vm-ex03.mchp-main.com (10.10.85.151) by chn-vm-ex04.mchp-main.com (10.10.85.152) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.2507.21; Tue, 4 Apr 2023 10:16:52 -0700 Received: from CHE-LT-UNGSOFTWARE.microchip.com (10.10.115.15) by chn-vm-ex03.mchp-main.com (10.10.85.151) with Microsoft SMTP Server id 15.1.2507.21 via Frontend Transport; Tue, 4 Apr 2023 10:16:51 -0700 From: Tharun Kumar P To: CC: , Subject: [PATCH SPI for-next 2/3] spi: mchp-pci1xxxx: Fix SPI transactions not working after suspend and resume Date: Tue, 4 Apr 2023 22:46:12 +0530 Message-ID: <20230404171613.1336093-3-tharunkumar.pasumarthi@microchip.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20230404171613.1336093-1-tharunkumar.pasumarthi@microchip.com> References: <20230404171613.1336093-1-tharunkumar.pasumarthi@microchip.com> MIME-Version: 1.0 X-Spam-Status: No, score=-2.5 required=5.0 tests=DKIMWL_WL_HIGH,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,RCVD_IN_DNSWL_MED, RCVD_IN_MSPIKE_H2,SPF_HELO_PASS,SPF_PASS autolearn=unavailable autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-getmail-retrieved-from-mailbox: =?utf-8?q?INBOX?= X-GMAIL-THRID: =?utf-8?q?1762268889184601598?= X-GMAIL-MSGID: =?utf-8?q?1762268889184601598?= pci1xxxx_spi_resume API masks SPI interrupt bit which prohibits interrupt from coming to the host at the end of the transaction after suspend-resume. This patch unmasks this bit at resume. Fixes: 1cc0cbea7167 ("spi: microchip: pci1xxxx: Add driver for SPI controller of PCI1XXXX PCIe switch") Signed-off-by: Tharun Kumar P --- drivers/spi/spi-pci1xxxx.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/spi/spi-pci1xxxx.c b/drivers/spi/spi-pci1xxxx.c index 419a1d3a5c2e..82d4bfeea1fa 100644 --- a/drivers/spi/spi-pci1xxxx.c +++ b/drivers/spi/spi-pci1xxxx.c @@ -58,7 +58,7 @@ #define VENDOR_ID_MCHP 0x1055 #define SPI_SUSPEND_CONFIG 0x101 -#define SPI_RESUME_CONFIG 0x303 +#define SPI_RESUME_CONFIG 0x203 struct pci1xxxx_spi_internal { u8 hw_inst; From patchwork Tue Apr 4 17:16:13 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Tharun Kumar P X-Patchwork-Id: 79284 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a59:b0ea:0:b0:3b6:4342:cba0 with SMTP id b10csp54221vqo; Tue, 4 Apr 2023 10:42:18 -0700 (PDT) X-Google-Smtp-Source: AKy350Y++JVBbqjHYJm0qlpPHjaZ6SElxffNvtk0dA+sx0xudV4kunZEKXSQ3XSkcQA+Cj+wO4DD X-Received: by 2002:a17:902:f10c:b0:1a1:6584:31b0 with SMTP id e12-20020a170902f10c00b001a1658431b0mr2876475plb.30.1680630138228; Tue, 04 Apr 2023 10:42:18 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1680630138; cv=none; d=google.com; s=arc-20160816; b=KOUb13IBbqHFYvMhlnq1lrv2hbx5a1kTwketR3t0NzPFPGm6FXK7v7VErlommUVHcm /jPjieNdbct7i6xDVeQ7g+DCqx0EorUcBsgaetKS/5gkzXupA53Xho5C/dgg/IS+dmXu sIVMdC+urPVAkBsVTVunmdCC4R9fOTzLHZoq8rNe0XEzoe1I9vR1ZJpd/Henmn9tGIrh pvrsDmqKKokRup8h48JDgxwTmvNv9KvXGBWTUHtRFVM/Ww/r/A/rZwIbPfHubOUF2ATi jAQHVYpFuQ7n1knIcPT7Dme0YyFXaaA87om/gMsjlhtcqRyBNQdAv963oqMZSClpfKEx AE1w== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from :dkim-signature; bh=Y/GW2b4auVvjdRc5utjE2cUPLx75mSB8ZWYvn+5n2oU=; b=CM/gad8GhqIdGg0nPRqvXt69P6BXZRO2abn0YfvrJRFEnsj9KxDjDCW9OETupCHB+F YZPdaLXwy9icK/f5x8bOZSx5MNF08G4N7STYy3MyHlc831fDW9lqBJGmeCCBet3o5gmX p6o/rdky1zTMVibBzv3IgMXsWR+LR1zyCd6skvrcDoL5v4lp1hLCID882yRJD+f8H8Yr 2n4IE3MpCdwlbeooMm25B34deOernW7cPJNBja5wQ5UQnwl16vyWUN5tvTWwZGzCRtCs cRjGp2gxtvOn0Bh/DTeMTeZuIRkkIaSBzmVD+39T6v9sC3LP263Nm2S/oyCAVpcO0DRF Gfeg== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@microchip.com header.s=mchp header.b=CRkjgRxy; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=QUARANTINE sp=QUARANTINE dis=NONE) header.from=microchip.com Received: from out1.vger.email (out1.vger.email. [2620:137:e000::1:20]) by mx.google.com with ESMTP id t190-20020a6381c7000000b005138fa79f89si10835731pgd.486.2023.04.04.10.42.04; Tue, 04 Apr 2023 10:42:18 -0700 (PDT) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) client-ip=2620:137:e000::1:20; Authentication-Results: mx.google.com; dkim=pass header.i=@microchip.com header.s=mchp header.b=CRkjgRxy; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=QUARANTINE sp=QUARANTINE dis=NONE) header.from=microchip.com Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S235869AbjDDRRD (ORCPT + 99 others); Tue, 4 Apr 2023 13:17:03 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:40492 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S235778AbjDDRQ6 (ORCPT ); Tue, 4 Apr 2023 13:16:58 -0400 Received: from esa.microchip.iphmx.com (esa.microchip.iphmx.com [68.232.154.123]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 1CF66D3; Tue, 4 Apr 2023 10:16:56 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=microchip.com; i=@microchip.com; q=dns/txt; s=mchp; t=1680628616; x=1712164616; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=7Z6kt8KKvWipPWeST1v16fNQUW3GnVVk+Du/WWg0CeI=; b=CRkjgRxyV5GCAMxf453Wt1lCdtw9xJUdboUaI+apiSUTXf39yBdICYqG VwtKqLXas84sOKikgAk2woGdXFgnV6Vo1PwJn33ajtM3ZnDjkQVy4VU3t yw/VxpLV0SEQimnJmND/D6qQk8WANO4t/EHlndD0CYA9rNoTR0/gJMGbz +QILxiCf2knqaXRXw/XGUKopfgOmwCAUl3XxtxTGLaINOpOJCYjYBHKRz qe/orz3A07MFLTMBws2i8CWIP3llqfwPUZkei0klArXZ/m7Nvaut2x4fs I99WStVLitWjeZM/Lh4Y6+TsU3lqJOtJB5OEVJWuBUf918lrld9qwVs9s w==; X-IronPort-AV: E=Sophos;i="5.98,318,1673938800"; d="scan'208";a="145482306" Received: from unknown (HELO email.microchip.com) ([170.129.1.10]) by esa6.microchip.iphmx.com with ESMTP/TLS/AES256-SHA256; 04 Apr 2023 10:16:56 -0700 Received: from chn-vm-ex03.mchp-main.com (10.10.85.151) by chn-vm-ex02.mchp-main.com (10.10.85.144) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.2507.21; Tue, 4 Apr 2023 10:16:56 -0700 Received: from CHE-LT-UNGSOFTWARE.microchip.com (10.10.115.15) by chn-vm-ex03.mchp-main.com (10.10.85.151) with Microsoft SMTP Server id 15.1.2507.21 via Frontend Transport; Tue, 4 Apr 2023 10:16:54 -0700 From: Tharun Kumar P To: CC: , Subject: [PATCH SPI for-next 3/3] spi: mchp-pci1xxxx: Fix improper implementation of disabling chip select lines Date: Tue, 4 Apr 2023 22:46:13 +0530 Message-ID: <20230404171613.1336093-4-tharunkumar.pasumarthi@microchip.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20230404171613.1336093-1-tharunkumar.pasumarthi@microchip.com> References: <20230404171613.1336093-1-tharunkumar.pasumarthi@microchip.com> MIME-Version: 1.0 X-Spam-Status: No, score=-2.5 required=5.0 tests=DKIMWL_WL_HIGH,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,RCVD_IN_DNSWL_MED, RCVD_IN_MSPIKE_H2,SPF_HELO_PASS,SPF_PASS autolearn=unavailable autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-getmail-retrieved-from-mailbox: =?utf-8?q?INBOX?= X-GMAIL-THRID: =?utf-8?q?1762268427496285754?= X-GMAIL-MSGID: =?utf-8?q?1762268427496285754?= Hardware does not have support to disable individual chip select lines. Disable all chip select lines by using SPI_FORCE_CE bit. Fixes: 1cc0cbea7167 ("spi: microchip: pci1xxxx: Add driver for SPI controller of PCI1XXXX PCIe switch") Signed-off-by: Tharun Kumar P --- drivers/spi/spi-pci1xxxx.c | 17 +++++------------ 1 file changed, 5 insertions(+), 12 deletions(-) diff --git a/drivers/spi/spi-pci1xxxx.c b/drivers/spi/spi-pci1xxxx.c index 82d4bfeea1fa..4445d82409d6 100644 --- a/drivers/spi/spi-pci1xxxx.c +++ b/drivers/spi/spi-pci1xxxx.c @@ -114,17 +114,14 @@ static void pci1xxxx_spi_set_cs(struct spi_device *spi, bool enable) /* Set the DEV_SEL bits of the SPI_MST_CTL_REG */ regval = readl(par->reg_base + SPI_MST_CTL_REG_OFFSET(p->hw_inst)); - if (enable) { + if (!enable) { + regval |= SPI_FORCE_CE; regval &= ~SPI_MST_CTL_DEVSEL_MASK; regval |= (spi_get_chipselect(spi, 0) << 25); - writel(regval, - par->reg_base + SPI_MST_CTL_REG_OFFSET(p->hw_inst)); } else { - regval &= ~(spi_get_chipselect(spi, 0) << 25); - writel(regval, - par->reg_base + SPI_MST_CTL_REG_OFFSET(p->hw_inst)); - + regval &= ~SPI_FORCE_CE; } + writel(regval, par->reg_base + SPI_MST_CTL_REG_OFFSET(p->hw_inst)); } static u8 pci1xxxx_get_clock_div(u32 hz) @@ -199,7 +196,7 @@ static int pci1xxxx_spi_transfer_one(struct spi_controller *spi_ctlr, else regval &= ~SPI_MST_CTL_MODE_SEL; - regval |= ((clkdiv << 5) | SPI_FORCE_CE); + regval |= (clkdiv << 5); regval &= ~SPI_MST_CTL_CMD_LEN_MASK; regval |= (len << 8); writel(regval, par->reg_base + @@ -223,10 +220,6 @@ static int pci1xxxx_spi_transfer_one(struct spi_controller *spi_ctlr, } } } - - regval = readl(par->reg_base + SPI_MST_CTL_REG_OFFSET(p->hw_inst)); - regval &= ~SPI_FORCE_CE; - writel(regval, par->reg_base + SPI_MST_CTL_REG_OFFSET(p->hw_inst)); p->spi_xfer_in_progress = false; return 0;